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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001#ifndef _MSM_KGSL_H
2#define _MSM_KGSL_H
3
4#define KGSL_VERSION_MAJOR 3
Jordan Croused4bc9d22011-11-17 13:39:21 -07005#define KGSL_VERSION_MINOR 8
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006
7/*context flags */
8#define KGSL_CONTEXT_SAVE_GMEM 1
9#define KGSL_CONTEXT_NO_GMEM_ALLOC 2
10#define KGSL_CONTEXT_SUBMIT_IB_LIST 4
11#define KGSL_CONTEXT_CTX_SWITCH 8
12
13/* Memory allocayion flags */
14#define KGSL_MEMFLAGS_GPUREADONLY 0x01000000
15
16/* generic flag values */
17#define KGSL_FLAGS_NORMALMODE 0x00000000
18#define KGSL_FLAGS_SAFEMODE 0x00000001
19#define KGSL_FLAGS_INITIALIZED0 0x00000002
20#define KGSL_FLAGS_INITIALIZED 0x00000004
21#define KGSL_FLAGS_STARTED 0x00000008
22#define KGSL_FLAGS_ACTIVE 0x00000010
23#define KGSL_FLAGS_RESERVED0 0x00000020
24#define KGSL_FLAGS_RESERVED1 0x00000040
25#define KGSL_FLAGS_RESERVED2 0x00000080
26#define KGSL_FLAGS_SOFT_RESET 0x00000100
27
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -060028/* Clock flags to show which clocks should be controled by a given platform */
29#define KGSL_CLK_SRC 0x00000001
30#define KGSL_CLK_CORE 0x00000002
31#define KGSL_CLK_IFACE 0x00000004
32#define KGSL_CLK_MEM 0x00000008
33#define KGSL_CLK_MEM_IFACE 0x00000010
34#define KGSL_CLK_AXI 0x00000020
35
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070036#define KGSL_MAX_PWRLEVELS 5
37
Suman Tatiraju0123d182011-09-30 14:59:06 -070038#define KGSL_CONVERT_TO_MBPS(val) \
39 (val*1000*1000U)
40
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070041/* device id */
42enum kgsl_deviceid {
43 KGSL_DEVICE_3D0 = 0x00000000,
44 KGSL_DEVICE_2D0 = 0x00000001,
45 KGSL_DEVICE_2D1 = 0x00000002,
46 KGSL_DEVICE_MAX = 0x00000003
47};
48
49enum kgsl_user_mem_type {
50 KGSL_USER_MEM_TYPE_PMEM = 0x00000000,
51 KGSL_USER_MEM_TYPE_ASHMEM = 0x00000001,
Jordan Crouse8eab35a2011-10-12 16:57:48 -060052 KGSL_USER_MEM_TYPE_ADDR = 0x00000002,
53 KGSL_USER_MEM_TYPE_ION = 0x00000003,
Lynus Vaz31b5290e2012-01-18 19:20:24 +053054 KGSL_USER_MEM_TYPE_MAX = 0x00000004,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055};
56
57struct kgsl_devinfo {
58
59 unsigned int device_id;
60 /* chip revision id
61 * coreid:8 majorrev:8 minorrev:8 patch:8
62 */
63 unsigned int chip_id;
64 unsigned int mmu_enabled;
65 unsigned int gmem_gpubaseaddr;
66 /*
67 * This field contains the adreno revision
68 * number 200, 205, 220, etc...
69 */
70 unsigned int gpu_id;
71 unsigned int gmem_sizebytes;
72};
73
74/* this structure defines the region of memory that can be mmap()ed from this
75 driver. The timestamp fields are volatile because they are written by the
76 GPU
77*/
78struct kgsl_devmemstore {
79 volatile unsigned int soptimestamp;
80 unsigned int sbz;
81 volatile unsigned int eoptimestamp;
82 unsigned int sbz2;
83 volatile unsigned int ts_cmp_enable;
84 unsigned int sbz3;
85 volatile unsigned int ref_wait_ts;
86 unsigned int sbz4;
87 unsigned int current_context;
88 unsigned int sbz5;
89};
90
91#define KGSL_DEVICE_MEMSTORE_OFFSET(field) \
92 offsetof(struct kgsl_devmemstore, field)
93
94
95/* timestamp id*/
96enum kgsl_timestamp_type {
97 KGSL_TIMESTAMP_CONSUMED = 0x00000001, /* start-of-pipeline timestamp */
98 KGSL_TIMESTAMP_RETIRED = 0x00000002, /* end-of-pipeline timestamp*/
99 KGSL_TIMESTAMP_MAX = 0x00000002,
100};
101
102/* property types - used with kgsl_device_getproperty */
103enum kgsl_property_type {
104 KGSL_PROP_DEVICE_INFO = 0x00000001,
105 KGSL_PROP_DEVICE_SHADOW = 0x00000002,
106 KGSL_PROP_DEVICE_POWER = 0x00000003,
107 KGSL_PROP_SHMEM = 0x00000004,
108 KGSL_PROP_SHMEM_APERTURES = 0x00000005,
109 KGSL_PROP_MMU_ENABLE = 0x00000006,
110 KGSL_PROP_INTERRUPT_WAITS = 0x00000007,
111 KGSL_PROP_VERSION = 0x00000008,
112};
113
114struct kgsl_shadowprop {
115 unsigned int gpuaddr;
116 unsigned int size;
117 unsigned int flags; /* contains KGSL_FLAGS_ values */
118};
119
120struct kgsl_pwrlevel {
121 unsigned int gpu_freq;
122 unsigned int bus_freq;
Lucille Sylvester596d4c22011-10-19 18:04:01 -0600123 unsigned int io_fraction;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700124};
125
126struct kgsl_version {
127 unsigned int drv_major;
128 unsigned int drv_minor;
129 unsigned int dev_major;
130 unsigned int dev_minor;
131};
132
133#ifdef __KERNEL__
134
135#define KGSL_3D0_REG_MEMORY "kgsl_3d0_reg_memory"
136#define KGSL_3D0_IRQ "kgsl_3d0_irq"
137#define KGSL_2D0_REG_MEMORY "kgsl_2d0_reg_memory"
138#define KGSL_2D0_IRQ "kgsl_2d0_irq"
139#define KGSL_2D1_REG_MEMORY "kgsl_2d1_reg_memory"
140#define KGSL_2D1_IRQ "kgsl_2d1_irq"
141
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600142struct kgsl_device_platform_data {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700143 struct kgsl_pwrlevel pwrlevel[KGSL_MAX_PWRLEVELS];
144 int init_level;
145 int num_levels;
146 int (*set_grp_async)(void);
147 unsigned int idle_timeout;
148 unsigned int nap_allowed;
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600149 unsigned int clk_map;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700150 struct msm_bus_scale_pdata *bus_scale_table;
Shubhraprakash Das767fdda2011-08-15 15:49:45 -0600151 const char *iommu_user_ctx_name;
152 const char *iommu_priv_ctx_name;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700153};
154
155#endif
156
157/* structure holds list of ibs */
158struct kgsl_ibdesc {
159 unsigned int gpuaddr;
160 void *hostptr;
161 unsigned int sizedwords;
162 unsigned int ctrl;
163};
164
165/* ioctls */
166#define KGSL_IOC_TYPE 0x09
167
168/* get misc info about the GPU
169 type should be a value from enum kgsl_property_type
170 value points to a structure that varies based on type
171 sizebytes is sizeof() that structure
172 for KGSL_PROP_DEVICE_INFO, use struct kgsl_devinfo
173 this structure contaings hardware versioning info.
174 for KGSL_PROP_DEVICE_SHADOW, use struct kgsl_shadowprop
175 this is used to find mmap() offset and sizes for mapping
176 struct kgsl_memstore into userspace.
177*/
178struct kgsl_device_getproperty {
179 unsigned int type;
180 void *value;
181 unsigned int sizebytes;
182};
183
184#define IOCTL_KGSL_DEVICE_GETPROPERTY \
185 _IOWR(KGSL_IOC_TYPE, 0x2, struct kgsl_device_getproperty)
186
187
188/* read a GPU register.
189 offsetwords it the 32 bit word offset from the beginning of the
190 GPU register space.
191 */
192struct kgsl_device_regread {
193 unsigned int offsetwords;
194 unsigned int value; /* output param */
195};
196
197#define IOCTL_KGSL_DEVICE_REGREAD \
198 _IOWR(KGSL_IOC_TYPE, 0x3, struct kgsl_device_regread)
199
200
201/* block until the GPU has executed past a given timestamp
202 * timeout is in milliseconds.
203 */
204struct kgsl_device_waittimestamp {
205 unsigned int timestamp;
206 unsigned int timeout;
207};
208
209#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP \
210 _IOW(KGSL_IOC_TYPE, 0x6, struct kgsl_device_waittimestamp)
211
212
213/* issue indirect commands to the GPU.
214 * drawctxt_id must have been created with IOCTL_KGSL_DRAWCTXT_CREATE
215 * ibaddr and sizedwords must specify a subset of a buffer created
216 * with IOCTL_KGSL_SHAREDMEM_FROM_PMEM
217 * flags may be a mask of KGSL_CONTEXT_ values
218 * timestamp is a returned counter value which can be passed to
219 * other ioctls to determine when the commands have been executed by
220 * the GPU.
221 */
222struct kgsl_ringbuffer_issueibcmds {
223 unsigned int drawctxt_id;
224 unsigned int ibdesc_addr;
225 unsigned int numibs;
226 unsigned int timestamp; /*output param */
227 unsigned int flags;
228};
229
230#define IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS \
231 _IOWR(KGSL_IOC_TYPE, 0x10, struct kgsl_ringbuffer_issueibcmds)
232
233/* read the most recently executed timestamp value
234 * type should be a value from enum kgsl_timestamp_type
235 */
236struct kgsl_cmdstream_readtimestamp {
237 unsigned int type;
238 unsigned int timestamp; /*output param */
239};
240
Jason Varbedian80ba33d2011-07-11 17:29:05 -0700241#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_OLD \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700242 _IOR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp)
243
Jason Varbedian80ba33d2011-07-11 17:29:05 -0700244#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP \
245 _IOWR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp)
246
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700247/* free memory when the GPU reaches a given timestamp.
248 * gpuaddr specify a memory region created by a
249 * IOCTL_KGSL_SHAREDMEM_FROM_PMEM call
250 * type should be a value from enum kgsl_timestamp_type
251 */
252struct kgsl_cmdstream_freememontimestamp {
253 unsigned int gpuaddr;
254 unsigned int type;
255 unsigned int timestamp;
256};
257
258#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP \
259 _IOW(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp)
260
261/* Previous versions of this header had incorrectly defined
262 IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP as a read-only ioctl instead
263 of a write only ioctl. To ensure binary compatability, the following
264 #define will be used to intercept the incorrect ioctl
265*/
266
267#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_OLD \
268 _IOR(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp)
269
270/* create a draw context, which is used to preserve GPU state.
271 * The flags field may contain a mask KGSL_CONTEXT_* values
272 */
273struct kgsl_drawctxt_create {
274 unsigned int flags;
275 unsigned int drawctxt_id; /*output param */
276};
277
278#define IOCTL_KGSL_DRAWCTXT_CREATE \
279 _IOWR(KGSL_IOC_TYPE, 0x13, struct kgsl_drawctxt_create)
280
281/* destroy a draw context */
282struct kgsl_drawctxt_destroy {
283 unsigned int drawctxt_id;
284};
285
286#define IOCTL_KGSL_DRAWCTXT_DESTROY \
287 _IOW(KGSL_IOC_TYPE, 0x14, struct kgsl_drawctxt_destroy)
288
289/* add a block of pmem, fb, ashmem or user allocated address
290 * into the GPU address space */
291struct kgsl_map_user_mem {
292 int fd;
293 unsigned int gpuaddr; /*output param */
294 unsigned int len;
295 unsigned int offset;
296 unsigned int hostptr; /*input param */
297 enum kgsl_user_mem_type memtype;
298 unsigned int reserved; /* May be required to add
299 params for another mem type */
300};
301
302#define IOCTL_KGSL_MAP_USER_MEM \
303 _IOWR(KGSL_IOC_TYPE, 0x15, struct kgsl_map_user_mem)
304
305/* add a block of pmem or fb into the GPU address space */
306struct kgsl_sharedmem_from_pmem {
307 int pmem_fd;
308 unsigned int gpuaddr; /*output param */
309 unsigned int len;
310 unsigned int offset;
311};
312
313#define IOCTL_KGSL_SHAREDMEM_FROM_PMEM \
314 _IOWR(KGSL_IOC_TYPE, 0x20, struct kgsl_sharedmem_from_pmem)
315
316/* remove memory from the GPU's address space */
317struct kgsl_sharedmem_free {
318 unsigned int gpuaddr;
319};
320
321#define IOCTL_KGSL_SHAREDMEM_FREE \
322 _IOW(KGSL_IOC_TYPE, 0x21, struct kgsl_sharedmem_free)
323
Sushmita Susheelendra41f8fa32011-05-11 17:15:58 -0600324struct kgsl_cff_user_event {
325 unsigned char cff_opcode;
326 unsigned int op1;
327 unsigned int op2;
328 unsigned int op3;
329 unsigned int op4;
330 unsigned int op5;
331 unsigned int __pad[2];
332};
333
334#define IOCTL_KGSL_CFF_USER_EVENT \
335 _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_cff_user_event)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700336
337struct kgsl_gmem_desc {
338 unsigned int x;
339 unsigned int y;
340 unsigned int width;
341 unsigned int height;
342 unsigned int pitch;
343};
344
345struct kgsl_buffer_desc {
346 void *hostptr;
347 unsigned int gpuaddr;
348 int size;
349 unsigned int format;
350 unsigned int pitch;
351 unsigned int enabled;
352};
353
354struct kgsl_bind_gmem_shadow {
355 unsigned int drawctxt_id;
356 struct kgsl_gmem_desc gmem_desc;
357 unsigned int shadow_x;
358 unsigned int shadow_y;
359 struct kgsl_buffer_desc shadow_buffer;
360 unsigned int buffer_id;
361};
362
363#define IOCTL_KGSL_DRAWCTXT_BIND_GMEM_SHADOW \
364 _IOW(KGSL_IOC_TYPE, 0x22, struct kgsl_bind_gmem_shadow)
365
366/* add a block of memory into the GPU address space */
367struct kgsl_sharedmem_from_vmalloc {
368 unsigned int gpuaddr; /*output param */
369 unsigned int hostptr;
370 unsigned int flags;
371};
372
373#define IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC \
374 _IOWR(KGSL_IOC_TYPE, 0x23, struct kgsl_sharedmem_from_vmalloc)
375
376#define IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE \
377 _IOW(KGSL_IOC_TYPE, 0x24, struct kgsl_sharedmem_free)
378
379struct kgsl_drawctxt_set_bin_base_offset {
380 unsigned int drawctxt_id;
381 unsigned int offset;
382};
383
384#define IOCTL_KGSL_DRAWCTXT_SET_BIN_BASE_OFFSET \
385 _IOW(KGSL_IOC_TYPE, 0x25, struct kgsl_drawctxt_set_bin_base_offset)
386
387enum kgsl_cmdwindow_type {
388 KGSL_CMDWINDOW_MIN = 0x00000000,
389 KGSL_CMDWINDOW_2D = 0x00000000,
390 KGSL_CMDWINDOW_3D = 0x00000001, /* legacy */
391 KGSL_CMDWINDOW_MMU = 0x00000002,
392 KGSL_CMDWINDOW_ARBITER = 0x000000FF,
393 KGSL_CMDWINDOW_MAX = 0x000000FF,
394};
395
396/* write to the command window */
397struct kgsl_cmdwindow_write {
398 enum kgsl_cmdwindow_type target;
399 unsigned int addr;
400 unsigned int data;
401};
402
403#define IOCTL_KGSL_CMDWINDOW_WRITE \
404 _IOW(KGSL_IOC_TYPE, 0x2e, struct kgsl_cmdwindow_write)
405
406struct kgsl_gpumem_alloc {
407 unsigned long gpuaddr;
408 size_t size;
409 unsigned int flags;
410};
411
412#define IOCTL_KGSL_GPUMEM_ALLOC \
413 _IOWR(KGSL_IOC_TYPE, 0x2f, struct kgsl_gpumem_alloc)
414
Jeremy Gebbena7423e42011-04-18 15:11:21 -0600415struct kgsl_cff_syncmem {
416 unsigned int gpuaddr;
417 unsigned int len;
418 unsigned int __pad[2]; /* For future binary compatibility */
419};
420
421#define IOCTL_KGSL_CFF_SYNCMEM \
422 _IOW(KGSL_IOC_TYPE, 0x30, struct kgsl_cff_syncmem)
423
Jordan Croused4bc9d22011-11-17 13:39:21 -0700424/*
425 * A timestamp event allows the user space to register an action following an
426 * expired timestamp.
427 */
428
429struct kgsl_timestamp_event {
430 int type; /* Type of event (see list below) */
431 unsigned int timestamp; /* Timestamp to trigger event on */
432 unsigned int context_id; /* Context for the timestamp */
433 void *priv; /* Pointer to the event specific blob */
434 size_t len; /* Size of the event specific blob */
435};
436
437#define IOCTL_KGSL_TIMESTAMP_EVENT \
438 _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_timestamp_event)
439
440/* A genlock timestamp event releases an existing lock on timestamp expire */
441
442#define KGSL_TIMESTAMP_EVENT_GENLOCK 1
443
444struct kgsl_timestamp_event_genlock {
445 int handle; /* Handle of the genlock lock to release */
446};
447
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700448#ifdef __KERNEL__
449#ifdef CONFIG_MSM_KGSL_DRM
450int kgsl_gem_obj_addr(int drm_fd, int handle, unsigned long *start,
451 unsigned long *len);
452#else
453#define kgsl_gem_obj_addr(...) 0
454#endif
455#endif
456#endif /* _MSM_KGSL_H */