| Cyril Chemparathy | 03df0f6 | 2011-01-18 19:21:35 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Sequencer Serial Port (SSP) driver for Texas Instruments' SoCs |
| 3 | * |
| 4 | * Copyright (C) 2010 Texas Instruments Inc |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | #ifndef __TI_SSP_H__ |
| 22 | #define __TI_SSP_H__ |
| 23 | |
| 24 | struct ti_ssp_dev_data { |
| 25 | const char *dev_name; |
| 26 | void *pdata; |
| 27 | size_t pdata_size; |
| 28 | }; |
| 29 | |
| 30 | struct ti_ssp_data { |
| 31 | unsigned long out_clock; |
| 32 | struct ti_ssp_dev_data dev_data[2]; |
| 33 | }; |
| 34 | |
| Cyril Chemparathy | a72aeef | 2011-01-18 19:21:36 +0000 | [diff] [blame] | 35 | struct ti_ssp_spi_data { |
| 36 | unsigned long iosel; |
| 37 | int num_cs; |
| 38 | void (*select)(int cs); |
| 39 | }; |
| 40 | |
| Cyril Chemparathy | 03df0f6 | 2011-01-18 19:21:35 +0000 | [diff] [blame] | 41 | /* |
| 42 | * Sequencer port IO pin configuration bits. These do not correlate 1-1 with |
| 43 | * the hardware. The iosel field in the port data combines iosel1 and iosel2, |
| 44 | * and is therefore not a direct map to register space. It is best to use the |
| 45 | * macros below to construct iosel values. |
| 46 | * |
| 47 | * least significant 16 bits --> iosel1 |
| 48 | * most significant 16 bits --> iosel2 |
| 49 | */ |
| 50 | |
| 51 | #define SSP_IN 0x0000 |
| 52 | #define SSP_DATA 0x0001 |
| 53 | #define SSP_CLOCK 0x0002 |
| 54 | #define SSP_CHIPSEL 0x0003 |
| 55 | #define SSP_OUT 0x0004 |
| 56 | #define SSP_PIN_SEL(pin, v) ((v) << ((pin) * 3)) |
| 57 | #define SSP_PIN_MASK(pin) SSP_PIN_SEL(pin, 0x7) |
| 58 | #define SSP_INPUT_SEL(pin) ((pin) << 16) |
| 59 | |
| 60 | /* Sequencer port config bits */ |
| 61 | #define SSP_EARLY_DIN BIT(8) |
| 62 | #define SSP_DELAY_DOUT BIT(9) |
| 63 | |
| 64 | /* Sequence map definitions */ |
| 65 | #define SSP_CLK_HIGH BIT(0) |
| 66 | #define SSP_CLK_LOW 0 |
| 67 | #define SSP_DATA_HIGH BIT(1) |
| 68 | #define SSP_DATA_LOW 0 |
| 69 | #define SSP_CS_HIGH BIT(2) |
| 70 | #define SSP_CS_LOW 0 |
| 71 | #define SSP_OUT_MODE BIT(3) |
| 72 | #define SSP_IN_MODE 0 |
| 73 | #define SSP_DATA_REG BIT(4) |
| 74 | #define SSP_ADDR_REG 0 |
| 75 | |
| 76 | #define SSP_OPCODE_DIRECT ((0x0) << 5) |
| 77 | #define SSP_OPCODE_TOGGLE ((0x1) << 5) |
| 78 | #define SSP_OPCODE_SHIFT ((0x2) << 5) |
| 79 | #define SSP_OPCODE_BRANCH0 ((0x4) << 5) |
| 80 | #define SSP_OPCODE_BRANCH1 ((0x5) << 5) |
| 81 | #define SSP_OPCODE_BRANCH ((0x6) << 5) |
| 82 | #define SSP_OPCODE_STOP ((0x7) << 5) |
| 83 | #define SSP_BRANCH(addr) ((addr) << 8) |
| 84 | #define SSP_COUNT(cycles) ((cycles) << 8) |
| 85 | |
| 86 | int ti_ssp_raw_read(struct device *dev); |
| 87 | int ti_ssp_raw_write(struct device *dev, u32 val); |
| 88 | int ti_ssp_load(struct device *dev, int offs, u32* prog, int len); |
| 89 | int ti_ssp_run(struct device *dev, u32 pc, u32 input, u32 *output); |
| 90 | int ti_ssp_set_mode(struct device *dev, int mode); |
| 91 | int ti_ssp_set_iosel(struct device *dev, u32 iosel); |
| 92 | |
| 93 | #endif /* __TI_SSP_H__ */ |