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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* arch/arm/mach-msm/qdsp5/adsp.c
2 *
3 * Register/Interrupt access for userspace aDSP library.
4 *
5 * Copyright (C) 2008 Google, Inc.
Manish Dewangan8e87bc12012-02-09 20:25:15 +05306 * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007 * Author: Iliyan Malchev <ibm@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20/* TODO:
21 * - move shareable rpc code outside of adsp.c
22 * - general solution for virt->phys patchup
23 * - queue IDs should be relative to modules
24 * - disallow access to non-associated queues
25 */
26
27#include <linux/clk.h>
28#include <linux/delay.h>
29#include <linux/interrupt.h>
30#include <linux/kernel.h>
31#include <linux/kthread.h>
32#include <linux/module.h>
33#include <linux/uaccess.h>
34#include <linux/wait.h>
35#include <linux/wakelock.h>
36#include <linux/slab.h>
37#include <mach/debug_mm.h>
38#include <linux/debugfs.h>
39
40#ifdef CONFIG_DEBUG_FS
41static struct dentry *dentry_adsp;
42static struct dentry *dentry_wdata;
43static struct dentry *dentry_rdata;
44static int wdump, rdump;
45#endif /* CONFIG_DEBUG_FS */
46static struct wake_lock adsp_wake_lock;
47static inline void prevent_suspend(void)
48{
49 wake_lock(&adsp_wake_lock);
50}
51static inline void allow_suspend(void)
52{
53 wake_unlock(&adsp_wake_lock);
54}
55
56#include <linux/io.h>
57#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/msm_adsp.h>
59#include "adsp.h"
60
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061static struct adsp_info adsp_info;
62static struct msm_rpc_endpoint *rpc_cb_server_client;
63static struct msm_adsp_module *adsp_modules;
64static int adsp_open_count;
65
66static uint32_t rpc_adsp_rtos_atom_prog;
67static uint32_t rpc_adsp_rtos_atom_vers;
68static uint32_t rpc_adsp_rtos_atom_vers_comp;
69static uint32_t rpc_adsp_rtos_mtoa_prog;
70static uint32_t rpc_adsp_rtos_mtoa_vers;
71static uint32_t rpc_adsp_rtos_mtoa_vers_comp;
72static DEFINE_MUTEX(adsp_open_lock);
73
74/* protect interactions with the ADSP command/message queue */
75static spinlock_t adsp_cmd_lock;
76static spinlock_t adsp_write_lock;
77
78static uint32_t current_image = -1;
79
80void adsp_set_image(struct adsp_info *info, uint32_t image)
81{
82 current_image = image;
83}
84
85/*
86 * Checks whether the module_id is available in the
87 * module_entries table.If module_id is available returns `0`.
88 * If module_id is not available returns `-ENXIO`.
89 */
90static int32_t adsp_validate_module(uint32_t module_id)
91{
92 uint32_t *ptr;
93 uint32_t module_index;
94 uint32_t num_mod_entries;
95
96 ptr = adsp_info.init_info_ptr->module_entries;
97 num_mod_entries = adsp_info.init_info_ptr->module_table_size;
98
99 for (module_index = 0; module_index < num_mod_entries; module_index++)
100 if (module_id == ptr[module_index])
101 return 0;
102
103 return -ENXIO;
104}
105
106static int32_t adsp_validate_queue(uint32_t mod_id, unsigned q_idx,
107 uint32_t size)
108{
109 int32_t i;
110 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
111
112 sptr = adsp_info.init_info_ptr;
113 for (i = 0; i < sptr->mod_to_q_entries; i++)
114 if (mod_id == sptr->mod_to_q_tbl[i].module)
115 if (q_idx == sptr->mod_to_q_tbl[i].q_type) {
116 if (size <= sptr->mod_to_q_tbl[i].q_max_len)
117 return 0;
118 MM_ERR("q_idx: %d is not a valid queue \
119 for module %x\n", q_idx, mod_id);
120 return -EINVAL;
121 }
122 MM_ERR("cmd_buf size is more than allowed size\n");
123 return -EINVAL;
124}
125
126uint32_t adsp_get_module(struct adsp_info *info, uint32_t task)
127{
128 return info->task_to_module[current_image][task];
129}
130
131uint32_t adsp_get_queue_offset(struct adsp_info *info, uint32_t queue_id)
132{
133 return info->queue_offset[current_image][queue_id];
134}
135
136static int rpc_adsp_rtos_app_to_modem(uint32_t cmd, uint32_t module,
137 struct msm_adsp_module *adsp_module)
138{
139 int rc;
140 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
141 struct rpc_reply_hdr rpc_rsp;
142
143 rpc_req.gotit = cpu_to_be32(1);
144 rpc_req.cmd = cpu_to_be32(cmd);
145 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
146 rpc_req.module = cpu_to_be32(module);
147 rc = msm_rpc_call_reply(adsp_module->rpc_client,
148 RPC_ADSP_RTOS_APP_TO_MODEM_PROC,
149 &rpc_req, sizeof(rpc_req),
150 &rpc_rsp, sizeof(rpc_rsp),
151 5 * HZ);
152
153 if (rc < 0) {
154 MM_ERR("error receiving RPC reply: %d (%d)\n",
155 rc, -ERESTARTSYS);
156 return rc;
157 }
158
159 if (be32_to_cpu(rpc_rsp.reply_stat) != RPCMSG_REPLYSTAT_ACCEPTED) {
160 MM_ERR("RPC call was denied!\n");
161 return -EPERM;
162 }
163
164 if (be32_to_cpu(rpc_rsp.data.acc_hdr.accept_stat) !=
165 RPC_ACCEPTSTAT_SUCCESS) {
166 MM_ERR("RPC call was not successful (%d)\n",
167 be32_to_cpu(rpc_rsp.data.acc_hdr.accept_stat));
168 return -EINVAL;
169 }
170
171 return 0;
172}
173
174static int get_module_index(uint32_t id)
175{
176 int mod_idx;
177 for (mod_idx = 0; mod_idx < adsp_info.module_count; mod_idx++)
178 if (adsp_info.module[mod_idx].id == id)
179 return mod_idx;
180
181 return -ENXIO;
182}
183
184static struct msm_adsp_module *find_adsp_module_by_id(
185 struct adsp_info *info, uint32_t id)
186{
187 int mod_idx;
188
189 if (id > info->max_module_id) {
190 return NULL;
191 } else {
192 mod_idx = get_module_index(id);
193 if (mod_idx < 0)
194 return NULL;
195 return info->id_to_module[mod_idx];
196 }
197}
198
199static struct msm_adsp_module *find_adsp_module_by_name(
200 struct adsp_info *info, const char *name)
201{
202 unsigned n;
203 for (n = 0; n < info->module_count; n++)
204 if (!strcmp(name, adsp_modules[n].name))
205 return adsp_modules + n;
206 return NULL;
207}
208
209static int adsp_rpc_init(struct msm_adsp_module *adsp_module)
210{
211 /* remove the original connect once compatible support is complete */
212 adsp_module->rpc_client = msm_rpc_connect(
213 rpc_adsp_rtos_atom_prog,
214 rpc_adsp_rtos_atom_vers,
215 MSM_RPC_UNINTERRUPTIBLE);
216 if (IS_ERR(adsp_module->rpc_client))
217 adsp_module->rpc_client = msm_rpc_connect_compatible(
218 rpc_adsp_rtos_atom_prog,
219 rpc_adsp_rtos_atom_vers_comp,
220 MSM_RPC_UNINTERRUPTIBLE);
221
222 if (IS_ERR(adsp_module->rpc_client)) {
223 int rc = PTR_ERR(adsp_module->rpc_client);
224 adsp_module->rpc_client = 0;
225 MM_ERR("could not open rpc client: %d\n", rc);
226 return rc;
227 }
228
229 return 0;
230}
231
232/*
233 * Send RPC_ADSP_RTOS_CMD_GET_INIT_INFO cmd to ARM9 and get
234 * queue offsets and module entries (init info) as part of the event.
235 */
236static void msm_get_init_info(void)
237{
238 int rc;
239 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
240 struct rpc_reply_hdr rpc_rsp;
241
242 adsp_info.init_info_rpc_client = msm_rpc_connect(
243 rpc_adsp_rtos_atom_prog,
244 rpc_adsp_rtos_atom_vers,
245 MSM_RPC_UNINTERRUPTIBLE);
246 if (IS_ERR(adsp_info.init_info_rpc_client)) {
247 adsp_info.init_info_rpc_client = msm_rpc_connect_compatible(
248 rpc_adsp_rtos_atom_prog,
249 rpc_adsp_rtos_atom_vers_comp,
250 MSM_RPC_UNINTERRUPTIBLE);
251 if (IS_ERR(adsp_info.init_info_rpc_client)) {
252 rc = PTR_ERR(adsp_info.init_info_rpc_client);
253 adsp_info.init_info_rpc_client = 0;
254 MM_ERR("could not open rpc client: %d\n", rc);
255 return;
256 }
257 }
258
259 rpc_req.gotit = cpu_to_be32(1);
260 rpc_req.cmd = cpu_to_be32(RPC_ADSP_RTOS_CMD_GET_INIT_INFO);
261 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
262 rpc_req.module = 0;
263
264 rc = msm_rpc_call_reply(adsp_info.init_info_rpc_client,
265 RPC_ADSP_RTOS_APP_TO_MODEM_PROC,
266 &rpc_req, sizeof(rpc_req),
267 &rpc_rsp, sizeof(rpc_rsp),
268 5 * HZ);
269
270 if (rc < 0)
271 MM_ERR("could not send RPC request: %d\n", rc);
272}
273
274int msm_adsp_get(const char *name, struct msm_adsp_module **out,
275 struct msm_adsp_ops *ops, void *driver_data)
276{
277 struct msm_adsp_module *module;
278 int rc = 0;
279 static uint32_t init_info_cmd_sent;
280
Manish Dewangan691f1c42012-02-10 12:50:14 +0530281 mutex_lock(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700282 if (!init_info_cmd_sent) {
283 init_waitqueue_head(&adsp_info.init_info_wait);
284 msm_get_init_info();
285 rc = wait_event_timeout(adsp_info.init_info_wait,
286 adsp_info.init_info_state == ADSP_STATE_INIT_INFO,
287 5 * HZ);
288 if (!rc) {
289 MM_ERR("INIT_INFO failed\n");
Manish Dewangan691f1c42012-02-10 12:50:14 +0530290 mutex_unlock(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700291 return -ETIMEDOUT;
Manish Dewangan691f1c42012-02-10 12:50:14 +0530292
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700293 }
294 init_info_cmd_sent++;
295 }
Manish Dewangan691f1c42012-02-10 12:50:14 +0530296 mutex_unlock(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700297
298 module = find_adsp_module_by_name(&adsp_info, name);
299 if (!module)
300 return -ENODEV;
301
302 mutex_lock(&module->lock);
303 MM_INFO("opening module %s\n", module->name);
304
305 if (module->ops) {
306 rc = -EBUSY;
307 goto done;
308 }
309
310 rc = adsp_rpc_init(module);
311 if (rc)
312 goto done;
313
314 module->ops = ops;
315 module->driver_data = driver_data;
316 *out = module;
317 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_REGISTER_APP,
318 module->id, module);
319 if (rc) {
320 module->ops = NULL;
321 module->driver_data = NULL;
322 *out = NULL;
323 MM_ERR("REGISTER_APP failed\n");
324 goto done;
325 }
326
327 MM_DBG("module %s has been registered\n", module->name);
328
329done:
330 mutex_unlock(&module->lock);
331 return rc;
332}
333EXPORT_SYMBOL(msm_adsp_get);
334
335static int msm_adsp_disable_locked(struct msm_adsp_module *module);
336
337void msm_adsp_put(struct msm_adsp_module *module)
338{
339 unsigned long flags;
340
341 mutex_lock(&module->lock);
342 if (module->ops) {
343 MM_INFO("closing module %s\n", module->name);
344
345 /* lock to ensure a dsp event cannot be delivered
346 * during or after removal of the ops and driver_data
347 */
348 spin_lock_irqsave(&adsp_cmd_lock, flags);
349 module->ops = NULL;
350 module->driver_data = NULL;
351 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
352
353 if (module->state != ADSP_STATE_DISABLED) {
354 MM_INFO("disabling module %s\n", module->name);
355 msm_adsp_disable_locked(module);
356 }
357
358 msm_rpc_close(module->rpc_client);
359 module->rpc_client = 0;
360 } else {
361 MM_INFO("module %s is already closed\n", module->name);
362 }
363 mutex_unlock(&module->lock);
364}
365EXPORT_SYMBOL(msm_adsp_put);
366
367/* this should be common code with rpc_servers.c */
368static int rpc_send_accepted_void_reply(struct msm_rpc_endpoint *client,
369 uint32_t xid, uint32_t accept_status)
370{
371 int rc = 0;
372 uint8_t reply_buf[sizeof(struct rpc_reply_hdr)];
373 struct rpc_reply_hdr *reply = (struct rpc_reply_hdr *)reply_buf;
374
375 reply->xid = cpu_to_be32(xid);
376 reply->type = cpu_to_be32(1); /* reply */
377 reply->reply_stat = cpu_to_be32(RPCMSG_REPLYSTAT_ACCEPTED);
378
379 reply->data.acc_hdr.accept_stat = cpu_to_be32(accept_status);
380 reply->data.acc_hdr.verf_flavor = 0;
381 reply->data.acc_hdr.verf_length = 0;
382
383 rc = msm_rpc_write(rpc_cb_server_client, reply_buf, sizeof(reply_buf));
384 if (rc < 0)
385 MM_ERR("could not write RPC response: %d\n", rc);
386 return rc;
387}
388
389int __msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
390 void *cmd_buf, size_t cmd_size)
391{
392 uint32_t ctrl_word;
393 uint32_t dsp_q_addr;
394 uint32_t dsp_addr;
395 uint32_t cmd_id = 0;
396 int cnt = 0;
397 int ret_status = 0;
398 unsigned long flags;
399 struct adsp_info *info;
400
401 if (!module || !cmd_buf) {
402 MM_ERR("Called with NULL parameters\n");
403 return -EINVAL;
404 }
405 info = module->info;
406 spin_lock_irqsave(&adsp_write_lock, flags);
407
408 if (module->state != ADSP_STATE_ENABLED) {
409 spin_unlock_irqrestore(&adsp_write_lock, flags);
410 MM_ERR("module %s not enabled before write\n", module->name);
411 return -ENODEV;
412 }
413 if (adsp_validate_module(module->id)) {
414 spin_unlock_irqrestore(&adsp_write_lock, flags);
415 MM_ERR("module id validation failed %s %d\n",
416 module->name, module->id);
417 return -ENXIO;
418 }
419 if (dsp_queue_addr >= QDSP_MAX_NUM_QUEUES) {
420 spin_unlock_irqrestore(&adsp_write_lock, flags);
421 MM_ERR("Invalid Queue Index: %d\n", dsp_queue_addr);
422 return -ENXIO;
423 }
424 if (adsp_validate_queue(module->id, dsp_queue_addr, cmd_size)) {
425 spin_unlock_irqrestore(&adsp_write_lock, flags);
426 return -EINVAL;
427 }
428 dsp_q_addr = adsp_get_queue_offset(info, dsp_queue_addr);
429 dsp_q_addr &= ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M;
430
431 /* Poll until the ADSP is ready to accept a command.
432 * Wait for 100us, return error if it's not responding.
433 * If this returns an error, we need to disable ALL modules and
434 * then retry.
435 */
436 while (((ctrl_word = readl(info->write_ctrl)) &
437 ADSP_RTOS_WRITE_CTRL_WORD_READY_M) !=
438 ADSP_RTOS_WRITE_CTRL_WORD_READY_V) {
439 if (cnt > 50) {
440 MM_ERR("timeout waiting for DSP write ready\n");
441 ret_status = -EIO;
442 goto fail;
443 }
444 MM_DBG("waiting for DSP write ready\n");
445 udelay(2);
446 cnt++;
447 }
448
449 /* Set the mutex bits */
450 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
451 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
452
453 /* Clear the command bits */
454 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
455
456 /* Set the queue address bits */
457 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
458 ctrl_word |= dsp_q_addr;
459
460 writel(ctrl_word, info->write_ctrl);
461
462 /* Generate an interrupt to the DSP. This notifies the DSP that
463 * we are about to send a command on this particular queue. The
464 * DSP will in response change its state.
465 */
466 writel(1, info->send_irq);
467
468 /* Poll until the adsp responds to the interrupt; this does not
469 * generate an interrupt from the adsp. This should happen within
470 * 5ms.
471 */
472 cnt = 0;
473 while ((readl(info->write_ctrl) &
474 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M) ==
475 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V) {
476 if (cnt > 2500) {
477 MM_ERR("timeout waiting for adsp ack\n");
478 ret_status = -EIO;
479 goto fail;
480 }
481 udelay(2);
482 cnt++;
483 }
484
485 /* Read the ctrl word */
486 ctrl_word = readl(info->write_ctrl);
487
488 if ((ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_STATUS_M) !=
489 ADSP_RTOS_WRITE_CTRL_WORD_NO_ERR_V) {
490 ret_status = -EAGAIN;
491 goto fail;
492 } else {
493 /* No error */
494 /* Get the DSP buffer address */
495 dsp_addr = (ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M) +
496 (uint32_t)MSM_AD5_BASE;
497
498 if (dsp_addr < (uint32_t)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
499 uint16_t *buf_ptr = (uint16_t *) cmd_buf;
500 uint16_t *dsp_addr16 = (uint16_t *)dsp_addr;
501 cmd_size /= sizeof(uint16_t);
502
503 /* Save the command ID */
504 cmd_id = (uint32_t) buf_ptr[0];
505
506 /* Copy the command to DSP memory */
507 cmd_size++;
508 while (--cmd_size)
509 *dsp_addr16++ = *buf_ptr++;
510 } else {
511 uint32_t *buf_ptr = (uint32_t *) cmd_buf;
512 uint32_t *dsp_addr32 = (uint32_t *)dsp_addr;
513 cmd_size /= sizeof(uint32_t);
514
515 /* Save the command ID */
516 cmd_id = buf_ptr[0];
517
518 cmd_size++;
519 while (--cmd_size)
520 *dsp_addr32++ = *buf_ptr++;
521 }
522
523 /* Set the mutex bits */
524 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
525 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
526
527 /* Set the command bits to write done */
528 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
529 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_CMD_WRITE_DONE_V;
530
531 /* Set the queue address bits */
532 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
533 ctrl_word |= dsp_q_addr;
534
535 writel(ctrl_word, info->write_ctrl);
536
537 /* Generate an interrupt to the DSP. It does not respond with
538 * an interrupt, and we do not need to wait for it to
539 * acknowledge, because it will hold the mutex lock until it's
540 * ready to receive more commands again.
541 */
542 writel(1, info->send_irq);
543
544 module->num_commands++;
545 } /* Ctrl word status bits were 00, no error in the ctrl word */
546
547fail:
548 spin_unlock_irqrestore(&adsp_write_lock, flags);
549 return ret_status;
550}
551EXPORT_SYMBOL(msm_adsp_write);
552
553int msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
554 void *cmd_buf, size_t cmd_size)
555{
556 int rc, retries = 0;
557#ifdef CONFIG_DEBUG_FS
558 uint16_t *ptr;
559 int ii;
560
561 if (wdump > 0) {
562 ptr = cmd_buf;
563 pr_info("A->D:%x\n", module->id);
564 pr_info("adsp: %x %d\n", dsp_queue_addr, cmd_size);
565 for (ii = 0; ii < cmd_size/2; ii++)
566 pr_info("%x ", ptr[ii]);
567 pr_info("\n");
568 }
569#endif /* CONFIG_DEBUG_FS */
570 do {
571 rc = __msm_adsp_write(module, dsp_queue_addr, cmd_buf,
572 cmd_size);
573 if (rc == -EAGAIN)
574 udelay(10);
575 } while (rc == -EAGAIN && retries++ < 300);
576 if (retries > 50)
577 MM_ERR("adsp: %s command took %d attempts: rc %d\n",
578 module->name, retries, rc);
579 return rc;
580}
581
582static void *event_addr;
583static void read_event(void *buf, size_t len)
584{
585 uint32_t dptr[3];
586 struct rpc_adsp_rtos_modem_to_app_args_t *sptr;
587 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
588
589 sptr = event_addr;
590 pkt_ptr = &sptr->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
591
592 dptr[0] = be32_to_cpu(sptr->mtoa_pkt.mp_mtoa_header.event);
593 dptr[1] = be32_to_cpu(pkt_ptr->module);
594 dptr[2] = be32_to_cpu(pkt_ptr->image);
595
596 if (len > EVENT_LEN)
597 len = EVENT_LEN;
598
599 memcpy(buf, dptr, len);
600}
601
602static void handle_adsp_rtos_mtoa_app(struct rpc_request_hdr *req)
603{
604 struct rpc_adsp_rtos_modem_to_app_args_t *args =
605 (struct rpc_adsp_rtos_modem_to_app_args_t *)req;
606 uint32_t event;
607 uint32_t proc_id;
608 uint32_t module_id;
609 uint32_t image;
610 struct msm_adsp_module *module;
611 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
612 struct queue_to_offset_type *qptr;
613 struct queue_to_offset_type *qtbl;
614 struct mod_to_queue_offsets *mqptr;
615 struct mod_to_queue_offsets *mqtbl;
616 uint32_t *mptr;
617 uint32_t *mtbl;
618 uint32_t q_idx;
619 uint32_t num_entries;
620 uint32_t entries_per_image;
621 struct adsp_rtos_mp_mtoa_init_info_type *iptr;
622 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
623 int32_t i_no, e_idx;
624
625 event = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.event);
626 proc_id = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.proc_id);
627
628 if (event == RPC_ADSP_RTOS_INIT_INFO) {
629 MM_INFO("INIT_INFO Event\n");
630 sptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_init_packet;
631
632 iptr = adsp_info.init_info_ptr;
633 iptr->image_count = be32_to_cpu(sptr->image_count);
634 if (iptr->image_count > IMG_MAX)
635 iptr->image_count = IMG_MAX;
636 iptr->num_queue_offsets = be32_to_cpu(sptr->num_queue_offsets);
637 num_entries = iptr->num_queue_offsets;
638 if (num_entries > ENTRIES_MAX) {
639 num_entries = ENTRIES_MAX;
640 iptr->num_queue_offsets = ENTRIES_MAX;
641 }
642 qptr = &sptr->queue_offsets_tbl[0][0];
643 for (i_no = 0; i_no < iptr->image_count; i_no++) {
644 qtbl = &iptr->queue_offsets_tbl[i_no][0];
645 for (e_idx = 0; e_idx < num_entries; e_idx++) {
646 qtbl[e_idx].offset = be32_to_cpu(qptr->offset);
647 qtbl[e_idx].queue = be32_to_cpu(qptr->queue);
648 q_idx = be32_to_cpu(qptr->queue);
649 iptr->queue_offsets[i_no][q_idx] = qtbl[e_idx].offset;
650 qptr++;
651 }
652 }
653
654 num_entries = be32_to_cpu(sptr->num_task_module_entries);
655 if (num_entries > ENTRIES_MAX)
656 num_entries = ENTRIES_MAX;
657 iptr->num_task_module_entries = num_entries;
658 entries_per_image = num_entries / iptr->image_count;
659 mptr = &sptr->task_to_module_tbl[0][0];
660 for (i_no = 0; i_no < iptr->image_count; i_no++) {
661 mtbl = &iptr->task_to_module_tbl[i_no][0];
662 for (e_idx = 0; e_idx < entries_per_image; e_idx++) {
663 mtbl[e_idx] = be32_to_cpu(*mptr);
664 mptr++;
665 }
666 }
667
668 iptr->module_table_size = be32_to_cpu(sptr->module_table_size);
669#if CONFIG_ADSP_RPC_VER > 0x30001
670 if (iptr->module_table_size > MODULES_MAX)
671 iptr->module_table_size = MODULES_MAX;
672#else
673 if (iptr->module_table_size > ENTRIES_MAX)
674 iptr->module_table_size = ENTRIES_MAX;
675#endif
676 mptr = &sptr->module_entries[0];
677 for (i_no = 0; i_no < iptr->module_table_size; i_no++)
678 iptr->module_entries[i_no] = be32_to_cpu(mptr[i_no]);
679
680 mqptr = &sptr->mod_to_q_tbl[0];
681 mqtbl = &iptr->mod_to_q_tbl[0];
682 iptr->mod_to_q_entries = be32_to_cpu(sptr->mod_to_q_entries);
683 if (iptr->mod_to_q_entries > ENTRIES_MAX)
684 iptr->mod_to_q_entries = ENTRIES_MAX;
685 for (e_idx = 0; e_idx < iptr->mod_to_q_entries; e_idx++) {
686 mqtbl[e_idx].module = be32_to_cpu(mqptr->module);
687 mqtbl[e_idx].q_type = be32_to_cpu(mqptr->q_type);
688 mqtbl[e_idx].q_max_len = be32_to_cpu(mqptr->q_max_len);
689 mqptr++;
690 }
691
692 adsp_info.init_info_state = ADSP_STATE_INIT_INFO;
693 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
694 RPC_ACCEPTSTAT_SUCCESS);
695 wake_up(&adsp_info.init_info_wait);
696
697 return;
698 }
699
700 pkt_ptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
701 module_id = be32_to_cpu(pkt_ptr->module);
702 image = be32_to_cpu(pkt_ptr->image);
703
704 MM_DBG("rpc event=%d, proc_id=%d, module=%d, image=%d\n",
705 event, proc_id, module_id, image);
706
707 module = find_adsp_module_by_id(&adsp_info, module_id);
708 if (!module) {
709 MM_ERR("module %d is not supported!\n", module_id);
710 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
711 RPC_ACCEPTSTAT_GARBAGE_ARGS);
712 return;
713 }
714
715 mutex_lock(&module->lock);
716 switch (event) {
717 case RPC_ADSP_RTOS_MOD_READY:
718 MM_INFO("module %s: READY\n", module->name);
719 module->state = ADSP_STATE_ENABLED;
720 wake_up(&module->state_wait);
721 adsp_set_image(module->info, image);
722 break;
723 case RPC_ADSP_RTOS_MOD_DISABLE:
724 MM_INFO("module %s: DISABLED\n", module->name);
725 module->state = ADSP_STATE_DISABLED;
726 wake_up(&module->state_wait);
727 break;
728 case RPC_ADSP_RTOS_SERVICE_RESET:
729 MM_INFO("module %s: SERVICE_RESET\n", module->name);
730 module->state = ADSP_STATE_DISABLED;
731 wake_up(&module->state_wait);
732 break;
733 case RPC_ADSP_RTOS_CMD_SUCCESS:
734 MM_INFO("module %s: CMD_SUCCESS\n", module->name);
735 break;
736 case RPC_ADSP_RTOS_CMD_FAIL:
737 MM_INFO("module %s: CMD_FAIL\n", module->name);
738 break;
739 case RPC_ADSP_RTOS_DISABLE_FAIL:
740 MM_INFO("module %s: DISABLE_FAIL\n", module->name);
741 break;
742 default:
743 MM_ERR("unknown event %d\n", event);
744 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
745 RPC_ACCEPTSTAT_GARBAGE_ARGS);
746 mutex_unlock(&module->lock);
747 return;
748 }
749 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
750 RPC_ACCEPTSTAT_SUCCESS);
751#ifdef CONFIG_MSM_ADSP_REPORT_EVENTS
752 event_addr = (uint32_t *)req;
753 module->ops->event(module->driver_data,
754 EVENT_MSG_ID,
755 EVENT_LEN,
756 read_event);
757#endif
758 mutex_unlock(&module->lock);
759}
760
761static int handle_adsp_rtos_mtoa(struct rpc_request_hdr *req)
762{
763 switch (req->procedure) {
764 case RPC_ADSP_RTOS_MTOA_NULL_PROC:
765 rpc_send_accepted_void_reply(rpc_cb_server_client,
766 req->xid,
767 RPC_ACCEPTSTAT_SUCCESS);
768 break;
769#if CONFIG_ADSP_RPC_VER > 0x30001
770 case RPC_ADSP_RTOS_MTOA_INIT_INFO_PROC:
771 case RPC_ADSP_RTOS_MTOA_EVENT_INFO_PROC:
772#else
773 case RPC_ADSP_RTOS_MODEM_TO_APP_PROC:
774#endif
775 handle_adsp_rtos_mtoa_app(req);
776 break;
777 default:
778 MM_ERR("unknowned proc %d\n", req->procedure);
779 rpc_send_accepted_void_reply(
780 rpc_cb_server_client, req->xid,
781 RPC_ACCEPTSTAT_PROC_UNAVAIL);
782 break;
783 }
784 return 0;
785}
786
787/* this should be common code with rpc_servers.c */
788static int adsp_rpc_thread(void *data)
789{
790 void *buffer;
791 struct rpc_request_hdr *req;
792 int rc, exit = 0;
793
794 do {
795 rc = msm_rpc_read(rpc_cb_server_client, &buffer, -1, -1);
796 if (rc < 0) {
797 MM_ERR("could not read rpc: %d\n", rc);
798 break;
799 }
800 req = (struct rpc_request_hdr *)buffer;
801
802 req->type = be32_to_cpu(req->type);
803 req->xid = be32_to_cpu(req->xid);
804 req->rpc_vers = be32_to_cpu(req->rpc_vers);
805 req->prog = be32_to_cpu(req->prog);
806 req->vers = be32_to_cpu(req->vers);
807 req->procedure = be32_to_cpu(req->procedure);
808
809 if (req->type != 0)
810 goto bad_rpc;
811 if (req->rpc_vers != 2)
812 goto bad_rpc;
813 if (req->prog != rpc_adsp_rtos_mtoa_prog)
814 goto bad_rpc;
815 if (!msm_rpc_is_compatible_version(rpc_adsp_rtos_mtoa_vers,
816 req->vers))
817 goto bad_rpc;
818
819 handle_adsp_rtos_mtoa(req);
820 kfree(buffer);
821 continue;
822
823bad_rpc:
824 MM_ERR("bogus rpc from modem\n");
825 kfree(buffer);
826 } while (!exit);
827 do_exit(0);
828}
829
830static size_t read_event_size;
831static void *read_event_addr;
832
833static void read_event_16(void *buf, size_t len)
834{
835 uint16_t *dst = buf;
836 uint16_t *src = read_event_addr;
837 len /= 2;
838 if (len > read_event_size)
839 len = read_event_size;
840 while (len--)
841 *dst++ = *src++;
842}
843
844static void read_event_32(void *buf, size_t len)
845{
846 uint32_t *dst = buf;
847 uint32_t *src = read_event_addr;
848 len /= 2;
849 if (len > read_event_size)
850 len = read_event_size;
851 while (len--)
852 *dst++ = *src++;
853}
854
855static int adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(
856 struct adsp_info *info, void *dsp_addr)
857{
858 struct msm_adsp_module *module;
859 unsigned rtos_task_id;
860 unsigned msg_id;
861 unsigned msg_length;
862#ifdef CONFIG_DEBUG_FS
863 uint16_t *ptr;
864 int ii;
865#endif /* CONFIG_DEBUG_FS */
866 void (*func)(void *, size_t);
867
868 if (dsp_addr >= (void *)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
869 uint32_t *dsp_addr32 = dsp_addr;
870 uint32_t tmp = *dsp_addr32++;
871 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
872 msg_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M);
873 read_event_size = tmp >> 16;
874 read_event_addr = dsp_addr32;
875 msg_length = read_event_size * sizeof(uint32_t);
876 func = read_event_32;
877 } else {
878 uint16_t *dsp_addr16 = dsp_addr;
879 uint16_t tmp = *dsp_addr16++;
880 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
881 msg_id = tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M;
882 read_event_size = *dsp_addr16++;
883 read_event_addr = dsp_addr16;
884 msg_length = read_event_size * sizeof(uint16_t);
885 func = read_event_16;
886 }
887
888 if (rtos_task_id > info->max_task_id) {
889 MM_ERR("bogus task id %d\n", rtos_task_id);
890 return 0;
891 }
892 module = find_adsp_module_by_id(info,
893 adsp_get_module(info, rtos_task_id));
894
895 if (!module) {
896 MM_ERR("no module for task id %d\n", rtos_task_id);
897 return 0;
898 }
899
900 module->num_events++;
901
902 if (!module->ops) {
903 MM_ERR("module %s is not open\n", module->name);
904 return 0;
905 }
906#ifdef CONFIG_DEBUG_FS
907 if (rdump > 0) {
908 ptr = read_event_addr;
909 pr_info("D->A\n");
910 pr_info("m_id = %x id = %x\n", module->id, msg_id);
911 for (ii = 0; ii < msg_length/2; ii++)
912 pr_info("%x ", ptr[ii]);
913 pr_info("\n");
914 }
915#endif /* CONFIG_DEBUG_FS */
916
917 module->ops->event(module->driver_data, msg_id, msg_length, func);
918 return 0;
919}
920
921static int adsp_get_event(struct adsp_info *info)
922{
923 uint32_t ctrl_word;
924 uint32_t ready;
925 void *dsp_addr;
926 uint32_t cmd_type;
927 int cnt;
928 unsigned long flags;
929 int rc = 0;
930
931 spin_lock_irqsave(&adsp_cmd_lock, flags);
932
933 /* Whenever the DSP has a message, it updates this control word
934 * and generates an interrupt. When we receive the interrupt, we
935 * read this register to find out what ADSP task the command is
936 * comming from.
937 *
938 * The ADSP should *always* be ready on the first call, but the
939 * irq handler calls us in a loop (to handle back-to-back command
940 * processing), so we give the DSP some time to return to the
941 * ready state. The DSP will not issue another IRQ for events
942 * pending between the first IRQ and the event queue being drained,
943 * unfortunately.
944 */
945
946 for (cnt = 0; cnt < 50; cnt++) {
947 ctrl_word = readl(info->read_ctrl);
948
949 if ((ctrl_word & ADSP_RTOS_READ_CTRL_WORD_FLAG_M) ==
950 ADSP_RTOS_READ_CTRL_WORD_FLAG_UP_CONT_V)
951 goto ready;
952
953 udelay(2);
954 }
955 MM_ERR("not ready after 100uS\n");
956 rc = -EBUSY;
957 goto done;
958
959ready:
960 /* Here we check to see if there are pending messages. If there are
961 * none, we siply return -EAGAIN to indicate that there are no more
962 * messages pending.
963 */
964 ready = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_READY_M;
965 if ((ready != ADSP_RTOS_READ_CTRL_WORD_READY_V) &&
966 (ready != ADSP_RTOS_READ_CTRL_WORD_CONT_V)) {
967 rc = -EAGAIN;
968 goto done;
969 }
970
971 /* DSP says that there are messages waiting for the host to read */
972
973 /* Get the Command Type */
974 cmd_type = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_CMD_TYPE_M;
975
976 /* Get the DSP buffer address */
977 dsp_addr = (void *)((ctrl_word &
978 ADSP_RTOS_READ_CTRL_WORD_DSP_ADDR_M) +
979 (uint32_t)MSM_AD5_BASE);
980
981 /* We can only handle Task-to-Host messages */
982 if (cmd_type != ADSP_RTOS_READ_CTRL_WORD_CMD_TASK_TO_H_V) {
983 MM_ERR("unknown dsp cmd_type %d\n", cmd_type);
984 rc = -EIO;
985 goto done;
986 }
987
988 adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(info, dsp_addr);
989
990 ctrl_word = readl(info->read_ctrl);
991 ctrl_word &= ~ADSP_RTOS_READ_CTRL_WORD_READY_M;
992
993 /* Write ctrl word to the DSP */
994 writel(ctrl_word, info->read_ctrl);
995
996 /* Generate an interrupt to the DSP */
997 writel(1, info->send_irq);
998
999done:
1000 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
1001 return rc;
1002}
1003
1004static irqreturn_t adsp_irq_handler(int irq, void *data)
1005{
1006 struct adsp_info *info = &adsp_info;
1007 int cnt = 0;
1008 for (cnt = 0; cnt < 15; cnt++)
1009 if (adsp_get_event(info) < 0)
1010 break;
1011 if (cnt > info->event_backlog_max)
1012 info->event_backlog_max = cnt;
1013 info->events_received += cnt;
1014 if (cnt == 15)
1015 MM_ERR("too many (%d) events for single irq!\n", cnt);
1016 return IRQ_HANDLED;
1017}
1018
1019int adsp_set_clkrate(struct msm_adsp_module *module, unsigned long clk_rate)
1020{
Manish Dewangan49037122012-02-10 18:25:25 +05301021 if (!module)
1022 return -EINVAL;
1023
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001024 if (module->clk && clk_rate)
Matt Wagantallf13bee62011-11-08 15:36:32 -08001025 return clk_set_rate(module->clk, clk_rate);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001026
1027 return -EINVAL;
1028}
1029
Manish Dewangan8e87bc12012-02-09 20:25:15 +05301030int msm_adsp_generate_event(void *data,
1031 struct msm_adsp_module *mod,
1032 unsigned event_id,
1033 unsigned event_length,
1034 unsigned event_size,
1035 void *msg)
1036{
1037 unsigned long flags;
1038 void (*func)(void *, size_t);
1039
Manish Dewangan49037122012-02-10 18:25:25 +05301040 if (!mod)
1041 return -EINVAL;
1042
Manish Dewangan8e87bc12012-02-09 20:25:15 +05301043 if (event_size == sizeof(uint32_t))
1044 func = read_event_32;
1045 else if (event_size == sizeof(uint16_t))
1046 func = read_event_16;
1047 else
1048 return -EINVAL;
1049
1050 spin_lock_irqsave(&adsp_cmd_lock, flags);
1051 read_event_addr = msg;
1052 mod->ops->event(data, event_id, event_length, func);
1053 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
1054 return 0;
1055}
1056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001057int msm_adsp_enable(struct msm_adsp_module *module)
1058{
1059 int rc = 0;
1060
Manish Dewangan49037122012-02-10 18:25:25 +05301061 if (!module)
1062 return -EINVAL;
1063
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001064 MM_INFO("enable '%s'state[%d] id[%d]\n",
1065 module->name, module->state, module->id);
1066
1067 mutex_lock(&module->lock);
1068 switch (module->state) {
1069 case ADSP_STATE_DISABLED:
1070 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_ENABLE,
1071 module->id, module);
1072 if (rc)
1073 break;
1074 module->state = ADSP_STATE_ENABLING;
1075 mutex_unlock(&module->lock);
1076 rc = wait_event_timeout(module->state_wait,
1077 module->state != ADSP_STATE_ENABLING,
1078 1 * HZ);
1079 mutex_lock(&module->lock);
1080 if (module->state == ADSP_STATE_ENABLED) {
1081 rc = 0;
1082 } else {
1083 MM_ERR("module '%s' enable timed out\n", module->name);
1084 rc = -ETIMEDOUT;
1085 }
1086 if (module->open_count++ == 0 && module->clk)
1087 clk_enable(module->clk);
1088
1089 mutex_lock(&adsp_open_lock);
1090 if (adsp_open_count++ == 0) {
Laxminath Kasam34aea162012-02-15 12:21:49 +05301091 enable_irq(adsp_info.int_adsp);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001092 prevent_suspend();
1093 }
1094 mutex_unlock(&adsp_open_lock);
1095 break;
1096 case ADSP_STATE_ENABLING:
1097 MM_DBG("module '%s' enable in progress\n", module->name);
1098 break;
1099 case ADSP_STATE_ENABLED:
1100 MM_DBG("module '%s' already enabled\n", module->name);
1101 break;
1102 case ADSP_STATE_DISABLING:
1103 MM_ERR("module '%s' disable in progress\n", module->name);
1104 rc = -EBUSY;
1105 break;
1106 }
1107 mutex_unlock(&module->lock);
1108 return rc;
1109}
1110EXPORT_SYMBOL(msm_adsp_enable);
1111
1112int msm_adsp_disable_event_rsp(struct msm_adsp_module *module)
1113{
1114 int rc = 0;
1115
Manish Dewangan49037122012-02-10 18:25:25 +05301116 if (!module)
1117 return -EINVAL;
1118
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001119 mutex_lock(&module->lock);
1120
1121 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE_EVENT_RSP,
1122 module->id, module);
1123 mutex_unlock(&module->lock);
1124
1125 return rc;
1126}
1127EXPORT_SYMBOL(msm_adsp_disable_event_rsp);
1128
1129static int msm_adsp_disable_locked(struct msm_adsp_module *module)
1130{
1131 int rc = 0;
1132
Manish Dewangan49037122012-02-10 18:25:25 +05301133 if (!module)
1134 return -EINVAL;
1135
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001136 switch (module->state) {
1137 case ADSP_STATE_DISABLED:
1138 MM_DBG("module '%s' already disabled\n", module->name);
1139 break;
1140 case ADSP_STATE_ENABLING:
1141 case ADSP_STATE_ENABLED:
1142 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE,
1143 module->id, module);
1144 module->state = ADSP_STATE_DISABLED;
1145 if (--module->open_count == 0 && module->clk)
1146 clk_disable(module->clk);
1147 mutex_lock(&adsp_open_lock);
1148 if (--adsp_open_count == 0) {
Laxminath Kasam34aea162012-02-15 12:21:49 +05301149 disable_irq(adsp_info.int_adsp);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001150 allow_suspend();
1151 MM_DBG("disable interrupt\n");
1152 }
1153 mutex_unlock(&adsp_open_lock);
1154 }
1155 return rc;
1156}
1157
1158int msm_adsp_disable(struct msm_adsp_module *module)
1159{
1160 int rc;
Manish Dewangan49037122012-02-10 18:25:25 +05301161
1162 if (!module)
1163 return -EINVAL;
1164
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001165 MM_INFO("disable '%s'\n", module->name);
1166 mutex_lock(&module->lock);
1167 rc = msm_adsp_disable_locked(module);
1168 mutex_unlock(&module->lock);
1169 return rc;
1170}
1171EXPORT_SYMBOL(msm_adsp_disable);
1172
1173static int msm_adsp_probe(struct platform_device *pdev)
1174{
1175 unsigned count;
1176 int rc, i;
1177
Laxminath Kasam34aea162012-02-15 12:21:49 +05301178 adsp_info.int_adsp = platform_get_irq(pdev, 0);
1179 if (adsp_info.int_adsp < 0) {
1180 MM_ERR("no irq resource?\n");
1181 return -ENODEV;
1182 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001183
1184 wake_lock_init(&adsp_wake_lock, WAKE_LOCK_SUSPEND, "adsp");
1185 adsp_info.init_info_ptr = kzalloc(
1186 (sizeof(struct adsp_rtos_mp_mtoa_init_info_type)), GFP_KERNEL);
1187 if (!adsp_info.init_info_ptr)
1188 return -ENOMEM;
1189
1190 rc = adsp_init_info(&adsp_info);
1191 if (rc)
1192 return rc;
1193 adsp_info.send_irq += (uint32_t) MSM_AD5_BASE;
1194 adsp_info.read_ctrl += (uint32_t) MSM_AD5_BASE;
1195 adsp_info.write_ctrl += (uint32_t) MSM_AD5_BASE;
1196 count = adsp_info.module_count;
1197
1198 adsp_modules = kzalloc(
1199 (sizeof(struct msm_adsp_module) + sizeof(void *)) *
1200 count, GFP_KERNEL);
1201 if (!adsp_modules)
1202 return -ENOMEM;
1203
1204 adsp_info.id_to_module = (void *) (adsp_modules + count);
1205
1206 spin_lock_init(&adsp_cmd_lock);
1207 spin_lock_init(&adsp_write_lock);
Manish Dewangan691f1c42012-02-10 12:50:14 +05301208 mutex_init(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001209
Laxminath Kasam34aea162012-02-15 12:21:49 +05301210 rc = request_irq(adsp_info.int_adsp, adsp_irq_handler,
1211 IRQF_TRIGGER_RISING, "adsp", 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001212 if (rc < 0)
1213 goto fail_request_irq;
Laxminath Kasam34aea162012-02-15 12:21:49 +05301214 disable_irq(adsp_info.int_adsp);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001215
1216 rpc_cb_server_client = msm_rpc_open();
1217 if (IS_ERR(rpc_cb_server_client)) {
1218 rpc_cb_server_client = NULL;
1219 rc = PTR_ERR(rpc_cb_server_client);
1220 MM_ERR("could not create rpc server (%d)\n", rc);
1221 goto fail_rpc_open;
1222 }
1223
1224 rc = msm_rpc_register_server(rpc_cb_server_client,
1225 rpc_adsp_rtos_mtoa_prog,
1226 rpc_adsp_rtos_mtoa_vers);
1227 if (rc) {
1228 MM_ERR("could not register callback server (%d)\n", rc);
1229 goto fail_rpc_register;
1230 }
1231
1232 /* start the kernel thread to process the callbacks */
1233 kthread_run(adsp_rpc_thread, NULL, "kadspd");
1234
1235 for (i = 0; i < count; i++) {
1236 struct msm_adsp_module *mod = adsp_modules + i;
1237 mutex_init(&mod->lock);
1238 init_waitqueue_head(&mod->state_wait);
1239 mod->info = &adsp_info;
1240 mod->name = adsp_info.module[i].name;
1241 mod->id = adsp_info.module[i].id;
1242 if (adsp_info.module[i].clk_name)
1243 mod->clk = clk_get(NULL, adsp_info.module[i].clk_name);
1244 else
1245 mod->clk = NULL;
1246 if (mod->clk && adsp_info.module[i].clk_rate)
Matt Wagantallf13bee62011-11-08 15:36:32 -08001247 clk_set_rate(mod->clk, adsp_info.module[i].clk_rate);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001248 mod->verify_cmd = adsp_info.module[i].verify_cmd;
1249 mod->patch_event = adsp_info.module[i].patch_event;
1250 INIT_HLIST_HEAD(&mod->pmem_regions);
1251 mod->pdev.name = adsp_info.module[i].pdev_name;
1252 mod->pdev.id = -1;
1253 adsp_info.id_to_module[i] = mod;
1254 platform_device_register(&mod->pdev);
1255 }
1256
1257 msm_adsp_publish_cdevs(adsp_modules, count);
1258 rmtask_init();
1259
1260 return 0;
1261
1262fail_rpc_register:
1263 msm_rpc_close(rpc_cb_server_client);
1264 rpc_cb_server_client = NULL;
1265fail_rpc_open:
Laxminath Kasam34aea162012-02-15 12:21:49 +05301266 enable_irq(adsp_info.int_adsp);
1267 free_irq(adsp_info.int_adsp, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001268fail_request_irq:
1269 kfree(adsp_modules);
1270 kfree(adsp_info.init_info_ptr);
1271 return rc;
1272}
1273#ifdef CONFIG_DEBUG_FS
1274static int get_parameters(char *buf, long int *param1, int num_of_par)
1275{
1276 char *token;
1277 int base, cnt;
1278
1279 token = strsep(&buf, " ");
1280
1281 for (cnt = 0; cnt < num_of_par; cnt++) {
1282 if (token != NULL) {
1283 if ((token[1] == 'x') || (token[1] == 'X'))
1284 base = 16;
1285 else
1286 base = 10;
1287
1288 if (strict_strtoul(token, base, &param1[cnt]) != 0)
1289 return -EINVAL;
1290
1291 token = strsep(&buf, " ");
1292 }
1293 else
1294 return -EINVAL;
1295 }
1296 return 0;
1297}
1298
1299
1300static ssize_t adsp_debug_open(struct inode *inode, struct file *file)
1301{
1302 file->private_data = inode->i_private;
1303 pr_debug("adsp debugfs opened\n");
1304 return 0;
1305}
1306static ssize_t adsp_debug_write(struct file *file, const char __user *buf,
1307 size_t cnt, loff_t *ppos)
1308{
1309 char *access_str = file->private_data;
1310 char lbuf[32];
1311 int rc;
1312 long int param[5];
1313
1314 if (cnt > sizeof(lbuf) - 1)
1315 return -EINVAL;
1316 rc = copy_from_user(lbuf, buf, cnt);
1317 if (rc) {
1318 pr_info("Unable to copy data from user space\n");
1319 return -EFAULT;
1320 }
1321 lbuf[cnt] = '\0';
1322
1323 if (!strcmp(access_str, "write_log")) {
1324 if (get_parameters(lbuf, param, 1) == 0) {
1325 switch (param[0]) {
1326 case 1:
1327 if (wdump <= 0)
1328 wdump = 1;
1329 pr_debug("write cmd to DSP(A->D) dump \
1330 started:%d\n", wdump);
1331 break;
1332 case 0:
1333 if (wdump > 0)
1334 wdump = 0;
1335 pr_debug("Stop write cmd to \
1336 DSP(A->D):%d\n", wdump);
1337 break;
1338 default:
1339 rc = -EINVAL;
1340 break;
1341 }
1342 } else
1343 rc = -EINVAL;
1344 } else if (!strcmp(access_str, "read_log")) {
1345 if (get_parameters(lbuf, param, 1) == 0) {
1346 switch (param[0]) {
1347 case 1:
1348 if (rdump <= 0)
1349 rdump = 1;
1350 pr_debug("write cmd from DSP(D->A) dump \
1351 started:%d\n", wdump);
1352 break;
1353 case 0:
1354 if (rdump > 0)
1355 rdump = 0;
1356 pr_debug("Stop write cmd from \
1357 DSP(D->A):%d\n", wdump);
1358 break;
1359 default:
1360 rc = -EINVAL;
1361 break;
1362 }
1363 } else
1364 rc = -EINVAL;
1365 } else {
1366 rc = -EINVAL;
1367 }
1368 if (rc == 0)
1369 rc = cnt;
1370 else {
1371 pr_err("%s: rc = %d\n", __func__, rc);
1372 pr_info("\nWrong command: Use =>\n");
1373 pr_info("-------------------------\n");
1374 pr_info("To Start A->D:: echo \"1\">/sys/kernel/debug/ \
1375 adsp_cmd/write_log\n");
1376 pr_info("To Start D->A:: echo \"1\">/sys/kernel/debug/ \
1377 adsp_cmd/read_log\n");
1378 pr_info("To Stop A->D:: echo \"0\">/sys/kernel/debug/ \
1379 adsp_cmd/write_log\n");
1380 pr_info("To Stop D->A:: echo \"0\">/sys/kernel/debug/ \
1381 adsp_cmd/read_log\n");
1382 pr_info("------------------------\n");
1383 }
1384
1385 return rc;
1386}
1387#endif
1388
1389static struct platform_driver msm_adsp_driver = {
1390 .probe = msm_adsp_probe,
1391 .driver = {
1392 .owner = THIS_MODULE,
1393 },
1394};
1395
Laxminath Kasam34aea162012-02-15 12:21:49 +05301396static const char msm_adsp_driver_name[] = "msm_adsp";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001397
1398#ifdef CONFIG_DEBUG_FS
1399static const struct file_operations adsp_debug_fops = {
1400 .write = adsp_debug_write,
1401 .open = adsp_debug_open,
1402};
1403#endif
1404
1405static int __init adsp_init(void)
1406{
1407 int rc;
1408
1409#ifdef CONFIG_DEBUG_FS
1410 dentry_adsp = debugfs_create_dir("adsp_cmd", 0);
1411 if (!IS_ERR(dentry_adsp)) {
1412 dentry_wdata = debugfs_create_file("write_log", \
1413 S_IFREG | S_IRUGO, dentry_adsp,
1414 (void *) "write_log" , &adsp_debug_fops);
1415 dentry_rdata = debugfs_create_file("read_log", \
1416 S_IFREG | S_IRUGO, dentry_adsp,
1417 (void *) "read_log", &adsp_debug_fops);
1418 }
1419 rdump = 0;
1420 wdump = 0;
1421#endif /* CONFIG_DEBUG_FS */
1422
1423 rpc_adsp_rtos_atom_prog = 0x3000000a;
1424 rpc_adsp_rtos_atom_vers = 0x10001;
1425 rpc_adsp_rtos_atom_vers_comp = 0x00010001;
1426 rpc_adsp_rtos_mtoa_prog = 0x3000000b;
1427#if CONFIG_ADSP_RPC_VER > 0x30001
1428 rpc_adsp_rtos_mtoa_vers = 0x30002;
1429 rpc_adsp_rtos_mtoa_vers_comp = 0x00030002;
1430#else
1431 rpc_adsp_rtos_mtoa_vers = 0x30001;
1432 rpc_adsp_rtos_mtoa_vers_comp = 0x00030001;
1433#endif
1434
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001435 msm_adsp_driver.driver.name = msm_adsp_driver_name;
1436 rc = platform_driver_register(&msm_adsp_driver);
1437 MM_INFO("%s -- %d\n", msm_adsp_driver_name, rc);
1438 return rc;
1439}
1440
1441device_initcall(adsp_init);