blob: cdd6943ce7686c568c9dda1d82384d2b7565c7d5 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +01002 * linux/arch/arm/mach-iop32x/irq.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +01004 * Generic IOP32X IRQ handling functionality
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * Added IOP3XX chipset and IQ80321 board masking code.
14 *
15 */
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/list.h>
19
20#include <asm/mach/irq.h>
21#include <asm/irq.h>
22#include <asm/hardware.h>
23
24#include <asm/mach-types.h>
25
26static u32 iop321_mask /* = 0 */;
27
28static inline void intctl_write(u32 val)
29{
Lennert Buytenhek38ce73e2006-09-18 23:21:38 +010030 iop3xx_cp6_enable();
Linus Torvalds1da177e2005-04-16 15:20:36 -070031 asm volatile("mcr p6,0,%0,c0,c0,0"::"r" (val));
Lennert Buytenhek38ce73e2006-09-18 23:21:38 +010032 iop3xx_cp6_disable();
Linus Torvalds1da177e2005-04-16 15:20:36 -070033}
34
35static inline void intstr_write(u32 val)
36{
Lennert Buytenhek38ce73e2006-09-18 23:21:38 +010037 iop3xx_cp6_enable();
Linus Torvalds1da177e2005-04-16 15:20:36 -070038 asm volatile("mcr p6,0,%0,c4,c0,0"::"r" (val));
Lennert Buytenhek38ce73e2006-09-18 23:21:38 +010039 iop3xx_cp6_disable();
Linus Torvalds1da177e2005-04-16 15:20:36 -070040}
41
42static void
43iop321_irq_mask (unsigned int irq)
44{
45
46 iop321_mask &= ~(1 << (irq - IOP321_IRQ_OFS));
47
48 intctl_write(iop321_mask);
49}
50
51static void
52iop321_irq_unmask (unsigned int irq)
53{
54 iop321_mask |= (1 << (irq - IOP321_IRQ_OFS));
55
56 intctl_write(iop321_mask);
57}
58
David Brownell38c677c2006-08-01 22:26:25 +010059struct irq_chip ext_chip = {
60 .name = "IOP",
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 .ack = iop321_irq_mask,
62 .mask = iop321_irq_mask,
63 .unmask = iop321_irq_unmask,
64};
65
66void __init iop321_init_irq(void)
67{
Lennert Buytenhek38ce73e2006-09-18 23:21:38 +010068 unsigned int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
70 intctl_write(0); // disable all interrupts
71 intstr_write(0); // treat all as IRQ
72 if(machine_is_iq80321() ||
73 machine_is_iq31244()) // all interrupts are inputs to chip
Lennert Buytenhek7e9740b2006-09-18 23:17:36 +010074 *IOP3XX_PCIIRSR = 0x0f;
Linus Torvalds1da177e2005-04-16 15:20:36 -070075
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +010076 for(i = IOP321_IRQ_OFS; i < NR_IRQS; i++)
Linus Torvalds1da177e2005-04-16 15:20:36 -070077 {
78 set_irq_chip(i, &ext_chip);
79 set_irq_handler(i, do_level_IRQ);
80 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
81
82 }
83}
84