Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Lennert Buytenhek | 3f7e581 | 2006-09-18 23:10:26 +0100 | [diff] [blame] | 2 | * linux/arch/arm/mach-iop32x/irq.c |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
Lennert Buytenhek | 3f7e581 | 2006-09-18 23:10:26 +0100 | [diff] [blame] | 4 | * Generic IOP32X IRQ handling functionality |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * Author: Rory Bolt <rorybolt@pacbell.net> |
| 7 | * Copyright (C) 2002 Rory Bolt |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * Added IOP3XX chipset and IQ80321 board masking code. |
| 14 | * |
| 15 | */ |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/list.h> |
| 19 | |
| 20 | #include <asm/mach/irq.h> |
| 21 | #include <asm/irq.h> |
| 22 | #include <asm/hardware.h> |
| 23 | |
| 24 | #include <asm/mach-types.h> |
| 25 | |
| 26 | static u32 iop321_mask /* = 0 */; |
| 27 | |
| 28 | static inline void intctl_write(u32 val) |
| 29 | { |
Lennert Buytenhek | 38ce73e | 2006-09-18 23:21:38 +0100 | [diff] [blame^] | 30 | iop3xx_cp6_enable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | asm volatile("mcr p6,0,%0,c0,c0,0"::"r" (val)); |
Lennert Buytenhek | 38ce73e | 2006-09-18 23:21:38 +0100 | [diff] [blame^] | 32 | iop3xx_cp6_disable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | } |
| 34 | |
| 35 | static inline void intstr_write(u32 val) |
| 36 | { |
Lennert Buytenhek | 38ce73e | 2006-09-18 23:21:38 +0100 | [diff] [blame^] | 37 | iop3xx_cp6_enable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | asm volatile("mcr p6,0,%0,c4,c0,0"::"r" (val)); |
Lennert Buytenhek | 38ce73e | 2006-09-18 23:21:38 +0100 | [diff] [blame^] | 39 | iop3xx_cp6_disable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | } |
| 41 | |
| 42 | static void |
| 43 | iop321_irq_mask (unsigned int irq) |
| 44 | { |
| 45 | |
| 46 | iop321_mask &= ~(1 << (irq - IOP321_IRQ_OFS)); |
| 47 | |
| 48 | intctl_write(iop321_mask); |
| 49 | } |
| 50 | |
| 51 | static void |
| 52 | iop321_irq_unmask (unsigned int irq) |
| 53 | { |
| 54 | iop321_mask |= (1 << (irq - IOP321_IRQ_OFS)); |
| 55 | |
| 56 | intctl_write(iop321_mask); |
| 57 | } |
| 58 | |
David Brownell | 38c677c | 2006-08-01 22:26:25 +0100 | [diff] [blame] | 59 | struct irq_chip ext_chip = { |
| 60 | .name = "IOP", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | .ack = iop321_irq_mask, |
| 62 | .mask = iop321_irq_mask, |
| 63 | .unmask = iop321_irq_unmask, |
| 64 | }; |
| 65 | |
| 66 | void __init iop321_init_irq(void) |
| 67 | { |
Lennert Buytenhek | 38ce73e | 2006-09-18 23:21:38 +0100 | [diff] [blame^] | 68 | unsigned int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | |
| 70 | intctl_write(0); // disable all interrupts |
| 71 | intstr_write(0); // treat all as IRQ |
| 72 | if(machine_is_iq80321() || |
| 73 | machine_is_iq31244()) // all interrupts are inputs to chip |
Lennert Buytenhek | 7e9740b | 2006-09-18 23:17:36 +0100 | [diff] [blame] | 74 | *IOP3XX_PCIIRSR = 0x0f; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | |
Lennert Buytenhek | 3f7e581 | 2006-09-18 23:10:26 +0100 | [diff] [blame] | 76 | for(i = IOP321_IRQ_OFS; i < NR_IRQS; i++) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | { |
| 78 | set_irq_chip(i, &ext_chip); |
| 79 | set_irq_handler(i, do_level_IRQ); |
| 80 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
| 81 | |
| 82 | } |
| 83 | } |
| 84 | |