| Pankaj Kumar | 3912c98 | 2011-12-07 16:59:03 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2012, Code Aurora Forum. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | /** |
| 16 | * enum - For PLL IDs |
| 17 | */ |
| 18 | enum { |
| 19 | PLL_TCXO = -1, |
| 20 | PLL_0 = 0, |
| 21 | PLL_1, |
| 22 | PLL_2, |
| 23 | PLL_3, |
| 24 | PLL_4, |
| 25 | PLL_END, |
| 26 | }; |
| 27 | |
| 28 | /** |
| 29 | * struct pll_shared_clk - PLL shared with other processors without |
| 30 | * any HW voting |
| 31 | * @id: PLL ID |
| 32 | * @mode_reg: enable register |
| 33 | * @parent: clock source |
| 34 | * @c: clk |
| 35 | */ |
| 36 | struct pll_shared_clk { |
| 37 | unsigned int id; |
| 38 | void __iomem *const mode_reg; |
| 39 | struct clk c; |
| 40 | }; |
| 41 | |
| 42 | extern struct clk_ops clk_pll_ops; |
| 43 | |
| 44 | static inline struct pll_shared_clk *to_pll_shared_clk(struct clk *clk) |
| 45 | { |
| 46 | return container_of(clk, struct pll_shared_clk, c); |
| 47 | } |
| 48 | |
| 49 | /** |
| 50 | * msm_shared_pll_control_init() - Initialize shared pll control structure |
| 51 | */ |
| 52 | void msm_shared_pll_control_init(void); |