blob: 973f391e68056c985103aaee197766c5af032305 [file] [log] [blame]
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/platform_device.h>
17#include <linux/bootmem.h>
18#include <asm/mach-types.h>
19#include <mach/msm_bus_board.h>
20#include <mach/board.h>
21#include <mach/gpio.h>
22#include <mach/gpiomux.h>
23#include "devices.h"
24#include "board-msm8930.h"
25
26#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
27#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 3) /* 4 bpp x 3 pages */
28#else
29#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 2) /* 4 bpp x 2 pages */
30#endif
31
32#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
33#define MSM_FB_EXT_BUF_SIZE (1920 * 1088 * 2 * 1) /* 2 bpp x 1 page */
34#elif defined(CONFIG_FB_MSM_TVOUT)
35#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
36#else
37#define MSM_FB_EXT_BUF_SIZE 0
38#endif
39
40#ifdef CONFIG_FB_MSM_OVERLAY_WRITEBACK
41/* width x height x 3 bpp x 2 frame buffer */
42#define MSM_FB_WRITEBACK_SIZE (1376 * 768 * 3 * 2)
43#define MSM_FB_WRITEBACK_OFFSET \
44 (MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE)
45#else
46#define MSM_FB_WRITEBACK_SIZE 0
47#define MSM_FB_WRITEBACK_OFFSET 0
48#endif
49
50#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
51/* 4 bpp x 2 page HDMI case */
52#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
53#else
54/* Note: must be multiple of 4096 */
55#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
56 MSM_FB_WRITEBACK_SIZE, 4096)
57#endif
58
59#define MDP_VSYNC_GPIO 0
60
61#define PANEL_NAME_MAX_LEN 30
62#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
63#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
64#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
65#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
66#define MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME "mipi_video_simulator_vga"
67#define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
68#define HDMI_PANEL_NAME "hdmi_msm"
69#define TVOUT_PANEL_NAME "tvout_msm"
70
71static int writeback_offset(void)
72{
73 return MSM_FB_WRITEBACK_OFFSET;
74}
75
76static struct resource msm_fb_resources[] = {
77 {
78 .flags = IORESOURCE_DMA,
79 }
80};
81
82static int msm_fb_detect_panel(const char *name)
83{
84 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
85 strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
86 PANEL_NAME_MAX_LEN)))
87 return 0;
88
89#ifndef CONFIG_FB_MSM_MIPI_PANEL_DETECT
90 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
91 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
92 PANEL_NAME_MAX_LEN)))
93 return 0;
94
95 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
96 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
97 PANEL_NAME_MAX_LEN)))
98 return 0;
99
100 if (!strncmp(name, MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
101 strnlen(MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
102 PANEL_NAME_MAX_LEN)))
103 return 0;
104
105 if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
106 strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
107 PANEL_NAME_MAX_LEN)))
108 return 0;
109#endif
110
111 if (!strncmp(name, HDMI_PANEL_NAME,
112 strnlen(HDMI_PANEL_NAME,
113 PANEL_NAME_MAX_LEN)))
114 return 0;
115
116 if (!strncmp(name, TVOUT_PANEL_NAME,
117 strnlen(TVOUT_PANEL_NAME,
118 PANEL_NAME_MAX_LEN)))
119 return 0;
120
121 pr_warning("%s: not supported '%s'", __func__, name);
122 return -ENODEV;
123}
124
125static struct msm_fb_platform_data msm_fb_pdata = {
126 .detect_client = msm_fb_detect_panel,
127};
128
129static struct platform_device msm_fb_device = {
130 .name = "msm_fb",
131 .id = 0,
132 .num_resources = ARRAY_SIZE(msm_fb_resources),
133 .resource = msm_fb_resources,
134 .dev.platform_data = &msm_fb_pdata,
135};
136
137static bool dsi_power_on;
138
139static int mipi_dsi_cdp_panel_power(int on)
140{
141 static struct regulator *reg_l8, *reg_l23, *reg_l2;
142 static int gpio43;
143 int rc;
144
145 pr_info("%s: state : %d\n", __func__, on);
146
147 if (!dsi_power_on) {
148
149 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
150 "dsi_vdc");
151 if (IS_ERR(reg_l8)) {
152 pr_err("could not get 8921_l8, rc = %ld\n",
153 PTR_ERR(reg_l8));
154 return -ENODEV;
155 }
156 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
157 "dsi_vddio");
158 if (IS_ERR(reg_l23)) {
159 pr_err("could not get 8921_l23, rc = %ld\n",
160 PTR_ERR(reg_l23));
161 return -ENODEV;
162 }
163 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
164 "dsi_vdda");
165 if (IS_ERR(reg_l2)) {
166 pr_err("could not get 8921_l2, rc = %ld\n",
167 PTR_ERR(reg_l2));
168 return -ENODEV;
169 }
170 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
171 if (rc) {
172 pr_err("set_voltage l8 failed, rc=%d\n", rc);
173 return -EINVAL;
174 }
175 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
176 if (rc) {
177 pr_err("set_voltage l23 failed, rc=%d\n", rc);
178 return -EINVAL;
179 }
180 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
181 if (rc) {
182 pr_err("set_voltage l2 failed, rc=%d\n", rc);
183 return -EINVAL;
184 }
185 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
186 rc = gpio_request(gpio43, "disp_rst_n");
187 if (rc) {
188 pr_err("request gpio 43 failed, rc=%d\n", rc);
189 return -ENODEV;
190 }
191 dsi_power_on = true;
192 }
193 if (on) {
194 rc = regulator_set_optimum_mode(reg_l8, 100000);
195 if (rc < 0) {
196 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
197 return -EINVAL;
198 }
199 rc = regulator_set_optimum_mode(reg_l23, 100000);
200 if (rc < 0) {
201 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
202 return -EINVAL;
203 }
204 rc = regulator_set_optimum_mode(reg_l2, 100000);
205 if (rc < 0) {
206 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
207 return -EINVAL;
208 }
209 rc = regulator_enable(reg_l8);
210 if (rc) {
211 pr_err("enable l8 failed, rc=%d\n", rc);
212 return -ENODEV;
213 }
214 rc = regulator_enable(reg_l23);
215 if (rc) {
216 pr_err("enable l8 failed, rc=%d\n", rc);
217 return -ENODEV;
218 }
219 rc = regulator_enable(reg_l2);
220 if (rc) {
221 pr_err("enable l2 failed, rc=%d\n", rc);
222 return -ENODEV;
223 }
224 gpio_set_value_cansleep(gpio43, 1);
225 } else {
226 rc = regulator_disable(reg_l2);
227 if (rc) {
228 pr_err("disable reg_l2 failed, rc=%d\n", rc);
229 return -ENODEV;
230 }
231 rc = regulator_disable(reg_l8);
232 if (rc) {
233 pr_err("disable reg_l8 failed, rc=%d\n", rc);
234 return -ENODEV;
235 }
236 rc = regulator_disable(reg_l23);
237 if (rc) {
238 pr_err("disable reg_l23 failed, rc=%d\n", rc);
239 return -ENODEV;
240 }
241 rc = regulator_set_optimum_mode(reg_l8, 100);
242 if (rc < 0) {
243 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
244 return -EINVAL;
245 }
246 rc = regulator_set_optimum_mode(reg_l23, 100);
247 if (rc < 0) {
248 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
249 return -EINVAL;
250 }
251 rc = regulator_set_optimum_mode(reg_l2, 100);
252 if (rc < 0) {
253 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
254 return -EINVAL;
255 }
256 gpio_set_value_cansleep(gpio43, 0);
257 }
258 return 0;
259}
260
261static int mipi_dsi_panel_power(int on)
262{
263 pr_info("%s: on=%d\n", __func__, on);
264
265 return mipi_dsi_cdp_panel_power(on);
266}
267
268static struct mipi_dsi_platform_data mipi_dsi_pdata = {
269 .vsync_gpio = MDP_VSYNC_GPIO,
270 .dsi_power_save = mipi_dsi_panel_power,
271};
272
273#ifdef CONFIG_MSM_BUS_SCALING
274
275static struct msm_bus_vectors mdp_init_vectors[] = {
276 {
277 .src = MSM_BUS_MASTER_MDP_PORT0,
278 .dst = MSM_BUS_SLAVE_EBI_CH0,
279 .ab = 0,
280 .ib = 0,
281 },
282};
283
284#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
285static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
286 /* If HDMI is used as primary */
287 {
288 .src = MSM_BUS_MASTER_MDP_PORT0,
289 .dst = MSM_BUS_SLAVE_EBI_CH0,
290 .ab = 2000000000,
291 .ib = 2000000000,
292 },
293};
294static struct msm_bus_paths mdp_bus_scale_usecases[] = {
295 {
296 ARRAY_SIZE(mdp_init_vectors),
297 mdp_init_vectors,
298 },
299 {
300 ARRAY_SIZE(hdmi_as_primary_vectors),
301 hdmi_as_primary_vectors,
302 },
303 {
304 ARRAY_SIZE(hdmi_as_primary_vectors),
305 hdmi_as_primary_vectors,
306 },
307 {
308 ARRAY_SIZE(hdmi_as_primary_vectors),
309 hdmi_as_primary_vectors,
310 },
311 {
312 ARRAY_SIZE(hdmi_as_primary_vectors),
313 hdmi_as_primary_vectors,
314 },
315 {
316 ARRAY_SIZE(hdmi_as_primary_vectors),
317 hdmi_as_primary_vectors,
318 },
319};
320#else
321static struct msm_bus_vectors mdp_ui_vectors[] = {
322 {
323 .src = MSM_BUS_MASTER_MDP_PORT0,
324 .dst = MSM_BUS_SLAVE_EBI_CH0,
325 .ab = 216000000 * 2,
326 .ib = 270000000 * 2,
327 },
328};
329
330static struct msm_bus_vectors mdp_vga_vectors[] = {
331 /* VGA and less video */
332 {
333 .src = MSM_BUS_MASTER_MDP_PORT0,
334 .dst = MSM_BUS_SLAVE_EBI_CH0,
335 .ab = 216000000 * 2,
336 .ib = 270000000 * 2,
337 },
338};
339
340static struct msm_bus_vectors mdp_720p_vectors[] = {
341 /* 720p and less video */
342 {
343 .src = MSM_BUS_MASTER_MDP_PORT0,
344 .dst = MSM_BUS_SLAVE_EBI_CH0,
345 .ab = 230400000 * 2,
346 .ib = 288000000 * 2,
347 },
348};
349
350static struct msm_bus_vectors mdp_1080p_vectors[] = {
351 /* 1080p and less video */
352 {
353 .src = MSM_BUS_MASTER_MDP_PORT0,
354 .dst = MSM_BUS_SLAVE_EBI_CH0,
355 .ab = 334080000 * 2,
356 .ib = 417600000 * 2,
357 },
358};
359
360static struct msm_bus_paths mdp_bus_scale_usecases[] = {
361 {
362 ARRAY_SIZE(mdp_init_vectors),
363 mdp_init_vectors,
364 },
365 {
366 ARRAY_SIZE(mdp_ui_vectors),
367 mdp_ui_vectors,
368 },
369 {
370 ARRAY_SIZE(mdp_ui_vectors),
371 mdp_ui_vectors,
372 },
373 {
374 ARRAY_SIZE(mdp_vga_vectors),
375 mdp_vga_vectors,
376 },
377 {
378 ARRAY_SIZE(mdp_720p_vectors),
379 mdp_720p_vectors,
380 },
381 {
382 ARRAY_SIZE(mdp_1080p_vectors),
383 mdp_1080p_vectors,
384 },
385};
386#endif
387
388static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
389 mdp_bus_scale_usecases,
390 ARRAY_SIZE(mdp_bus_scale_usecases),
391 .name = "mdp",
392};
393
394#endif
395
396#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
397static int mdp_core_clk_rate_table[] = {
398 200000000,
399 200000000,
400 200000000,
401 200000000,
402};
403#else
404static int mdp_core_clk_rate_table[] = {
405 85330000,
406 85330000,
407 160000000,
408 200000000,
409};
410#endif
411
412static struct msm_panel_common_pdata mdp_pdata = {
413 .gpio = MDP_VSYNC_GPIO,
414#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
415 .mdp_core_clk_rate = 200000000,
416#else
417 .mdp_core_clk_rate = 85330000,
418#endif
419 .mdp_core_clk_table = mdp_core_clk_rate_table,
420 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
421#ifdef CONFIG_MSM_BUS_SCALING
422 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
423#endif
424 .mdp_rev = MDP_REV_42,
425 .writeback_offset = writeback_offset,
426};
427
428#define LPM_CHANNEL0 0
429static int toshiba_gpio[] = {LPM_CHANNEL0};
430
431static struct mipi_dsi_panel_platform_data toshiba_pdata = {
432 .gpio = toshiba_gpio,
433};
434
435static struct platform_device mipi_dsi_toshiba_panel_device = {
436 .name = "mipi_toshiba",
437 .id = 0,
438 .dev = {
439 .platform_data = &toshiba_pdata,
440 }
441};
442
443#define FPGA_3D_GPIO_CONFIG_ADDR 0xB5
444
445static struct mipi_dsi_phy_ctrl dsi_novatek_cmd_mode_phy_db = {
446
447/* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
448 {0x0F, 0x0a, 0x04, 0x00, 0x20}, /* regulator */
449 /* timing */
450 {0xab, 0x8a, 0x18, 0x00, 0x92, 0x97, 0x1b, 0x8c,
451 0x0c, 0x03, 0x04, 0xa0},
452 {0x5f, 0x00, 0x00, 0x10}, /* phy ctrl */
453 {0xff, 0x00, 0x06, 0x00}, /* strength */
454 /* pll control */
455 {0x40, 0xf9, 0x30, 0xda, 0x00, 0x40, 0x03, 0x62,
456 0x40, 0x07, 0x03,
457 0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01},
458};
459
460static struct mipi_dsi_panel_platform_data novatek_pdata = {
461 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
462 .fpga_ctrl_mode = FPGA_SPI_INTF,
463 .phy_ctrl_settings = &dsi_novatek_cmd_mode_phy_db,
464};
465
466static struct platform_device mipi_dsi_novatek_panel_device = {
467 .name = "mipi_novatek",
468 .id = 0,
469 .dev = {
470 .platform_data = &novatek_pdata,
471 }
472};
473
474#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
475static struct resource hdmi_msm_resources[] = {
476 {
477 .name = "hdmi_msm_qfprom_addr",
478 .start = 0x00700000,
479 .end = 0x007060FF,
480 .flags = IORESOURCE_MEM,
481 },
482 {
483 .name = "hdmi_msm_hdmi_addr",
484 .start = 0x04A00000,
485 .end = 0x04A00FFF,
486 .flags = IORESOURCE_MEM,
487 },
488 {
489 .name = "hdmi_msm_irq",
490 .start = HDMI_IRQ,
491 .end = HDMI_IRQ,
492 .flags = IORESOURCE_IRQ,
493 },
494};
495
496static int hdmi_enable_5v(int on);
497static int hdmi_core_power(int on, int show);
498static int hdmi_cec_power(int on);
499
500static struct msm_hdmi_platform_data hdmi_msm_data = {
501 .irq = HDMI_IRQ,
502 .enable_5v = hdmi_enable_5v,
503 .core_power = hdmi_core_power,
504 .cec_power = hdmi_cec_power,
505};
506
507static struct platform_device hdmi_msm_device = {
508 .name = "hdmi_msm",
509 .id = 0,
510 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
511 .resource = hdmi_msm_resources,
512 .dev.platform_data = &hdmi_msm_data,
513};
514#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
515
516#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
517static struct platform_device wfd_panel_device = {
518 .name = "wfd_panel",
519 .id = 0,
520 .dev.platform_data = NULL,
521};
522
523static struct platform_device wfd_device = {
524 .name = "msm_wfd",
525 .id = -1,
526};
527#endif
528
529#ifdef CONFIG_MSM_BUS_SCALING
530static struct msm_bus_vectors dtv_bus_init_vectors[] = {
531 {
532 .src = MSM_BUS_MASTER_MDP_PORT0,
533 .dst = MSM_BUS_SLAVE_EBI_CH0,
534 .ab = 0,
535 .ib = 0,
536 },
537};
538
539#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
540static struct msm_bus_vectors dtv_bus_def_vectors[] = {
541 {
542 .src = MSM_BUS_MASTER_MDP_PORT0,
543 .dst = MSM_BUS_SLAVE_EBI_CH0,
544 .ab = 2000000000,
545 .ib = 2000000000,
546 },
547};
548#else
549static struct msm_bus_vectors dtv_bus_def_vectors[] = {
550 {
551 .src = MSM_BUS_MASTER_MDP_PORT0,
552 .dst = MSM_BUS_SLAVE_EBI_CH0,
553 .ab = 566092800 * 2,
554 .ib = 707616000 * 2,
555 },
556};
557#endif
558
559static struct msm_bus_paths dtv_bus_scale_usecases[] = {
560 {
561 ARRAY_SIZE(dtv_bus_init_vectors),
562 dtv_bus_init_vectors,
563 },
564 {
565 ARRAY_SIZE(dtv_bus_def_vectors),
566 dtv_bus_def_vectors,
567 },
568};
569static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
570 dtv_bus_scale_usecases,
571 ARRAY_SIZE(dtv_bus_scale_usecases),
572 .name = "dtv",
573};
574
575static struct lcdc_platform_data dtv_pdata = {
576 .bus_scale_table = &dtv_bus_scale_pdata,
577};
578#endif
579
580static struct gpiomux_setting mdp_vsync_suspend_cfg = {
581 .func = GPIOMUX_FUNC_GPIO,
582 .drv = GPIOMUX_DRV_2MA,
583 .pull = GPIOMUX_PULL_DOWN,
584};
585
586static struct gpiomux_setting mdp_vsync_active_cfg = {
587 .func = GPIOMUX_FUNC_1,
588 .drv = GPIOMUX_DRV_2MA,
589 .pull = GPIOMUX_PULL_DOWN,
590};
591
592static struct msm_gpiomux_config msm8960_mdp_vsync_configs[] __initdata = {
593 {
594 .gpio = MDP_VSYNC_GPIO,
595 .settings = {
596 [GPIOMUX_ACTIVE] = &mdp_vsync_active_cfg,
597 [GPIOMUX_SUSPENDED] = &mdp_vsync_suspend_cfg,
598 },
599 }
600};
601
602#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
603static struct gpiomux_setting hdmi_suspend_cfg = {
604 .func = GPIOMUX_FUNC_GPIO,
605 .drv = GPIOMUX_DRV_2MA,
606 .pull = GPIOMUX_PULL_DOWN,
607};
608
609static struct gpiomux_setting hdmi_active_1_cfg = {
610 .func = GPIOMUX_FUNC_1,
611 .drv = GPIOMUX_DRV_2MA,
612 .pull = GPIOMUX_PULL_UP,
613};
614
615static struct gpiomux_setting hdmi_active_2_cfg = {
616 .func = GPIOMUX_FUNC_1,
617 .drv = GPIOMUX_DRV_2MA,
618 .pull = GPIOMUX_PULL_DOWN,
619};
620
621static struct msm_gpiomux_config msm8960_hdmi_configs[] __initdata = {
622 {
623 .gpio = 99,
624 .settings = {
625 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
626 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
627 },
628 },
629 {
630 .gpio = 100,
631 .settings = {
632 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
633 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
634 },
635 },
636 {
637 .gpio = 101,
638 .settings = {
639 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
640 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
641 },
642 },
643 {
644 .gpio = 102,
645 .settings = {
646 [GPIOMUX_ACTIVE] = &hdmi_active_2_cfg,
647 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
648 },
649 },
650};
651
652static int hdmi_enable_5v(int on)
653{
654 /* TBD: PM8921 regulator instead of 8901 */
655 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
656 static int prev_on;
657 int rc;
658
659 if (on == prev_on)
660 return 0;
661
662 if (!reg_8921_hdmi_mvs)
663 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
664 "hdmi_mvs");
665
666 if (on) {
667 rc = regulator_enable(reg_8921_hdmi_mvs);
668 if (rc) {
669 pr_err("'%s' regulator enable failed, rc=%d\n",
670 "8921_hdmi_mvs", rc);
671 return rc;
672 }
673 pr_debug("%s(on): success\n", __func__);
674 } else {
675 rc = regulator_disable(reg_8921_hdmi_mvs);
676 if (rc)
677 pr_warning("'%s' regulator disable failed, rc=%d\n",
678 "8921_hdmi_mvs", rc);
679 pr_debug("%s(off): success\n", __func__);
680 }
681
682 prev_on = on;
683
684 return 0;
685}
686
687static int hdmi_core_power(int on, int show)
688{
689 static struct regulator *reg_8921_l23, *reg_8921_s4;
690 static int prev_on;
691 int rc;
692
693 if (on == prev_on)
694 return 0;
695
696 /* TBD: PM8921 regulator instead of 8901 */
697 if (!reg_8921_l23) {
698 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
699 if (IS_ERR(reg_8921_l23)) {
700 pr_err("could not get reg_8921_l23, rc = %ld\n",
701 PTR_ERR(reg_8921_l23));
702 return -ENODEV;
703 }
704 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
705 if (rc) {
706 pr_err("set_voltage failed for 8921_l23, rc=%d\n", rc);
707 return -EINVAL;
708 }
709 }
710 if (!reg_8921_s4) {
711 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
712 if (IS_ERR(reg_8921_s4)) {
713 pr_err("could not get reg_8921_s4, rc = %ld\n",
714 PTR_ERR(reg_8921_s4));
715 return -ENODEV;
716 }
717 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
718 if (rc) {
719 pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc);
720 return -EINVAL;
721 }
722 }
723
724 if (on) {
725 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
726 if (rc < 0) {
727 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
728 return -EINVAL;
729 }
730 rc = regulator_enable(reg_8921_l23);
731 if (rc) {
732 pr_err("'%s' regulator enable failed, rc=%d\n",
733 "hdmi_avdd", rc);
734 return rc;
735 }
736 rc = regulator_enable(reg_8921_s4);
737 if (rc) {
738 pr_err("'%s' regulator enable failed, rc=%d\n",
739 "hdmi_vcc", rc);
740 return rc;
741 }
742 rc = gpio_request(100, "HDMI_DDC_CLK");
743 if (rc) {
744 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
745 "HDMI_DDC_CLK", 100, rc);
746 goto error1;
747 }
748 rc = gpio_request(101, "HDMI_DDC_DATA");
749 if (rc) {
750 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
751 "HDMI_DDC_DATA", 101, rc);
752 goto error2;
753 }
754 rc = gpio_request(102, "HDMI_HPD");
755 if (rc) {
756 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
757 "HDMI_HPD", 102, rc);
758 goto error3;
759 }
760 pr_debug("%s(on): success\n", __func__);
761 } else {
762 gpio_free(100);
763 gpio_free(101);
764 gpio_free(102);
765
766 rc = regulator_disable(reg_8921_l23);
767 if (rc) {
768 pr_err("disable reg_8921_l23 failed, rc=%d\n", rc);
769 return -ENODEV;
770 }
771 rc = regulator_disable(reg_8921_s4);
772 if (rc) {
773 pr_err("disable reg_8921_s4 failed, rc=%d\n", rc);
774 return -ENODEV;
775 }
776 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
777 if (rc < 0) {
778 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
779 return -EINVAL;
780 }
781 pr_debug("%s(off): success\n", __func__);
782 }
783
784 prev_on = on;
785
786 return 0;
787
788error3:
789 gpio_free(101);
790error2:
791 gpio_free(100);
792error1:
793 regulator_disable(reg_8921_l23);
794 regulator_disable(reg_8921_s4);
795 return rc;
796}
797
798static int hdmi_cec_power(int on)
799{
800 static int prev_on;
801 int rc;
802
803 if (on == prev_on)
804 return 0;
805
806 if (on) {
807 rc = gpio_request(99, "HDMI_CEC_VAR");
808 if (rc) {
809 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
810 "HDMI_CEC_VAR", 99, rc);
811 goto error;
812 }
813 pr_debug("%s(on): success\n", __func__);
814 } else {
815 gpio_free(99);
816 pr_debug("%s(off): success\n", __func__);
817 }
818
819 prev_on = on;
820
821 return 0;
822error:
823 return rc;
824}
825#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
826
827void __init msm8930_init_fb(void)
828{
829#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
830 msm_gpiomux_install(msm8960_hdmi_configs,
831 ARRAY_SIZE(msm8960_hdmi_configs));
832#endif
833
834 msm_gpiomux_install(msm8960_mdp_vsync_configs,
835 ARRAY_SIZE(msm8960_mdp_vsync_configs));
836
837 platform_device_register(&msm_fb_device);
838
839#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
840 platform_device_register(&wfd_panel_device);
841 platform_device_register(&wfd_device);
842#endif
843
844 platform_device_register(&mipi_dsi_novatek_panel_device);
845
846#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
847 platform_device_register(&hdmi_msm_device);
848#endif
849
850 platform_device_register(&mipi_dsi_toshiba_panel_device);
851
852 msm_fb_register_device("mdp", &mdp_pdata);
853 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
854#ifdef CONFIG_MSM_BUS_SCALING
855 msm_fb_register_device("dtv", &dtv_pdata);
856#endif
857}
858
859void __init msm8930_allocate_fb_region(void)
860{
861 void *addr;
862 unsigned long size;
863
864 size = MSM_FB_SIZE;
865 addr = alloc_bootmem_align(size, 0x1000);
866 msm_fb_resources[0].start = __pa(addr);
867 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
868 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
869 size, addr, __pa(addr));
870}