blob: dfb7908e89b0e6b78875612955d3405cc0748e96 [file] [log] [blame]
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/irq.h>
17#include <linux/i2c.h>
18#include <linux/i2c/sx150x.h>
19#include <linux/i2c/isl9519.h>
20#include <linux/gpio.h>
21#include <linux/msm_ssbi.h>
22#include <linux/regulator/gpio-regulator.h>
23#include <linux/mfd/pm8xxx/pm8921.h>
24#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
25#include <linux/regulator/consumer.h>
26#include <linux/spi/spi.h>
27#include <linux/slimbus/slimbus.h>
28#include <linux/bootmem.h>
29#include <linux/msm_kgsl.h>
30#ifdef CONFIG_ANDROID_PMEM
31#include <linux/android_pmem.h>
32#endif
33#include <linux/cyttsp.h>
34#include <linux/dma-mapping.h>
35#include <linux/platform_data/qcom_crypto_device.h>
36#include <linux/platform_data/qcom_wcnss_device.h>
37#include <linux/leds.h>
38#include <linux/leds-pm8xxx.h>
39#include <linux/i2c/atmel_mxt_ts.h>
40#include <linux/msm_tsens.h>
41#include <linux/ks8851.h>
42#include <linux/i2c/isa1200.h>
43
44#include <asm/mach-types.h>
45#include <asm/mach/arch.h>
46#include <asm/setup.h>
47#include <asm/hardware/gic.h>
48#include <asm/mach/mmc.h>
49
50#include <mach/board.h>
51#include <mach/msm_iomap.h>
52#include <mach/msm_spi.h>
53#ifdef CONFIG_USB_MSM_OTG_72K
54#include <mach/msm_hsusb.h>
55#else
56#include <linux/usb/msm_hsusb.h>
57#endif
58#include <linux/usb/android.h>
59#include <mach/usbdiag.h>
60#include <mach/socinfo.h>
61#include <mach/rpm.h>
62#include <mach/gpio.h>
63#include <mach/gpiomux.h>
64#include <mach/msm_bus_board.h>
65#include <mach/msm_memtypes.h>
66#include <mach/dma.h>
67#include <mach/msm_dsps.h>
68#include <mach/msm_xo.h>
69#include <mach/restart.h>
70
71#ifdef CONFIG_WCD9310_CODEC
72#include <linux/slimbus/slimbus.h>
73#include <linux/mfd/wcd9310/core.h>
74#include <linux/mfd/wcd9310/pdata.h>
75#endif
76
77#include <linux/ion.h>
78#include <mach/ion.h>
79#include <mach/mdm2.h>
80
81#include "timer.h"
82#include "devices.h"
83#include "devices-msm8x60.h"
84#include "spm.h"
85#include "board-msm8930.h"
86#include "pm.h"
87#include "cpuidle.h"
88#include "rpm_resources.h"
89#include "mpm.h"
90#include "acpuclock.h"
91#include "rpm_log.h"
92#include "smd_private.h"
93#include "pm-boot.h"
94#include "msm_watchdog.h"
95
96#define PLATFORM_IS_CHARM25() \
97 (machine_is_msm8930_cdp() && \
98 (socinfo_get_platform_subtype() == 1) \
99 )
100
101static struct platform_device msm_fm_platform_init = {
102 .name = "iris_fm",
103 .id = -1,
104};
105
106#define KS8851_RST_GPIO 89
107#define KS8851_IRQ_GPIO 90
108
109/* The SPI configurations apply to GSBI 1*/
110static struct gpiomux_setting spi_active = {
111 .func = GPIOMUX_FUNC_1,
112 .drv = GPIOMUX_DRV_12MA,
113 .pull = GPIOMUX_PULL_NONE,
114};
115
116static struct gpiomux_setting spi_suspended_config = {
117 .func = GPIOMUX_FUNC_GPIO,
118 .drv = GPIOMUX_DRV_2MA,
119 .pull = GPIOMUX_PULL_DOWN,
120};
121
122static struct gpiomux_setting spi_active_config2 = {
123 .func = GPIOMUX_FUNC_2,
124 .drv = GPIOMUX_DRV_8MA,
125 .pull = GPIOMUX_PULL_NONE,
126};
127
128static struct gpiomux_setting spi_suspended_config2 = {
129 .func = GPIOMUX_FUNC_GPIO,
130 .drv = GPIOMUX_DRV_2MA,
131 .pull = GPIOMUX_PULL_UP,
132};
133
134static struct gpiomux_setting gsbi3_suspended_cfg = {
135 .func = GPIOMUX_FUNC_1,
136 .drv = GPIOMUX_DRV_2MA,
137 .pull = GPIOMUX_PULL_KEEPER,
138};
139
140static struct gpiomux_setting gsbi3_active_cfg = {
141 .func = GPIOMUX_FUNC_1,
142 .drv = GPIOMUX_DRV_8MA,
143 .pull = GPIOMUX_PULL_NONE,
144};
145
146static struct gpiomux_setting gsbi5 = {
147 .func = GPIOMUX_FUNC_1,
148 .drv = GPIOMUX_DRV_8MA,
149 .pull = GPIOMUX_PULL_NONE,
150};
151
152static struct gpiomux_setting gsbi10 = {
153 .func = GPIOMUX_FUNC_2,
154 .drv = GPIOMUX_DRV_8MA,
155 .pull = GPIOMUX_PULL_NONE,
156};
157
158static struct gpiomux_setting gsbi12 = {
159 .func = GPIOMUX_FUNC_1,
160 .drv = GPIOMUX_DRV_8MA,
161 .pull = GPIOMUX_PULL_NONE,
162};
163
164static struct gpiomux_setting cdc_mclk = {
165 .func = GPIOMUX_FUNC_1,
166 .drv = GPIOMUX_DRV_8MA,
167 .pull = GPIOMUX_PULL_NONE,
168};
169
170static struct gpiomux_setting audio_auxpcm[] = {
171 /* Suspended state */
172 {
173 .func = GPIOMUX_FUNC_GPIO,
174 .drv = GPIOMUX_DRV_2MA,
175 .pull = GPIOMUX_PULL_NONE,
176 },
177 /* Active state */
178 {
179 .func = GPIOMUX_FUNC_1,
180 .drv = GPIOMUX_DRV_2MA,
181 .pull = GPIOMUX_PULL_NONE,
182 },
183};
184
185#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
186static struct gpiomux_setting gpio_eth_config = {
187 .pull = GPIOMUX_PULL_NONE,
188 .drv = GPIOMUX_DRV_8MA,
189 .func = GPIOMUX_FUNC_GPIO,
190};
191#endif
192
193static struct gpiomux_setting slimbus = {
194 .func = GPIOMUX_FUNC_1,
195 .drv = GPIOMUX_DRV_8MA,
196 .pull = GPIOMUX_PULL_KEEPER,
197};
198
199static struct msm_gpiomux_config msm8960_gpiomux_configs[NR_GPIO_IRQS] = {
200#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
201 {
202 .gpio = KS8851_IRQ_GPIO,
203 .settings = {
204 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
205 }
206 },
207 {
208 .gpio = KS8851_RST_GPIO,
209 .settings = {
210 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
211 }
212 },
213#endif
214};
215
216static struct msm_gpiomux_config msm8960_gsbi_configs[] __initdata = {
217 {
218 .gpio = 6, /* GSBI1 QUP SPI_DATA_MOSI */
219 .settings = {
220 [GPIOMUX_SUSPENDED] = &spi_suspended_config,
221 [GPIOMUX_ACTIVE] = &spi_active,
222 },
223 },
224 {
225 .gpio = 7, /* GSBI1 QUP SPI_DATA_MISO */
226 .settings = {
227 [GPIOMUX_SUSPENDED] = &spi_suspended_config,
228 [GPIOMUX_ACTIVE] = &spi_active,
229 },
230 },
231 {
232 .gpio = 8, /* GSBI1 QUP SPI_CS_N */
233 .settings = {
234 [GPIOMUX_SUSPENDED] = &spi_suspended_config,
235 [GPIOMUX_ACTIVE] = &spi_active,
236 },
237 },
238 {
239 .gpio = 9, /* GSBI1 QUP SPI_CLK */
240 .settings = {
241 [GPIOMUX_SUSPENDED] = &spi_suspended_config,
242 [GPIOMUX_ACTIVE] = &spi_active,
243 },
244 },
245 {
246 .gpio = 14, /* GSBI1 SPI_CS_1 */
247 .settings = {
248 [GPIOMUX_SUSPENDED] = &spi_suspended_config2,
249 [GPIOMUX_ACTIVE] = &spi_active_config2,
250 },
251 },
252 {
253 .gpio = 16, /* GSBI3 I2C QUP SDA */
254 .settings = {
255 [GPIOMUX_SUSPENDED] = &gsbi3_suspended_cfg,
256 [GPIOMUX_ACTIVE] = &gsbi3_active_cfg,
257 },
258 },
259 {
260 .gpio = 17, /* GSBI3 I2C QUP SCL */
261 .settings = {
262 [GPIOMUX_SUSPENDED] = &gsbi3_suspended_cfg,
263 [GPIOMUX_ACTIVE] = &gsbi3_active_cfg,
264 },
265 },
266 {
267 .gpio = 22, /* GSBI5 UART2 */
268 .settings = {
269 [GPIOMUX_SUSPENDED] = &gsbi5,
270 },
271 },
272 {
273 .gpio = 23, /* GSBI5 UART2 */
274 .settings = {
275 [GPIOMUX_SUSPENDED] = &gsbi5,
276 },
277 },
278 {
279 .gpio = 24, /* GSBI5 UART2 */
280 .settings = {
281 [GPIOMUX_SUSPENDED] = &gsbi5,
282 },
283 },
284 {
285 .gpio = 25, /* GSBI5 UART2 */
286 .settings = {
287 [GPIOMUX_SUSPENDED] = &gsbi5,
288 },
289 },
290 {
291 .gpio = 44, /* GSBI12 I2C QUP SDA */
292 .settings = {
293 [GPIOMUX_SUSPENDED] = &gsbi12,
294 },
295 },
296 {
297 .gpio = 45, /* GSBI12 I2C QUP SCL */
298 .settings = {
299 [GPIOMUX_SUSPENDED] = &gsbi12,
300 },
301 },
302 {
303 .gpio = 73, /* GSBI10 I2C QUP SDA */
304 .settings = {
305 [GPIOMUX_SUSPENDED] = &gsbi10,
306 },
307 },
308 {
309 .gpio = 74, /* GSBI10 I2C QUP SCL */
310 .settings = {
311 [GPIOMUX_SUSPENDED] = &gsbi10,
312 },
313 },
314};
315
316static struct msm_gpiomux_config msm8960_slimbus_config[] __initdata = {
317 {
318 .gpio = 60, /* slimbus data */
319 .settings = {
320 [GPIOMUX_SUSPENDED] = &slimbus,
321 },
322 },
323 {
324 .gpio = 61, /* slimbus clk */
325 .settings = {
326 [GPIOMUX_SUSPENDED] = &slimbus,
327 },
328 },
329};
330
331static struct msm_gpiomux_config msm8960_audio_codec_configs[] __initdata = {
332 {
333 .gpio = 59,
334 .settings = {
335 [GPIOMUX_SUSPENDED] = &cdc_mclk,
336 },
337 },
338};
339
340static struct msm_gpiomux_config msm8960_audio_auxpcm_configs[] __initdata = {
341 {
342 .gpio = 63,
343 .settings = {
344 [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
345 [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
346 },
347 },
348 {
349 .gpio = 64,
350 .settings = {
351 [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
352 [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
353 },
354 },
355 {
356 .gpio = 65,
357 .settings = {
358 [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
359 [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
360 },
361 },
362 {
363 .gpio = 66,
364 .settings = {
365 [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
366 [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
367 },
368 },
369};
370
371static struct gpiomux_setting wcnss_5wire_suspend_cfg = {
372 .func = GPIOMUX_FUNC_GPIO,
373 .drv = GPIOMUX_DRV_2MA,
374 .pull = GPIOMUX_PULL_UP,
375};
376
377static struct gpiomux_setting wcnss_5wire_active_cfg = {
378 .func = GPIOMUX_FUNC_1,
379 .drv = GPIOMUX_DRV_6MA,
380 .pull = GPIOMUX_PULL_DOWN,
381};
382
383static struct msm_gpiomux_config wcnss_5wire_interface[] = {
384 {
385 .gpio = 84,
386 .settings = {
387 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
388 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
389 },
390 },
391 {
392 .gpio = 85,
393 .settings = {
394 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
395 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
396 },
397 },
398 {
399 .gpio = 86,
400 .settings = {
401 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
402 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
403 },
404 },
405 {
406 .gpio = 87,
407 .settings = {
408 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
409 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
410 },
411 },
412 {
413 .gpio = 88,
414 .settings = {
415 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
416 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
417 },
418 },
419};
420
421static struct gpiomux_setting cyts_resout_sus_cfg = {
422 .func = GPIOMUX_FUNC_GPIO,
423 .drv = GPIOMUX_DRV_6MA,
424 .pull = GPIOMUX_PULL_UP,
425};
426
427static struct gpiomux_setting cyts_resout_act_cfg = {
428 .func = GPIOMUX_FUNC_GPIO,
429 .drv = GPIOMUX_DRV_6MA,
430 .pull = GPIOMUX_PULL_UP,
431};
432
433static struct gpiomux_setting cyts_sleep_sus_cfg = {
434 .func = GPIOMUX_FUNC_GPIO,
435 .drv = GPIOMUX_DRV_6MA,
436 .pull = GPIOMUX_PULL_DOWN,
437};
438
439static struct gpiomux_setting cyts_sleep_act_cfg = {
440 .func = GPIOMUX_FUNC_GPIO,
441 .drv = GPIOMUX_DRV_6MA,
442 .pull = GPIOMUX_PULL_DOWN,
443};
444
445static struct gpiomux_setting cyts_int_act_cfg = {
446 .func = GPIOMUX_FUNC_GPIO,
447 .drv = GPIOMUX_DRV_8MA,
448 .pull = GPIOMUX_PULL_UP,
449};
450
451static struct gpiomux_setting cyts_int_sus_cfg = {
452 .func = GPIOMUX_FUNC_GPIO,
453 .drv = GPIOMUX_DRV_2MA,
454 .pull = GPIOMUX_PULL_DOWN,
455};
456
457static struct msm_gpiomux_config msm8960_cyts_configs[] __initdata = {
458 { /* TS INTERRUPT */
459 .gpio = 11,
460 .settings = {
461 [GPIOMUX_ACTIVE] = &cyts_int_act_cfg,
462 [GPIOMUX_SUSPENDED] = &cyts_int_sus_cfg,
463 },
464 },
465 { /* TS SLEEP */
466 .gpio = 50,
467 .settings = {
468 [GPIOMUX_ACTIVE] = &cyts_sleep_act_cfg,
469 [GPIOMUX_SUSPENDED] = &cyts_sleep_sus_cfg,
470 },
471 },
472 { /* TS RESOUT */
473 .gpio = 52,
474 .settings = {
475 [GPIOMUX_ACTIVE] = &cyts_resout_act_cfg,
476 [GPIOMUX_SUSPENDED] = &cyts_resout_sus_cfg,
477 },
478 },
479};
480
481#ifdef CONFIG_USB_EHCI_MSM_HSIC
482static struct gpiomux_setting hsic_act_cfg = {
483 .func = GPIOMUX_FUNC_1,
484 .drv = GPIOMUX_DRV_12MA,
485 .pull = GPIOMUX_PULL_NONE,
486};
487
488static struct gpiomux_setting hsic_sus_cfg = {
489 .func = GPIOMUX_FUNC_GPIO,
490 .drv = GPIOMUX_DRV_2MA,
491 .pull = GPIOMUX_PULL_DOWN,
492 .dir = GPIOMUX_OUT_LOW,
493};
494
495static struct gpiomux_setting hsic_hub_act_cfg = {
496 .func = GPIOMUX_FUNC_GPIO,
497 .drv = GPIOMUX_DRV_2MA,
498 .pull = GPIOMUX_PULL_NONE,
499};
500
501static struct msm_gpiomux_config msm8960_hsic_configs[] = {
502 {
503 .gpio = 150, /*HSIC_STROBE */
504 .settings = {
505 [GPIOMUX_ACTIVE] = &hsic_act_cfg,
506 [GPIOMUX_SUSPENDED] = &hsic_sus_cfg,
507 },
508 },
509 {
510 .gpio = 151, /* HSIC_DATA */
511 .settings = {
512 [GPIOMUX_ACTIVE] = &hsic_act_cfg,
513 [GPIOMUX_SUSPENDED] = &hsic_sus_cfg,
514 },
515 },
516 {
517 .gpio = 91, /* HSIC_HUB_RESET */
518 .settings = {
519 [GPIOMUX_ACTIVE] = &hsic_hub_act_cfg,
520 [GPIOMUX_SUSPENDED] = &hsic_sus_cfg,
521 },
522 },
523};
524#endif
525
526#define HAP_SHIFT_LVL_OE_GPIO 47
527
528static struct gpiomux_setting hap_lvl_shft_suspended_config = {
529 .func = GPIOMUX_FUNC_GPIO,
530 .drv = GPIOMUX_DRV_2MA,
531 .pull = GPIOMUX_PULL_DOWN,
532};
533
534static struct gpiomux_setting hap_lvl_shft_active_config = {
535 .func = GPIOMUX_FUNC_GPIO,
536 .drv = GPIOMUX_DRV_8MA,
537 .pull = GPIOMUX_PULL_UP,
538};
539
540static struct msm_gpiomux_config hap_lvl_shft_config[] __initdata = {
541 {
542 .gpio = HAP_SHIFT_LVL_OE_GPIO,
543 .settings = {
544 [GPIOMUX_SUSPENDED] = &hap_lvl_shft_suspended_config,
545 [GPIOMUX_ACTIVE] = &hap_lvl_shft_active_config,
546 },
547 },
548};
549
550#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
551
552struct sx150x_platform_data msm8930_sx150x_data[] = {
553 [SX150X_CAM] = {
554 .gpio_base = GPIO_CAM_EXPANDER_BASE,
555 .oscio_is_gpo = false,
556 .io_pullup_ena = 0x0,
557 .io_pulldn_ena = 0xc0,
558 .io_open_drain_ena = 0x0,
559 .irq_summary = -1,
560 },
561};
562
563#endif
564
565#define MSM_PMEM_ADSP_SIZE 0x3800000
566#define MSM_PMEM_AUDIO_SIZE 0x28B000
567#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
568#define MSM_PMEM_SIZE 0x4000000 /* 64 Mbytes */
569#else
570#define MSM_PMEM_SIZE 0x1C00000 /* 28 Mbytes */
571#endif
572
573
574#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
575#define MSM_PMEM_KERNEL_EBI1_SIZE 0xB0C000
576#define MSM_ION_EBI_SIZE (MSM_PMEM_SIZE + 0x600000)
577#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
578#define MSM_ION_HEAP_NUM 4
579#else
580#define MSM_PMEM_KERNEL_EBI1_SIZE 0x110C000
581#define MSM_ION_HEAP_NUM 2
582#endif
583
584#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
585static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
586static int __init pmem_kernel_ebi1_size_setup(char *p)
587{
588 pmem_kernel_ebi1_size = memparse(p, NULL);
589 return 0;
590}
591early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
592#endif
593
594#ifdef CONFIG_ANDROID_PMEM
595static unsigned pmem_size = MSM_PMEM_SIZE;
596static int __init pmem_size_setup(char *p)
597{
598 pmem_size = memparse(p, NULL);
599 return 0;
600}
601early_param("pmem_size", pmem_size_setup);
602
603static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
604
605static int __init pmem_adsp_size_setup(char *p)
606{
607 pmem_adsp_size = memparse(p, NULL);
608 return 0;
609}
610early_param("pmem_adsp_size", pmem_adsp_size_setup);
611
612static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
613
614static int __init pmem_audio_size_setup(char *p)
615{
616 pmem_audio_size = memparse(p, NULL);
617 return 0;
618}
619early_param("pmem_audio_size", pmem_audio_size_setup);
620#endif
621
622#ifdef CONFIG_ANDROID_PMEM
623#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
624static struct android_pmem_platform_data android_pmem_pdata = {
625 .name = "pmem",
626 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
627 .cached = 1,
628 .memory_type = MEMTYPE_EBI1,
629};
630
631static struct platform_device android_pmem_device = {
632 .name = "android_pmem",
633 .id = 0,
634 .dev = {.platform_data = &android_pmem_pdata},
635};
636
637static struct android_pmem_platform_data android_pmem_adsp_pdata = {
638 .name = "pmem_adsp",
639 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
640 .cached = 0,
641 .memory_type = MEMTYPE_EBI1,
642};
643static struct platform_device android_pmem_adsp_device = {
644 .name = "android_pmem",
645 .id = 2,
646 .dev = { .platform_data = &android_pmem_adsp_pdata },
647};
648#endif
649
650static struct android_pmem_platform_data android_pmem_audio_pdata = {
651 .name = "pmem_audio",
652 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
653 .cached = 0,
654 .memory_type = MEMTYPE_EBI1,
655};
656
657static struct platform_device android_pmem_audio_device = {
658 .name = "android_pmem",
659 .id = 4,
660 .dev = { .platform_data = &android_pmem_audio_pdata },
661};
662#endif
663
664#define DSP_RAM_BASE_8960 0x8da00000
665#define DSP_RAM_SIZE_8960 0x1800000
666static int dspcrashd_pdata_8960 = 0xDEADDEAD;
667
668static struct resource resources_dspcrashd_8960[] = {
669 {
670 .name = "msm_dspcrashd",
671 .start = DSP_RAM_BASE_8960,
672 .end = DSP_RAM_BASE_8960 + DSP_RAM_SIZE_8960,
673 .flags = IORESOURCE_DMA,
674 },
675};
676
677static struct platform_device msm_device_dspcrashd_8960 = {
678 .name = "msm_dspcrashd",
679 .num_resources = ARRAY_SIZE(resources_dspcrashd_8960),
680 .resource = resources_dspcrashd_8960,
681 .dev = { .platform_data = &dspcrashd_pdata_8960 },
682};
683
684static struct memtype_reserve msm8930_reserve_table[] __initdata = {
685 [MEMTYPE_SMI] = {
686 },
687 [MEMTYPE_EBI0] = {
688 .flags = MEMTYPE_FLAGS_1M_ALIGN,
689 },
690 [MEMTYPE_EBI1] = {
691 .flags = MEMTYPE_FLAGS_1M_ALIGN,
692 },
693};
694
695static void __init size_pmem_devices(void)
696{
697#ifdef CONFIG_ANDROID_PMEM
698#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
699 android_pmem_adsp_pdata.size = pmem_adsp_size;
700 android_pmem_pdata.size = pmem_size;
701#endif
702 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
703#endif
704}
705
706static void __init reserve_memory_for(struct android_pmem_platform_data *p)
707{
708 msm8930_reserve_table[p->memory_type].size += p->size;
709}
710
711static void __init reserve_pmem_memory(void)
712{
713#ifdef CONFIG_ANDROID_PMEM
714#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
715 reserve_memory_for(&android_pmem_adsp_pdata);
716 reserve_memory_for(&android_pmem_pdata);
717#endif
718 reserve_memory_for(&android_pmem_audio_pdata);
719 msm8930_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
720#endif
721}
722
723static int msm8930_paddr_to_memtype(unsigned int paddr)
724{
725 return MEMTYPE_EBI1;
726}
727
728#ifdef CONFIG_ION_MSM
729static struct ion_platform_data ion_pdata = {
730 .nr = MSM_ION_HEAP_NUM,
731 .heaps = {
732 {
733 .id = ION_HEAP_SYSTEM_ID,
734 .type = ION_HEAP_TYPE_SYSTEM,
735 .name = ION_KMALLOC_HEAP_NAME,
736 },
737 {
738 .id = ION_HEAP_SYSTEM_CONTIG_ID,
739 .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
740 .name = ION_VMALLOC_HEAP_NAME,
741 },
742#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
743 {
744 .id = ION_HEAP_EBI_ID,
745 .type = ION_HEAP_TYPE_CARVEOUT,
746 .name = ION_EBI1_HEAP_NAME,
747 .size = MSM_ION_EBI_SIZE,
748 .memory_type = ION_EBI_TYPE,
749 },
750 {
751 .id = ION_HEAP_ADSP_ID,
752 .type = ION_HEAP_TYPE_CARVEOUT,
753 .name = ION_ADSP_HEAP_NAME,
754 .size = MSM_ION_ADSP_SIZE,
755 .memory_type = ION_EBI_TYPE,
756 },
757#endif
758 }
759};
760
761static struct platform_device ion_dev = {
762 .name = "ion-msm",
763 .id = 1,
764 .dev = { .platform_data = &ion_pdata },
765};
766#endif
767
768static void reserve_ion_memory(void)
769{
770#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
771 msm8930_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
772 msm8930_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
773#endif
774}
775static void __init msm8930_calculate_reserve_sizes(void)
776{
777 size_pmem_devices();
778 reserve_pmem_memory();
779 reserve_ion_memory();
780}
781
782static struct reserve_info msm8930_reserve_info __initdata = {
783 .memtype_reserve_table = msm8930_reserve_table,
784 .calculate_reserve_sizes = msm8930_calculate_reserve_sizes,
785 .paddr_to_memtype = msm8930_paddr_to_memtype,
786};
787
788static int msm8930_memory_bank_size(void)
789{
790 return 1<<29;
791}
792
793static void __init locate_unstable_memory(void)
794{
795 struct membank *mb = &meminfo.bank[meminfo.nr_banks - 1];
796 unsigned long bank_size;
797 unsigned long low, high;
798
799 bank_size = msm8930_memory_bank_size();
800 low = meminfo.bank[0].start;
801 high = mb->start + mb->size;
802
803 /* Check if 32 bit overflow occured */
804 if (high < mb->start)
805 high = ~0UL;
806
807 low &= ~(bank_size - 1);
808
809 if (high - low <= bank_size)
810 return;
811 msm8930_reserve_info.low_unstable_address = low + bank_size;
812 /* To avoid overflow of u32 compute max_unstable_size
813 * by first subtracting low from mb->start)
814 * */
815 msm8930_reserve_info.max_unstable_size = (mb->start - low) +
816 mb->size - bank_size;
817
818 msm8930_reserve_info.bank_size = bank_size;
819 pr_info("low unstable address %lx max size %lx bank size %lx\n",
820 msm8930_reserve_info.low_unstable_address,
821 msm8930_reserve_info.max_unstable_size,
822 msm8930_reserve_info.bank_size);
823}
824
825static void __init place_movable_zone(void)
826{
827 movable_reserved_start = msm8930_reserve_info.low_unstable_address;
828 movable_reserved_size = msm8930_reserve_info.max_unstable_size;
829 pr_info("movable zone start %lx size %lx\n",
830 movable_reserved_start, movable_reserved_size);
831}
832
833static void __init msm8930_early_memory(void)
834{
835 reserve_info = &msm8930_reserve_info;
836 locate_unstable_memory();
837 place_movable_zone();
838}
839
840static void __init msm8930_reserve(void)
841{
842 msm_reserve();
843}
844
845static int msm8930_change_memory_power(u64 start, u64 size,
846 int change_type)
847{
848 return soc_change_memory_power(start, size, change_type);
849}
850
851static void __init msm8930_allocate_memory_regions(void)
852{
853 msm8930_allocate_fb_region();
854}
855
856#ifdef CONFIG_WCD9310_CODEC
857
858#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
859
860/* Micbias setting is based on 8660 CDP/MTP/FLUID requirement
861 * 4 micbiases are used to power various analog and digital
862 * microphones operating at 1800 mV. Technically, all micbiases
863 * can source from single cfilter since all microphones operate
864 * at the same voltage level. The arrangement below is to make
865 * sure all cfilters are exercised. LDO_H regulator ouput level
866 * does not need to be as high as 2.85V. It is choosen for
867 * microphone sensitivity purpose.
868 */
869static struct tabla_pdata tabla_platform_data = {
870 .slimbus_slave_device = {
871 .name = "tabla-slave",
872 .e_addr = {0, 0, 0x10, 0, 0x17, 2},
873 },
874 .irq = MSM_GPIO_TO_INT(62),
875 .irq_base = TABLA_INTERRUPT_BASE,
876 .num_irqs = NR_TABLA_IRQS,
877 .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
878 .micbias = {
879 .ldoh_v = TABLA_LDOH_2P85_V,
880 .cfilt1_mv = 1800,
881 .cfilt2_mv = 1800,
882 .cfilt3_mv = 1800,
883 .bias1_cfilt_sel = TABLA_CFILT1_SEL,
884 .bias2_cfilt_sel = TABLA_CFILT2_SEL,
885 .bias3_cfilt_sel = TABLA_CFILT3_SEL,
886 .bias4_cfilt_sel = TABLA_CFILT3_SEL,
887 }
888};
889
890static struct slim_device msm_slim_tabla = {
891 .name = "tabla-slim",
892 .e_addr = {0, 1, 0x10, 0, 0x17, 2},
893 .dev = {
894 .platform_data = &tabla_platform_data,
895 },
896};
897
898static struct tabla_pdata tabla20_platform_data = {
899 .slimbus_slave_device = {
900 .name = "tabla-slave",
901 .e_addr = {0, 0, 0x60, 0, 0x17, 2},
902 },
903 .irq = MSM_GPIO_TO_INT(62),
904 .irq_base = TABLA_INTERRUPT_BASE,
905 .num_irqs = NR_TABLA_IRQS,
906 .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
907 .micbias = {
908 .ldoh_v = TABLA_LDOH_2P85_V,
909 .cfilt1_mv = 1800,
910 .cfilt2_mv = 1800,
911 .cfilt3_mv = 1800,
912 .bias1_cfilt_sel = TABLA_CFILT1_SEL,
913 .bias2_cfilt_sel = TABLA_CFILT2_SEL,
914 .bias3_cfilt_sel = TABLA_CFILT3_SEL,
915 .bias4_cfilt_sel = TABLA_CFILT3_SEL,
916 }
917};
918
919static struct slim_device msm_slim_tabla20 = {
920 .name = "tabla2x-slim",
921 .e_addr = {0, 1, 0x60, 0, 0x17, 2},
922 .dev = {
923 .platform_data = &tabla20_platform_data,
924 },
925};
926#endif
927
928static struct slim_boardinfo msm_slim_devices[] = {
929#ifdef CONFIG_WCD9310_CODEC
930 {
931 .bus_num = 1,
932 .slim_slave = &msm_slim_tabla,
933 },
934 {
935 .bus_num = 1,
936 .slim_slave = &msm_slim_tabla20,
937 },
938#endif
939 /* add more slimbus slaves as needed */
940};
941
942#define MSM_WCNSS_PHYS 0x03000000
943#define MSM_WCNSS_SIZE 0x280000
944
945static struct resource resources_wcnss_wlan[] = {
946 {
947 .start = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
948 .end = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
949 .name = "wcnss_wlanrx_irq",
950 .flags = IORESOURCE_IRQ,
951 },
952 {
953 .start = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
954 .end = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
955 .name = "wcnss_wlantx_irq",
956 .flags = IORESOURCE_IRQ,
957 },
958 {
959 .start = MSM_WCNSS_PHYS,
960 .end = MSM_WCNSS_PHYS + MSM_WCNSS_SIZE - 1,
961 .name = "wcnss_mmio",
962 .flags = IORESOURCE_MEM,
963 },
964 {
965 .start = 84,
966 .end = 88,
967 .name = "wcnss_gpios_5wire",
968 .flags = IORESOURCE_IO,
969 },
970};
971
972static struct qcom_wcnss_opts qcom_wcnss_pdata = {
973 .has_48mhz_xo = 1,
974};
975
976static struct platform_device msm_device_wcnss_wlan = {
977 .name = "wcnss_wlan",
978 .id = 0,
979 .num_resources = ARRAY_SIZE(resources_wcnss_wlan),
980 .resource = resources_wcnss_wlan,
981 .dev = {.platform_data = &qcom_wcnss_pdata},
982};
983
984#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
985 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
986 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
987 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
988
989#define QCE_SIZE 0x10000
990#define QCE_0_BASE 0x18500000
991
992#define QCE_HW_KEY_SUPPORT 0
993#define QCE_SHA_HMAC_SUPPORT 1
994#define QCE_SHARE_CE_RESOURCE 1
995#define QCE_CE_SHARED 0
996
997static struct resource qcrypto_resources[] = {
998 [0] = {
999 .start = QCE_0_BASE,
1000 .end = QCE_0_BASE + QCE_SIZE - 1,
1001 .flags = IORESOURCE_MEM,
1002 },
1003 [1] = {
1004 .name = "crypto_channels",
1005 .start = DMOV_CE_IN_CHAN,
1006 .end = DMOV_CE_OUT_CHAN,
1007 .flags = IORESOURCE_DMA,
1008 },
1009 [2] = {
1010 .name = "crypto_crci_in",
1011 .start = DMOV_CE_IN_CRCI,
1012 .end = DMOV_CE_IN_CRCI,
1013 .flags = IORESOURCE_DMA,
1014 },
1015 [3] = {
1016 .name = "crypto_crci_out",
1017 .start = DMOV_CE_OUT_CRCI,
1018 .end = DMOV_CE_OUT_CRCI,
1019 .flags = IORESOURCE_DMA,
1020 },
1021};
1022
1023static struct resource qcedev_resources[] = {
1024 [0] = {
1025 .start = QCE_0_BASE,
1026 .end = QCE_0_BASE + QCE_SIZE - 1,
1027 .flags = IORESOURCE_MEM,
1028 },
1029 [1] = {
1030 .name = "crypto_channels",
1031 .start = DMOV_CE_IN_CHAN,
1032 .end = DMOV_CE_OUT_CHAN,
1033 .flags = IORESOURCE_DMA,
1034 },
1035 [2] = {
1036 .name = "crypto_crci_in",
1037 .start = DMOV_CE_IN_CRCI,
1038 .end = DMOV_CE_IN_CRCI,
1039 .flags = IORESOURCE_DMA,
1040 },
1041 [3] = {
1042 .name = "crypto_crci_out",
1043 .start = DMOV_CE_OUT_CRCI,
1044 .end = DMOV_CE_OUT_CRCI,
1045 .flags = IORESOURCE_DMA,
1046 },
1047};
1048
1049#endif
1050
1051#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
1052 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
1053
1054static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
1055 .ce_shared = QCE_CE_SHARED,
1056 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
1057 .hw_key_support = QCE_HW_KEY_SUPPORT,
1058 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
1059};
1060
1061static struct platform_device qcrypto_device = {
1062 .name = "qcrypto",
1063 .id = 0,
1064 .num_resources = ARRAY_SIZE(qcrypto_resources),
1065 .resource = qcrypto_resources,
1066 .dev = {
1067 .coherent_dma_mask = DMA_BIT_MASK(32),
1068 .platform_data = &qcrypto_ce_hw_suppport,
1069 },
1070};
1071#endif
1072
1073#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
1074 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
1075
1076static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
1077 .ce_shared = QCE_CE_SHARED,
1078 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
1079 .hw_key_support = QCE_HW_KEY_SUPPORT,
1080 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
1081};
1082
1083static struct platform_device qcedev_device = {
1084 .name = "qce",
1085 .id = 0,
1086 .num_resources = ARRAY_SIZE(qcedev_resources),
1087 .resource = qcedev_resources,
1088 .dev = {
1089 .coherent_dma_mask = DMA_BIT_MASK(32),
1090 .platform_data = &qcedev_ce_hw_suppport,
1091 },
1092};
1093#endif
1094
1095#define MDM2AP_ERRFATAL 70
1096#define AP2MDM_ERRFATAL 95
1097#define MDM2AP_STATUS 69
1098#define AP2MDM_STATUS 94
1099#define AP2MDM_PMIC_RESET_N 80
1100#define AP2MDM_KPDPWR_N 81
1101
1102static struct gpiomux_setting ap2mdm_cfg = {
1103 .func = GPIOMUX_FUNC_GPIO,
1104 .drv = GPIOMUX_DRV_8MA,
1105 .pull = GPIOMUX_PULL_DOWN,
1106};
1107
1108static struct gpiomux_setting mdm2ap_status_cfg = {
1109 .func = GPIOMUX_FUNC_GPIO,
1110 .drv = GPIOMUX_DRV_8MA,
1111 .pull = GPIOMUX_PULL_NONE,
1112};
1113
1114static struct gpiomux_setting mdm2ap_errfatal_cfg = {
1115 .func = GPIOMUX_FUNC_GPIO,
1116 .drv = GPIOMUX_DRV_16MA,
1117 .pull = GPIOMUX_PULL_DOWN,
1118};
1119
1120static struct gpiomux_setting ap2mdm_kpdpwr_n_cfg = {
1121 .func = GPIOMUX_FUNC_GPIO,
1122 .drv = GPIOMUX_DRV_8MA,
1123 .pull = GPIOMUX_PULL_NONE,
1124};
1125
1126static struct msm_gpiomux_config mdm_configs[] __initdata = {
1127 /* AP2MDM_STATUS */
1128 {
1129 .gpio = AP2MDM_STATUS,
1130 .settings = {
1131 [GPIOMUX_SUSPENDED] = &ap2mdm_cfg,
1132 }
1133 },
1134 /* MDM2AP_STATUS */
1135 {
1136 .gpio = MDM2AP_STATUS,
1137 .settings = {
1138 [GPIOMUX_SUSPENDED] = &mdm2ap_status_cfg,
1139 }
1140 },
1141 /* MDM2AP_ERRFATAL */
1142 {
1143 .gpio = MDM2AP_ERRFATAL,
1144 .settings = {
1145 [GPIOMUX_SUSPENDED] = &mdm2ap_errfatal_cfg,
1146 }
1147 },
1148 /* AP2MDM_ERRFATAL */
1149 {
1150 .gpio = AP2MDM_ERRFATAL,
1151 .settings = {
1152 [GPIOMUX_SUSPENDED] = &ap2mdm_cfg,
1153 }
1154 },
1155 /* AP2MDM_KPDPWR_N */
1156 {
1157 .gpio = AP2MDM_KPDPWR_N,
1158 .settings = {
1159 [GPIOMUX_SUSPENDED] = &ap2mdm_kpdpwr_n_cfg,
1160 }
1161 },
1162 /* AP2MDM_PMIC_RESET_N */
1163 {
1164 .gpio = AP2MDM_PMIC_RESET_N,
1165 .settings = {
1166 [GPIOMUX_SUSPENDED] = &ap2mdm_kpdpwr_n_cfg,
1167 }
1168 }
1169};
1170
1171static struct resource mdm_resources[] = {
1172 {
1173 .start = MDM2AP_ERRFATAL,
1174 .end = MDM2AP_ERRFATAL,
1175 .name = "MDM2AP_ERRFATAL",
1176 .flags = IORESOURCE_IO,
1177 },
1178 {
1179 .start = AP2MDM_ERRFATAL,
1180 .end = AP2MDM_ERRFATAL,
1181 .name = "AP2MDM_ERRFATAL",
1182 .flags = IORESOURCE_IO,
1183 },
1184 {
1185 .start = MDM2AP_STATUS,
1186 .end = MDM2AP_STATUS,
1187 .name = "MDM2AP_STATUS",
1188 .flags = IORESOURCE_IO,
1189 },
1190 {
1191 .start = AP2MDM_STATUS,
1192 .end = AP2MDM_STATUS,
1193 .name = "AP2MDM_STATUS",
1194 .flags = IORESOURCE_IO,
1195 },
1196 {
1197 .start = AP2MDM_PMIC_RESET_N,
1198 .end = AP2MDM_PMIC_RESET_N,
1199 .name = "AP2MDM_PMIC_RESET_N",
1200 .flags = IORESOURCE_IO,
1201 },
1202 {
1203 .start = AP2MDM_KPDPWR_N,
1204 .end = AP2MDM_KPDPWR_N,
1205 .name = "AP2MDM_KPDPWR_N",
1206 .flags = IORESOURCE_IO,
1207 },
1208};
1209
1210static struct mdm_platform_data mdm_platform_data = {
1211 .mdm_version = "2.5",
1212};
1213
1214static struct platform_device mdm_device = {
1215 .name = "mdm2_modem",
1216 .id = -1,
1217 .num_resources = ARRAY_SIZE(mdm_resources),
1218 .resource = mdm_resources,
1219 .dev = {
1220 .platform_data = &mdm_platform_data,
1221 },
1222};
1223
1224static struct platform_device *mdm_devices[] __initdata = {
1225 &mdm_device,
1226};
1227
1228static int __init gpiomux_init(void)
1229{
1230 int rc;
1231
1232 rc = msm_gpiomux_init(NR_GPIO_IRQS);
1233 if (rc) {
1234 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
1235 return rc;
1236 }
1237
1238 msm_gpiomux_install(msm8960_gpiomux_configs,
1239 ARRAY_SIZE(msm8960_gpiomux_configs));
1240
1241 msm_gpiomux_install(msm8960_gsbi_configs,
1242 ARRAY_SIZE(msm8960_gsbi_configs));
1243
1244 msm_gpiomux_install(msm8960_cyts_configs,
1245 ARRAY_SIZE(msm8960_cyts_configs));
1246
1247 msm_gpiomux_install(msm8960_slimbus_config,
1248 ARRAY_SIZE(msm8960_slimbus_config));
1249
1250 msm_gpiomux_install(msm8960_audio_codec_configs,
1251 ARRAY_SIZE(msm8960_audio_codec_configs));
1252
1253 msm_gpiomux_install(msm8960_audio_auxpcm_configs,
1254 ARRAY_SIZE(msm8960_audio_auxpcm_configs));
1255
1256 msm_gpiomux_install(wcnss_5wire_interface,
1257 ARRAY_SIZE(wcnss_5wire_interface));
1258
1259 if (machine_is_msm8930_mtp() || machine_is_msm8930_fluid() ||
1260 machine_is_msm8930_cdp())
1261 msm_gpiomux_install(hap_lvl_shft_config,
1262 ARRAY_SIZE(hap_lvl_shft_config));
1263
1264 if (PLATFORM_IS_CHARM25())
1265 msm_gpiomux_install(mdm_configs,
1266 ARRAY_SIZE(mdm_configs));
1267
1268 return 0;
1269}
1270
1271#define MSM_SHARED_RAM_PHYS 0x80000000
1272
1273static void __init msm8930_map_io(void)
1274{
1275 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
1276 msm_map_msm8930_io();
1277
1278 if (socinfo_init() < 0)
1279 pr_err("socinfo_init() failed!\n");
1280}
1281
1282static void __init msm8930_init_irq(void)
1283{
1284 unsigned int i;
1285
1286 msm_mpm_irq_extn_init();
1287 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
1288 (void *)MSM_QGIC_CPU_BASE);
1289
1290 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
1291 writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
1292
1293 writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
1294 mb();
1295
1296 /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
1297 * as they are configured as level, which does not play nice with
1298 * handle_percpu_irq.
1299 */
1300 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
1301 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
1302 irq_set_handler(i, handle_percpu_irq);
1303 }
1304}
1305
1306static void __init msm8930_init_buses(void)
1307{
1308#ifdef CONFIG_MSM_BUS_SCALING
1309 msm_bus_rpm_set_mt_mask();
1310 msm_bus_8960_apps_fabric_pdata.rpm_enabled = 1;
1311 msm_bus_8960_sys_fabric_pdata.rpm_enabled = 1;
1312 msm_bus_8960_mm_fabric_pdata.rpm_enabled = 1;
1313 msm_bus_apps_fabric.dev.platform_data =
1314 &msm_bus_8960_apps_fabric_pdata;
1315 msm_bus_sys_fabric.dev.platform_data = &msm_bus_8960_sys_fabric_pdata;
1316 msm_bus_mm_fabric.dev.platform_data = &msm_bus_8960_mm_fabric_pdata;
1317 msm_bus_sys_fpb.dev.platform_data = &msm_bus_8960_sys_fpb_pdata;
1318 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_8960_cpss_fpb_pdata;
1319#endif
1320}
1321
1322static struct msm_spi_platform_data msm8960_qup_spi_gsbi1_pdata = {
1323 .max_clock_speed = 15060000,
1324};
1325
1326#ifdef CONFIG_USB_MSM_OTG_72K
1327static struct msm_otg_platform_data msm_otg_pdata;
1328#else
1329#define USB_5V_EN 42
1330static void msm_hsusb_vbus_power(bool on)
1331{
1332 int rc;
1333 static bool vbus_is_on;
1334 static struct regulator *mvs_otg_switch;
1335
1336 if (vbus_is_on == on)
1337 return;
1338
1339 if (on) {
1340 mvs_otg_switch = regulator_get(&msm8960_device_otg.dev,
1341 "vbus_otg");
1342 if (IS_ERR(mvs_otg_switch)) {
1343 pr_err("Unable to get mvs_otg_switch\n");
1344 return;
1345 }
1346
1347 rc = gpio_request(PM8921_GPIO_PM_TO_SYS(USB_5V_EN),
1348 "usb_5v_en");
1349 if (rc < 0) {
1350 pr_err("failed to request usb_5v_en gpio\n");
1351 goto put_mvs_otg;
1352 }
1353
1354 rc = gpio_direction_output(PM8921_GPIO_PM_TO_SYS(USB_5V_EN), 1);
1355 if (rc) {
1356 pr_err("%s: unable to set_direction for gpio [%d]\n",
1357 __func__, PM8921_GPIO_PM_TO_SYS(USB_5V_EN));
1358 goto free_usb_5v_en;
1359 }
1360
1361 if (regulator_enable(mvs_otg_switch)) {
1362 pr_err("unable to enable mvs_otg_switch\n");
1363 goto err_ldo_gpio_set_dir;
1364 }
1365
1366 vbus_is_on = true;
1367 return;
1368 }
1369 regulator_disable(mvs_otg_switch);
1370err_ldo_gpio_set_dir:
1371 gpio_set_value(PM8921_GPIO_PM_TO_SYS(USB_5V_EN), 0);
1372free_usb_5v_en:
1373 gpio_free(PM8921_GPIO_PM_TO_SYS(USB_5V_EN));
1374put_mvs_otg:
1375 regulator_put(mvs_otg_switch);
1376 vbus_is_on = false;
1377}
1378
1379static struct msm_otg_platform_data msm_otg_pdata = {
1380 .mode = USB_OTG,
1381 .otg_control = OTG_PMIC_CONTROL,
1382 .phy_type = SNPS_28NM_INTEGRATED_PHY,
1383 .pclk_src_name = "dfab_usb_hs_clk",
1384 .pmic_id_irq = PM8921_USB_ID_IN_IRQ(PM8921_IRQ_BASE),
1385 .vbus_power = msm_hsusb_vbus_power,
1386 .power_budget = 750,
1387};
1388#endif
1389
1390#ifdef CONFIG_USB_EHCI_MSM_HSIC
1391#define HSIC_HUB_RESET_GPIO 91
1392static struct msm_hsic_host_platform_data msm_hsic_pdata = {
1393 .strobe = 150,
1394 .data = 151,
1395};
1396#else
1397static struct msm_hsic_host_platform_data msm_hsic_pdata;
1398#endif
1399
1400#define PID_MAGIC_ID 0x71432909
1401#define SERIAL_NUM_MAGIC_ID 0x61945374
1402#define SERIAL_NUMBER_LENGTH 127
1403#define DLOAD_USB_BASE_ADD 0x2A03F0C8
1404
1405struct magic_num_struct {
1406 uint32_t pid;
1407 uint32_t serial_num;
1408};
1409
1410struct dload_struct {
1411 uint32_t reserved1;
1412 uint32_t reserved2;
1413 uint32_t reserved3;
1414 uint16_t reserved4;
1415 uint16_t pid;
1416 char serial_number[SERIAL_NUMBER_LENGTH];
1417 uint16_t reserved5;
1418 struct magic_num_struct magic_struct;
1419};
1420
1421static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1422{
1423 struct dload_struct __iomem *dload = 0;
1424
1425 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1426 if (!dload) {
1427 pr_err("%s: cannot remap I/O memory region: %08x\n",
1428 __func__, DLOAD_USB_BASE_ADD);
1429 return -ENXIO;
1430 }
1431
1432 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1433 __func__, dload, pid, snum);
1434 /* update pid */
1435 dload->magic_struct.pid = PID_MAGIC_ID;
1436 dload->pid = pid;
1437
1438 /* update serial number */
1439 dload->magic_struct.serial_num = 0;
1440 if (!snum) {
1441 memset(dload->serial_number, 0, SERIAL_NUMBER_LENGTH);
1442 goto out;
1443 }
1444
1445 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1446 strlcpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1447out:
1448 iounmap(dload);
1449 return 0;
1450}
1451
1452static struct android_usb_platform_data android_usb_pdata = {
1453 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1454};
1455
1456static struct platform_device android_usb_device = {
1457 .name = "android_usb",
1458 .id = -1,
1459 .dev = {
1460 .platform_data = &android_usb_pdata,
1461 },
1462};
1463
1464static uint8_t spm_wfi_cmd_sequence[] __initdata = {
1465 0x03, 0x0f,
1466};
1467
1468static uint8_t spm_power_collapse_without_rpm[] __initdata = {
1469 0x00, 0x24, 0x54, 0x10,
1470 0x09, 0x03, 0x01,
1471 0x10, 0x54, 0x30, 0x0C,
1472 0x24, 0x30, 0x0f,
1473};
1474
1475static uint8_t spm_power_collapse_with_rpm[] __initdata = {
1476 0x00, 0x24, 0x54, 0x10,
1477 0x09, 0x07, 0x01, 0x0B,
1478 0x10, 0x54, 0x30, 0x0C,
1479 0x24, 0x30, 0x0f,
1480};
1481
1482static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
1483 [0] = {
1484 .mode = MSM_SPM_MODE_CLOCK_GATING,
1485 .notify_rpm = false,
1486 .cmd = spm_wfi_cmd_sequence,
1487 },
1488 [1] = {
1489 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
1490 .notify_rpm = false,
1491 .cmd = spm_power_collapse_without_rpm,
1492 },
1493 [2] = {
1494 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
1495 .notify_rpm = true,
1496 .cmd = spm_power_collapse_with_rpm,
1497 },
1498};
1499
1500static struct msm_spm_platform_data msm_spm_data[] __initdata = {
1501 [0] = {
1502 .reg_base_addr = MSM_SAW0_BASE,
1503 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
1504 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
1505 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
1506#if defined(CONFIG_MSM_AVS_HW)
1507 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
1508 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
1509#endif
1510 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
1511 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
1512 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
1513 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
1514 .vctl_timeout_us = 50,
1515 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
1516 .modes = msm_spm_seq_list,
1517 },
1518 [1] = {
1519 .reg_base_addr = MSM_SAW1_BASE,
1520 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
1521 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
1522 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
1523#if defined(CONFIG_MSM_AVS_HW)
1524 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
1525 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
1526#endif
1527 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
1528 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
1529 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
1530 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
1531 .vctl_timeout_us = 50,
1532 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
1533 .modes = msm_spm_seq_list,
1534 },
1535};
1536
1537static uint8_t l2_spm_wfi_cmd_sequence[] __initdata = {
1538 0x00, 0x20, 0x03, 0x20,
1539 0x00, 0x0f,
1540};
1541
1542static uint8_t l2_spm_gdhs_cmd_sequence[] __initdata = {
1543 0x00, 0x20, 0x34, 0x64,
1544 0x48, 0x07, 0x48, 0x20,
1545 0x50, 0x64, 0x04, 0x34,
1546 0x50, 0x0f,
1547};
1548static uint8_t l2_spm_power_off_cmd_sequence[] __initdata = {
1549 0x00, 0x10, 0x34, 0x64,
1550 0x48, 0x07, 0x48, 0x10,
1551 0x50, 0x64, 0x04, 0x34,
1552 0x50, 0x0F,
1553};
1554
1555static struct msm_spm_seq_entry msm_spm_l2_seq_list[] __initdata = {
1556 [0] = {
1557 .mode = MSM_SPM_L2_MODE_RETENTION,
1558 .notify_rpm = false,
1559 .cmd = l2_spm_wfi_cmd_sequence,
1560 },
1561 [1] = {
1562 .mode = MSM_SPM_L2_MODE_GDHS,
1563 .notify_rpm = true,
1564 .cmd = l2_spm_gdhs_cmd_sequence,
1565 },
1566 [2] = {
1567 .mode = MSM_SPM_L2_MODE_POWER_COLLAPSE,
1568 .notify_rpm = true,
1569 .cmd = l2_spm_power_off_cmd_sequence,
1570 },
1571};
1572
1573static struct msm_spm_platform_data msm_spm_l2_data[] __initdata = {
1574 [0] = {
1575 .reg_base_addr = MSM_SAW_L2_BASE,
1576 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
1577 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00,
1578 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
1579 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE,
1580 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020,
1581 .modes = msm_spm_l2_seq_list,
1582 .num_modes = ARRAY_SIZE(msm_spm_l2_seq_list),
1583 },
1584};
1585
1586#define PM_HAP_EN_GPIO PM8921_GPIO_PM_TO_SYS(33)
1587#define PM_HAP_LEN_GPIO PM8921_GPIO_PM_TO_SYS(20)
1588
1589static struct msm_xo_voter *xo_handle_d1;
1590
1591static int isa1200_power(int on)
1592{
1593 int rc = 0;
1594
1595 gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, !!on);
1596
1597 rc = on ? msm_xo_mode_vote(xo_handle_d1, MSM_XO_MODE_ON) :
1598 msm_xo_mode_vote(xo_handle_d1, MSM_XO_MODE_OFF);
1599 if (rc < 0) {
1600 pr_err("%s: failed to %svote for TCXO D1 buffer%d\n",
1601 __func__, on ? "" : "de-", rc);
1602 goto err_xo_vote;
1603 }
1604
1605 return 0;
1606
1607err_xo_vote:
1608 gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, !on);
1609 return rc;
1610}
1611
1612static int isa1200_dev_setup(bool enable)
1613{
1614 int rc = 0;
1615
1616 struct pm_gpio hap_gpio_config = {
1617 .direction = PM_GPIO_DIR_OUT,
1618 .pull = PM_GPIO_PULL_NO,
1619 .out_strength = PM_GPIO_STRENGTH_HIGH,
1620 .function = PM_GPIO_FUNC_NORMAL,
1621 .inv_int_pol = 0,
1622 .vin_sel = 2,
1623 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
1624 .output_value = 0,
1625 };
1626
1627 if (enable == true) {
1628 rc = pm8xxx_gpio_config(PM_HAP_EN_GPIO, &hap_gpio_config);
1629 if (rc) {
1630 pr_err("%s: pm8921 gpio %d config failed(%d)\n",
1631 __func__, PM_HAP_EN_GPIO, rc);
1632 return rc;
1633 }
1634
1635 rc = pm8xxx_gpio_config(PM_HAP_LEN_GPIO, &hap_gpio_config);
1636 if (rc) {
1637 pr_err("%s: pm8921 gpio %d config failed(%d)\n",
1638 __func__, PM_HAP_LEN_GPIO, rc);
1639 return rc;
1640 }
1641
1642 rc = gpio_request(HAP_SHIFT_LVL_OE_GPIO, "hap_shft_lvl_oe");
1643 if (rc) {
1644 pr_err("%s: unable to request gpio %d (%d)\n",
1645 __func__, HAP_SHIFT_LVL_OE_GPIO, rc);
1646 return rc;
1647 }
1648
1649 rc = gpio_direction_output(HAP_SHIFT_LVL_OE_GPIO, 0);
1650 if (rc) {
1651 pr_err("%s: Unable to set direction\n", __func__);
1652 goto free_gpio;
1653 }
1654
1655 xo_handle_d1 = msm_xo_get(MSM_XO_TCXO_D1, "isa1200");
1656 if (IS_ERR(xo_handle_d1)) {
1657 rc = PTR_ERR(xo_handle_d1);
1658 pr_err("%s: failed to get the handle for D1(%d)\n",
1659 __func__, rc);
1660 goto gpio_set_dir;
1661 }
1662 } else {
1663 gpio_free(HAP_SHIFT_LVL_OE_GPIO);
1664
1665 msm_xo_put(xo_handle_d1);
1666 }
1667
1668 return 0;
1669
1670gpio_set_dir:
1671 gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, 0);
1672free_gpio:
1673 gpio_free(HAP_SHIFT_LVL_OE_GPIO);
1674 return rc;
1675}
1676
1677static struct isa1200_regulator isa1200_reg_data[] = {
1678 {
1679 .name = "vcc_i2c",
1680 .min_uV = ISA_I2C_VTG_MIN_UV,
1681 .max_uV = ISA_I2C_VTG_MAX_UV,
1682 .load_uA = ISA_I2C_CURR_UA,
1683 },
1684};
1685
1686static struct isa1200_platform_data isa1200_1_pdata = {
1687 .name = "vibrator",
1688 .dev_setup = isa1200_dev_setup,
1689 .power_on = isa1200_power,
1690 .hap_en_gpio = PM_HAP_EN_GPIO,
1691 .hap_len_gpio = PM_HAP_LEN_GPIO,
1692 .max_timeout = 15000,
1693 .mode_ctrl = PWM_GEN_MODE,
1694 .pwm_fd = {
1695 .pwm_div = 256,
1696 },
1697 .is_erm = false,
1698 .smart_en = true,
1699 .ext_clk_en = true,
1700 .chip_en = 1,
1701 .regulator_info = isa1200_reg_data,
1702 .num_regulators = ARRAY_SIZE(isa1200_reg_data),
1703};
1704
1705static struct i2c_board_info msm_isa1200_board_info[] __initdata = {
1706 {
1707 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
1708 .platform_data = &isa1200_1_pdata,
1709 },
1710};
1711
1712#define CYTTSP_TS_GPIO_IRQ 11
1713#define CYTTSP_TS_SLEEP_GPIO 50
1714#define CYTTSP_TS_RESOUT_N_GPIO 52
1715
1716/*virtual key support */
1717static ssize_t tma340_vkeys_show(struct kobject *kobj,
1718 struct kobj_attribute *attr, char *buf)
1719{
1720 return snprintf(buf, 200,
1721 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":73:1120:97:97"
1722 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":230:1120:97:97"
1723 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":389:1120:97:97"
1724 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":544:1120:97:97"
1725 "\n");
1726}
1727
1728static struct kobj_attribute tma340_vkeys_attr = {
1729 .attr = {
1730 .mode = S_IRUGO,
1731 },
1732 .show = &tma340_vkeys_show,
1733};
1734
1735static struct attribute *tma340_properties_attrs[] = {
1736 &tma340_vkeys_attr.attr,
1737 NULL
1738};
1739
1740static struct attribute_group tma340_properties_attr_group = {
1741 .attrs = tma340_properties_attrs,
1742};
1743
1744
1745static int cyttsp_platform_init(struct i2c_client *client)
1746{
1747 int rc = 0;
1748 static struct kobject *tma340_properties_kobj;
1749
1750 tma340_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
1751 tma340_properties_kobj = kobject_create_and_add("board_properties",
1752 NULL);
1753 if (tma340_properties_kobj)
1754 rc = sysfs_create_group(tma340_properties_kobj,
1755 &tma340_properties_attr_group);
1756 if (!tma340_properties_kobj || rc)
1757 pr_err("%s: failed to create board_properties\n",
1758 __func__);
1759
1760 return 0;
1761}
1762
1763static struct cyttsp_regulator regulator_data[] = {
1764 {
1765 .name = "vdd",
1766 .min_uV = CY_TMA300_VTG_MIN_UV,
1767 .max_uV = CY_TMA300_VTG_MAX_UV,
1768 .hpm_load_uA = CY_TMA300_CURR_24HZ_UA,
1769 .lpm_load_uA = CY_TMA300_SLEEP_CURR_UA,
1770 },
1771 /* TODO: Remove after runtime PM is enabled in I2C driver */
1772 {
1773 .name = "vcc_i2c",
1774 .min_uV = CY_I2C_VTG_MIN_UV,
1775 .max_uV = CY_I2C_VTG_MAX_UV,
1776 .hpm_load_uA = CY_I2C_CURR_UA,
1777 .lpm_load_uA = CY_I2C_SLEEP_CURR_UA,
1778 },
1779};
1780
1781static struct cyttsp_platform_data cyttsp_pdata = {
1782 .panel_maxx = 634,
1783 .panel_maxy = 1166,
1784 .disp_maxx = 616,
1785 .disp_maxy = 1023,
1786 .disp_minx = 0,
1787 .disp_miny = 16,
1788 .flags = 0x01,
1789 .gen = CY_GEN3, /* or */
1790 .use_st = CY_USE_ST,
1791 .use_mt = CY_USE_MT,
1792 .use_hndshk = CY_SEND_HNDSHK,
1793 .use_trk_id = CY_USE_TRACKING_ID,
1794 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
1795 .use_gestures = CY_USE_GESTURES,
1796 .fw_fname = "cyttsp_8960_cdp.hex",
1797 /* activate up to 4 groups
1798 * and set active distance
1799 */
1800 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
1801 CY_GEST_GRP3 | CY_GEST_GRP4 |
1802 CY_ACT_DIST,
1803 /* change act_intrvl to customize the Active power state
1804 * scanning/processing refresh interval for Operating mode
1805 */
1806 .act_intrvl = CY_ACT_INTRVL_DFLT,
1807 /* change tch_tmout to customize the touch timeout for the
1808 * Active power state for Operating mode
1809 */
1810 .tch_tmout = CY_TCH_TMOUT_DFLT,
1811 /* change lp_intrvl to customize the Low Power power state
1812 * scanning/processing refresh interval for Operating mode
1813 */
1814 .lp_intrvl = CY_LP_INTRVL_DFLT,
1815 .sleep_gpio = CYTTSP_TS_SLEEP_GPIO,
1816 .resout_gpio = CYTTSP_TS_RESOUT_N_GPIO,
1817 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
1818 .regulator_info = regulator_data,
1819 .num_regulators = ARRAY_SIZE(regulator_data),
1820 .init = cyttsp_platform_init,
1821 .correct_fw_ver = 9,
1822};
1823
1824static struct i2c_board_info cyttsp_info[] __initdata = {
1825 {
1826 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
1827 .platform_data = &cyttsp_pdata,
1828#ifndef CY_USE_TIMER
1829 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
1830#endif /* CY_USE_TIMER */
1831 },
1832};
1833
1834/* configuration data */
1835static const u8 mxt_config_data[] = {
1836 /* T6 Object */
1837 0, 0, 0, 0, 0, 0,
1838 /* T38 Object */
1839 11, 2, 0, 11, 11, 11, 0, 0, 0, 0,
1840 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1841 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1842 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1843 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1844 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1845 0, 0, 0, 0,
1846 /* T7 Object */
1847 100, 16, 50,
1848 /* T8 Object */
1849 8, 0, 0, 0, 0, 0, 8, 14, 50, 215,
1850 /* T9 Object */
1851 131, 0, 0, 26, 42, 0, 32, 63, 3, 5,
1852 0, 2, 1, 113, 10, 10, 8, 10, 255, 2,
1853 85, 5, 0, 0, 20, 20, 75, 25, 202, 29,
1854 10, 10, 45, 46,
1855 /* T15 Object */
1856 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1857 0,
1858 /* T22 Object */
1859 5, 0, 0, 0, 0, 0, 0, 0, 30, 0,
1860 0, 0, 5, 8, 10, 13, 0,
1861 /* T24 Object */
1862 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1863 0, 0, 0, 0, 0, 0, 0, 0, 0,
1864 /* T25 Object */
1865 3, 0, 188, 52, 52, 33, 0, 0, 0, 0,
1866 0, 0, 0, 0,
1867 /* T27 Object */
1868 0, 0, 0, 0, 0, 0, 0,
1869 /* T28 Object */
1870 0, 0, 0, 8, 12, 60,
1871 /* T40 Object */
1872 0, 0, 0, 0, 0,
1873 /* T41 Object */
1874 0, 0, 0, 0, 0, 0,
1875 /* T43 Object */
1876 0, 0, 0, 0, 0, 0,
1877};
1878
1879#define MXT_TS_GPIO_IRQ 11
1880#define MXT_TS_LDO_EN_GPIO 50
1881#define MXT_TS_RESET_GPIO 52
1882
1883static struct mxt_platform_data mxt_platform_data = {
1884 .config = mxt_config_data,
1885 .config_length = ARRAY_SIZE(mxt_config_data),
1886 .x_size = 1365,
1887 .y_size = 767,
1888 .irqflags = IRQF_TRIGGER_FALLING,
1889 .i2c_pull_up = true,
1890};
1891
1892static struct i2c_board_info mxt_device_info[] __initdata = {
1893 {
1894 I2C_BOARD_INFO("atmel_mxt_ts", 0x5b),
1895 .platform_data = &mxt_platform_data,
1896 .irq = MSM_GPIO_TO_INT(MXT_TS_GPIO_IRQ),
1897 },
1898};
1899
1900static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
1901{
1902}
1903
1904static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi4_pdata = {
1905 .clk_freq = 100000,
1906 .src_clk_rate = 24000000,
1907 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1908};
1909
1910static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi3_pdata = {
1911 .clk_freq = 100000,
1912 .src_clk_rate = 24000000,
1913 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1914};
1915
1916static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi10_pdata = {
1917 .clk_freq = 100000,
1918 .src_clk_rate = 24000000,
1919 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1920};
1921
1922static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi12_pdata = {
1923 .clk_freq = 100000,
1924 .src_clk_rate = 24000000,
1925 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1926};
1927
1928static struct msm_rpm_platform_data msm_rpm_data = {
1929 .reg_base_addrs = {
1930 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
1931 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
1932 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
1933 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
1934 },
1935
1936 .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ,
1937 .irq_err = RPM_APCC_CPU0_GP_LOW_IRQ,
1938 .irq_vmpm = RPM_APCC_CPU0_GP_MEDIUM_IRQ,
1939 .msm_apps_ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008,
1940 .msm_apps_ipc_rpm_val = 4,
1941};
1942
1943static struct ks8851_pdata spi_eth_pdata = {
1944 .irq_gpio = KS8851_IRQ_GPIO,
1945 .rst_gpio = KS8851_RST_GPIO,
1946};
1947
1948static struct spi_board_info spi_board_info[] __initdata = {
1949 {
1950 .modalias = "ks8851",
1951 .irq = MSM_GPIO_TO_INT(KS8851_IRQ_GPIO),
1952 .max_speed_hz = 19200000,
1953 .bus_num = 0,
1954 .chip_select = 0,
1955 .mode = SPI_MODE_0,
1956 .platform_data = &spi_eth_pdata
1957 },
1958 {
1959 .modalias = "dsi_novatek_3d_panel_spi",
1960 .max_speed_hz = 10800000,
1961 .bus_num = 0,
1962 .chip_select = 1,
1963 .mode = SPI_MODE_0,
1964 },
1965};
1966
1967static struct platform_device msm_device_saw_core0 = {
1968 .name = "saw-regulator",
1969 .id = 0,
1970 .dev = {
1971 .platform_data = &msm_saw_regulator_pdata_s5,
1972 },
1973};
1974
1975static struct platform_device msm_device_saw_core1 = {
1976 .name = "saw-regulator",
1977 .id = 1,
1978 .dev = {
1979 .platform_data = &msm_saw_regulator_pdata_s6,
1980 },
1981};
1982
1983static struct tsens_platform_data msm_tsens_pdata = {
1984 .slope = 910,
1985 .tsens_factor = 1000,
1986 .hw_type = MSM_8960,
1987 .tsens_num_sensor = 5,
1988};
1989
1990static struct platform_device msm_tsens_device = {
1991 .name = "tsens8960-tm",
1992 .id = -1,
1993 .dev = {
1994 .platform_data = &msm_tsens_pdata,
1995 },
1996};
1997
1998#ifdef CONFIG_MSM_FAKE_BATTERY
1999static struct platform_device fish_battery_device = {
2000 .name = "fish_battery",
2001};
2002#endif
2003
2004static struct platform_device msm8960_device_ext_5v_vreg __devinitdata = {
2005 .name = GPIO_REGULATOR_DEV_NAME,
2006 .id = PM8921_MPP_PM_TO_SYS(7),
2007 .dev = {
2008 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
2009 },
2010};
2011
2012static struct platform_device msm8960_device_ext_l2_vreg __devinitdata = {
2013 .name = GPIO_REGULATOR_DEV_NAME,
2014 .id = 91,
2015 .dev = {
2016 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_L2],
2017 },
2018};
2019
2020static struct platform_device msm8960_device_rpm_regulator __devinitdata = {
2021 .name = "rpm-regulator",
2022 .id = -1,
2023 .dev = {
2024 .platform_data = &msm_rpm_regulator_pdata,
2025 },
2026};
2027
2028static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
2029 .phys_addr_base = 0x0010C000,
2030 .reg_offsets = {
2031 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000080,
2032 [MSM_RPM_LOG_PAGE_BUFFER] = 0x000000A0,
2033 },
2034 .phys_size = SZ_8K,
2035 .log_len = 4096, /* log's buffer length in bytes */
2036 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
2037};
2038
2039static struct platform_device msm_rpm_log_device = {
2040 .name = "msm_rpm_log",
2041 .id = -1,
2042 .dev = {
2043 .platform_data = &msm_rpm_log_pdata,
2044 },
2045};
2046
2047static struct platform_device *common_devices[] __initdata = {
2048 &msm8960_device_dmov,
2049 &msm_device_smd,
2050 &msm8960_device_uart_gsbi5,
2051 &msm_device_uart_dm6,
2052 &msm_device_saw_core0,
2053 &msm_device_saw_core1,
2054 &msm8960_device_ext_5v_vreg,
2055 &msm8960_device_ext_l2_vreg,
2056 &msm8960_device_ssbi_pm8921,
2057 &msm8960_device_qup_spi_gsbi1,
2058 &msm8960_device_qup_i2c_gsbi3,
2059 &msm8960_device_qup_i2c_gsbi4,
2060 &msm8960_device_qup_i2c_gsbi10,
2061#ifndef CONFIG_MSM_DSPS
2062 &msm8960_device_qup_i2c_gsbi12,
2063#endif
2064 &msm_slim_ctrl,
2065 &msm_device_wcnss_wlan,
2066#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
2067 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
2068 &qcrypto_device,
2069#endif
2070
2071#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
2072 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
2073 &qcedev_device,
2074#endif
2075#ifdef CONFIG_MSM_ROTATOR
2076 &msm_rotator_device,
2077#endif
2078 &msm_device_sps,
2079#ifdef CONFIG_MSM_FAKE_BATTERY
2080 &fish_battery_device,
2081#endif
2082#ifdef CONFIG_ANDROID_PMEM
2083#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
2084 &android_pmem_device,
2085 &android_pmem_adsp_device,
2086#endif
2087 &android_pmem_audio_device,
2088#endif
2089 &msm_device_vidc,
2090 &msm_device_bam_dmux,
2091 &msm_fm_platform_init,
2092
2093#ifdef CONFIG_HW_RANDOM_MSM
2094 &msm_device_rng,
2095#endif
2096 &msm_rpm_device,
2097#ifdef CONFIG_ION_MSM
2098 &ion_dev,
2099#endif
2100 &msm_rpm_log_device,
2101 &msm_rpm_stat_device,
2102 &msm_device_tz_log,
2103
2104#ifdef CONFIG_MSM_QDSS
2105 &msm_etb_device,
2106 &msm_tpiu_device,
2107 &msm_funnel_device,
2108 &msm_debug_device,
2109 &msm_ptm_device,
2110#endif
2111 &msm_device_dspcrashd_8960,
2112 &msm8960_device_watchdog,
2113};
2114
2115static struct platform_device *cdp_devices[] __initdata = {
2116 &msm8960_device_otg,
2117 &msm8960_device_gadget_peripheral,
2118 &msm_device_hsusb_host,
2119 &android_usb_device,
2120 &msm_pcm,
2121 &msm_pcm_routing,
2122 &msm_cpudai0,
2123 &msm_cpudai1,
2124 &msm_cpudai_hdmi_rx,
2125 &msm_cpudai_bt_rx,
2126 &msm_cpudai_bt_tx,
2127 &msm_cpudai_fm_rx,
2128 &msm_cpudai_fm_tx,
2129 &msm_cpudai_auxpcm_rx,
2130 &msm_cpudai_auxpcm_tx,
2131 &msm_cpu_fe,
2132 &msm_stub_codec,
2133 &msm_kgsl_3d0,
2134#ifdef CONFIG_MSM_KGSL_2D
2135 &msm_kgsl_2d0,
2136 &msm_kgsl_2d1,
2137#endif
2138#ifdef CONFIG_MSM_GEMINI
2139 &msm8960_gemini_device,
2140#endif
2141 &msm_voice,
2142 &msm_voip,
2143 &msm_lpa_pcm,
2144 &msm_cpudai_afe_01_rx,
2145 &msm_cpudai_afe_01_tx,
2146 &msm_cpudai_afe_02_rx,
2147 &msm_cpudai_afe_02_tx,
2148 &msm_pcm_afe,
2149 &msm_pcm_hostless,
2150 &msm_bus_apps_fabric,
2151 &msm_bus_sys_fabric,
2152 &msm_bus_mm_fabric,
2153 &msm_bus_sys_fpb,
2154 &msm_bus_cpss_fpb,
2155 &msm_tsens_device,
2156};
2157
2158static void __init msm8930_i2c_init(void)
2159{
2160 msm8960_device_qup_i2c_gsbi4.dev.platform_data =
2161 &msm8960_i2c_qup_gsbi4_pdata;
2162
2163 msm8960_device_qup_i2c_gsbi3.dev.platform_data =
2164 &msm8960_i2c_qup_gsbi3_pdata;
2165
2166 msm8960_device_qup_i2c_gsbi10.dev.platform_data =
2167 &msm8960_i2c_qup_gsbi10_pdata;
2168
2169 msm8960_device_qup_i2c_gsbi12.dev.platform_data =
2170 &msm8960_i2c_qup_gsbi12_pdata;
2171}
2172
2173static void __init msm8930_gfx_init(void)
2174{
2175 uint32_t soc_platform_version = socinfo_get_version();
2176 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1) {
2177 struct kgsl_device_platform_data *kgsl_3d0_pdata =
2178 msm_kgsl_3d0.dev.platform_data;
2179 kgsl_3d0_pdata->pwrlevel[0].gpu_freq = 320000000;
2180 kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 266667000;
2181 }
2182}
2183
2184static struct msm_cpuidle_state msm_cstates[] __initdata = {
2185 {0, 0, "C0", "WFI",
2186 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
2187
2188 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
2189 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
2190
2191 {0, 2, "C2", "POWER_COLLAPSE",
2192 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
2193
2194 {1, 0, "C0", "WFI",
2195 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
2196
2197 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
2198 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
2199};
2200
2201static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
2202 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
2203 .idle_supported = 1,
2204 .suspend_supported = 1,
2205 .idle_enabled = 0,
2206 .suspend_enabled = 0,
2207 },
2208
2209 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
2210 .idle_supported = 1,
2211 .suspend_supported = 1,
2212 .idle_enabled = 0,
2213 .suspend_enabled = 0,
2214 },
2215
2216 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
2217 .idle_supported = 1,
2218 .suspend_supported = 1,
2219 .idle_enabled = 1,
2220 .suspend_enabled = 1,
2221 },
2222
2223 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
2224 .idle_supported = 0,
2225 .suspend_supported = 1,
2226 .idle_enabled = 0,
2227 .suspend_enabled = 0,
2228 },
2229
2230 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
2231 .idle_supported = 1,
2232 .suspend_supported = 1,
2233 .idle_enabled = 0,
2234 .suspend_enabled = 0,
2235 },
2236
2237 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
2238 .idle_supported = 1,
2239 .suspend_supported = 0,
2240 .idle_enabled = 1,
2241 .suspend_enabled = 0,
2242 },
2243};
2244
2245static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
2246 {
2247 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
2248 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
2249 true,
2250 100, 8000, 100000, 1,
2251 },
2252
2253 {
2254 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
2255 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
2256 true,
2257 2000, 6000, 60100000, 3000,
2258 },
2259
2260 {
2261 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
2262 MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
2263 false,
2264 4200, 5000, 60350000, 3500,
2265 },
2266
2267 {
2268 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
2269 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
2270 false,
2271 6300, 4500, 65350000, 4800,
2272 },
2273 {
2274 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
2275 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, ACTIVE, RET_HIGH),
2276 false,
2277 7000, 3500, 66600000, 5150,
2278 },
2279
2280 {
2281 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
2282 MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
2283 false,
2284 11700, 2500, 67850000, 5500,
2285 },
2286
2287 {
2288 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
2289 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
2290 false,
2291 13800, 2000, 71850000, 6800,
2292 },
2293
2294 {
2295 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
2296 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
2297 false,
2298 29700, 500, 75850000, 8800,
2299 },
2300
2301 {
2302 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
2303 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
2304 false,
2305 29700, 0, 76350000, 9800,
2306 },
2307};
2308
2309#ifdef CONFIG_I2C
2310#define I2C_SURF 1
2311#define I2C_FFA (1 << 1)
2312#define I2C_RUMI (1 << 2)
2313#define I2C_SIM (1 << 3)
2314#define I2C_FLUID (1 << 4)
2315#define I2C_LIQUID (1 << 5)
2316
2317struct i2c_registry {
2318 u8 machs;
2319 int bus;
2320 struct i2c_board_info *info;
2321 int len;
2322};
2323
2324#ifdef CONFIG_MSM_CAMERA
2325static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2326#ifdef CONFIG_IMX074
2327 {
2328 I2C_BOARD_INFO("imx074", 0x1A),
2329 },
2330#endif
2331#ifdef CONFIG_OV2720
2332 {
2333 I2C_BOARD_INFO("ov2720", 0x6C),
2334 },
2335#endif
2336#ifdef CONFIG_MSM_CAMERA_FLASH_SC628A
2337 {
2338 I2C_BOARD_INFO("sc628a", 0x6E),
2339 },
2340#endif
2341};
2342#endif
2343
2344/* Sensors DSPS platform data */
2345#ifdef CONFIG_MSM_DSPS
2346#define DSPS_PIL_GENERIC_NAME "dsps"
2347#endif /* CONFIG_MSM_DSPS */
2348
2349static void __init msm8930_init_dsps(void)
2350{
2351#ifdef CONFIG_MSM_DSPS
2352 struct msm_dsps_platform_data *pdata =
2353 msm_dsps_device.dev.platform_data;
2354 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2355 pdata->gpios = NULL;
2356 pdata->gpios_num = 0;
2357
2358 platform_device_register(&msm_dsps_device);
2359#endif /* CONFIG_MSM_DSPS */
2360}
2361
2362static void __init msm8930_init_hsic(void)
2363{
2364#ifdef CONFIG_USB_EHCI_MSM_HSIC
2365 uint32_t version = socinfo_get_version();
2366
2367 pr_info("%s: version:%d mtp:%d\n", __func__,
2368 SOCINFO_VERSION_MAJOR(version),
2369 machine_is_msm8930_mtp());
2370
2371 if ((SOCINFO_VERSION_MAJOR(version) == 1) ||
2372 machine_is_msm8930_mtp() ||
2373 machine_is_msm8930_fluid())
2374 return;
2375
2376 msm_gpiomux_install(msm8960_hsic_configs,
2377 ARRAY_SIZE(msm8960_hsic_configs));
2378
2379 platform_device_register(&msm_device_hsic_host);
2380#endif
2381}
2382
2383
2384#ifdef CONFIG_ISL9519_CHARGER
2385static struct isl_platform_data isl_data __initdata = {
2386 .valid_n_gpio = 0, /* Not required when notify-by-pmic */
2387 .chg_detection_config = NULL, /* Not required when notify-by-pmic */
2388 .max_system_voltage = 4200,
2389 .min_system_voltage = 3200,
2390 .chgcurrent = 1000, /* 1900, */
2391 .term_current = 400, /* Need fine tuning */
2392 .input_current = 2048,
2393};
2394
2395static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
2396 {
2397 I2C_BOARD_INFO("isl9519q", 0x9),
2398 .irq = 0, /* Not required when notify-by-pmic */
2399 .platform_data = &isl_data,
2400 },
2401};
2402#endif /* CONFIG_ISL9519_CHARGER */
2403
2404static struct i2c_registry msm8960_i2c_devices[] __initdata = {
2405#ifdef CONFIG_MSM_CAMERA
2406 {
2407 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_LIQUID | I2C_RUMI,
2408 MSM_8930_GSBI4_QUP_I2C_BUS_ID,
2409 msm_camera_boardinfo,
2410 ARRAY_SIZE(msm_camera_boardinfo),
2411 },
2412#endif
2413#ifdef CONFIG_ISL9519_CHARGER
2414 {
2415 I2C_LIQUID,
2416 MSM_8930_GSBI10_QUP_I2C_BUS_ID,
2417 isl_charger_i2c_info,
2418 ARRAY_SIZE(isl_charger_i2c_info),
2419 },
2420#endif /* CONFIG_ISL9519_CHARGER */
2421 {
2422 I2C_SURF | I2C_FFA | I2C_FLUID,
2423 MSM_8930_GSBI3_QUP_I2C_BUS_ID,
2424 cyttsp_info,
2425 ARRAY_SIZE(cyttsp_info),
2426 },
2427 {
2428 I2C_LIQUID,
2429 MSM_8930_GSBI3_QUP_I2C_BUS_ID,
2430 mxt_device_info,
2431 ARRAY_SIZE(mxt_device_info),
2432 },
2433 {
2434 I2C_LIQUID,
2435 MSM_8930_GSBI10_QUP_I2C_BUS_ID,
2436 msm_isa1200_board_info,
2437 ARRAY_SIZE(msm_isa1200_board_info),
2438 },
2439};
2440#endif /* CONFIG_I2C */
2441
2442static void __init register_i2c_devices(void)
2443{
2444#ifdef CONFIG_I2C
2445 u8 mach_mask = 0;
2446 int i;
2447
2448 /* Build the matching 'supported_machs' bitmask */
2449 if (machine_is_msm8930_cdp())
2450 mach_mask = I2C_SURF;
2451 else if (machine_is_msm8930_fluid())
2452 mach_mask = I2C_FLUID;
2453 else if (machine_is_msm8930_mtp())
2454 mach_mask = I2C_FFA;
2455 else
2456 pr_err("unmatched machine ID in register_i2c_devices\n");
2457
2458 /* Run the array and install devices as appropriate */
2459 for (i = 0; i < ARRAY_SIZE(msm8960_i2c_devices); ++i) {
2460 if (msm8960_i2c_devices[i].machs & mach_mask)
2461 i2c_register_board_info(msm8960_i2c_devices[i].bus,
2462 msm8960_i2c_devices[i].info,
2463 msm8960_i2c_devices[i].len);
2464 }
2465#endif
2466}
2467
2468static void __init msm8930_cdp_init(void)
2469{
2470 if (meminfo_init(SYS_MEMORY, SZ_256M) < 0)
2471 pr_err("meminfo_init() failed!\n");
2472
2473 BUG_ON(msm_rpm_init(&msm_rpm_data));
2474 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
2475 ARRAY_SIZE(msm_rpmrs_levels)));
2476
2477 regulator_suppress_info_printing();
2478 if (msm_xo_init())
2479 pr_err("Failed to initialize XO votes\n");
2480 platform_device_register(&msm8960_device_rpm_regulator);
2481 msm_clock_init(&msm8960_clock_init_data);
2482 msm8960_device_otg.dev.platform_data = &msm_otg_pdata;
2483 msm_device_hsic_host.dev.platform_data = &msm_hsic_pdata;
2484 gpiomux_init();
2485 msm8960_device_qup_spi_gsbi1.dev.platform_data =
2486 &msm8960_qup_spi_gsbi1_pdata;
2487 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
2488
2489 msm8930_init_pmic();
2490 msm8930_i2c_init();
2491 msm8930_gfx_init();
2492 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
2493 msm_spm_l2_init(msm_spm_l2_data);
2494 msm8930_init_buses();
2495 platform_add_devices(msm_footswitch_devices,
2496 msm_num_footswitch_devices);
2497 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
2498 msm8930_pm8921_gpio_mpp_init();
2499 platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
2500 msm8930_init_hsic();
2501 msm8930_init_cam();
2502 msm8930_init_mmc();
2503 acpuclk_init(&acpuclk_8960_soc_data);
2504 register_i2c_devices();
2505 msm8930_init_fb();
2506 slim_register_board_info(msm_slim_devices,
2507 ARRAY_SIZE(msm_slim_devices));
2508 msm8930_init_dsps();
2509 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
2510 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
2511 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
2512 msm_pm_data);
2513 change_memory_power = &msm8930_change_memory_power;
2514 BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
2515
2516 if (PLATFORM_IS_CHARM25())
2517 platform_add_devices(mdm_devices, ARRAY_SIZE(mdm_devices));
2518}
2519
2520MACHINE_START(MSM8930_CDP, "QCT MSM8930 CDP")
2521 .map_io = msm8930_map_io,
2522 .reserve = msm8930_reserve,
2523 .init_irq = msm8930_init_irq,
2524 .timer = &msm_timer,
2525 .init_machine = msm8930_cdp_init,
2526 .init_early = msm8930_allocate_memory_regions,
2527 .init_very_early = msm8930_early_memory,
2528MACHINE_END
2529
2530MACHINE_START(MSM8930_MTP, "QCT MSM8930 MTP")
2531 .map_io = msm8930_map_io,
2532 .reserve = msm8930_reserve,
2533 .init_irq = msm8930_init_irq,
2534 .timer = &msm_timer,
2535 .init_machine = msm8930_cdp_init,
2536 .init_early = msm8930_allocate_memory_regions,
2537 .init_very_early = msm8930_early_memory,
2538MACHINE_END
2539
2540MACHINE_START(MSM8930_FLUID, "QCT MSM8930 FLUID")
2541 .map_io = msm8930_map_io,
2542 .reserve = msm8930_reserve,
2543 .init_irq = msm8930_init_irq,
2544 .timer = &msm_timer,
2545 .init_machine = msm8930_cdp_init,
2546 .init_early = msm8930_allocate_memory_regions,
2547 .init_very_early = msm8930_early_memory,
2548MACHINE_END