blob: ba9d15f027064fbd627cd268e21b682c91da878d [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/gpio_event.h>
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/board.h>
18#include <mach/msm_iomap.h>
19#include <mach/msm_hsusb.h>
20#include <mach/rpc_hsusb.h>
21#include <mach/rpc_pmapp.h>
22#include <mach/usbdiag.h>
23#include <mach/msm_memtypes.h>
24#include <mach/msm_serial_hs.h>
25#include <linux/usb/android.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/gpio.h>
29#include <mach/vreg.h>
30#include <mach/pmic.h>
31#include <mach/socinfo.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/mach/mmc.h>
35#include <linux/i2c.h>
36#include <linux/i2c/sx150x.h>
37#include <linux/gpio.h>
38#include <linux/android_pmem.h>
39#include <linux/bootmem.h>
40#include <linux/mfd/marimba.h>
41#include <mach/vreg.h>
42#include <linux/power_supply.h>
43#include <mach/rpc_pmapp.h>
44
45#include <mach/msm_battery.h>
46#include <linux/smsc911x.h>
47#include <linux/atmel_maxtouch.h>
48#include "devices.h"
49#include "timer.h"
50#include "devices-msm7x2xa.h"
51#include "pm.h"
52#include <mach/rpc_server_handset.h>
53#include <mach/socinfo.h>
54
55#define PMEM_KERNEL_EBI1_SIZE 0x3A000
56#define MSM_PMEM_AUDIO_SIZE 0x5B000
57#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
58#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
Rahul Kashyap181d5552011-07-07 10:39:23 +053059#define BAHAMA_SLAVE_ID_FM_REG 0x02
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#define FM_GPIO 83
61
62enum {
63 GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
64 GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
65 /* SURF expander */
66 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
67 GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
68 GPIO_WLAN_EXT_POR_N,
69 GPIO_DISPLAY_PWR_EN,
70 GPIO_BACKLIGHT_EN,
71 GPIO_PRESSURE_XCLR,
72 GPIO_VREG_S3_EXP,
73 GPIO_UBM2M_PWRDWN,
74 GPIO_ETM_MODE_CS_N,
75 GPIO_HOST_VBUS_EN,
76 GPIO_SPI_MOSI,
77 GPIO_SPI_MISO,
78 GPIO_SPI_CLK,
79 GPIO_SPI_CS0_N,
80 GPIO_CORE_EXPANDER_IO13,
81 GPIO_CORE_EXPANDER_IO14,
82 GPIO_CORE_EXPANDER_IO15,
83 /* Camera expander */
84 GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
85 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
86 GPIO_CAM_GP_AFBUSY,
87 GPIO_CAM_GP_CAM_PWDN,
88 GPIO_CAM_GP_CAM1MP_XCLR,
89 GPIO_CAM_GP_CAMIF_RESET_N,
90 GPIO_CAM_GP_STROBE_CE,
91 GPIO_CAM_GP_LED_EN1,
92 GPIO_CAM_GP_LED_EN2,
93};
94
95#if defined(CONFIG_GPIO_SX150X)
96enum {
97 SX150X_CORE,
98 SX150X_CAM,
99};
100
101static struct sx150x_platform_data sx150x_data[] __initdata = {
102 [SX150X_CORE] = {
103 .gpio_base = GPIO_CORE_EXPANDER_BASE,
104 .oscio_is_gpo = false,
105 .io_pullup_ena = 0,
106 .io_pulldn_ena = 0,
107 .io_open_drain_ena = 0xfef8,
108 .irq_summary = -1,
109 },
110 [SX150X_CAM] = {
111 .gpio_base = GPIO_CAM_EXPANDER_BASE,
112 .oscio_is_gpo = false,
113 .io_pullup_ena = 0,
114 .io_pulldn_ena = 0,
115 .io_open_drain_ena = 0x23,
116 .irq_summary = -1,
117 },
118};
119#endif
120
121#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
122
123 /* FM Platform power and shutdown routines */
124#define FPGA_MSM_CNTRL_REG2 0x90008010
Rahul Kashyap6e669462011-07-23 16:42:56 +0530125
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700126static void config_pcm_i2s_mode(int mode)
127{
128 void __iomem *cfg_ptr;
129 u8 reg2;
130
131 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
132
133 if (!cfg_ptr)
134 return;
135 if (mode) {
136 /*enable the pcm mode in FPGA*/
137 reg2 = readb_relaxed(cfg_ptr);
138 if (reg2 == 0) {
139 reg2 = 1;
140 writeb_relaxed(reg2, cfg_ptr);
141 }
142 } else {
143 /*enable i2s mode in FPGA*/
144 reg2 = readb_relaxed(cfg_ptr);
145 if (reg2 == 1) {
146 reg2 = 0;
147 writeb_relaxed(reg2, cfg_ptr);
148 }
149 }
150 iounmap(cfg_ptr);
151}
152
153static unsigned fm_i2s_config_power_on[] = {
154 /*FM_I2S_SD*/
155 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
156 /*FM_I2S_WS*/
157 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
158 /*FM_I2S_SCK*/
159 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
160};
161
162static unsigned fm_i2s_config_power_off[] = {
163 /*FM_I2S_SD*/
164 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
165 /*FM_I2S_WS*/
166 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
167 /*FM_I2S_SCK*/
168 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
169};
170
171static unsigned bt_config_power_on[] = {
172 /*RFR*/
173 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
174 /*CTS*/
175 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
176 /*RX*/
177 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
178 /*TX*/
179 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
180};
181static unsigned bt_config_pcm_on[] = {
182 /*PCM_DOUT*/
183 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
184 /*PCM_DIN*/
185 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
186 /*PCM_SYNC*/
187 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
188 /*PCM_CLK*/
189 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
190};
191static unsigned bt_config_power_off[] = {
192 /*RFR*/
193 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
194 /*CTS*/
195 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
196 /*RX*/
197 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
198 /*TX*/
199 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
200};
201static unsigned bt_config_pcm_off[] = {
202 /*PCM_DOUT*/
203 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
204 /*PCM_DIN*/
205 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
206 /*PCM_SYNC*/
207 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
208 /*PCM_CLK*/
209 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
210};
211
212static int config_i2s(int mode)
213{
214 int pin, rc = 0;
215
216 if (mode == FM_I2S_ON) {
217 if (machine_is_msm7x27a_surf())
218 config_pcm_i2s_mode(0);
219 pr_err("%s mode = FM_I2S_ON", __func__);
220 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
221 pin++) {
222 rc = gpio_tlmm_config(
223 fm_i2s_config_power_on[pin],
224 GPIO_CFG_ENABLE
225 );
226 if (rc < 0)
227 return rc;
228 }
229 } else if (mode == FM_I2S_OFF) {
230 pr_err("%s mode = FM_I2S_OFF", __func__);
231 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
232 pin++) {
233 rc = gpio_tlmm_config(
234 fm_i2s_config_power_off[pin],
235 GPIO_CFG_ENABLE
236 );
237 if (rc < 0)
238 return rc;
239 }
240 }
241 return rc;
242}
243static int config_pcm(int mode)
244{
245 int pin, rc = 0;
246
247 if (mode == BT_PCM_ON) {
248 if (machine_is_msm7x27a_surf())
249 config_pcm_i2s_mode(1);
250 pr_err("%s mode =BT_PCM_ON", __func__);
251 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
252 pin++) {
253 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
254 GPIO_CFG_ENABLE);
255 if (rc < 0)
256 return rc;
257 }
258 } else if (mode == BT_PCM_OFF) {
259 pr_err("%s mode =BT_PCM_OFF", __func__);
260 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
261 pin++) {
262 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
263 GPIO_CFG_ENABLE);
264 if (rc < 0)
265 return rc;
266 }
267
268 }
269
270 return rc;
271}
272
273static int msm_bahama_setup_pcm_i2s(int mode)
274{
275 int fm_state = 0, bt_state = 0;
276 int rc = 0;
277 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
278
279 fm_state = marimba_get_fm_status(&config);
280 bt_state = marimba_get_bt_status(&config);
281
282 switch (mode) {
283 case BT_PCM_ON:
284 case BT_PCM_OFF:
285 if (!fm_state)
286 rc = config_pcm(mode);
287 break;
288 case FM_I2S_ON:
289 rc = config_i2s(mode);
290 break;
291 case FM_I2S_OFF:
292 if (bt_state)
293 rc = config_pcm(BT_PCM_ON);
294 else
295 rc = config_i2s(mode);
296 break;
297 default:
298 rc = -EIO;
299 pr_err("%s:Unsupported mode", __func__);
300 }
301 return rc;
302}
303
Rahul Kashyap181d5552011-07-07 10:39:23 +0530304static int bt_set_gpio(int on)
305{
306 int rc = 0;
307 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
308
309 if (on) {
310 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
311 msleep(100);
312 } else {
313 if (!marimba_get_fm_status(&config) &&
314 !marimba_get_bt_status(&config)) {
315 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
316 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
317 msleep(100);
318 }
319 }
320 if (rc)
321 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
322
323 return rc;
324}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700325static struct vreg *fm_regulator;
326static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
327{
328 int rc = 0;
329 const char *id = "FMPW";
330 uint32_t irqcfg;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530331 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
332 u8 value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700333
334 /* Voting for 1.8V Regulator */
335 fm_regulator = vreg_get(NULL , "msme1");
336 if (IS_ERR(fm_regulator)) {
337 pr_err("%s: vreg get failed with : (%ld)\n",
338 __func__, PTR_ERR(fm_regulator));
339 return -EINVAL;
340 }
341
342 /* Set the voltage level to 1.8V */
343 rc = vreg_set_level(fm_regulator, 1800);
344 if (rc < 0) {
345 pr_err("%s: set regulator level failed with :(%d)\n",
346 __func__, rc);
347 goto fm_vreg_fail;
348 }
349
350 /* Enabling the 1.8V regulator */
351 rc = vreg_enable(fm_regulator);
352 if (rc) {
353 pr_err("%s: enable regulator failed with :(%d)\n",
354 __func__, rc);
355 goto fm_vreg_fail;
356 }
357
358 /* Voting for 19.2MHz clock */
359 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
360 PMAPP_CLOCK_VOTE_ON);
361 if (rc < 0) {
362 pr_err("%s: clock vote failed with :(%d)\n",
363 __func__, rc);
364 goto fm_clock_vote_fail;
365 }
366
Rahul Kashyap181d5552011-07-07 10:39:23 +0530367 rc = bt_set_gpio(1);
368 if (rc) {
369 pr_err("%s: bt_set_gpio = %d", __func__, rc);
370 goto fm_gpio_config_fail;
371 }
372 /*re-write FM Slave Id, after reset*/
373 value = BAHAMA_SLAVE_ID_FM_ADDR;
374 rc = marimba_write_bit_mask(&config,
375 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
376 if (rc < 0) {
377 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
378 goto fm_gpio_config_fail;
379 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700380 /* Configuring the FM GPIO */
381 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
382 GPIO_CFG_2MA);
383
384 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
385 if (rc) {
386 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
387 __func__, irqcfg, rc);
388 goto fm_gpio_config_fail;
389 }
390
391 return 0;
392
393fm_gpio_config_fail:
394 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
395 PMAPP_CLOCK_VOTE_OFF);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530396 bt_set_gpio(0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700397fm_clock_vote_fail:
398 vreg_disable(fm_regulator);
399
400fm_vreg_fail:
401 vreg_put(fm_regulator);
402
403 return rc;
404};
405
406static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
407{
408 int rc;
409 const char *id = "FMPW";
410
411 /* Releasing the GPIO line used by FM */
412 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
413 GPIO_CFG_2MA);
414
415 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
416 if (rc)
417 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
418 __func__, irqcfg, rc);
419
420 /* Releasing the 1.8V Regulator */
421 if (fm_regulator != NULL) {
422 rc = vreg_disable(fm_regulator);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700423 if (rc)
424 pr_err("%s: disable regulator failed:(%d)\n",
425 __func__, rc);
426 fm_regulator = NULL;
427 }
428
429 /* Voting off the clock */
430 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
431 PMAPP_CLOCK_VOTE_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700432 if (rc < 0)
433 pr_err("%s: voting off failed with :(%d)\n",
434 __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530435 rc = bt_set_gpio(0);
436 if (rc)
437 pr_err("%s: bt_set_gpio = %d", __func__, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700438}
439
440static struct marimba_fm_platform_data marimba_fm_pdata = {
441 .fm_setup = fm_radio_setup,
442 .fm_shutdown = fm_radio_shutdown,
443 .irq = MSM_GPIO_TO_INT(FM_GPIO),
444 .vreg_s2 = NULL,
445 .vreg_xo_out = NULL,
446 /* Configuring the FM SoC as I2S Master */
447 .is_fm_soc_i2s_master = true,
448 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
449};
450
Santosh Sajjan6822c682011-07-26 10:49:36 +0530451static struct platform_device msm_wlan_ar6000_pm_device = {
452 .name = "wlan_ar6000_pm_dev",
453 .id = -1,
454};
455
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700456static struct platform_device msm_bt_power_device = {
457 .name = "bt_power",
458};
Rahul Kashyap6e669462011-07-23 16:42:56 +0530459struct bahama_config_register {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700460 u8 reg;
461 u8 value;
462 u8 mask;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700463};
Rahul Kashyap6e669462011-07-23 16:42:56 +0530464struct bt_vreg_info {
465 const char *name;
466 unsigned int pmapp_id;
467 unsigned int level;
468 unsigned int is_pin_controlled;
469 struct vreg *vregs;
470};
471static struct bt_vreg_info bt_vregs[] = {
472 {"msme1", 2, 1800, 0, NULL},
473 {"bt", 21, 2900, 1, NULL}
474};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700475
476static int bahama_bt(int on)
477{
478
479 int rc = 0;
480 int i;
481
482 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
483
484 struct bahama_variant_register {
485 const size_t size;
486 const struct bahama_config_register *set;
487 };
488
489 const struct bahama_config_register *p;
490
491 u8 version;
492
493 const struct bahama_config_register v10_bt_on[] = {
494 { 0xE9, 0x00, 0xFF },
495 { 0xF4, 0x80, 0xFF },
496 { 0xE4, 0x00, 0xFF },
497 { 0xE5, 0x00, 0x0F },
498#ifdef CONFIG_WLAN
499 { 0xE6, 0x38, 0x7F },
500 { 0xE7, 0x06, 0xFF },
501#endif
502 { 0xE9, 0x21, 0xFF },
503 { 0x01, 0x0C, 0x1F },
504 { 0x01, 0x08, 0x1F },
505 };
506
507 const struct bahama_config_register v20_bt_on_fm_off[] = {
508 { 0x11, 0x0C, 0xFF },
509 { 0x13, 0x01, 0xFF },
510 { 0xF4, 0x80, 0xFF },
511 { 0xF0, 0x00, 0xFF },
512 { 0xE9, 0x00, 0xFF },
513#ifdef CONFIG_WLAN
514 { 0x81, 0x00, 0x7F },
515 { 0x82, 0x00, 0xFF },
516 { 0xE6, 0x38, 0x7F },
517 { 0xE7, 0x06, 0xFF },
518#endif
519 { 0x8E, 0x15, 0xFF },
520 { 0x8F, 0x15, 0xFF },
521 { 0x90, 0x15, 0xFF },
522
523 { 0xE9, 0x21, 0xFF },
524 };
525
526 const struct bahama_config_register v20_bt_on_fm_on[] = {
527 { 0x11, 0x0C, 0xFF },
528 { 0x13, 0x01, 0xFF },
529 { 0xF4, 0x86, 0xFF },
530 { 0xF0, 0x06, 0xFF },
531 { 0xE9, 0x00, 0xFF },
532#ifdef CONFIG_WLAN
533 { 0x81, 0x00, 0x7F },
534 { 0x82, 0x00, 0xFF },
535 { 0xE6, 0x38, 0x7F },
536 { 0xE7, 0x06, 0xFF },
537#endif
538 { 0xE9, 0x21, 0xFF },
539 };
540
541 const struct bahama_config_register v10_bt_off[] = {
542 { 0xE9, 0x00, 0xFF },
543 };
544
545 const struct bahama_config_register v20_bt_off_fm_off[] = {
546 { 0xF4, 0x84, 0xFF },
547 { 0xF0, 0x04, 0xFF },
548 { 0xE9, 0x00, 0xFF }
549 };
550
551 const struct bahama_config_register v20_bt_off_fm_on[] = {
552 { 0xF4, 0x86, 0xFF },
553 { 0xF0, 0x06, 0xFF },
554 { 0xE9, 0x00, 0xFF }
555 };
556 const struct bahama_variant_register bt_bahama[2][3] = {
557 {
558 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
559 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
560 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
561 },
562 {
563 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
564 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
565 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
566 }
567 };
568
569 u8 offset = 0; /* index into bahama configs */
570 on = on ? 1 : 0;
571 version = marimba_read_bahama_ver(&config);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530572 if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
573 dev_err(&msm_bt_power_device.dev, "%s: Bahama \
574 version read Error, version = %d \n",
575 __func__, version);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700576 return -EIO;
577 }
578
579 if (version == BAHAMA_VER_2_0) {
580 if (marimba_get_fm_status(&config))
581 offset = 0x01;
582 }
583
584 p = bt_bahama[on][version + offset].set;
585
586 dev_info(&msm_bt_power_device.dev,
587 "%s: found version %d\n", __func__, version);
588
589 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
590 u8 value = (p+i)->value;
591 rc = marimba_write_bit_mask(&config,
592 (p+i)->reg,
593 &value,
594 sizeof((p+i)->value),
595 (p+i)->mask);
596 if (rc < 0) {
597 dev_err(&msm_bt_power_device.dev,
598 "%s: reg %x write failed: %d\n",
599 __func__, (p+i)->reg, rc);
600 return rc;
601 }
Rahul Kashyap92497af2011-07-07 12:13:52 +0530602 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700603 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
604 __func__, (p+i)->reg,
605 value, (p+i)->mask);
606 value = 0;
607 rc = marimba_read_bit_mask(&config,
608 (p+i)->reg, &value,
609 sizeof((p+i)->value), (p+i)->mask);
610 if (rc < 0)
611 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
612 __func__);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530613 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700614 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
615 __func__, (p+i)->reg,
616 value, (p+i)->mask);
617 }
618 /* Update BT Status */
619 if (on)
620 marimba_set_bt_status(&config, true);
621 else
622 marimba_set_bt_status(&config, false);
623 return rc;
624}
625static int bluetooth_switch_regulators(int on)
626{
627 int i, rc = 0;
Rahul Kashyap6e669462011-07-23 16:42:56 +0530628 const char *id = "BTPW";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700629
Rahul Kashyap6e669462011-07-23 16:42:56 +0530630 for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
631 if (!bt_vregs[i].vregs) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700632 pr_err("%s: vreg_get %s failed(%d)\n",
Rahul Kashyap6e669462011-07-23 16:42:56 +0530633 __func__, bt_vregs[i].name, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700634 goto vreg_fail;
635 }
Rahul Kashyap6e669462011-07-23 16:42:56 +0530636 rc = on ? vreg_set_level(bt_vregs[i].vregs,
637 bt_vregs[i].level) : 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700638
639 if (rc < 0) {
640 pr_err("%s: vreg set level failed (%d)\n",
641 __func__, rc);
642 goto vreg_set_level_fail;
643 }
Rahul Kashyap6e669462011-07-23 16:42:56 +0530644 if (bt_vregs[i].is_pin_controlled == 1) {
645 rc = pmapp_vreg_pincntrl_vote(id,
646 bt_vregs[i].pmapp_id,
647 PMAPP_CLOCK_ID_D1,
648 on ? PMAPP_CLOCK_VOTE_ON :
649 PMAPP_CLOCK_VOTE_OFF);
650 } else {
651 rc = on ? vreg_enable(bt_vregs[i].vregs) :
652 vreg_disable(bt_vregs[i].vregs);
653 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700654
655 if (rc < 0) {
656 pr_err("%s: vreg %s %s failed(%d)\n",
Rahul Kashyap6e669462011-07-23 16:42:56 +0530657 __func__, bt_vregs[i].name,
658 on ? "enable" : "disable", rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700659 goto vreg_fail;
Rahul Kashyap6e669462011-07-23 16:42:56 +0530660 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700661 }
Rahul Kashyap6e669462011-07-23 16:42:56 +0530662
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700663 return rc;
664
665vreg_fail:
666 while (i) {
667 if (on)
Rahul Kashyap6e669462011-07-23 16:42:56 +0530668 vreg_disable(bt_vregs[--i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700669 }
670vreg_set_level_fail:
Rahul Kashyap6e669462011-07-23 16:42:56 +0530671 vreg_put(bt_vregs[0].vregs);
672 vreg_put(bt_vregs[1].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700673 return rc;
674}
675
676static unsigned int msm_bahama_setup_power(void)
677{
678 int rc = 0;
679 struct vreg *vreg_s3 = NULL;
680
681 vreg_s3 = vreg_get(NULL, "msme1");
682 if (IS_ERR(vreg_s3)) {
683 pr_err("%s: vreg get failed (%ld)\n",
684 __func__, PTR_ERR(vreg_s3));
685 return PTR_ERR(vreg_s3);
686 }
687 rc = vreg_set_level(vreg_s3, 1800);
688 if (rc < 0) {
689 pr_err("%s: vreg set level failed (%d)\n",
690 __func__, rc);
691 goto vreg_fail;
692 }
693 rc = vreg_enable(vreg_s3);
694 if (rc < 0) {
695 pr_err("%s: vreg enable failed (%d)\n",
696 __func__, rc);
697 goto vreg_fail;
698 }
699
700 /*setup Bahama_sys_reset_n*/
701 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
702 if (rc < 0) {
703 pr_err("%s: gpio_request %d = %d\n", __func__,
704 GPIO_BT_SYS_REST_EN, rc);
705 goto vreg_fail;
706 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530707 rc = bt_set_gpio(1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700708 if (rc < 0) {
Rahul Kashyap181d5552011-07-07 10:39:23 +0530709 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700710 GPIO_BT_SYS_REST_EN, rc);
711 goto gpio_fail;
712 }
713 return rc;
714
715gpio_fail:
716 gpio_free(GPIO_BT_SYS_REST_EN);
717vreg_fail:
718 vreg_put(vreg_s3);
719 return rc;
720}
721
722static unsigned int msm_bahama_shutdown_power(int value)
723{
724 int rc = 0;
725 struct vreg *vreg_s3 = NULL;
726
727 vreg_s3 = vreg_get(NULL, "msme1");
728 if (IS_ERR(vreg_s3)) {
729 pr_err("%s: vreg get failed (%ld)\n",
730 __func__, PTR_ERR(vreg_s3));
731 return PTR_ERR(vreg_s3);
732 }
733 rc = vreg_disable(vreg_s3);
734 if (rc) {
735 pr_err("%s: vreg disable failed (%d)\n",
736 __func__, rc);
737 vreg_put(vreg_s3);
738 return rc;
739 }
Rahul Kashyape8698c62011-07-20 20:43:05 +0530740 if (value == BAHAMA_ID) {
741 rc = bt_set_gpio(0);
742 if (rc) {
743 pr_err("%s: bt_set_gpio = %d\n",
744 __func__, rc);
745 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530746 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700747 return rc;
748}
749
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700750static unsigned int msm_bahama_core_config(int type)
751{
752 int rc = 0;
753
754 if (type == BAHAMA_ID) {
755 int i;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530756 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700757 const struct bahama_config_register v20_init[] = {
758 /* reg, value, mask */
759 { 0xF4, 0x84, 0xFF }, /* AREG */
760 { 0xF0, 0x04, 0xFF } /* DREG */
761 };
762 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
763 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
764 u8 value = v20_init[i].value;
765 rc = marimba_write_bit_mask(&config,
766 v20_init[i].reg,
767 &value,
768 sizeof(v20_init[i].value),
769 v20_init[i].mask);
770 if (rc < 0) {
771 pr_err("%s: reg %d write failed: %d\n",
772 __func__, v20_init[i].reg, rc);
773 return rc;
774 }
775 pr_debug("%s: reg 0x%02x value 0x%02x"
776 " mask 0x%02x\n",
777 __func__, v20_init[i].reg,
778 v20_init[i].value, v20_init[i].mask);
779 }
780 }
781 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530782 rc = bt_set_gpio(0);
783 if (rc) {
784 pr_err("%s: bt_set_gpio = %d\n",
785 __func__, rc);
786 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700787 pr_debug("core type: %d\n", type);
788 return rc;
789}
790
791static int bluetooth_power(int on)
792{
793 int pin, rc = 0;
794 const char *id = "BTPW";
795 int cid = 0;
796
797 cid = adie_get_detected_connectivity_type();
798 if (cid != BAHAMA_ID) {
799 pr_err("%s: unexpected adie connectivity type: %d\n",
800 __func__, cid);
801 return -ENODEV;
802 }
803 if (on) {
804 /*setup power for BT SOC*/
Rahul Kashyap181d5552011-07-07 10:39:23 +0530805 rc = bt_set_gpio(on);
806 if (rc) {
807 pr_err("%s: bt_set_gpio = %d\n",
808 __func__, rc);
809 goto exit;
810 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700811 rc = bluetooth_switch_regulators(on);
812 if (rc < 0) {
813 pr_err("%s: bluetooth_switch_regulators rc = %d",
814 __func__, rc);
815 goto exit;
816 }
817 /*setup BT GPIO lines*/
818 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
819 pin++) {
820 rc = gpio_tlmm_config(bt_config_power_on[pin],
821 GPIO_CFG_ENABLE);
822 if (rc < 0) {
823 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
824 __func__,
825 bt_config_power_on[pin],
826 rc);
827 goto fail_power;
828 }
829 }
830 /*Setup BT clocks*/
831 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
832 PMAPP_CLOCK_VOTE_ON);
833 if (rc < 0) {
834 pr_err("Failed to vote for TCXO_D1 ON\n");
835 goto fail_clock;
836 }
837 msleep(20);
838
839 /*I2C config for Bahama*/
840 rc = bahama_bt(1);
841 if (rc < 0) {
842 pr_err("%s: bahama_bt rc = %d", __func__, rc);
843 goto fail_i2c;
844 }
845 msleep(20);
846
847 /*setup BT PCM lines*/
848 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
849 if (rc < 0) {
850 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
851 __func__, rc);
852 goto fail_power;
853 }
854 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
855 PMAPP_CLOCK_VOTE_PIN_CTRL);
856 if (rc < 0)
857 pr_err("%s:Pin Control Failed, rc = %d",
858 __func__, rc);
859
860 } else {
861 rc = bahama_bt(0);
862 if (rc < 0)
863 pr_err("%s: bahama_bt rc = %d", __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530864
865 rc = bt_set_gpio(on);
866 if (rc) {
867 pr_err("%s: bt_set_gpio = %d\n",
868 __func__, rc);
869 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700870fail_i2c:
871 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
872 PMAPP_CLOCK_VOTE_OFF);
873 if (rc < 0)
874 pr_err("%s: Failed to vote Off D1\n", __func__);
875fail_clock:
876 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
877 pin++) {
878 rc = gpio_tlmm_config(bt_config_power_off[pin],
879 GPIO_CFG_ENABLE);
880 if (rc < 0) {
881 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
882 __func__, bt_config_power_off[pin], rc);
883 }
884 }
885 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
886 if (rc < 0) {
887 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
888 __func__, rc);
889 }
890fail_power:
891 rc = bluetooth_switch_regulators(0);
892 if (rc < 0) {
893 pr_err("%s: switch_regulators : rc = %d",\
894 __func__, rc);
895 goto exit;
896 }
897 }
898 return rc;
899exit:
900 pr_err("%s: failed with rc = %d", __func__, rc);
901 return rc;
902}
903
904static int __init bt_power_init(void)
905{
906 int i, rc = 0;
Rahul Kashyap6e669462011-07-23 16:42:56 +0530907 for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
908 bt_vregs[i].vregs = vreg_get(NULL,
909 bt_vregs[i].name);
910 if (IS_ERR(bt_vregs[i].vregs)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700911 pr_err("%s: vreg get %s failed (%ld)\n",
Rahul Kashyap6e669462011-07-23 16:42:56 +0530912 __func__, bt_vregs[i].name,
913 PTR_ERR(bt_vregs[i].vregs));
914 rc = PTR_ERR(bt_vregs[i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700915 goto vreg_get_fail;
916 }
917 }
918
919 msm_bt_power_device.dev.platform_data = &bluetooth_power;
920
921 return rc;
922
923vreg_get_fail:
924 while (i)
Rahul Kashyap6e669462011-07-23 16:42:56 +0530925 vreg_put(bt_vregs[--i].vregs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700926 return rc;
927}
928
929static struct marimba_platform_data marimba_pdata = {
930 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
931 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
932 .bahama_setup = msm_bahama_setup_power,
933 .bahama_shutdown = msm_bahama_shutdown_power,
934 .bahama_core_config = msm_bahama_core_config,
935 .fm = &marimba_fm_pdata,
936};
937
938#endif
939
940#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
941static struct i2c_board_info core_exp_i2c_info[] __initdata = {
942 {
943 I2C_BOARD_INFO("sx1509q", 0x3e),
944 },
945};
946static struct i2c_board_info cam_exp_i2c_info[] __initdata = {
947 {
948 I2C_BOARD_INFO("sx1508q", 0x22),
949 .platform_data = &sx150x_data[SX150X_CAM],
950 },
951};
952#endif
953#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
954static struct i2c_board_info bahama_devices[] = {
955{
956 I2C_BOARD_INFO("marimba", 0xc),
957 .platform_data = &marimba_pdata,
958},
959};
960#endif
961
962#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
963static void __init register_i2c_devices(void)
964{
965
966 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
967 cam_exp_i2c_info,
968 ARRAY_SIZE(cam_exp_i2c_info));
969
970 if (machine_is_msm7x27a_surf())
971 sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
972
973 core_exp_i2c_info[0].platform_data =
974 &sx150x_data[SX150X_CORE];
975
976 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
977 core_exp_i2c_info,
978 ARRAY_SIZE(core_exp_i2c_info));
979#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
980 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
981 bahama_devices,
982 ARRAY_SIZE(bahama_devices));
983#endif
984}
985#endif
986
987static struct msm_gpio qup_i2c_gpios_io[] = {
988 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
989 "qup_scl" },
990 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
991 "qup_sda" },
992 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
993 "qup_scl" },
994 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
995 "qup_sda" },
996};
997
998static struct msm_gpio qup_i2c_gpios_hw[] = {
999 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1000 "qup_scl" },
1001 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1002 "qup_sda" },
1003 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1004 "qup_scl" },
1005 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1006 "qup_sda" },
1007};
1008
1009static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
1010{
1011 int rc;
1012
1013 if (adap_id < 0 || adap_id > 1)
1014 return;
1015
1016 /* Each adapter gets 2 lines from the table */
1017 if (config_type)
1018 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
1019 else
1020 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
1021 if (rc < 0)
1022 pr_err("QUP GPIO request/enable failed: %d\n", rc);
1023}
1024
1025static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
1026 .clk_freq = 100000,
1027 .clk = "gsbi_qup_clk",
1028 .pclk = "gsbi_qup_pclk",
1029 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1030};
1031
1032static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
1033 .clk_freq = 100000,
1034 .clk = "gsbi_qup_clk",
1035 .pclk = "gsbi_qup_pclk",
1036 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1037};
1038
1039#ifdef CONFIG_ARCH_MSM7X27A
1040#define MSM_PMEM_MDP_SIZE 0x1DD1000
1041#define MSM_PMEM_ADSP_SIZE 0x1000000
1042
1043#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
1044#define MSM_FB_SIZE 0x260000
1045#else
1046#define MSM_FB_SIZE 0x195000
1047#endif
1048
1049#endif
1050
1051static struct android_usb_platform_data android_usb_pdata = {
1052 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1053};
1054
1055static struct platform_device android_usb_device = {
1056 .name = "android_usb",
1057 .id = -1,
1058 .dev = {
1059 .platform_data = &android_usb_pdata,
1060 },
1061};
1062
1063#ifdef CONFIG_USB_EHCI_MSM_72K
1064static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1065{
1066 int rc = 0;
1067 unsigned gpio;
1068
1069 gpio = GPIO_HOST_VBUS_EN;
1070
1071 rc = gpio_request(gpio, "i2c_host_vbus_en");
1072 if (rc < 0) {
1073 pr_err("failed to request %d GPIO\n", gpio);
1074 return;
1075 }
1076 gpio_direction_output(gpio, !!on);
1077 gpio_set_value_cansleep(gpio, !!on);
1078 gpio_free(gpio);
1079}
1080
1081static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1082 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1083};
1084
1085static void __init msm7x2x_init_host(void)
1086{
1087 msm_add_host(0, &msm_usb_host_pdata);
1088}
1089#endif
1090
1091#ifdef CONFIG_USB_MSM_OTG_72K
1092static int hsusb_rpc_connect(int connect)
1093{
1094 if (connect)
1095 return msm_hsusb_rpc_connect();
1096 else
1097 return msm_hsusb_rpc_close();
1098}
1099
1100static struct vreg *vreg_3p3;
1101static int msm_hsusb_ldo_init(int init)
1102{
1103 if (init) {
1104 vreg_3p3 = vreg_get(NULL, "usb");
1105 if (IS_ERR(vreg_3p3))
1106 return PTR_ERR(vreg_3p3);
1107 } else
1108 vreg_put(vreg_3p3);
1109
1110 return 0;
1111}
1112
1113static int msm_hsusb_ldo_enable(int enable)
1114{
1115 static int ldo_status;
1116
1117 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1118 return -ENODEV;
1119
1120 if (ldo_status == enable)
1121 return 0;
1122
1123 ldo_status = enable;
1124
1125 if (enable)
1126 return vreg_enable(vreg_3p3);
1127
1128 return vreg_disable(vreg_3p3);
1129}
1130
1131#ifndef CONFIG_USB_EHCI_MSM_72K
1132static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1133{
1134 int ret = 0;
1135
1136 if (init)
1137 ret = msm_pm_app_rpc_init(callback);
1138 else
1139 msm_pm_app_rpc_deinit(callback);
1140
1141 return ret;
1142}
1143#endif
1144
1145static struct msm_otg_platform_data msm_otg_pdata = {
1146#ifndef CONFIG_USB_EHCI_MSM_72K
1147 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1148#else
1149 .vbus_power = msm_hsusb_vbus_power,
1150#endif
1151 .rpc_connect = hsusb_rpc_connect,
1152 .core_clk = 1,
1153 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1154 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1155 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1156 .se1_gating = SE1_GATING_DISABLE,
1157 .ldo_init = msm_hsusb_ldo_init,
1158 .ldo_enable = msm_hsusb_ldo_enable,
1159 .chg_init = hsusb_chg_init,
1160 .chg_connected = hsusb_chg_connected,
1161 .chg_vbus_draw = hsusb_chg_vbus_draw,
1162};
1163#endif
1164
1165static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1166 .is_phy_status_timer_on = 1,
1167};
1168
1169static struct resource smc91x_resources[] = {
1170 [0] = {
1171 .start = 0x90000300,
1172 .end = 0x900003ff,
1173 .flags = IORESOURCE_MEM,
1174 },
1175 [1] = {
1176 .start = MSM_GPIO_TO_INT(4),
1177 .end = MSM_GPIO_TO_INT(4),
1178 .flags = IORESOURCE_IRQ,
1179 },
1180};
1181
1182static struct platform_device smc91x_device = {
1183 .name = "smc91x",
1184 .id = 0,
1185 .num_resources = ARRAY_SIZE(smc91x_resources),
1186 .resource = smc91x_resources,
1187};
1188
1189#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1190 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1191 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1192 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1193
1194static unsigned long vreg_sts, gpio_sts;
1195static struct vreg *vreg_mmc;
1196static struct vreg *vreg_emmc;
1197
1198struct sdcc_vreg {
1199 struct vreg *vreg_data;
1200 unsigned level;
1201};
1202
1203static struct sdcc_vreg sdcc_vreg_data[4];
1204
1205struct sdcc_gpio {
1206 struct msm_gpio *cfg_data;
1207 uint32_t size;
1208 struct msm_gpio *sleep_cfg_data;
1209};
1210
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301211/**
1212 * Due to insufficient drive strengths for SDC GPIO lines some old versioned
1213 * SD/MMC cards may cause data CRC errors. Hence, set optimal values
1214 * for SDC slots based on timing closure and marginality. SDC1 slot
1215 * require higher value since it should handle bad signal quality due
1216 * to size of T-flash adapters.
1217 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001218static struct msm_gpio sdc1_cfg_data[] = {
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301219 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001220 "sdc1_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301221 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001222 "sdc1_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301223 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001224 "sdc1_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301225 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001226 "sdc1_dat_0"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301227 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001228 "sdc1_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301229 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_14MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001230 "sdc1_clk"},
1231};
1232
1233static struct msm_gpio sdc2_cfg_data[] = {
1234 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1235 "sdc2_clk"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301236 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001237 "sdc2_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301238 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001239 "sdc2_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301240 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001241 "sdc2_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301242 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001243 "sdc2_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301244 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001245 "sdc2_dat_0"},
1246};
1247
1248static struct msm_gpio sdc2_sleep_cfg_data[] = {
1249 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1250 "sdc2_clk"},
1251 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1252 "sdc2_cmd"},
1253 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1254 "sdc2_dat_3"},
1255 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1256 "sdc2_dat_2"},
1257 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1258 "sdc2_dat_1"},
1259 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1260 "sdc2_dat_0"},
1261};
1262static struct msm_gpio sdc3_cfg_data[] = {
1263 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1264 "sdc3_clk"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301265 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001266 "sdc3_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301267 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001268 "sdc3_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301269 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001270 "sdc3_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301271 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001272 "sdc3_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301273 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001274 "sdc3_dat_0"},
1275#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301276 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001277 "sdc3_dat_7"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301278 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001279 "sdc3_dat_6"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301280 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001281 "sdc3_dat_5"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301282 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001283 "sdc3_dat_4"},
1284#endif
1285};
1286
1287static struct msm_gpio sdc4_cfg_data[] = {
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301288 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001289 "sdc4_dat_3"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301290 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001291 "sdc4_dat_2"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301292 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001293 "sdc4_dat_1"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301294 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001295 "sdc4_cmd"},
Sujith Reddy Thumma70391a32011-08-01 10:33:21 +05301296 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001297 "sdc4_dat_0"},
1298 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1299 "sdc4_clk"},
1300};
1301
1302static struct sdcc_gpio sdcc_cfg_data[] = {
1303 {
1304 .cfg_data = sdc1_cfg_data,
1305 .size = ARRAY_SIZE(sdc1_cfg_data),
1306 },
1307 {
1308 .cfg_data = sdc2_cfg_data,
1309 .size = ARRAY_SIZE(sdc2_cfg_data),
1310 .sleep_cfg_data = sdc2_sleep_cfg_data,
1311 },
1312 {
1313 .cfg_data = sdc3_cfg_data,
1314 .size = ARRAY_SIZE(sdc3_cfg_data),
1315 },
1316 {
1317 .cfg_data = sdc4_cfg_data,
1318 .size = ARRAY_SIZE(sdc4_cfg_data),
1319 },
1320};
1321
1322static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1323{
1324 int rc = 0;
1325 struct sdcc_gpio *curr;
1326
1327 curr = &sdcc_cfg_data[dev_id - 1];
1328 if (!(test_bit(dev_id, &gpio_sts)^enable))
1329 return rc;
1330
1331 if (enable) {
1332 set_bit(dev_id, &gpio_sts);
1333 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1334 if (rc)
1335 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1336 __func__, dev_id);
1337 } else {
1338 clear_bit(dev_id, &gpio_sts);
1339 if (curr->sleep_cfg_data) {
1340 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1341 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1342 return rc;
1343 }
1344 msm_gpios_disable_free(curr->cfg_data, curr->size);
1345 }
1346 return rc;
1347}
1348
1349static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1350{
1351 int rc = 0;
1352 struct sdcc_vreg *curr;
1353
1354 curr = &sdcc_vreg_data[dev_id - 1];
1355
1356 if (!(test_bit(dev_id, &vreg_sts)^enable))
1357 return rc;
1358
1359 if (enable) {
1360 set_bit(dev_id, &vreg_sts);
1361 rc = vreg_set_level(curr->vreg_data, curr->level);
1362 if (rc)
1363 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1364
1365 rc = vreg_enable(curr->vreg_data);
1366 if (rc)
1367 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1368 } else {
1369 clear_bit(dev_id, &vreg_sts);
1370 rc = vreg_disable(curr->vreg_data);
1371 if (rc)
1372 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1373 }
1374 return rc;
1375}
1376
1377static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1378{
1379 int rc = 0;
1380 struct platform_device *pdev;
1381
1382 pdev = container_of(dv, struct platform_device, dev);
1383
1384 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1385 if (rc)
1386 goto out;
1387
1388 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1389out:
1390 return rc;
1391}
1392
1393#define GPIO_SDC1_HW_DET 85
1394
1395#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1396 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1397static unsigned int msm7x2xa_sdcc_slot_status(struct device *dev)
1398{
1399 int status;
1400
1401 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1402 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1403 if (status)
1404 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1405 GPIO_SDC1_HW_DET);
1406
1407 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1408 if (status) {
1409 pr_err("%s:Failed to request GPIO %d\n", __func__,
1410 GPIO_SDC1_HW_DET);
1411 } else {
1412 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1413 if (!status)
1414 status = gpio_get_value(GPIO_SDC1_HW_DET);
1415 gpio_free(GPIO_SDC1_HW_DET);
1416 }
1417 return status;
1418}
1419#endif
1420
1421#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1422static struct mmc_platform_data sdc1_plat_data = {
1423 .ocr_mask = MMC_VDD_28_29,
1424 .translate_vdd = msm_sdcc_setup_power,
1425 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1426 .msmsdcc_fmin = 144000,
1427 .msmsdcc_fmid = 24576000,
1428 .msmsdcc_fmax = 49152000,
1429#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1430 .status = msm7x2xa_sdcc_slot_status,
1431 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1432 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1433#endif
1434};
1435#endif
1436
1437#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1438static struct mmc_platform_data sdc2_plat_data = {
1439 /*
1440 * SDC2 supports only 1.8V, claim for 2.85V range is just
1441 * for allowing buggy cards who advertise 2.8V even though
1442 * they can operate at 1.8V supply.
1443 */
1444 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1445 .translate_vdd = msm_sdcc_setup_power,
1446 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1447#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1448 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1449#endif
1450 .msmsdcc_fmin = 144000,
1451 .msmsdcc_fmid = 24576000,
1452 .msmsdcc_fmax = 49152000,
1453#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1454 .dummy52_required = 1,
1455#endif
1456};
1457#endif
1458
1459#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1460static struct mmc_platform_data sdc3_plat_data = {
1461 .ocr_mask = MMC_VDD_28_29,
1462 .translate_vdd = msm_sdcc_setup_power,
1463#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1464 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1465#else
1466 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1467#endif
1468 .msmsdcc_fmin = 144000,
1469 .msmsdcc_fmid = 24576000,
1470 .msmsdcc_fmax = 49152000,
1471 .nonremovable = 1,
1472};
1473#endif
1474
1475#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1476 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1477static struct mmc_platform_data sdc4_plat_data = {
1478 .ocr_mask = MMC_VDD_28_29,
1479 .translate_vdd = msm_sdcc_setup_power,
1480 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1481 .msmsdcc_fmin = 144000,
1482 .msmsdcc_fmid = 24576000,
1483 .msmsdcc_fmax = 49152000,
1484};
1485#endif
1486#endif
1487
1488#ifdef CONFIG_SERIAL_MSM_HS
1489static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1490 .inject_rx_on_wakeup = 1,
1491 .rx_to_inject = 0xFD,
1492};
1493#endif
1494static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1495 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1496 .idle_supported = 1,
1497 .suspend_supported = 1,
1498 .idle_enabled = 1,
1499 .suspend_enabled = 1,
1500 .latency = 16000,
1501 .residency = 20000,
1502 },
1503 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1504 .idle_supported = 1,
1505 .suspend_supported = 1,
1506 .idle_enabled = 1,
1507 .suspend_enabled = 1,
1508 .latency = 12000,
1509 .residency = 20000,
1510 },
1511 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1512 .idle_supported = 1,
1513 .suspend_supported = 1,
1514 .idle_enabled = 0,
1515 .suspend_enabled = 1,
1516 .latency = 2000,
1517 .residency = 0,
1518 },
1519 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1520 .idle_supported = 1,
1521 .suspend_supported = 1,
1522 .idle_enabled = 1,
1523 .suspend_enabled = 1,
1524 .latency = 2,
1525 .residency = 0,
1526 },
1527};
1528
1529static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1530 .name = "pmem_adsp",
1531 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
Mahesh Lankac6af7eb2011-08-02 18:00:35 +05301532 .cached = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001533 .memory_type = MEMTYPE_EBI1,
1534};
1535
1536static struct platform_device android_pmem_adsp_device = {
1537 .name = "android_pmem",
1538 .id = 1,
1539 .dev = { .platform_data = &android_pmem_adsp_pdata },
1540};
1541
1542static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1543static int __init pmem_mdp_size_setup(char *p)
1544{
1545 pmem_mdp_size = memparse(p, NULL);
1546 return 0;
1547}
1548
1549early_param("pmem_mdp_size", pmem_mdp_size_setup);
1550
1551static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1552static int __init pmem_adsp_size_setup(char *p)
1553{
1554 pmem_adsp_size = memparse(p, NULL);
1555 return 0;
1556}
1557
1558early_param("pmem_adsp_size", pmem_adsp_size_setup);
1559
1560static unsigned fb_size = MSM_FB_SIZE;
1561static int __init fb_size_setup(char *p)
1562{
1563 fb_size = memparse(p, NULL);
1564 return 0;
1565}
1566
1567early_param("fb_size", fb_size_setup);
1568
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001569static const char * const msm_fb_lcdc_vreg[] = {
1570 "gp2",
1571 "msme1",
1572};
1573
1574static const int msm_fb_lcdc_vreg_mV[] = {
1575 2850,
1576 1800,
1577};
1578
1579struct vreg *lcdc_vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
1580
1581static uint32_t lcdc_gpio_initialized;
1582
1583static void lcdc_toshiba_gpio_init(void)
1584{
1585 int i, rc = 0;
1586 if (!lcdc_gpio_initialized) {
1587 if (gpio_request(GPIO_SPI_CLK, "spi_clk")) {
1588 pr_err("failed to request gpio spi_clk\n");
1589 return;
1590 }
1591 if (gpio_request(GPIO_SPI_CS0_N, "spi_cs")) {
1592 pr_err("failed to request gpio spi_cs0_N\n");
1593 goto fail_gpio6;
1594 }
1595 if (gpio_request(GPIO_SPI_MOSI, "spi_mosi")) {
1596 pr_err("failed to request gpio spi_mosi\n");
1597 goto fail_gpio5;
1598 }
1599 if (gpio_request(GPIO_SPI_MISO, "spi_miso")) {
1600 pr_err("failed to request gpio spi_miso\n");
1601 goto fail_gpio4;
1602 }
1603 if (gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr")) {
1604 pr_err("failed to request gpio_disp_pwr\n");
1605 goto fail_gpio3;
1606 }
1607 if (gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en")) {
1608 pr_err("failed to request gpio_bkl_en\n");
1609 goto fail_gpio2;
1610 }
1611 pmapp_disp_backlight_init();
1612
1613 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1614 lcdc_vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
1615
1616 rc = vreg_set_level(lcdc_vreg[i],
1617 msm_fb_lcdc_vreg_mV[i]);
1618
1619 if (rc < 0) {
1620 pr_err("%s: set regulator level failed "
1621 "with :(%d)\n", __func__, rc);
1622 goto fail_gpio1;
1623 }
1624 }
1625 lcdc_gpio_initialized = 1;
1626 }
1627 return;
1628
1629fail_gpio1:
1630 for (; i > 0; i--)
1631 vreg_put(lcdc_vreg[i - 1]);
1632
1633 gpio_free(GPIO_BACKLIGHT_EN);
1634fail_gpio2:
1635 gpio_free(GPIO_DISPLAY_PWR_EN);
1636fail_gpio3:
1637 gpio_free(GPIO_SPI_MISO);
1638fail_gpio4:
1639 gpio_free(GPIO_SPI_MOSI);
1640fail_gpio5:
1641 gpio_free(GPIO_SPI_CS0_N);
1642fail_gpio6:
1643 gpio_free(GPIO_SPI_CLK);
1644 lcdc_gpio_initialized = 0;
1645}
1646
1647static uint32_t lcdc_gpio_table[] = {
1648 GPIO_SPI_CLK,
1649 GPIO_SPI_CS0_N,
1650 GPIO_SPI_MOSI,
1651 GPIO_DISPLAY_PWR_EN,
1652 GPIO_BACKLIGHT_EN,
1653 GPIO_SPI_MISO,
1654};
1655
1656static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
1657{
1658 int n;
1659
1660 if (lcdc_gpio_initialized) {
1661 /* All are IO Expander GPIOs */
1662 for (n = 0; n < (len - 1); n++)
1663 gpio_direction_output(table[n], 1);
1664 }
1665}
1666
1667static void lcdc_toshiba_config_gpios(int enable)
1668{
1669 config_lcdc_gpio_table(lcdc_gpio_table,
1670 ARRAY_SIZE(lcdc_gpio_table), enable);
1671}
1672
1673static int msm_fb_lcdc_power_save(int on)
1674{
1675 int i, rc = 0;
1676 /* Doing the init of the LCDC GPIOs very late as they are from
1677 an I2C-controlled IO Expander */
1678 lcdc_toshiba_gpio_init();
1679
1680 if (lcdc_gpio_initialized) {
1681 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
1682 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
1683
1684 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1685 if (on) {
1686 rc = vreg_enable(lcdc_vreg[i]);
1687
1688 if (rc) {
1689 printk(KERN_ERR "vreg_enable: %s vreg"
1690 "operation failed\n",
1691 msm_fb_lcdc_vreg[i]);
1692 goto lcdc_vreg_fail;
1693 }
1694 } else {
1695 rc = vreg_disable(lcdc_vreg[i]);
1696
1697 if (rc) {
1698 printk(KERN_ERR "vreg_disable: %s vreg "
1699 "operation failed\n",
1700 msm_fb_lcdc_vreg[i]);
1701 goto lcdc_vreg_fail;
1702 }
1703 }
1704 }
1705 }
1706
1707 return rc;
1708
1709lcdc_vreg_fail:
1710 if (on) {
1711 for (; i > 0; i--)
1712 vreg_disable(lcdc_vreg[i - 1]);
1713 } else {
1714 for (; i > 0; i--)
1715 vreg_enable(lcdc_vreg[i - 1]);
1716 }
1717
1718return rc;
1719
1720}
1721
1722
1723static int lcdc_toshiba_set_bl(int level)
1724{
1725 int ret;
1726
1727 ret = pmapp_disp_backlight_set_brightness(level);
1728 if (ret)
1729 pr_err("%s: can't set lcd backlight!\n", __func__);
1730
1731 return ret;
1732}
1733
1734
1735static struct lcdc_platform_data lcdc_pdata = {
Jeevan Shriram15f2a5e2011-07-13 21:45:26 +05301736 .lcdc_gpio_config = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001737 .lcdc_power_save = msm_fb_lcdc_power_save,
1738};
1739
1740static int lcd_panel_spi_gpio_num[] = {
1741 GPIO_SPI_MOSI, /* spi_sdi */
1742 GPIO_SPI_MISO, /* spi_sdoi */
1743 GPIO_SPI_CLK, /* spi_clk */
1744 GPIO_SPI_CS0_N, /* spi_cs */
1745};
1746
1747static struct msm_panel_common_pdata lcdc_toshiba_panel_data = {
1748 .panel_config_gpio = lcdc_toshiba_config_gpios,
1749 .pmic_backlight = lcdc_toshiba_set_bl,
1750 .gpio_num = lcd_panel_spi_gpio_num,
1751};
1752
1753static struct platform_device lcdc_toshiba_panel_device = {
1754 .name = "lcdc_toshiba_fwvga_pt",
1755 .id = 0,
1756 .dev = {
1757 .platform_data = &lcdc_toshiba_panel_data,
1758 }
1759};
1760
1761static struct resource msm_fb_resources[] = {
1762 {
1763 .flags = IORESOURCE_DMA,
1764 }
1765};
1766
1767static int msm_fb_detect_panel(const char *name)
1768{
1769 int ret = -EPERM;
1770
1771 if (machine_is_msm7x27a_surf()) {
1772 if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21))
1773 ret = 0;
1774 } else {
1775 ret = -ENODEV;
1776 }
1777
1778 return ret;
1779}
1780
1781static struct msm_fb_platform_data msm_fb_pdata = {
1782 .detect_client = msm_fb_detect_panel,
1783};
1784
1785static struct platform_device msm_fb_device = {
1786 .name = "msm_fb",
1787 .id = 0,
1788 .num_resources = ARRAY_SIZE(msm_fb_resources),
1789 .resource = msm_fb_resources,
1790 .dev = {
1791 .platform_data = &msm_fb_pdata,
1792 }
1793};
1794
1795#ifdef CONFIG_FB_MSM_MIPI_DSI
1796static int mipi_renesas_set_bl(int level)
1797{
1798 int ret;
1799
1800 ret = pmapp_disp_backlight_set_brightness(level);
1801
1802 if (ret)
1803 pr_err("%s: can't set lcd backlight!\n", __func__);
1804
1805 return ret;
1806}
1807
1808static struct msm_panel_common_pdata mipi_renesas_pdata = {
1809 .pmic_backlight = mipi_renesas_set_bl,
1810};
1811
1812
1813static struct platform_device mipi_dsi_renesas_panel_device = {
1814 .name = "mipi_renesas",
1815 .id = 0,
1816 .dev = {
1817 .platform_data = &mipi_renesas_pdata,
1818 }
1819};
1820#endif
1821
1822static void __init msm7x27a_init_mmc(void)
1823{
1824 vreg_emmc = vreg_get(NULL, "emmc");
1825 if (IS_ERR(vreg_emmc)) {
1826 pr_err("%s: vreg get failed (%ld)\n",
1827 __func__, PTR_ERR(vreg_emmc));
1828 return;
1829 }
1830
1831 vreg_mmc = vreg_get(NULL, "mmc");
1832 if (IS_ERR(vreg_mmc)) {
1833 pr_err("%s: vreg get failed (%ld)\n",
1834 __func__, PTR_ERR(vreg_mmc));
1835 return;
1836 }
1837
1838 /* eMMC slot */
1839#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1840 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1841 sdcc_vreg_data[2].level = 3000;
1842 msm_add_sdcc(3, &sdc3_plat_data);
1843#endif
1844 /* Micro-SD slot */
1845#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1846 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1847 sdcc_vreg_data[0].level = 2850;
1848 msm_add_sdcc(1, &sdc1_plat_data);
1849#endif
1850 /* SDIO WLAN slot */
1851#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1852 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1853 sdcc_vreg_data[1].level = 2850;
1854 msm_add_sdcc(2, &sdc2_plat_data);
1855#endif
1856 /* Not Used */
1857#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1858 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1859 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1860 sdcc_vreg_data[3].level = 2850;
1861 msm_add_sdcc(4, &sdc4_plat_data);
1862#endif
1863}
1864#define SND(desc, num) { .name = #desc, .id = num }
1865static struct snd_endpoint snd_endpoints_list[] = {
1866 SND(HANDSET, 0),
1867 SND(MONO_HEADSET, 2),
1868 SND(HEADSET, 3),
1869 SND(SPEAKER, 6),
1870 SND(TTY_HEADSET, 8),
1871 SND(TTY_VCO, 9),
1872 SND(TTY_HCO, 10),
1873 SND(BT, 12),
1874 SND(IN_S_SADC_OUT_HANDSET, 16),
1875 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1876 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1877 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1878 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
1879 SND(CURRENT, 34),
1880 SND(FM_ANALOG_STEREO_HEADSET, 35),
1881 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1882};
1883#undef SND
1884
1885static struct msm_snd_endpoints msm_device_snd_endpoints = {
1886 .endpoints = snd_endpoints_list,
1887 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1888};
1889
1890static struct platform_device msm_device_snd = {
1891 .name = "msm_snd",
1892 .id = -1,
1893 .dev = {
1894 .platform_data = &msm_device_snd_endpoints
1895 },
1896};
1897
1898#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1899 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1900 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1901 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1902 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1903 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1904#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1905 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1906 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1907 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1908 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1909 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1910#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1911 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1912 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1913 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1914 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1915 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1916#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1917 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1918 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1919 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1920 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1921 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1922#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1923
1924static unsigned int dec_concurrency_table[] = {
1925 /* Audio LP */
1926 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1927 0, 0, 0,
1928
1929 /* Concurrency 1 */
1930 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1931 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1932 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1933 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1934 (DEC4_FORMAT),
1935
1936 /* Concurrency 2 */
1937 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1938 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1939 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1940 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1941 (DEC4_FORMAT),
1942
1943 /* Concurrency 3 */
1944 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1945 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1946 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1947 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1948 (DEC4_FORMAT),
1949
1950 /* Concurrency 4 */
1951 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1952 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1953 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1954 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1955 (DEC4_FORMAT),
1956
1957 /* Concurrency 5 */
1958 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1959 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1960 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1961 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1962 (DEC4_FORMAT),
1963
1964 /* Concurrency 6 */
1965 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1966 0, 0, 0, 0,
1967
1968 /* Concurrency 7 */
1969 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1970 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1971 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1972 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1973 (DEC4_FORMAT),
1974};
1975
1976#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1977 .module_queueid = queueid, .module_decid = decid, \
1978 .nr_codec_support = nr_codec}
1979
1980static struct msm_adspdec_info dec_info_list[] = {
1981 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1982 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1983 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1984 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1985 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1986};
1987
1988static struct msm_adspdec_database msm_device_adspdec_database = {
1989 .num_dec = ARRAY_SIZE(dec_info_list),
1990 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
1991 ARRAY_SIZE(dec_info_list)),
1992 .dec_concurrency_table = dec_concurrency_table,
1993 .dec_info_list = dec_info_list,
1994};
1995
1996static struct platform_device msm_device_adspdec = {
1997 .name = "msm_adspdec",
1998 .id = -1,
1999 .dev = {
2000 .platform_data = &msm_device_adspdec_database
2001 },
2002};
2003
2004static struct android_pmem_platform_data android_pmem_audio_pdata = {
2005 .name = "pmem_audio",
2006 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2007 .cached = 0,
2008 .memory_type = MEMTYPE_EBI1,
2009};
2010
2011static struct platform_device android_pmem_audio_device = {
2012 .name = "android_pmem",
2013 .id = 2,
2014 .dev = { .platform_data = &android_pmem_audio_pdata },
2015};
2016
2017static struct android_pmem_platform_data android_pmem_pdata = {
2018 .name = "pmem",
2019 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2020 .cached = 1,
2021 .memory_type = MEMTYPE_EBI1,
2022};
2023static struct platform_device android_pmem_device = {
2024 .name = "android_pmem",
2025 .id = 0,
2026 .dev = { .platform_data = &android_pmem_pdata },
2027};
2028
2029static u32 msm_calculate_batt_capacity(u32 current_voltage);
2030
2031static struct msm_psy_batt_pdata msm_psy_batt_data = {
2032 .voltage_min_design = 2800,
2033 .voltage_max_design = 4300,
2034 .avail_chg_sources = AC_CHG | USB_CHG ,
2035 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
2036 .calculate_capacity = &msm_calculate_batt_capacity,
2037};
2038
2039static u32 msm_calculate_batt_capacity(u32 current_voltage)
2040{
2041 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
2042 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
2043
2044 return (current_voltage - low_voltage) * 100
2045 / (high_voltage - low_voltage);
2046}
2047
2048static struct platform_device msm_batt_device = {
2049 .name = "msm-battery",
2050 .id = -1,
2051 .dev.platform_data = &msm_psy_batt_data,
2052};
2053
2054static struct smsc911x_platform_config smsc911x_config = {
2055 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
2056 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
2057 .flags = SMSC911X_USE_16BIT,
2058};
2059
2060static struct resource smsc911x_resources[] = {
2061 [0] = {
2062 .start = 0x90000000,
2063 .end = 0x90007fff,
2064 .flags = IORESOURCE_MEM,
2065 },
2066 [1] = {
2067 .start = MSM_GPIO_TO_INT(48),
2068 .end = MSM_GPIO_TO_INT(48),
2069 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
2070 },
2071};
2072
2073static struct platform_device smsc911x_device = {
2074 .name = "smsc911x",
2075 .id = 0,
2076 .num_resources = ARRAY_SIZE(smsc911x_resources),
2077 .resource = smsc911x_resources,
2078 .dev = {
2079 .platform_data = &smsc911x_config,
2080 },
2081};
2082
2083static struct msm_gpio smsc911x_gpios[] = {
2084 { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2085 "smsc911x_irq" },
2086 { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2087 "eth_fifo_sel" },
2088};
2089
2090#define ETH_FIFO_SEL_GPIO 49
2091static void msm7x27a_cfg_smsc911x(void)
2092{
2093 int res;
2094
2095 res = msm_gpios_request_enable(smsc911x_gpios,
2096 ARRAY_SIZE(smsc911x_gpios));
2097 if (res) {
2098 pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
2099 return;
2100 }
2101
2102 /* ETH_FIFO_SEL */
2103 res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
2104 if (res) {
2105 pr_err("%s: unable to get direction for gpio %d\n", __func__,
2106 ETH_FIFO_SEL_GPIO);
2107 msm_gpios_disable_free(smsc911x_gpios,
2108 ARRAY_SIZE(smsc911x_gpios));
2109 return;
2110 }
2111 gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
2112}
2113
2114#ifdef CONFIG_MSM_CAMERA
2115static uint32_t camera_off_gpio_table[] = {
2116 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2117};
2118
2119static uint32_t camera_on_gpio_table[] = {
2120 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2121};
2122
2123#ifdef CONFIG_MSM_CAMERA_FLASH
2124static struct msm_camera_sensor_flash_src msm_flash_src = {
Nishant Pandit474f2252011-07-23 23:17:56 +05302125 .flash_sr_type = MSM_CAMERA_FLASH_SRC_EXT,
2126 ._fsrc.ext_driver_src.led_en = GPIO_CAM_GP_LED_EN1,
2127 ._fsrc.ext_driver_src.led_flash_en = GPIO_CAM_GP_LED_EN2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002128};
2129#endif
2130
2131static struct vreg *vreg_gp1;
2132static struct vreg *vreg_gp2;
2133static struct vreg *vreg_gp3;
2134static void msm_camera_vreg_config(int vreg_en)
2135{
2136 int rc;
2137
2138 if (vreg_gp1 == NULL) {
2139 vreg_gp1 = vreg_get(NULL, "msme1");
2140 if (IS_ERR(vreg_gp1)) {
2141 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2142 __func__, "msme1", PTR_ERR(vreg_gp1));
2143 return;
2144 }
2145
2146 rc = vreg_set_level(vreg_gp1, 1800);
2147 if (rc) {
2148 pr_err("%s: GP1 set_level failed (%d)\n",
2149 __func__, rc);
2150 return;
2151 }
2152 }
2153
2154 if (vreg_gp2 == NULL) {
2155 vreg_gp2 = vreg_get(NULL, "gp2");
2156 if (IS_ERR(vreg_gp2)) {
2157 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2158 __func__, "gp2", PTR_ERR(vreg_gp2));
2159 return;
2160 }
2161
2162 rc = vreg_set_level(vreg_gp2, 2850);
2163 if (rc) {
2164 pr_err("%s: GP2 set_level failed (%d)\n",
2165 __func__, rc);
2166 }
2167 }
2168
2169 if (vreg_gp3 == NULL) {
2170 vreg_gp3 = vreg_get(NULL, "usb2");
2171 if (IS_ERR(vreg_gp3)) {
2172 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2173 __func__, "gp3", PTR_ERR(vreg_gp3));
2174 return;
2175 }
2176
2177 rc = vreg_set_level(vreg_gp3, 1800);
2178 if (rc) {
2179 pr_err("%s: GP3 set level failed (%d)\n",
2180 __func__, rc);
2181 }
2182 }
2183
2184 if (vreg_en) {
2185 rc = vreg_enable(vreg_gp1);
2186 if (rc) {
2187 pr_err("%s: GP1 enable failed (%d)\n",
2188 __func__, rc);
2189 return;
2190 }
2191
2192 rc = vreg_enable(vreg_gp2);
2193 if (rc) {
2194 pr_err("%s: GP2 enable failed (%d)\n",
2195 __func__, rc);
2196 }
2197
2198 rc = vreg_enable(vreg_gp3);
2199 if (rc) {
2200 pr_err("%s: GP3 enable failed (%d)\n",
2201 __func__, rc);
2202 }
2203 } else {
2204 rc = vreg_disable(vreg_gp1);
2205 if (rc)
2206 pr_err("%s: GP1 disable failed (%d)\n",
2207 __func__, rc);
2208
2209 rc = vreg_disable(vreg_gp2);
2210 if (rc) {
2211 pr_err("%s: GP2 disable failed (%d)\n",
2212 __func__, rc);
2213 }
2214
2215 rc = vreg_disable(vreg_gp3);
2216 if (rc) {
2217 pr_err("%s: GP3 disable failed (%d)\n",
2218 __func__, rc);
2219 }
2220 }
2221}
2222
2223static int config_gpio_table(uint32_t *table, int len)
2224{
2225 int rc = 0, i = 0;
2226
2227 for (i = 0; i < len; i++) {
2228 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2229 if (rc) {
2230 pr_err("%s not able to get gpio\n", __func__);
2231 for (i--; i >= 0; i--)
2232 gpio_tlmm_config(camera_off_gpio_table[i],
2233 GPIO_CFG_ENABLE);
2234 break;
2235 }
2236 }
2237 return rc;
2238}
2239
2240static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
2241static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data;
2242static int config_camera_on_gpios_rear(void)
2243{
2244 int rc = 0;
2245
2246 if (machine_is_msm7x27a_ffa())
2247 msm_camera_vreg_config(1);
2248
2249 rc = config_gpio_table(camera_on_gpio_table,
2250 ARRAY_SIZE(camera_on_gpio_table));
2251 if (rc < 0) {
2252 pr_err("%s: CAMSENSOR gpio table request"
2253 "failed\n", __func__);
2254 return rc;
2255 }
2256
2257 return rc;
2258}
2259
2260static void config_camera_off_gpios_rear(void)
2261{
2262 if (machine_is_msm7x27a_ffa())
2263 msm_camera_vreg_config(0);
2264
2265 config_gpio_table(camera_off_gpio_table,
2266 ARRAY_SIZE(camera_off_gpio_table));
2267}
2268
2269static int config_camera_on_gpios_front(void)
2270{
2271 int rc = 0;
2272
2273 if (machine_is_msm7x27a_ffa())
2274 msm_camera_vreg_config(1);
2275
2276 rc = config_gpio_table(camera_on_gpio_table,
2277 ARRAY_SIZE(camera_on_gpio_table));
2278 if (rc < 0) {
2279 pr_err("%s: CAMSENSOR gpio table request"
2280 "failed\n", __func__);
2281 return rc;
2282 }
2283
2284 return rc;
2285}
2286
2287static void config_camera_off_gpios_front(void)
2288{
2289 if (machine_is_msm7x27a_ffa())
2290 msm_camera_vreg_config(0);
2291
2292 config_gpio_table(camera_off_gpio_table,
2293 ARRAY_SIZE(camera_off_gpio_table));
2294}
2295
2296struct msm_camera_device_platform_data msm_camera_device_data_rear = {
2297 .camera_gpio_on = config_camera_on_gpios_rear,
2298 .camera_gpio_off = config_camera_off_gpios_rear,
2299 .ioext.csiphy = 0xA1000000,
2300 .ioext.csisz = 0x00100000,
2301 .ioext.csiirq = INT_CSI_IRQ_1,
2302 .ioclk.mclk_clk_rate = 24000000,
2303 .ioclk.vfe_clk_rate = 192000000,
2304 .ioext.appphy = MSM_CLK_CTL_PHYS,
2305 .ioext.appsz = MSM_CLK_CTL_SIZE,
2306};
2307
2308struct msm_camera_device_platform_data msm_camera_device_data_front = {
2309 .camera_gpio_on = config_camera_on_gpios_front,
2310 .camera_gpio_off = config_camera_off_gpios_front,
2311 .ioext.csiphy = 0xA0F00000,
2312 .ioext.csisz = 0x00100000,
2313 .ioext.csiirq = INT_CSI_IRQ_0,
2314 .ioclk.mclk_clk_rate = 24000000,
2315 .ioclk.vfe_clk_rate = 192000000,
2316 .ioext.appphy = MSM_CLK_CTL_PHYS,
2317 .ioext.appsz = MSM_CLK_CTL_SIZE,
2318};
2319
2320#ifdef CONFIG_S5K4E1
2321static struct msm_camera_sensor_platform_info s5k4e1_sensor_7627a_info = {
2322 .mount_angle = 90
2323};
2324
2325static struct msm_camera_sensor_flash_data flash_s5k4e1 = {
2326 .flash_type = MSM_CAMERA_FLASH_LED,
2327 .flash_src = &msm_flash_src
2328};
2329
2330static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
2331 .sensor_name = "s5k4e1",
2332 .sensor_reset_enable = 1,
2333 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
2334 .sensor_pwd = 85,
2335 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2336 .vcm_enable = 1,
2337 .pdata = &msm_camera_device_data_rear,
2338 .flash_data = &flash_s5k4e1,
2339 .sensor_platform_info = &s5k4e1_sensor_7627a_info,
2340 .csi_if = 1
2341};
2342
2343static struct platform_device msm_camera_sensor_s5k4e1 = {
2344 .name = "msm_camera_s5k4e1",
2345 .dev = {
2346 .platform_data = &msm_camera_sensor_s5k4e1_data,
2347 },
2348};
2349#endif
2350
2351#ifdef CONFIG_IMX072
2352static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
2353 .mount_angle = 90
2354};
2355
2356static struct msm_camera_sensor_flash_data flash_imx072 = {
2357 .flash_type = MSM_CAMERA_FLASH_LED,
2358 .flash_src = &msm_flash_src
2359};
2360
2361static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
2362 .sensor_name = "imx072",
2363 .sensor_reset_enable = 1,
2364 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
2365 .sensor_pwd = 85,
2366 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2367 .vcm_enable = 1,
2368 .pdata = &msm_camera_device_data_rear,
2369 .flash_data = &flash_imx072,
2370 .sensor_platform_info = &imx072_sensor_7627a_info,
2371 .csi_if = 1
2372};
2373
2374static struct platform_device msm_camera_sensor_imx072 = {
2375 .name = "msm_camera_imx072",
2376 .dev = {
2377 .platform_data = &msm_camera_sensor_imx072_data,
2378 },
2379};
2380#endif
2381
2382#ifdef CONFIG_WEBCAM_OV9726
2383static struct msm_camera_sensor_platform_info ov9726_sensor_7627a_info = {
2384 .mount_angle = 90
2385};
2386
2387static struct msm_camera_sensor_flash_data flash_ov9726 = {
2388 .flash_type = MSM_CAMERA_FLASH_NONE,
2389 .flash_src = &msm_flash_src
2390};
2391
2392static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2393 .sensor_name = "ov9726",
2394 .sensor_reset_enable = 0,
2395 .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
2396 .sensor_pwd = 85,
2397 .vcm_pwd = 1,
2398 .vcm_enable = 0,
2399 .pdata = &msm_camera_device_data_front,
2400 .flash_data = &flash_ov9726,
2401 .sensor_platform_info = &ov9726_sensor_7627a_info,
2402 .csi_if = 1
2403};
2404
2405static struct platform_device msm_camera_sensor_ov9726 = {
2406 .name = "msm_camera_ov9726",
2407 .dev = {
2408 .platform_data = &msm_camera_sensor_ov9726_data,
2409 },
2410};
2411#endif
2412
2413#ifdef CONFIG_MT9E013
2414static struct msm_camera_sensor_platform_info mt9e013_sensor_7627a_info = {
2415 .mount_angle = 90
2416};
2417
2418static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2419 .flash_type = MSM_CAMERA_FLASH_LED,
2420 .flash_src = &msm_flash_src
2421};
2422
2423static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2424 .sensor_name = "mt9e013",
2425 .sensor_reset = 0,
2426 .sensor_reset_enable = 1,
2427 .sensor_pwd = 85,
2428 .vcm_pwd = 1,
2429 .vcm_enable = 0,
2430 .pdata = &msm_camera_device_data_rear,
2431 .flash_data = &flash_mt9e013,
2432 .sensor_platform_info = &mt9e013_sensor_7627a_info,
2433 .csi_if = 1
2434};
2435
2436static struct platform_device msm_camera_sensor_mt9e013 = {
2437 .name = "msm_camera_mt9e013",
2438 .dev = {
2439 .platform_data = &msm_camera_sensor_mt9e013_data,
2440 },
2441};
2442#endif
2443
2444static struct i2c_board_info i2c_camera_devices[] = {
2445 #ifdef CONFIG_S5K4E1
2446 {
2447 I2C_BOARD_INFO("s5k4e1", 0x36),
2448 },
2449 {
2450 I2C_BOARD_INFO("s5k4e1_af", 0x8c >> 1),
2451 },
2452 #endif
2453 #ifdef CONFIG_WEBCAM_OV9726
2454 {
2455 I2C_BOARD_INFO("ov9726", 0x10),
2456 },
2457 #endif
2458 #ifdef CONFIG_IMX072
2459 {
2460 I2C_BOARD_INFO("imx072", 0x34),
2461 },
2462 #endif
2463 #ifdef CONFIG_MT9E013
2464 {
2465 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2466 },
2467 #endif
2468 {
Nishant Pandit474f2252011-07-23 23:17:56 +05302469 I2C_BOARD_INFO("sc628a", 0x6E),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002470 },
2471};
2472#endif
2473#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
2474 && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
2475static struct msm_gpio uart2dm_gpios[] = {
2476 {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2477 "uart2dm_rfr_n" },
2478 {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2479 "uart2dm_cts_n" },
2480 {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2481 "uart2dm_rx" },
2482 {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2483 "uart2dm_tx" },
2484};
2485
2486static void msm7x27a_cfg_uart2dm_serial(void)
2487{
2488 int ret;
2489 ret = msm_gpios_request_enable(uart2dm_gpios,
2490 ARRAY_SIZE(uart2dm_gpios));
2491 if (ret)
2492 pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
2493}
2494#else
2495static void msm7x27a_cfg_uart2dm_serial(void) { }
2496#endif
2497
2498static struct platform_device *rumi_sim_devices[] __initdata = {
2499 &msm_device_dmov,
2500 &msm_device_smd,
2501 &smc91x_device,
2502 &msm_device_uart1,
2503 &msm_device_nand,
2504 &msm_device_uart_dm1,
2505 &msm_gsbi0_qup_i2c_device,
2506 &msm_gsbi1_qup_i2c_device,
2507};
2508
2509static struct platform_device *surf_ffa_devices[] __initdata = {
2510 &msm_device_dmov,
2511 &msm_device_smd,
2512 &msm_device_uart1,
2513 &msm_device_uart_dm1,
2514 &msm_device_uart_dm2,
2515 &msm_device_nand,
2516 &msm_gsbi0_qup_i2c_device,
2517 &msm_gsbi1_qup_i2c_device,
2518 &msm_device_otg,
2519 &msm_device_gadget_peripheral,
2520 &android_usb_device,
2521 &android_pmem_device,
2522 &android_pmem_adsp_device,
2523 &android_pmem_audio_device,
2524 &msm_device_snd,
2525 &msm_device_adspdec,
2526 &msm_fb_device,
2527 &lcdc_toshiba_panel_device,
2528 &msm_batt_device,
2529 &smsc911x_device,
2530#ifdef CONFIG_S5K4E1
2531 &msm_camera_sensor_s5k4e1,
2532#endif
2533#ifdef CONFIG_IMX072
2534 &msm_camera_sensor_imx072,
2535#endif
2536#ifdef CONFIG_WEBCAM_OV9726
2537 &msm_camera_sensor_ov9726,
2538#endif
2539#ifdef CONFIG_MT9E013
2540 &msm_camera_sensor_mt9e013,
2541#endif
2542#ifdef CONFIG_FB_MSM_MIPI_DSI
2543 &mipi_dsi_renesas_panel_device,
2544#endif
2545 &msm_kgsl_3d0,
2546#ifdef CONFIG_BT
2547 &msm_bt_power_device,
2548#endif
Santosh Sajjan6822c682011-07-26 10:49:36 +05302549#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
2550 &msm_wlan_ar6000_pm_device,
2551#endif
Manish Dewangan3a260992011-06-24 18:01:34 +05302552 &asoc_msm_pcm,
2553 &asoc_msm_dai0,
2554 &asoc_msm_dai1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002555};
2556
2557static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2558static int __init pmem_kernel_ebi1_size_setup(char *p)
2559{
2560 pmem_kernel_ebi1_size = memparse(p, NULL);
2561 return 0;
2562}
2563early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2564
2565static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2566static int __init pmem_audio_size_setup(char *p)
2567{
2568 pmem_audio_size = memparse(p, NULL);
2569 return 0;
2570}
2571early_param("pmem_audio_size", pmem_audio_size_setup);
2572
2573static void __init msm_msm7x2x_allocate_memory_regions(void)
2574{
2575 void *addr;
2576 unsigned long size;
2577
2578 size = fb_size ? : MSM_FB_SIZE;
2579 addr = alloc_bootmem_align(size, 0x1000);
2580 msm_fb_resources[0].start = __pa(addr);
2581 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2582 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2583 size, addr, __pa(addr));
2584}
2585
2586static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
2587 [MEMTYPE_SMI] = {
2588 },
2589 [MEMTYPE_EBI0] = {
2590 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2591 },
2592 [MEMTYPE_EBI1] = {
2593 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2594 },
2595};
2596
2597static void __init size_pmem_devices(void)
2598{
2599#ifdef CONFIG_ANDROID_PMEM
2600 android_pmem_adsp_pdata.size = pmem_adsp_size;
2601 android_pmem_pdata.size = pmem_mdp_size;
2602 android_pmem_audio_pdata.size = pmem_audio_size;
2603#endif
2604}
2605
2606static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2607{
2608 msm7x27a_reserve_table[p->memory_type].size += p->size;
2609}
2610
2611static void __init reserve_pmem_memory(void)
2612{
2613#ifdef CONFIG_ANDROID_PMEM
2614 reserve_memory_for(&android_pmem_adsp_pdata);
2615 reserve_memory_for(&android_pmem_pdata);
2616 reserve_memory_for(&android_pmem_audio_pdata);
2617 msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2618#endif
2619}
2620
2621static void __init msm7x27a_calculate_reserve_sizes(void)
2622{
2623 size_pmem_devices();
2624 reserve_pmem_memory();
2625}
2626
2627static int msm7x27a_paddr_to_memtype(unsigned int paddr)
2628{
2629 return MEMTYPE_EBI1;
2630}
2631
2632static struct reserve_info msm7x27a_reserve_info __initdata = {
2633 .memtype_reserve_table = msm7x27a_reserve_table,
2634 .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
2635 .paddr_to_memtype = msm7x27a_paddr_to_memtype,
2636};
2637
2638static void __init msm7x27a_reserve(void)
2639{
2640 reserve_info = &msm7x27a_reserve_info;
2641 msm_reserve();
2642}
2643
2644static void __init msm_device_i2c_init(void)
2645{
2646 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2647 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2648}
2649
2650static struct msm_panel_common_pdata mdp_pdata = {
2651 .gpio = 97,
2652 .mdp_rev = MDP_REV_303,
2653};
2654
2655#define GPIO_LCDC_BRDG_PD 128
2656#define GPIO_LCDC_BRDG_RESET_N 129
2657
2658#define LCDC_RESET_PHYS 0x90008014
2659static void __iomem *lcdc_reset_ptr;
2660
2661static unsigned mipi_dsi_gpio[] = {
2662 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2663 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2664 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2665 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2666};
2667
2668enum {
2669 DSI_SINGLE_LANE = 1,
2670 DSI_TWO_LANES,
2671};
2672
2673static int msm_fb_get_lane_config(void)
2674{
2675 int rc = DSI_TWO_LANES;
2676
2677 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
2678 rc = DSI_SINGLE_LANE;
2679 pr_info("DSI Single Lane\n");
2680 } else {
2681 pr_info("DSI Two Lanes\n");
2682 }
2683 return rc;
2684}
2685
2686static int msm_fb_dsi_client_reset(void)
2687{
2688 int rc = 0;
2689
2690 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2691 if (rc < 0) {
2692 pr_err("failed to request lcd brdg reset_n\n");
2693 return rc;
2694 }
2695
2696 rc = gpio_request(GPIO_LCDC_BRDG_PD, "lcdc_brdg_pd");
2697 if (rc < 0) {
2698 pr_err("failed to request lcd brdg pd\n");
2699 return rc;
2700 }
2701
2702 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2703 if (rc) {
2704 pr_err("Failed to enable LCDC Bridge reset enable\n");
2705 goto gpio_error;
2706 }
2707
2708 rc = gpio_tlmm_config(mipi_dsi_gpio[1], GPIO_CFG_ENABLE);
2709 if (rc) {
2710 pr_err("Failed to enable LCDC Bridge pd enable\n");
2711 goto gpio_error2;
2712 }
2713
2714 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2715 rc |= gpio_direction_output(GPIO_LCDC_BRDG_PD, 1);
2716 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2717
2718 if (!rc) {
2719 if (machine_is_msm7x27a_surf()) {
2720 lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
2721 sizeof(uint32_t));
2722
2723 if (!lcdc_reset_ptr)
2724 return 0;
2725 }
2726 return rc;
2727 } else {
2728 goto gpio_error;
2729 }
2730
2731gpio_error2:
2732 pr_err("Failed GPIO bridge pd\n");
2733 gpio_free(GPIO_LCDC_BRDG_PD);
2734
2735gpio_error:
2736 pr_err("Failed GPIO bridge reset\n");
2737 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2738 return rc;
2739}
2740
2741static const char * const msm_fb_dsi_vreg[] = {
2742 "gp2",
2743 "msme1",
2744};
2745
2746static const int msm_fb_dsi_vreg_mV[] = {
2747 2850,
2748 1800,
2749};
2750
2751static struct vreg *dsi_vreg[ARRAY_SIZE(msm_fb_dsi_vreg)];
2752static int dsi_gpio_initialized;
2753
2754static int mipi_dsi_panel_power(int on)
2755{
2756 int i, rc = 0;
2757 uint32_t lcdc_reset_cfg;
2758
2759 /* I2C-controlled GPIO Expander -init of the GPIOs very late */
2760 if (!dsi_gpio_initialized) {
2761 pmapp_disp_backlight_init();
2762
2763 rc = gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr");
2764 if (rc < 0) {
2765 pr_err("failed to request gpio_disp_pwr\n");
2766 return rc;
2767 }
2768
2769 if (machine_is_msm7x27a_surf()) {
2770 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
2771 if (rc < 0) {
2772 pr_err("failed to enable display pwr\n");
2773 goto fail_gpio1;
2774 }
2775
2776 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2777 if (rc < 0) {
2778 pr_err("failed to request gpio_bkl_en\n");
2779 goto fail_gpio1;
2780 }
2781
2782 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2783 if (rc < 0) {
2784 pr_err("failed to enable backlight\n");
2785 goto fail_gpio2;
2786 }
2787 }
2788
2789 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2790 dsi_vreg[i] = vreg_get(0, msm_fb_dsi_vreg[i]);
2791
2792 if (IS_ERR(dsi_vreg[i])) {
2793 pr_err("%s: vreg get failed with : (%ld)\n",
2794 __func__, PTR_ERR(dsi_vreg[i]));
2795 goto fail_gpio2;
2796 }
2797
2798 rc = vreg_set_level(dsi_vreg[i],
2799 msm_fb_dsi_vreg_mV[i]);
2800
2801 if (rc < 0) {
2802 pr_err("%s: set regulator level failed "
2803 "with :(%d)\n", __func__, rc);
2804 goto vreg_fail1;
2805 }
2806 }
2807 dsi_gpio_initialized = 1;
2808 }
2809
2810 if (machine_is_msm7x27a_surf()) {
2811 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
2812 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
2813 } else if (machine_is_msm7x27a_ffa()) {
2814 if (on) {
2815 /* This line drives an active low pin on FFA */
2816 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN,
2817 !on);
2818 if (rc < 0)
2819 pr_err("failed to set direction for "
2820 "display pwr\n");
2821 } else {
2822 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN,
2823 !on);
2824 rc = gpio_direction_input(GPIO_DISPLAY_PWR_EN);
2825 if (rc < 0)
2826 pr_err("failed to set direction for "
2827 "display pwr\n");
2828 }
2829 }
2830
2831 if (on) {
2832 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2833
2834 if (machine_is_msm7x27a_surf()) {
2835 lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
2836 rmb();
2837 lcdc_reset_cfg &= ~1;
2838
2839 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2840 msleep(20);
2841 wmb();
2842 lcdc_reset_cfg |= 1;
2843 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2844 } else {
2845 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2846 0);
2847 msleep(20);
2848 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2849 1);
2850 }
2851
2852 if (pmapp_disp_backlight_set_brightness(100))
2853 pr_err("backlight set brightness failed\n");
2854 } else {
2855 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 1);
2856
2857 if (pmapp_disp_backlight_set_brightness(0))
2858 pr_err("backlight set brightness failed\n");
2859 }
2860
2861 /*Configure vreg lines */
2862 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2863 if (on) {
2864 rc = vreg_enable(dsi_vreg[i]);
2865
2866 if (rc) {
2867 printk(KERN_ERR "vreg_enable: %s vreg"
2868 "operation failed\n",
2869 msm_fb_dsi_vreg[i]);
2870
2871 goto vreg_fail2;
2872 }
2873 } else {
2874 rc = vreg_disable(dsi_vreg[i]);
2875
2876 if (rc) {
2877 printk(KERN_ERR "vreg_disable: %s vreg "
2878 "operation failed\n",
2879 msm_fb_dsi_vreg[i]);
2880 goto vreg_fail2;
2881 }
2882 }
2883 }
2884
2885 return rc;
2886
2887vreg_fail2:
2888 if (on) {
2889 for (; i > 0; i--)
2890 vreg_disable(dsi_vreg[i - 1]);
2891 } else {
2892 for (; i > 0; i--)
2893 vreg_enable(dsi_vreg[i - 1]);
2894 }
2895
2896 return rc;
2897
2898vreg_fail1:
2899 for (; i > 0; i--)
2900 vreg_put(dsi_vreg[i - 1]);
2901
2902fail_gpio2:
2903 gpio_free(GPIO_BACKLIGHT_EN);
2904fail_gpio1:
2905 gpio_free(GPIO_DISPLAY_PWR_EN);
2906 dsi_gpio_initialized = 0;
2907 return rc;
2908}
2909
2910#define MDP_303_VSYNC_GPIO 97
2911
2912#ifdef CONFIG_FB_MSM_MDP303
2913static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2914 .vsync_gpio = MDP_303_VSYNC_GPIO,
2915 .dsi_power_save = mipi_dsi_panel_power,
2916 .dsi_client_reset = msm_fb_dsi_client_reset,
2917 .get_lane_config = msm_fb_get_lane_config,
2918};
2919#endif
2920
2921static void __init msm_fb_add_devices(void)
2922{
2923 msm_fb_register_device("mdp", &mdp_pdata);
2924 msm_fb_register_device("lcdc", &lcdc_pdata);
2925 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2926}
2927
2928#define MSM_EBI2_PHYS 0xa0d00000
2929#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
2930
2931static void __init msm7x27a_init_ebi2(void)
2932{
2933 uint32_t ebi2_cfg;
2934 void __iomem *ebi2_cfg_ptr;
2935
2936 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
2937 if (!ebi2_cfg_ptr)
2938 return;
2939
2940 ebi2_cfg = readl(ebi2_cfg_ptr);
2941 if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf())
2942 ebi2_cfg |= (1 << 4); /* CS2 */
2943
2944 writel(ebi2_cfg, ebi2_cfg_ptr);
2945 iounmap(ebi2_cfg_ptr);
2946
2947 /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
2948 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
2949 sizeof(uint32_t));
2950 if (!ebi2_cfg_ptr)
2951 return;
2952
2953 ebi2_cfg = readl(ebi2_cfg_ptr);
2954 if (machine_is_msm7x27a_surf())
2955 ebi2_cfg |= (1 << 31);
2956
2957 writel(ebi2_cfg, ebi2_cfg_ptr);
2958 iounmap(ebi2_cfg_ptr);
2959}
2960
2961#define ATMEL_TS_I2C_NAME "maXTouch"
2962static struct vreg *vreg_l12;
2963static struct vreg *vreg_s3;
2964
2965#define ATMEL_TS_GPIO_IRQ 82
2966
2967static int atmel_ts_power_on(bool on)
2968{
2969 int rc;
2970
2971 rc = on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2972 if (rc) {
2973 pr_err("%s: vreg %sable failed (%d)\n",
2974 __func__, on ? "en" : "dis", rc);
2975 return rc;
2976 }
2977
2978 rc = on ? vreg_enable(vreg_s3) : vreg_disable(vreg_s3);
2979 if (rc) {
2980 pr_err("%s: vreg %sable failed (%d) for S3\n",
2981 __func__, on ? "en" : "dis", rc);
2982 !on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2983 return rc;
2984 }
2985 /* vreg stabilization delay */
2986 msleep(50);
2987 return 0;
2988}
2989
2990static int atmel_ts_platform_init(struct i2c_client *client)
2991{
2992 int rc;
2993
2994 vreg_l12 = vreg_get(NULL, "gp2");
2995 if (IS_ERR(vreg_l12)) {
2996 pr_err("%s: vreg_get for L2 failed\n", __func__);
2997 return PTR_ERR(vreg_l12);
2998 }
2999
3000 rc = vreg_set_level(vreg_l12, 2850);
3001 if (rc) {
3002 pr_err("%s: vreg set level failed (%d) for l2\n",
3003 __func__, rc);
3004 goto vreg_put_l2;
3005 }
3006
3007 vreg_s3 = vreg_get(NULL, "msme1");
3008 if (IS_ERR(vreg_s3)) {
3009 pr_err("%s: vreg_get for S3 failed\n", __func__);
3010 rc = PTR_ERR(vreg_s3);
3011 goto vreg_put_l2;
3012 }
3013
3014 rc = vreg_set_level(vreg_s3, 1800);
3015 if (rc) {
3016 pr_err("%s: vreg set level failed (%d) for S3\n",
3017 __func__, rc);
3018 goto vreg_put_s3;
3019 }
3020
3021 rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3022 GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
3023 GPIO_CFG_8MA), GPIO_CFG_ENABLE);
3024 if (rc) {
3025 pr_err("%s: gpio_tlmm_config for %d failed\n",
3026 __func__, ATMEL_TS_GPIO_IRQ);
3027 goto vreg_put_s3;
3028 }
3029
3030 /* configure touchscreen interrupt gpio */
3031 rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
3032 if (rc) {
3033 pr_err("%s: unable to request gpio %d\n",
3034 __func__, ATMEL_TS_GPIO_IRQ);
3035 goto ts_gpio_tlmm_unconfig;
3036 }
3037
3038 rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
3039 if (rc < 0) {
3040 pr_err("%s: unable to set the direction of gpio %d\n",
3041 __func__, ATMEL_TS_GPIO_IRQ);
3042 goto free_ts_gpio;
3043 }
3044 return 0;
3045
3046free_ts_gpio:
3047 gpio_free(ATMEL_TS_GPIO_IRQ);
3048ts_gpio_tlmm_unconfig:
3049 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3050 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3051 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3052vreg_put_s3:
3053 vreg_put(vreg_s3);
3054vreg_put_l2:
3055 vreg_put(vreg_l12);
3056 return rc;
3057}
3058
3059static int atmel_ts_platform_exit(struct i2c_client *client)
3060{
3061 gpio_free(ATMEL_TS_GPIO_IRQ);
3062 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3063 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3064 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3065 vreg_disable(vreg_s3);
3066 vreg_put(vreg_s3);
3067 vreg_disable(vreg_l12);
3068 vreg_put(vreg_l12);
3069 return 0;
3070}
3071
3072static u8 atmel_ts_read_chg(void)
3073{
3074 return gpio_get_value(ATMEL_TS_GPIO_IRQ);
3075}
3076
3077static u8 atmel_ts_valid_interrupt(void)
3078{
3079 return !atmel_ts_read_chg();
3080}
3081
3082#define ATMEL_X_OFFSET 13
3083#define ATMEL_Y_OFFSET 0
3084
3085static struct mxt_platform_data atmel_ts_pdata = {
3086 .numtouch = 4,
3087 .init_platform_hw = atmel_ts_platform_init,
3088 .exit_platform_hw = atmel_ts_platform_exit,
3089 .power_on = atmel_ts_power_on,
3090 .display_res_x = 480,
3091 .display_res_y = 864,
3092 .min_x = ATMEL_X_OFFSET,
3093 .max_x = (505 - ATMEL_X_OFFSET),
3094 .min_y = ATMEL_Y_OFFSET,
3095 .max_y = (863 - ATMEL_Y_OFFSET),
3096 .valid_interrupt = atmel_ts_valid_interrupt,
3097 .read_chg = atmel_ts_read_chg,
3098};
3099
3100static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
3101 {
3102 I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
3103 .platform_data = &atmel_ts_pdata,
3104 .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
3105 },
3106};
3107
3108#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
3109
3110static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
3111static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
3112
3113static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
3114 ARRAY_SIZE(kp_row_gpios)] = {
3115 [KP_INDEX(0, 0)] = KEY_7,
3116 [KP_INDEX(0, 1)] = KEY_DOWN,
3117 [KP_INDEX(0, 2)] = KEY_UP,
3118 [KP_INDEX(0, 3)] = KEY_RIGHT,
3119 [KP_INDEX(0, 4)] = KEY_ENTER,
3120
3121 [KP_INDEX(1, 0)] = KEY_LEFT,
3122 [KP_INDEX(1, 1)] = KEY_SEND,
3123 [KP_INDEX(1, 2)] = KEY_1,
3124 [KP_INDEX(1, 3)] = KEY_4,
3125 [KP_INDEX(1, 4)] = KEY_CLEAR,
3126
3127 [KP_INDEX(2, 0)] = KEY_6,
3128 [KP_INDEX(2, 1)] = KEY_5,
3129 [KP_INDEX(2, 2)] = KEY_8,
3130 [KP_INDEX(2, 3)] = KEY_3,
3131 [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
3132
3133 [KP_INDEX(3, 0)] = KEY_9,
3134 [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
3135 [KP_INDEX(3, 2)] = KEY_0,
3136 [KP_INDEX(3, 3)] = KEY_2,
3137 [KP_INDEX(3, 4)] = KEY_SLEEP,
3138
3139 [KP_INDEX(4, 0)] = KEY_BACK,
3140 [KP_INDEX(4, 1)] = KEY_HOME,
3141 [KP_INDEX(4, 2)] = KEY_MENU,
3142 [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
3143 [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
3144};
3145
3146/* SURF keypad platform device information */
3147static struct gpio_event_matrix_info kp_matrix_info = {
3148 .info.func = gpio_event_matrix_func,
3149 .keymap = keymap,
3150 .output_gpios = kp_row_gpios,
3151 .input_gpios = kp_col_gpios,
3152 .noutputs = ARRAY_SIZE(kp_row_gpios),
3153 .ninputs = ARRAY_SIZE(kp_col_gpios),
3154 .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
3155 .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
3156 .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
3157 GPIOKPF_PRINT_UNMAPPED_KEYS,
3158};
3159
3160static struct gpio_event_info *kp_info[] = {
3161 &kp_matrix_info.info
3162};
3163
3164static struct gpio_event_platform_data kp_pdata = {
3165 .name = "7x27a_kp",
3166 .info = kp_info,
3167 .info_count = ARRAY_SIZE(kp_info)
3168};
3169
3170static struct platform_device kp_pdev = {
3171 .name = GPIO_EVENT_DEV_NAME,
3172 .id = -1,
3173 .dev = {
3174 .platform_data = &kp_pdata,
3175 },
3176};
3177
3178static struct msm_handset_platform_data hs_platform_data = {
3179 .hs_name = "7k_handset",
3180 .pwr_key_delay_ms = 500, /* 0 will disable end key */
3181};
3182
3183static struct platform_device hs_pdev = {
3184 .name = "msm-handset",
3185 .id = -1,
3186 .dev = {
3187 .platform_data = &hs_platform_data,
3188 },
3189};
3190
3191#define LED_GPIO_PDM 96
3192#define UART1DM_RX_GPIO 45
3193static void __init msm7x2x_init(void)
3194{
Trilok Sonia416c492011-07-22 20:20:23 +05303195 msm7x2x_misc_init();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003196
3197 /* Common functions for SURF/FFA/RUMI3 */
3198 msm_device_i2c_init();
3199 msm7x27a_init_mmc();
3200 msm7x27a_init_ebi2();
3201 msm7x27a_cfg_uart2dm_serial();
3202#ifdef CONFIG_SERIAL_MSM_HS
3203 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
3204 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
3205#endif
3206
3207 if (machine_is_msm7x27a_rumi3()) {
3208 platform_add_devices(rumi_sim_devices,
3209 ARRAY_SIZE(rumi_sim_devices));
3210 }
3211 if (machine_is_msm7x27a_surf() || machine_is_msm7x27a_ffa()) {
3212#ifdef CONFIG_USB_MSM_OTG_72K
3213 msm_otg_pdata.swfi_latency =
3214 msm7x27a_pm_data
3215 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
3216 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3217#endif
3218 msm_device_gadget_peripheral.dev.platform_data =
3219 &msm_gadget_pdata;
3220 msm7x27a_cfg_smsc911x();
3221 platform_add_devices(msm_footswitch_devices,
3222 msm_num_footswitch_devices);
3223 platform_add_devices(surf_ffa_devices,
3224 ARRAY_SIZE(surf_ffa_devices));
3225 msm_fb_add_devices();
3226#ifdef CONFIG_USB_EHCI_MSM_72K
3227 msm7x2x_init_host();
3228#endif
3229 }
3230
3231 msm_pm_set_platform_data(msm7x27a_pm_data,
3232 ARRAY_SIZE(msm7x27a_pm_data));
3233
3234#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
3235 register_i2c_devices();
3236#endif
3237#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3238 bt_power_init();
3239#endif
3240 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
3241 atmel_ts_pdata.min_x = 0;
3242 atmel_ts_pdata.max_x = 480;
3243 atmel_ts_pdata.min_y = 0;
3244 atmel_ts_pdata.max_y = 320;
3245 }
3246
3247 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
3248 atmel_ts_i2c_info,
3249 ARRAY_SIZE(atmel_ts_i2c_info));
3250
3251 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
3252 i2c_camera_devices,
3253 ARRAY_SIZE(i2c_camera_devices));
3254 platform_device_register(&kp_pdev);
3255 platform_device_register(&hs_pdev);
3256
3257 /* configure it as a pdm function*/
3258 if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
3259 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
3260 GPIO_CFG_8MA), GPIO_CFG_ENABLE))
3261 pr_err("%s: gpio_tlmm_config for %d failed\n",
3262 __func__, LED_GPIO_PDM);
3263 else
3264 platform_device_register(&led_pdev);
3265
3266#ifdef CONFIG_MSM_RPC_VIBRATOR
3267 if (machine_is_msm7x27a_ffa())
3268 msm_init_pmic_vibrator();
3269#endif
3270 /*7x25a kgsl initializations*/
3271 msm7x25a_kgsl_3d0_init();
3272}
3273
3274static void __init msm7x2x_init_early(void)
3275{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003276 msm_msm7x2x_allocate_memory_regions();
3277}
3278
3279MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
3280 .boot_params = PHYS_OFFSET + 0x100,
3281 .map_io = msm_common_io_init,
3282 .reserve = msm7x27a_reserve,
3283 .init_irq = msm_init_irq,
3284 .init_machine = msm7x2x_init,
3285 .timer = &msm_timer,
3286 .init_early = msm7x2x_init_early,
3287MACHINE_END
3288MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
3289 .boot_params = PHYS_OFFSET + 0x100,
3290 .map_io = msm_common_io_init,
3291 .reserve = msm7x27a_reserve,
3292 .init_irq = msm_init_irq,
3293 .init_machine = msm7x2x_init,
3294 .timer = &msm_timer,
3295 .init_early = msm7x2x_init_early,
3296MACHINE_END
3297MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
3298 .boot_params = PHYS_OFFSET + 0x100,
3299 .map_io = msm_common_io_init,
3300 .reserve = msm7x27a_reserve,
3301 .init_irq = msm_init_irq,
3302 .init_machine = msm7x2x_init,
3303 .timer = &msm_timer,
3304 .init_early = msm7x2x_init_early,
3305MACHINE_END