blob: 1ebb79f1650d74b2fb38407694f44f17a18771ab [file] [log] [blame]
Akira Takeuchi368dd5a2010-10-27 17:28:55 +01001/* SMP support routines.
2 *
3 * Copyright (C) 2006-2008 Panasonic Corporation
4 * All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/interrupt.h>
17#include <linux/spinlock.h>
18#include <linux/init.h>
19#include <linux/jiffies.h>
20#include <linux/cpumask.h>
21#include <linux/err.h>
22#include <linux/kernel.h>
23#include <linux/delay.h>
24#include <linux/sched.h>
25#include <linux/profile.h>
26#include <linux/smp.h>
27#include <asm/tlbflush.h>
28#include <asm/system.h>
29#include <asm/bitops.h>
30#include <asm/processor.h>
31#include <asm/bug.h>
32#include <asm/exceptions.h>
33#include <asm/hardirq.h>
34#include <asm/fpu.h>
35#include <asm/mmu_context.h>
36#include <asm/thread_info.h>
37#include <asm/cpu-regs.h>
38#include <asm/intctl-regs.h>
39#include "internal.h"
40
41#ifdef CONFIG_HOTPLUG_CPU
42#include <linux/cpu.h>
43#include <asm/cacheflush.h>
44
45static unsigned long sleep_mode[NR_CPUS];
46
47static void run_sleep_cpu(unsigned int cpu);
48static void run_wakeup_cpu(unsigned int cpu);
49#endif /* CONFIG_HOTPLUG_CPU */
50
51/*
52 * Debug Message function
53 */
54
55#undef DEBUG_SMP
56#ifdef DEBUG_SMP
57#define Dprintk(fmt, ...) printk(KERN_DEBUG fmt, ##__VA_ARGS__)
58#else
59#define Dprintk(fmt, ...) no_printk(KERN_DEBUG fmt, ##__VA_ARGS__)
60#endif
61
62/* timeout value in msec for smp_nmi_call_function. zero is no timeout. */
63#define CALL_FUNCTION_NMI_IPI_TIMEOUT 0
64
65/*
66 * Structure and data for smp_nmi_call_function().
67 */
68struct nmi_call_data_struct {
69 smp_call_func_t func;
70 void *info;
71 cpumask_t started;
72 cpumask_t finished;
73 int wait;
74 char size_alignment[0]
75 __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
76} __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
77
78static DEFINE_SPINLOCK(smp_nmi_call_lock);
79static struct nmi_call_data_struct *nmi_call_data;
80
81/*
82 * Data structures and variables
83 */
84static cpumask_t cpu_callin_map; /* Bitmask of callin CPUs */
85static cpumask_t cpu_callout_map; /* Bitmask of callout CPUs */
86cpumask_t cpu_boot_map; /* Bitmask of boot APs */
87unsigned long start_stack[NR_CPUS - 1];
88
89/*
90 * Per CPU parameters
91 */
92struct mn10300_cpuinfo cpu_data[NR_CPUS] __cacheline_aligned;
93
94static int cpucount; /* The count of boot CPUs */
95static cpumask_t smp_commenced_mask;
96cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
97
98/*
99 * Function Prototypes
100 */
101static int do_boot_cpu(int);
102static void smp_show_cpu_info(int cpu_id);
103static void smp_callin(void);
104static void smp_online(void);
105static void smp_store_cpu_info(int);
106static void smp_cpu_init(void);
107static void smp_tune_scheduling(void);
108static void send_IPI_mask(const cpumask_t *cpumask, int irq);
109static void init_ipi(void);
110
111/*
112 * IPI Initialization interrupt definitions
113 */
114static void mn10300_ipi_disable(unsigned int irq);
115static void mn10300_ipi_enable(unsigned int irq);
Thomas Gleixner3ba654672011-03-18 16:52:52 +0000116static void mn10300_ipi_chip_disable(struct irq_data *d);
117static void mn10300_ipi_chip_enable(struct irq_data *d);
118static void mn10300_ipi_ack(struct irq_data *d);
119static void mn10300_ipi_nop(struct irq_data *d);
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100120
121static struct irq_chip mn10300_ipi_type = {
122 .name = "cpu_ipi",
Thomas Gleixner3ba654672011-03-18 16:52:52 +0000123 .irq_disable = mn10300_ipi_chip_disable,
124 .irq_enable = mn10300_ipi_chip_enable,
125 .irq_ack = mn10300_ipi_ack,
126 .irq_eoi = mn10300_ipi_nop
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100127};
128
129static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id);
130static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id);
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100131
132static struct irqaction reschedule_ipi = {
133 .handler = smp_reschedule_interrupt,
134 .name = "smp reschedule IPI"
135};
136static struct irqaction call_function_ipi = {
137 .handler = smp_call_function_interrupt,
138 .name = "smp call function IPI"
139};
Mark Salter730c1fa2010-10-27 17:28:57 +0100140
141#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
142static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id);
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100143static struct irqaction local_timer_ipi = {
144 .handler = smp_ipi_timer_interrupt,
145 .flags = IRQF_DISABLED,
146 .name = "smp local timer IPI"
147};
Mark Salter730c1fa2010-10-27 17:28:57 +0100148#endif
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100149
150/**
151 * init_ipi - Initialise the IPI mechanism
152 */
153static void init_ipi(void)
154{
155 unsigned long flags;
156 u16 tmp16;
157
158 /* set up the reschedule IPI */
159 set_irq_chip_and_handler(RESCHEDULE_IPI,
160 &mn10300_ipi_type, handle_percpu_irq);
161 setup_irq(RESCHEDULE_IPI, &reschedule_ipi);
162 set_intr_level(RESCHEDULE_IPI, RESCHEDULE_GxICR_LV);
163 mn10300_ipi_enable(RESCHEDULE_IPI);
164
165 /* set up the call function IPI */
166 set_irq_chip_and_handler(CALL_FUNC_SINGLE_IPI,
167 &mn10300_ipi_type, handle_percpu_irq);
168 setup_irq(CALL_FUNC_SINGLE_IPI, &call_function_ipi);
169 set_intr_level(CALL_FUNC_SINGLE_IPI, CALL_FUNCTION_GxICR_LV);
170 mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
171
172 /* set up the local timer IPI */
Mark Salter730c1fa2010-10-27 17:28:57 +0100173#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
174 defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100175 set_irq_chip_and_handler(LOCAL_TIMER_IPI,
176 &mn10300_ipi_type, handle_percpu_irq);
177 setup_irq(LOCAL_TIMER_IPI, &local_timer_ipi);
178 set_intr_level(LOCAL_TIMER_IPI, LOCAL_TIMER_GxICR_LV);
179 mn10300_ipi_enable(LOCAL_TIMER_IPI);
Mark Salter730c1fa2010-10-27 17:28:57 +0100180#endif
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100181
182#ifdef CONFIG_MN10300_CACHE_ENABLED
183 /* set up the cache flush IPI */
184 flags = arch_local_cli_save();
185 __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(FLUSH_CACHE_GxICR_LV),
186 mn10300_low_ipi_handler);
187 GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
188 mn10300_ipi_enable(FLUSH_CACHE_IPI);
189 arch_local_irq_restore(flags);
190#endif
191
192 /* set up the NMI call function IPI */
193 flags = arch_local_cli_save();
194 GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
195 tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
196 arch_local_irq_restore(flags);
197
198 /* set up the SMP boot IPI */
199 flags = arch_local_cli_save();
200 __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(SMP_BOOT_GxICR_LV),
201 mn10300_low_ipi_handler);
202 arch_local_irq_restore(flags);
203}
204
205/**
206 * mn10300_ipi_shutdown - Shut down handling of an IPI
207 * @irq: The IPI to be shut down.
208 */
209static void mn10300_ipi_shutdown(unsigned int irq)
210{
211 unsigned long flags;
212 u16 tmp;
213
214 flags = arch_local_cli_save();
215
216 tmp = GxICR(irq);
217 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
218 tmp = GxICR(irq);
219
220 arch_local_irq_restore(flags);
221}
222
223/**
224 * mn10300_ipi_enable - Enable an IPI
225 * @irq: The IPI to be enabled.
226 */
227static void mn10300_ipi_enable(unsigned int irq)
228{
229 unsigned long flags;
230 u16 tmp;
231
232 flags = arch_local_cli_save();
233
234 tmp = GxICR(irq);
235 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
236 tmp = GxICR(irq);
237
238 arch_local_irq_restore(flags);
239}
240
Thomas Gleixner3ba654672011-03-18 16:52:52 +0000241static void mn10300_ipi_chip_enable(struct irq_data *d)
242{
243 mn10300_ipi_enable(d->irq);
244}
245
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100246/**
247 * mn10300_ipi_disable - Disable an IPI
248 * @irq: The IPI to be disabled.
249 */
250static void mn10300_ipi_disable(unsigned int irq)
251{
252 unsigned long flags;
253 u16 tmp;
254
255 flags = arch_local_cli_save();
256
257 tmp = GxICR(irq);
258 GxICR(irq) = tmp & GxICR_LEVEL;
259 tmp = GxICR(irq);
260
261 arch_local_irq_restore(flags);
262}
263
Thomas Gleixner3ba654672011-03-18 16:52:52 +0000264static void mn10300_ipi_chip_disable(struct irq_data *d)
265{
266 mn10300_ipi_disable(d->irq);
267}
268
269
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100270/**
271 * mn10300_ipi_ack - Acknowledge an IPI interrupt in the PIC
272 * @irq: The IPI to be acknowledged.
273 *
274 * Clear the interrupt detection flag for the IPI on the appropriate interrupt
275 * channel in the PIC.
276 */
Thomas Gleixner3ba654672011-03-18 16:52:52 +0000277static void mn10300_ipi_ack(struct irq_data *d)
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100278{
Thomas Gleixner3ba654672011-03-18 16:52:52 +0000279 unsigned int irq = d->irq;
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100280 unsigned long flags;
281 u16 tmp;
282
283 flags = arch_local_cli_save();
284 GxICR_u8(irq) = GxICR_DETECT;
285 tmp = GxICR(irq);
286 arch_local_irq_restore(flags);
287}
288
289/**
290 * mn10300_ipi_nop - Dummy IPI action
291 * @irq: The IPI to be acted upon.
292 */
Thomas Gleixner3ba654672011-03-18 16:52:52 +0000293static void mn10300_ipi_nop(struct irq_data *d)
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100294{
295}
296
297/**
298 * send_IPI_mask - Send IPIs to all CPUs in list
299 * @cpumask: The list of CPUs to target.
300 * @irq: The IPI request to be sent.
301 *
302 * Send the specified IPI to all the CPUs in the list, not waiting for them to
303 * finish before returning. The caller is responsible for synchronisation if
304 * that is needed.
305 */
306static void send_IPI_mask(const cpumask_t *cpumask, int irq)
307{
308 int i;
309 u16 tmp;
310
311 for (i = 0; i < NR_CPUS; i++) {
312 if (cpu_isset(i, *cpumask)) {
313 /* send IPI */
314 tmp = CROSS_GxICR(irq, i);
315 CROSS_GxICR(irq, i) =
316 tmp | GxICR_REQUEST | GxICR_DETECT;
317 tmp = CROSS_GxICR(irq, i); /* flush write buffer */
318 }
319 }
320}
321
322/**
323 * send_IPI_self - Send an IPI to this CPU.
324 * @irq: The IPI request to be sent.
325 *
326 * Send the specified IPI to the current CPU.
327 */
328void send_IPI_self(int irq)
329{
330 send_IPI_mask(cpumask_of(smp_processor_id()), irq);
331}
332
333/**
334 * send_IPI_allbutself - Send IPIs to all the other CPUs.
335 * @irq: The IPI request to be sent.
336 *
337 * Send the specified IPI to all CPUs in the system barring the current one,
338 * not waiting for them to finish before returning. The caller is responsible
339 * for synchronisation if that is needed.
340 */
341void send_IPI_allbutself(int irq)
342{
343 cpumask_t cpumask;
344
345 cpumask = cpu_online_map;
346 cpu_clear(smp_processor_id(), cpumask);
347 send_IPI_mask(&cpumask, irq);
348}
349
350void arch_send_call_function_ipi_mask(const struct cpumask *mask)
351{
352 BUG();
353 /*send_IPI_mask(mask, CALL_FUNCTION_IPI);*/
354}
355
356void arch_send_call_function_single_ipi(int cpu)
357{
358 send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_IPI);
359}
360
361/**
362 * smp_send_reschedule - Send reschedule IPI to a CPU
363 * @cpu: The CPU to target.
364 */
365void smp_send_reschedule(int cpu)
366{
367 send_IPI_mask(cpumask_of(cpu), RESCHEDULE_IPI);
368}
369
370/**
371 * smp_nmi_call_function - Send a call function NMI IPI to all CPUs
372 * @func: The function to ask to be run.
373 * @info: The context data to pass to that function.
374 * @wait: If true, wait (atomically) until function is run on all CPUs.
375 *
376 * Send a non-maskable request to all CPUs in the system, requesting them to
377 * run the specified function with the given context data, and, potentially, to
378 * wait for completion of that function on all CPUs.
379 *
380 * Returns 0 if successful, -ETIMEDOUT if we were asked to wait, but hit the
381 * timeout.
382 */
383int smp_nmi_call_function(smp_call_func_t func, void *info, int wait)
384{
385 struct nmi_call_data_struct data;
386 unsigned long flags;
387 unsigned int cnt;
388 int cpus, ret = 0;
389
390 cpus = num_online_cpus() - 1;
391 if (cpus < 1)
392 return 0;
393
394 data.func = func;
395 data.info = info;
396 data.started = cpu_online_map;
397 cpu_clear(smp_processor_id(), data.started);
398 data.wait = wait;
399 if (wait)
400 data.finished = data.started;
401
402 spin_lock_irqsave(&smp_nmi_call_lock, flags);
403 nmi_call_data = &data;
404 smp_mb();
405
406 /* Send a message to all other CPUs and wait for them to respond */
407 send_IPI_allbutself(CALL_FUNCTION_NMI_IPI);
408
409 /* Wait for response */
410 if (CALL_FUNCTION_NMI_IPI_TIMEOUT > 0) {
411 for (cnt = 0;
412 cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
413 !cpus_empty(data.started);
414 cnt++)
415 mdelay(1);
416
417 if (wait && cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT) {
418 for (cnt = 0;
419 cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
420 !cpus_empty(data.finished);
421 cnt++)
422 mdelay(1);
423 }
424
425 if (cnt >= CALL_FUNCTION_NMI_IPI_TIMEOUT)
426 ret = -ETIMEDOUT;
427
428 } else {
429 /* If timeout value is zero, wait until cpumask has been
430 * cleared */
431 while (!cpus_empty(data.started))
432 barrier();
433 if (wait)
434 while (!cpus_empty(data.finished))
435 barrier();
436 }
437
438 spin_unlock_irqrestore(&smp_nmi_call_lock, flags);
439 return ret;
440}
441
442/**
443 * stop_this_cpu - Callback to stop a CPU.
444 * @unused: Callback context (ignored).
445 */
446void stop_this_cpu(void *unused)
447{
448 static volatile int stopflag;
449 unsigned long flags;
450
451#ifdef CONFIG_GDBSTUB
452 /* In case of single stepping smp_send_stop by other CPU,
453 * clear procindebug to avoid deadlock.
454 */
455 atomic_set(&procindebug[smp_processor_id()], 0);
456#endif /* CONFIG_GDBSTUB */
457
458 flags = arch_local_cli_save();
459 cpu_clear(smp_processor_id(), cpu_online_map);
460
461 while (!stopflag)
462 cpu_relax();
463
464 cpu_set(smp_processor_id(), cpu_online_map);
465 arch_local_irq_restore(flags);
466}
467
468/**
469 * smp_send_stop - Send a stop request to all CPUs.
470 */
471void smp_send_stop(void)
472{
473 smp_nmi_call_function(stop_this_cpu, NULL, 0);
474}
475
476/**
477 * smp_reschedule_interrupt - Reschedule IPI handler
478 * @irq: The interrupt number.
479 * @dev_id: The device ID.
480 *
481 * We need do nothing here, since the scheduling will be effected on our way
482 * back through entry.S.
483 *
484 * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
485 */
486static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id)
487{
488 /* do nothing */
489 return IRQ_HANDLED;
490}
491
492/**
493 * smp_call_function_interrupt - Call function IPI handler
494 * @irq: The interrupt number.
495 * @dev_id: The device ID.
496 *
497 * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
498 */
499static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id)
500{
501 /* generic_smp_call_function_interrupt(); */
502 generic_smp_call_function_single_interrupt();
503 return IRQ_HANDLED;
504}
505
506/**
507 * smp_nmi_call_function_interrupt - Non-maskable call function IPI handler
508 */
509void smp_nmi_call_function_interrupt(void)
510{
511 smp_call_func_t func = nmi_call_data->func;
512 void *info = nmi_call_data->info;
513 int wait = nmi_call_data->wait;
514
515 /* Notify the initiating CPU that I've grabbed the data and am about to
516 * execute the function
517 */
518 smp_mb();
519 cpu_clear(smp_processor_id(), nmi_call_data->started);
520 (*func)(info);
521
522 if (wait) {
523 smp_mb();
524 cpu_clear(smp_processor_id(), nmi_call_data->finished);
525 }
526}
527
Mark Salter730c1fa2010-10-27 17:28:57 +0100528#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
529 defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100530/**
531 * smp_ipi_timer_interrupt - Local timer IPI handler
532 * @irq: The interrupt number.
533 * @dev_id: The device ID.
534 *
535 * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
536 */
537static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id)
538{
539 return local_timer_interrupt();
540}
Mark Salter730c1fa2010-10-27 17:28:57 +0100541#endif
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100542
543void __init smp_init_cpus(void)
544{
545 int i;
546 for (i = 0; i < NR_CPUS; i++) {
547 set_cpu_possible(i, true);
548 set_cpu_present(i, true);
549 }
550}
551
552/**
553 * smp_cpu_init - Initialise AP in start_secondary.
554 *
555 * For this Application Processor, set up init_mm, initialise FPU and set
556 * interrupt level 0-6 setting.
557 */
558static void __init smp_cpu_init(void)
559{
560 unsigned long flags;
561 int cpu_id = smp_processor_id();
562 u16 tmp16;
563
564 if (test_and_set_bit(cpu_id, &cpu_initialized)) {
565 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
566 for (;;)
567 local_irq_enable();
568 }
569 printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
570
571 atomic_inc(&init_mm.mm_count);
572 current->active_mm = &init_mm;
573 BUG_ON(current->mm);
574
575 enter_lazy_tlb(&init_mm, current);
576
577 /* Force FPU initialization */
578 clear_using_fpu(current);
579
580 GxICR(CALL_FUNC_SINGLE_IPI) = CALL_FUNCTION_GxICR_LV | GxICR_DETECT;
581 mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
582
583 GxICR(LOCAL_TIMER_IPI) = LOCAL_TIMER_GxICR_LV | GxICR_DETECT;
584 mn10300_ipi_enable(LOCAL_TIMER_IPI);
585
586 GxICR(RESCHEDULE_IPI) = RESCHEDULE_GxICR_LV | GxICR_DETECT;
587 mn10300_ipi_enable(RESCHEDULE_IPI);
588
589#ifdef CONFIG_MN10300_CACHE_ENABLED
590 GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
591 mn10300_ipi_enable(FLUSH_CACHE_IPI);
592#endif
593
594 mn10300_ipi_shutdown(SMP_BOOT_IRQ);
595
596 /* Set up the non-maskable call function IPI */
597 flags = arch_local_cli_save();
598 GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
599 tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
600 arch_local_irq_restore(flags);
601}
602
603/**
604 * smp_prepare_cpu_init - Initialise CPU in startup_secondary
605 *
606 * Set interrupt level 0-6 setting and init ICR of gdbstub.
607 */
608void smp_prepare_cpu_init(void)
609{
610 int loop;
611
612 /* Set the interrupt vector registers */
613 IVAR0 = EXCEP_IRQ_LEVEL0;
614 IVAR1 = EXCEP_IRQ_LEVEL1;
615 IVAR2 = EXCEP_IRQ_LEVEL2;
616 IVAR3 = EXCEP_IRQ_LEVEL3;
617 IVAR4 = EXCEP_IRQ_LEVEL4;
618 IVAR5 = EXCEP_IRQ_LEVEL5;
619 IVAR6 = EXCEP_IRQ_LEVEL6;
620
621 /* Disable all interrupts and set to priority 6 (lowest) */
622 for (loop = 0; loop < GxICR_NUM_IRQS; loop++)
623 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
624
625#ifdef CONFIG_GDBSTUB
626 /* initialise GDB-stub */
627 do {
628 unsigned long flags;
629 u16 tmp16;
630
631 flags = arch_local_cli_save();
632 GxICR(GDB_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
633 tmp16 = GxICR(GDB_NMI_IPI);
634 arch_local_irq_restore(flags);
635 } while (0);
636#endif
637}
638
639/**
640 * start_secondary - Activate a secondary CPU (AP)
641 * @unused: Thread parameter (ignored).
642 */
643int __init start_secondary(void *unused)
644{
645 smp_cpu_init();
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100646 smp_callin();
647 while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
648 cpu_relax();
649
650 local_flush_tlb();
651 preempt_disable();
652 smp_online();
653
Mark Salter730c1fa2010-10-27 17:28:57 +0100654#ifdef CONFIG_GENERIC_CLOCKEVENTS
655 init_clockevents();
656#endif
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100657 cpu_idle();
658 return 0;
659}
660
661/**
662 * smp_prepare_cpus - Boot up secondary CPUs (APs)
663 * @max_cpus: Maximum number of CPUs to boot.
664 *
665 * Call do_boot_cpu, and boot up APs.
666 */
667void __init smp_prepare_cpus(unsigned int max_cpus)
668{
669 int phy_id;
670
671 /* Setup boot CPU information */
672 smp_store_cpu_info(0);
673 smp_tune_scheduling();
674
675 init_ipi();
676
677 /* If SMP should be disabled, then finish */
678 if (max_cpus == 0) {
679 printk(KERN_INFO "SMP mode deactivated.\n");
680 goto smp_done;
681 }
682
683 /* Boot secondary CPUs (for which phy_id > 0) */
684 for (phy_id = 0; phy_id < NR_CPUS; phy_id++) {
685 /* Don't boot primary CPU */
686 if (max_cpus <= cpucount + 1)
687 continue;
688 if (phy_id != 0)
689 do_boot_cpu(phy_id);
690 set_cpu_possible(phy_id, true);
691 smp_show_cpu_info(phy_id);
692 }
693
694smp_done:
695 Dprintk("Boot done.\n");
696}
697
698/**
699 * smp_store_cpu_info - Save a CPU's information
700 * @cpu: The CPU to save for.
701 *
702 * Save boot_cpu_data and jiffy for the specified CPU.
703 */
704static void __init smp_store_cpu_info(int cpu)
705{
706 struct mn10300_cpuinfo *ci = &cpu_data[cpu];
707
708 *ci = boot_cpu_data;
709 ci->loops_per_jiffy = loops_per_jiffy;
710 ci->type = CPUREV;
711}
712
713/**
714 * smp_tune_scheduling - Set time slice value
715 *
716 * Nothing to do here.
717 */
718static void __init smp_tune_scheduling(void)
719{
720}
721
722/**
723 * do_boot_cpu: Boot up one CPU
724 * @phy_id: Physical ID of CPU to boot.
725 *
726 * Send an IPI to a secondary CPU to boot it. Returns 0 on success, 1
727 * otherwise.
728 */
729static int __init do_boot_cpu(int phy_id)
730{
731 struct task_struct *idle;
732 unsigned long send_status, callin_status;
733 int timeout, cpu_id;
734
735 send_status = GxICR_REQUEST;
736 callin_status = 0;
737 timeout = 0;
738 cpu_id = phy_id;
739
740 cpucount++;
741
742 /* Create idle thread for this CPU */
743 idle = fork_idle(cpu_id);
744 if (IS_ERR(idle))
745 panic("Failed fork for CPU#%d.", cpu_id);
746
747 idle->thread.pc = (unsigned long)start_secondary;
748
749 printk(KERN_NOTICE "Booting CPU#%d\n", cpu_id);
750 start_stack[cpu_id - 1] = idle->thread.sp;
751
752 task_thread_info(idle)->cpu = cpu_id;
753
754 /* Send boot IPI to AP */
755 send_IPI_mask(cpumask_of(phy_id), SMP_BOOT_IRQ);
756
757 Dprintk("Waiting for send to finish...\n");
758
759 /* Wait for AP's IPI receive in 100[ms] */
760 do {
761 udelay(1000);
762 send_status =
763 CROSS_GxICR(SMP_BOOT_IRQ, phy_id) & GxICR_REQUEST;
764 } while (send_status == GxICR_REQUEST && timeout++ < 100);
765
766 Dprintk("Waiting for cpu_callin_map.\n");
767
768 if (send_status == 0) {
769 /* Allow AP to start initializing */
770 cpu_set(cpu_id, cpu_callout_map);
771
772 /* Wait for setting cpu_callin_map */
773 timeout = 0;
774 do {
775 udelay(1000);
776 callin_status = cpu_isset(cpu_id, cpu_callin_map);
777 } while (callin_status == 0 && timeout++ < 5000);
778
779 if (callin_status == 0)
780 Dprintk("Not responding.\n");
781 } else {
782 printk(KERN_WARNING "IPI not delivered.\n");
783 }
784
785 if (send_status == GxICR_REQUEST || callin_status == 0) {
786 cpu_clear(cpu_id, cpu_callout_map);
787 cpu_clear(cpu_id, cpu_callin_map);
788 cpu_clear(cpu_id, cpu_initialized);
789 cpucount--;
790 return 1;
791 }
792 return 0;
793}
794
795/**
796 * smp_show_cpu_info - Show SMP CPU information
797 * @cpu: The CPU of interest.
798 */
799static void __init smp_show_cpu_info(int cpu)
800{
801 struct mn10300_cpuinfo *ci = &cpu_data[cpu];
802
803 printk(KERN_INFO
804 "CPU#%d : ioclk speed: %lu.%02luMHz : bogomips : %lu.%02lu\n",
805 cpu,
806 MN10300_IOCLK / 1000000,
807 (MN10300_IOCLK / 10000) % 100,
808 ci->loops_per_jiffy / (500000 / HZ),
809 (ci->loops_per_jiffy / (5000 / HZ)) % 100);
810}
811
812/**
813 * smp_callin - Set cpu_callin_map of the current CPU ID
814 */
815static void __init smp_callin(void)
816{
817 unsigned long timeout;
818 int cpu;
819
820 cpu = smp_processor_id();
821 timeout = jiffies + (2 * HZ);
822
823 if (cpu_isset(cpu, cpu_callin_map)) {
824 printk(KERN_ERR "CPU#%d already present.\n", cpu);
825 BUG();
826 }
827 Dprintk("CPU#%d waiting for CALLOUT\n", cpu);
828
829 /* Wait for AP startup 2s total */
830 while (time_before(jiffies, timeout)) {
831 if (cpu_isset(cpu, cpu_callout_map))
832 break;
833 cpu_relax();
834 }
835
836 if (!time_before(jiffies, timeout)) {
837 printk(KERN_ERR
838 "BUG: CPU#%d started up but did not get a callout!\n",
839 cpu);
840 BUG();
841 }
842
843#ifdef CONFIG_CALIBRATE_DELAY
844 calibrate_delay(); /* Get our bogomips */
845#endif
846
847 /* Save our processor parameters */
848 smp_store_cpu_info(cpu);
849
850 /* Allow the boot processor to continue */
851 cpu_set(cpu, cpu_callin_map);
852}
853
854/**
855 * smp_online - Set cpu_online_map
856 */
857static void __init smp_online(void)
858{
859 int cpu;
860
861 cpu = smp_processor_id();
862
863 local_irq_enable();
864
865 cpu_set(cpu, cpu_online_map);
866 smp_wmb();
867}
868
869/**
870 * smp_cpus_done -
871 * @max_cpus: Maximum CPU count.
872 *
873 * Do nothing.
874 */
875void __init smp_cpus_done(unsigned int max_cpus)
876{
877}
878
879/*
880 * smp_prepare_boot_cpu - Set up stuff for the boot processor.
881 *
882 * Set up the cpu_online_map, cpu_callout_map and cpu_callin_map of the boot
883 * processor (CPU 0).
884 */
885void __devinit smp_prepare_boot_cpu(void)
886{
887 cpu_set(0, cpu_callout_map);
888 cpu_set(0, cpu_callin_map);
889 current_thread_info()->cpu = 0;
890}
891
892/*
893 * initialize_secondary - Initialise a secondary CPU (Application Processor).
894 *
895 * Set SP register and jump to thread's PC address.
896 */
897void initialize_secondary(void)
898{
899 asm volatile (
900 "mov %0,sp \n"
901 "jmp (%1) \n"
902 :
903 : "a"(current->thread.sp), "a"(current->thread.pc));
904}
905
906/**
907 * __cpu_up - Set smp_commenced_mask for the nominated CPU
908 * @cpu: The target CPU.
909 */
910int __devinit __cpu_up(unsigned int cpu)
911{
912 int timeout;
913
914#ifdef CONFIG_HOTPLUG_CPU
915 if (num_online_cpus() == 1)
916 disable_hlt();
917 if (sleep_mode[cpu])
918 run_wakeup_cpu(cpu);
919#endif /* CONFIG_HOTPLUG_CPU */
920
921 cpu_set(cpu, smp_commenced_mask);
922
923 /* Wait 5s total for a response */
924 for (timeout = 0 ; timeout < 5000 ; timeout++) {
925 if (cpu_isset(cpu, cpu_online_map))
926 break;
927 udelay(1000);
928 }
929
930 BUG_ON(!cpu_isset(cpu, cpu_online_map));
931 return 0;
932}
933
934/**
935 * setup_profiling_timer - Set up the profiling timer
936 * @multiplier - The frequency multiplier to use
937 *
938 * The frequency of the profiling timer can be changed by writing a multiplier
939 * value into /proc/profile.
940 */
941int setup_profiling_timer(unsigned int multiplier)
942{
943 return -EINVAL;
944}
945
946/*
947 * CPU hotplug routines
948 */
949#ifdef CONFIG_HOTPLUG_CPU
950
951static DEFINE_PER_CPU(struct cpu, cpu_devices);
952
953static int __init topology_init(void)
954{
955 int cpu, ret;
956
957 for_each_cpu(cpu) {
958 ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
959 if (ret)
960 printk(KERN_WARNING
961 "topology_init: register_cpu %d failed (%d)\n",
962 cpu, ret);
963 }
964 return 0;
965}
966
967subsys_initcall(topology_init);
968
969int __cpu_disable(void)
970{
971 int cpu = smp_processor_id();
972 if (cpu == 0)
973 return -EBUSY;
974
975 migrate_irqs();
976 cpu_clear(cpu, current->active_mm->cpu_vm_mask);
977 return 0;
978}
979
980void __cpu_die(unsigned int cpu)
981{
982 run_sleep_cpu(cpu);
983
984 if (num_online_cpus() == 1)
985 enable_hlt();
986}
987
988#ifdef CONFIG_MN10300_CACHE_ENABLED
989static inline void hotplug_cpu_disable_cache(void)
990{
991 int tmp;
992 asm volatile(
993 " movhu (%1),%0 \n"
994 " and %2,%0 \n"
995 " movhu %0,(%1) \n"
996 "1: movhu (%1),%0 \n"
997 " btst %3,%0 \n"
998 " bne 1b \n"
999 : "=&r"(tmp)
1000 : "a"(&CHCTR),
1001 "i"(~(CHCTR_ICEN | CHCTR_DCEN)),
1002 "i"(CHCTR_ICBUSY | CHCTR_DCBUSY)
1003 : "memory", "cc");
1004}
1005
1006static inline void hotplug_cpu_enable_cache(void)
1007{
1008 int tmp;
1009 asm volatile(
1010 "movhu (%1),%0 \n"
1011 "or %2,%0 \n"
1012 "movhu %0,(%1) \n"
1013 : "=&r"(tmp)
1014 : "a"(&CHCTR),
1015 "i"(CHCTR_ICEN | CHCTR_DCEN)
1016 : "memory", "cc");
1017}
1018
1019static inline void hotplug_cpu_invalidate_cache(void)
1020{
1021 int tmp;
1022 asm volatile (
1023 "movhu (%1),%0 \n"
1024 "or %2,%0 \n"
1025 "movhu %0,(%1) \n"
1026 : "=&r"(tmp)
1027 : "a"(&CHCTR),
1028 "i"(CHCTR_ICINV | CHCTR_DCINV)
1029 : "cc");
1030}
1031
1032#else /* CONFIG_MN10300_CACHE_ENABLED */
1033#define hotplug_cpu_disable_cache() do {} while (0)
1034#define hotplug_cpu_enable_cache() do {} while (0)
1035#define hotplug_cpu_invalidate_cache() do {} while (0)
1036#endif /* CONFIG_MN10300_CACHE_ENABLED */
1037
1038/**
1039 * hotplug_cpu_nmi_call_function - Call a function on other CPUs for hotplug
1040 * @cpumask: List of target CPUs.
1041 * @func: The function to call on those CPUs.
1042 * @info: The context data for the function to be called.
1043 * @wait: Whether to wait for the calls to complete.
1044 *
1045 * Non-maskably call a function on another CPU for hotplug purposes.
1046 *
1047 * This function must be called with maskable interrupts disabled.
1048 */
1049static int hotplug_cpu_nmi_call_function(cpumask_t cpumask,
1050 smp_call_func_t func, void *info,
1051 int wait)
1052{
1053 /*
1054 * The address and the size of nmi_call_func_mask_data
1055 * need to be aligned on L1_CACHE_BYTES.
1056 */
1057 static struct nmi_call_data_struct nmi_call_func_mask_data
1058 __cacheline_aligned;
1059 unsigned long start, end;
1060
1061 start = (unsigned long)&nmi_call_func_mask_data;
1062 end = start + sizeof(struct nmi_call_data_struct);
1063
1064 nmi_call_func_mask_data.func = func;
1065 nmi_call_func_mask_data.info = info;
1066 nmi_call_func_mask_data.started = cpumask;
1067 nmi_call_func_mask_data.wait = wait;
1068 if (wait)
1069 nmi_call_func_mask_data.finished = cpumask;
1070
1071 spin_lock(&smp_nmi_call_lock);
1072 nmi_call_data = &nmi_call_func_mask_data;
1073 mn10300_local_dcache_flush_range(start, end);
1074 smp_wmb();
1075
1076 send_IPI_mask(cpumask, CALL_FUNCTION_NMI_IPI);
1077
1078 do {
1079 mn10300_local_dcache_inv_range(start, end);
1080 barrier();
1081 } while (!cpus_empty(nmi_call_func_mask_data.started));
1082
1083 if (wait) {
1084 do {
1085 mn10300_local_dcache_inv_range(start, end);
1086 barrier();
1087 } while (!cpus_empty(nmi_call_func_mask_data.finished));
1088 }
1089
1090 spin_unlock(&smp_nmi_call_lock);
1091 return 0;
1092}
1093
1094static void restart_wakeup_cpu(void)
1095{
1096 unsigned int cpu = smp_processor_id();
1097
1098 cpu_set(cpu, cpu_callin_map);
1099 local_flush_tlb();
1100 cpu_set(cpu, cpu_online_map);
1101 smp_wmb();
1102}
1103
1104static void prepare_sleep_cpu(void *unused)
1105{
1106 sleep_mode[smp_processor_id()] = 1;
1107 smp_mb();
1108 mn10300_local_dcache_flush_inv();
1109 hotplug_cpu_disable_cache();
1110 hotplug_cpu_invalidate_cache();
1111}
1112
1113/* when this function called, IE=0, NMID=0. */
1114static void sleep_cpu(void *unused)
1115{
1116 unsigned int cpu_id = smp_processor_id();
1117 /*
1118 * CALL_FUNCTION_NMI_IPI for wakeup_cpu() shall not be requested,
1119 * before this cpu goes in SLEEP mode.
1120 */
1121 do {
1122 smp_mb();
1123 __sleep_cpu();
1124 } while (sleep_mode[cpu_id]);
1125 restart_wakeup_cpu();
1126}
1127
1128static void run_sleep_cpu(unsigned int cpu)
1129{
1130 unsigned long flags;
1131 cpumask_t cpumask = cpumask_of(cpu);
1132
1133 flags = arch_local_cli_save();
1134 hotplug_cpu_nmi_call_function(cpumask, prepare_sleep_cpu, NULL, 1);
1135 hotplug_cpu_nmi_call_function(cpumask, sleep_cpu, NULL, 0);
1136 udelay(1); /* delay for the cpu to sleep. */
1137 arch_local_irq_restore(flags);
1138}
1139
1140static void wakeup_cpu(void)
1141{
1142 hotplug_cpu_invalidate_cache();
1143 hotplug_cpu_enable_cache();
1144 smp_mb();
1145 sleep_mode[smp_processor_id()] = 0;
1146}
1147
1148static void run_wakeup_cpu(unsigned int cpu)
1149{
1150 unsigned long flags;
1151
1152 flags = arch_local_cli_save();
1153#if NR_CPUS == 2
1154 mn10300_local_dcache_flush_inv();
1155#else
1156 /*
1157 * Before waking up the cpu,
1158 * all online cpus should stop and flush D-Cache for global data.
1159 */
1160#error not support NR_CPUS > 2, when CONFIG_HOTPLUG_CPU=y.
1161#endif
1162 hotplug_cpu_nmi_call_function(cpumask_of(cpu), wakeup_cpu, NULL, 1);
1163 arch_local_irq_restore(flags);
1164}
1165
1166#endif /* CONFIG_HOTPLUG_CPU */