| Mike Frysinger | 3c1fbd5 | 2008-11-18 17:48:22 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Blackfin cache control code (simpler control-style functions) |
| 3 | * |
| 4 | * Copyright 2004-2008 Analog Devices Inc. |
| 5 | * |
| 6 | * Enter bugs at http://blackfin.uclinux.org/ |
| 7 | * |
| 8 | * Licensed under the GPL-2 or later. |
| 9 | */ |
| 10 | |
| 11 | #include <asm/blackfin.h> |
| 12 | |
| 13 | /* Invalidate the Entire Data cache by |
| 14 | * clearing DMC[1:0] bits |
| 15 | */ |
| 16 | void blackfin_invalidate_entire_dcache(void) |
| 17 | { |
| 18 | u32 dmem = bfin_read_DMEM_CONTROL(); |
| 19 | SSYNC(); |
| 20 | bfin_write_DMEM_CONTROL(dmem & ~0xc); |
| 21 | SSYNC(); |
| 22 | bfin_write_DMEM_CONTROL(dmem); |
| 23 | SSYNC(); |
| 24 | } |