blob: 85de532eb8f34ad12169bbd94feb1b9c16cac8a0 [file] [log] [blame]
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/gpio_event.h>
Pankaj Kumar6f841742011-10-10 15:52:14 +053016#include <linux/usb/android.h>
Taniya Dasc98bfbc2011-08-23 09:58:55 +053017#include <linux/platform_device.h>
18#include <linux/io.h>
19#include <linux/gpio.h>
20#include <linux/mtd/nand.h>
21#include <linux/mtd/partitions.h>
22#include <linux/i2c.h>
23#include <linux/android_pmem.h>
24#include <linux/bootmem.h>
25#include <linux/mfd/marimba.h>
26#include <linux/power_supply.h>
Taniya Dasda408822011-09-06 12:54:06 +053027#include <linux/input/rmi_platformdata.h>
28#include <linux/input/rmi_i2c.h>
Pankaj Kumar3cec0582011-11-18 11:13:29 +053029#include <linux/regulator/consumer.h>
Taniya Dasc98bfbc2011-08-23 09:58:55 +053030#include <asm/mach/mmc.h>
31#include <asm/mach-types.h>
32#include <asm/mach/arch.h>
33#include <mach/board.h>
34#include <mach/msm_iomap.h>
35#include <mach/msm_hsusb.h>
36#include <mach/rpc_hsusb.h>
37#include <mach/rpc_pmapp.h>
38#include <mach/usbdiag.h>
39#include <mach/usb_gadget_fserial.h>
40#include <mach/msm_memtypes.h>
41#include <mach/msm_serial_hs.h>
42#include <mach/vreg.h>
43#include <mach/pmic.h>
44#include <mach/socinfo.h>
45#include <mach/vreg.h>
46#include <mach/rpc_pmapp.h>
47#include <mach/msm_battery.h>
48#include <mach/rpc_server_handset.h>
49#include <mach/socinfo.h>
50
51#include "devices.h"
52#include "devices-msm7x2xa.h"
53#include "pm.h"
54#include "timer.h"
Murali Nalajalaa1827842011-11-13 14:12:39 +053055#include "pm-boot.h"
Pankaj Kumar3cec0582011-11-18 11:13:29 +053056#include "board-msm7x27a-regulator.h"
Taniya Dasc98bfbc2011-08-23 09:58:55 +053057
58#define PMEM_KERNEL_EBI1_SIZE 0x3A000
59#define MSM_PMEM_AUDIO_SIZE 0x5B000
60#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
61#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
62#define BAHAMA_SLAVE_ID_FM_REG 0x02
63#define FM_GPIO 83
64
65enum {
66 GPIO_HOST_VBUS_EN = 107,
67 GPIO_BT_SYS_REST_EN = 114,
68 GPIO_WAKE_ON_WIRELESS,
69 GPIO_BACKLIGHT_EN,
Taniya Das7a22cdd2011-09-08 14:57:00 +053070 GPIO_NC,
71 GPIO_CAM_3MP_PWDN, /* CAM_VGA */
Taniya Dasc98bfbc2011-08-23 09:58:55 +053072 GPIO_WLAN_EN,
73 GPIO_CAM_5MP_SHDN_EN,
74 GPIO_CAM_5MP_RESET,
Taniya Das7a22cdd2011-09-08 14:57:00 +053075 GPIO_TP,
76 GPIO_CAM_GP_CAMIF_RESET,
Taniya Dasc98bfbc2011-08-23 09:58:55 +053077};
78
79 /* FM Platform power and shutdown routines */
80#define FPGA_MSM_CNTRL_REG2 0x90008010
81
82static void config_pcm_i2s_mode(int mode)
83{
84 void __iomem *cfg_ptr;
85 u8 reg2;
86
87 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
88
89 if (!cfg_ptr)
90 return;
91 if (mode) {
92 /*enable the pcm mode in FPGA*/
93 reg2 = readb_relaxed(cfg_ptr);
94 if (reg2 == 0) {
95 reg2 = 1;
96 writeb_relaxed(reg2, cfg_ptr);
97 }
98 } else {
99 /*enable i2s mode in FPGA*/
100 reg2 = readb_relaxed(cfg_ptr);
101 if (reg2 == 1) {
102 reg2 = 0;
103 writeb_relaxed(reg2, cfg_ptr);
104 }
105 }
106 iounmap(cfg_ptr);
107}
108
109static unsigned fm_i2s_config_power_on[] = {
110 /*FM_I2S_SD*/
111 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
112 /*FM_I2S_WS*/
113 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
114 /*FM_I2S_SCK*/
115 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
116};
117
118static unsigned fm_i2s_config_power_off[] = {
119 /*FM_I2S_SD*/
120 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
121 /*FM_I2S_WS*/
122 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
123 /*FM_I2S_SCK*/
124 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
125};
126
127static unsigned bt_config_power_on[] = {
128 /*RFR*/
129 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
130 /*CTS*/
131 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
132 /*RX*/
133 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
134 /*TX*/
135 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
136};
137static unsigned bt_config_pcm_on[] = {
138 /*PCM_DOUT*/
139 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
140 /*PCM_DIN*/
141 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
142 /*PCM_SYNC*/
143 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
144 /*PCM_CLK*/
145 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
146};
147static unsigned bt_config_power_off[] = {
148 /*RFR*/
149 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
150 /*CTS*/
151 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
152 /*RX*/
153 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
154 /*TX*/
155 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
156};
157static unsigned bt_config_pcm_off[] = {
158 /*PCM_DOUT*/
159 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
160 /*PCM_DIN*/
161 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
162 /*PCM_SYNC*/
163 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
164 /*PCM_CLK*/
165 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
166};
167
168
169static int config_i2s(int mode)
170{
171 int pin, rc = 0;
172
173 if (mode == FM_I2S_ON) {
174 if (machine_is_msm7627a_qrd1())
175 config_pcm_i2s_mode(0);
176 pr_err("%s mode = FM_I2S_ON", __func__);
177 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
178 pin++) {
179 rc = gpio_tlmm_config(
180 fm_i2s_config_power_on[pin],
181 GPIO_CFG_ENABLE
182 );
183 if (rc < 0)
184 return rc;
185 }
186 } else if (mode == FM_I2S_OFF) {
187 pr_err("%s mode = FM_I2S_OFF", __func__);
188 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
189 pin++) {
190 rc = gpio_tlmm_config(
191 fm_i2s_config_power_off[pin],
192 GPIO_CFG_ENABLE
193 );
194 if (rc < 0)
195 return rc;
196 }
197 }
198 return rc;
199}
200static int config_pcm(int mode)
201{
202 int pin, rc = 0;
203
204 if (mode == BT_PCM_ON) {
205 if (machine_is_msm7627a_qrd1())
206 config_pcm_i2s_mode(1);
207 pr_err("%s mode =BT_PCM_ON", __func__);
208 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
209 pin++) {
210 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
211 GPIO_CFG_ENABLE);
212 if (rc < 0)
213 return rc;
214 }
215 } else if (mode == BT_PCM_OFF) {
216 pr_err("%s mode =BT_PCM_OFF", __func__);
217 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
218 pin++) {
219 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
220 GPIO_CFG_ENABLE);
221 if (rc < 0)
222 return rc;
223 }
224
225 }
226
227 return rc;
228}
229
230static int msm_bahama_setup_pcm_i2s(int mode)
231{
232 int fm_state = 0, bt_state = 0;
233 int rc = 0;
234 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
235
236 fm_state = marimba_get_fm_status(&config);
237 bt_state = marimba_get_bt_status(&config);
238
239 switch (mode) {
240 case BT_PCM_ON:
241 case BT_PCM_OFF:
242 if (!fm_state)
243 rc = config_pcm(mode);
244 break;
245 case FM_I2S_ON:
246 rc = config_i2s(mode);
247 break;
248 case FM_I2S_OFF:
249 if (bt_state)
250 rc = config_pcm(BT_PCM_ON);
251 else
252 rc = config_i2s(mode);
253 break;
254 default:
255 rc = -EIO;
256 pr_err("%s:Unsupported mode", __func__);
257 }
258 return rc;
259}
260
261static int bt_set_gpio(int on)
262{
263 int rc = 0;
264 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
265
266 if (on) {
267 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
268 msleep(100);
269 } else {
270 if (!marimba_get_fm_status(&config) &&
271 !marimba_get_bt_status(&config)) {
272 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
273 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
274 msleep(100);
275 }
276 }
277 if (rc)
278 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
279
280 return rc;
281}
282static struct vreg *fm_regulator;
283static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
284{
285 int rc = 0;
286 const char *id = "FMPW";
287 uint32_t irqcfg;
288 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
289 u8 value;
290
291 /* Voting for 1.8V Regulator */
292 fm_regulator = vreg_get(NULL , "msme1");
293 if (IS_ERR(fm_regulator)) {
294 pr_err("%s: vreg get failed with : (%ld)\n",
295 __func__, PTR_ERR(fm_regulator));
296 return -EINVAL;
297 }
298
299 /* Set the voltage level to 1.8V */
300 rc = vreg_set_level(fm_regulator, 1800);
301 if (rc < 0) {
302 pr_err("%s: set regulator level failed with :(%d)\n",
303 __func__, rc);
304 goto fm_vreg_fail;
305 }
306
307 /* Enabling the 1.8V regulator */
308 rc = vreg_enable(fm_regulator);
309 if (rc) {
310 pr_err("%s: enable regulator failed with :(%d)\n",
311 __func__, rc);
312 goto fm_vreg_fail;
313 }
314
315 /* Voting for 19.2MHz clock */
316 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
317 PMAPP_CLOCK_VOTE_ON);
318 if (rc < 0) {
319 pr_err("%s: clock vote failed with :(%d)\n",
320 __func__, rc);
321 goto fm_clock_vote_fail;
322 }
323
324 rc = bt_set_gpio(1);
325 if (rc) {
326 pr_err("%s: bt_set_gpio = %d", __func__, rc);
327 goto fm_gpio_config_fail;
328 }
329 /*re-write FM Slave Id, after reset*/
330 value = BAHAMA_SLAVE_ID_FM_ADDR;
331 rc = marimba_write_bit_mask(&config,
332 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
333 if (rc < 0) {
334 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
335 goto fm_gpio_config_fail;
336 }
337 /* Configuring the FM GPIO */
338 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
339 GPIO_CFG_2MA);
340
341 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
342 if (rc) {
343 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
344 __func__, irqcfg, rc);
345 goto fm_gpio_config_fail;
346 }
347
348 return 0;
349
350fm_gpio_config_fail:
351 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
352 PMAPP_CLOCK_VOTE_OFF);
353 bt_set_gpio(0);
354fm_clock_vote_fail:
355 vreg_disable(fm_regulator);
356
357fm_vreg_fail:
358 vreg_put(fm_regulator);
359
360 return rc;
361};
362
363static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
364{
365 int rc;
366 const char *id = "FMPW";
367
368 /* Releasing the GPIO line used by FM */
369 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
370 GPIO_CFG_2MA);
371
372 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
373 if (rc)
374 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
375 __func__, irqcfg, rc);
376
377 /* Releasing the 1.8V Regulator */
378 if (fm_regulator != NULL) {
379 rc = vreg_disable(fm_regulator);
380 if (rc)
381 pr_err("%s: disable regulator failed:(%d)\n",
382 __func__, rc);
383 fm_regulator = NULL;
384 }
385
386 /* Voting off the clock */
387 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
388 PMAPP_CLOCK_VOTE_OFF);
389 if (rc < 0)
390 pr_err("%s: voting off failed with :(%d)\n",
391 __func__, rc);
392 rc = bt_set_gpio(0);
393 if (rc)
394 pr_err("%s: bt_set_gpio = %d", __func__, rc);
395}
396
397static struct marimba_fm_platform_data marimba_fm_pdata = {
398 .fm_setup = fm_radio_setup,
399 .fm_shutdown = fm_radio_shutdown,
400 .irq = MSM_GPIO_TO_INT(FM_GPIO),
401 .vreg_s2 = NULL,
402 .vreg_xo_out = NULL,
403 /* Configuring the FM SoC as I2S Master */
404 .is_fm_soc_i2s_master = true,
405 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
406};
407
408static struct platform_device msm_wlan_ar6000_pm_device = {
409 .name = "wlan_ar6000_pm_dev",
410 .id = -1,
411};
412
413#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
414
415static struct platform_device msm_bt_power_device = {
416 .name = "bt_power",
417};
418struct bahama_config_register {
419 u8 reg;
420 u8 value;
421 u8 mask;
422};
423struct bt_vreg_info {
424 const char *name;
425 unsigned int pmapp_id;
426 unsigned int level;
427 unsigned int is_pin_controlled;
428 struct vreg *vregs;
429};
430static struct bt_vreg_info bt_vregs[] = {
431 {"msme1", 2, 1800, 0, NULL},
432 {"bt", 21, 2900, 1, NULL}
433};
434
435static int bahama_bt(int on)
436{
437
438 int rc = 0;
439 int i;
440
441 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
442
443 struct bahama_variant_register {
444 const size_t size;
445 const struct bahama_config_register *set;
446 };
447
448 const struct bahama_config_register *p;
449
450 u8 version;
451
452 const struct bahama_config_register v10_bt_on[] = {
453 { 0xE9, 0x00, 0xFF },
454 { 0xF4, 0x80, 0xFF },
455 { 0xE4, 0x00, 0xFF },
456 { 0xE5, 0x00, 0x0F },
457#ifdef CONFIG_WLAN
458 { 0xE6, 0x38, 0x7F },
459 { 0xE7, 0x06, 0xFF },
460#endif
461 { 0xE9, 0x21, 0xFF },
462 { 0x01, 0x0C, 0x1F },
463 { 0x01, 0x08, 0x1F },
464 };
465
466 const struct bahama_config_register v20_bt_on_fm_off[] = {
467 { 0x11, 0x0C, 0xFF },
468 { 0x13, 0x01, 0xFF },
469 { 0xF4, 0x80, 0xFF },
470 { 0xF0, 0x00, 0xFF },
471 { 0xE9, 0x00, 0xFF },
472#ifdef CONFIG_WLAN
473 { 0x81, 0x00, 0x7F },
474 { 0x82, 0x00, 0xFF },
475 { 0xE6, 0x38, 0x7F },
476 { 0xE7, 0x06, 0xFF },
477#endif
478 { 0x8E, 0x15, 0xFF },
479 { 0x8F, 0x15, 0xFF },
480 { 0x90, 0x15, 0xFF },
481
482 { 0xE9, 0x21, 0xFF },
483 };
484
485 const struct bahama_config_register v20_bt_on_fm_on[] = {
486 { 0x11, 0x0C, 0xFF },
487 { 0x13, 0x01, 0xFF },
488 { 0xF4, 0x86, 0xFF },
489 { 0xF0, 0x06, 0xFF },
490 { 0xE9, 0x00, 0xFF },
491#ifdef CONFIG_WLAN
492 { 0x81, 0x00, 0x7F },
493 { 0x82, 0x00, 0xFF },
494 { 0xE6, 0x38, 0x7F },
495 { 0xE7, 0x06, 0xFF },
496#endif
497 { 0xE9, 0x21, 0xFF },
498 };
499
500 const struct bahama_config_register v10_bt_off[] = {
501 { 0xE9, 0x00, 0xFF },
502 };
503
504 const struct bahama_config_register v20_bt_off_fm_off[] = {
505 { 0xF4, 0x84, 0xFF },
506 { 0xF0, 0x04, 0xFF },
507 { 0xE9, 0x00, 0xFF }
508 };
509
510 const struct bahama_config_register v20_bt_off_fm_on[] = {
511 { 0xF4, 0x86, 0xFF },
512 { 0xF0, 0x06, 0xFF },
513 { 0xE9, 0x00, 0xFF }
514 };
515 const struct bahama_variant_register bt_bahama[2][3] = {
516 {
517 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
518 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
519 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
520 },
521 {
522 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
523 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
524 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
525 }
526 };
527
528 u8 offset = 0; /* index into bahama configs */
529 on = on ? 1 : 0;
530 version = marimba_read_bahama_ver(&config);
531 if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
532 dev_err(&msm_bt_power_device.dev, "%s: Bahama \
533 version read Error, version = %d \n",
534 __func__, version);
535 return -EIO;
536 }
537
538 if (version == BAHAMA_VER_2_0) {
539 if (marimba_get_fm_status(&config))
540 offset = 0x01;
541 }
542
543 p = bt_bahama[on][version + offset].set;
544
545 dev_info(&msm_bt_power_device.dev,
546 "%s: found version %d\n", __func__, version);
547
548 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
549 u8 value = (p+i)->value;
550 rc = marimba_write_bit_mask(&config,
551 (p+i)->reg,
552 &value,
553 sizeof((p+i)->value),
554 (p+i)->mask);
555 if (rc < 0) {
556 dev_err(&msm_bt_power_device.dev,
557 "%s: reg %x write failed: %d\n",
558 __func__, (p+i)->reg, rc);
559 return rc;
560 }
561 dev_dbg(&msm_bt_power_device.dev,
562 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
563 __func__, (p+i)->reg,
564 value, (p+i)->mask);
565 value = 0;
566 rc = marimba_read_bit_mask(&config,
567 (p+i)->reg, &value,
568 sizeof((p+i)->value), (p+i)->mask);
569 if (rc < 0)
570 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
571 __func__);
572 dev_dbg(&msm_bt_power_device.dev,
573 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
574 __func__, (p+i)->reg,
575 value, (p+i)->mask);
576 }
577 /* Update BT Status */
578 if (on)
579 marimba_set_bt_status(&config, true);
580 else
581 marimba_set_bt_status(&config, false);
582 return rc;
583}
584static int bluetooth_switch_regulators(int on)
585{
586 int i, rc = 0;
587 const char *id = "BTPW";
588
589 for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
590 if (!bt_vregs[i].vregs) {
591 pr_err("%s: vreg_get %s failed(%d)\n",
592 __func__, bt_vregs[i].name, rc);
593 goto vreg_fail;
594 }
595 rc = on ? vreg_set_level(bt_vregs[i].vregs,
596 bt_vregs[i].level) : 0;
597
598 if (rc < 0) {
599 pr_err("%s: vreg set level failed (%d)\n",
600 __func__, rc);
601 goto vreg_set_level_fail;
602 }
603 if (bt_vregs[i].is_pin_controlled == 1) {
604 rc = pmapp_vreg_pincntrl_vote(id,
605 bt_vregs[i].pmapp_id,
606 PMAPP_CLOCK_ID_D1,
607 on ? PMAPP_CLOCK_VOTE_ON :
608 PMAPP_CLOCK_VOTE_OFF);
609 } else {
610 rc = on ? vreg_enable(bt_vregs[i].vregs) :
611 vreg_disable(bt_vregs[i].vregs);
612 }
613
614 if (rc < 0) {
615 pr_err("%s: vreg %s %s failed(%d)\n",
616 __func__, bt_vregs[i].name,
617 on ? "enable" : "disable", rc);
618 goto vreg_fail;
619 }
620 }
621
622 return rc;
623
624vreg_fail:
625 while (i) {
626 if (on)
627 vreg_disable(bt_vregs[--i].vregs);
628 }
629vreg_set_level_fail:
630 vreg_put(bt_vregs[0].vregs);
631 vreg_put(bt_vregs[1].vregs);
632 return rc;
633}
634
635static unsigned int msm_bahama_setup_power(void)
636{
637 int rc = 0;
638 struct vreg *vreg_s3 = NULL;
639
640 vreg_s3 = vreg_get(NULL, "msme1");
641 if (IS_ERR(vreg_s3)) {
642 pr_err("%s: vreg get failed (%ld)\n",
643 __func__, PTR_ERR(vreg_s3));
644 return PTR_ERR(vreg_s3);
645 }
646 rc = vreg_set_level(vreg_s3, 1800);
647 if (rc < 0) {
648 pr_err("%s: vreg set level failed (%d)\n",
649 __func__, rc);
650 goto vreg_fail;
651 }
652 rc = vreg_enable(vreg_s3);
653 if (rc < 0) {
654 pr_err("%s: vreg enable failed (%d)\n",
655 __func__, rc);
656 goto vreg_fail;
657 }
658
659 /*setup Bahama_sys_reset_n*/
660 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
661 if (rc < 0) {
662 pr_err("%s: gpio_request %d = %d\n", __func__,
663 GPIO_BT_SYS_REST_EN, rc);
664 goto vreg_fail;
665 }
666 rc = bt_set_gpio(1);
667 if (rc < 0) {
668 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
669 GPIO_BT_SYS_REST_EN, rc);
670 goto gpio_fail;
671 }
672 return rc;
673
674gpio_fail:
675 gpio_free(GPIO_BT_SYS_REST_EN);
676vreg_fail:
677 vreg_put(vreg_s3);
678 return rc;
679}
680
681static unsigned int msm_bahama_shutdown_power(int value)
682{
683 int rc = 0;
684 struct vreg *vreg_s3 = NULL;
685
686 vreg_s3 = vreg_get(NULL, "msme1");
687 if (IS_ERR(vreg_s3)) {
688 pr_err("%s: vreg get failed (%ld)\n",
689 __func__, PTR_ERR(vreg_s3));
690 return PTR_ERR(vreg_s3);
691 }
692 rc = vreg_disable(vreg_s3);
693 if (rc) {
694 pr_err("%s: vreg disable failed (%d)\n",
695 __func__, rc);
696 vreg_put(vreg_s3);
697 return rc;
698 }
699 if (value == BAHAMA_ID) {
700 rc = bt_set_gpio(0);
701 if (rc) {
702 pr_err("%s: bt_set_gpio = %d\n",
703 __func__, rc);
704 }
705 }
706 return rc;
707}
708
709static unsigned int msm_bahama_core_config(int type)
710{
711 int rc = 0;
712
713 if (type == BAHAMA_ID) {
714 int i;
715 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
716 const struct bahama_config_register v20_init[] = {
717 /* reg, value, mask */
718 { 0xF4, 0x84, 0xFF }, /* AREG */
719 { 0xF0, 0x04, 0xFF } /* DREG */
720 };
721 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
722 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
723 u8 value = v20_init[i].value;
724 rc = marimba_write_bit_mask(&config,
725 v20_init[i].reg,
726 &value,
727 sizeof(v20_init[i].value),
728 v20_init[i].mask);
729 if (rc < 0) {
730 pr_err("%s: reg %d write failed: %d\n",
731 __func__, v20_init[i].reg, rc);
732 return rc;
733 }
734 pr_debug("%s: reg 0x%02x value 0x%02x"
735 " mask 0x%02x\n",
736 __func__, v20_init[i].reg,
737 v20_init[i].value, v20_init[i].mask);
738 }
739 }
740 }
741 rc = bt_set_gpio(0);
742 if (rc) {
743 pr_err("%s: bt_set_gpio = %d\n",
744 __func__, rc);
745 }
746 pr_debug("core type: %d\n", type);
747 return rc;
748}
749
750static int bluetooth_power(int on)
751{
752 int pin, rc = 0;
753 const char *id = "BTPW";
754 int cid = 0;
755
756 cid = adie_get_detected_connectivity_type();
757 if (cid != BAHAMA_ID) {
758 pr_err("%s: unexpected adie connectivity type: %d\n",
759 __func__, cid);
760 return -ENODEV;
761 }
762 if (on) {
763 /*setup power for BT SOC*/
764 rc = bt_set_gpio(on);
765 if (rc) {
766 pr_err("%s: bt_set_gpio = %d\n",
767 __func__, rc);
768 goto exit;
769 }
770 rc = bluetooth_switch_regulators(on);
771 if (rc < 0) {
772 pr_err("%s: bluetooth_switch_regulators rc = %d",
773 __func__, rc);
774 goto exit;
775 }
776 /*setup BT GPIO lines*/
777 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
778 pin++) {
779 rc = gpio_tlmm_config(bt_config_power_on[pin],
780 GPIO_CFG_ENABLE);
781 if (rc < 0) {
782 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
783 __func__,
784 bt_config_power_on[pin],
785 rc);
786 goto fail_power;
787 }
788 }
789 /*Setup BT clocks*/
790 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
791 PMAPP_CLOCK_VOTE_ON);
792 if (rc < 0) {
793 pr_err("Failed to vote for TCXO_D1 ON\n");
794 goto fail_clock;
795 }
796 msleep(20);
797
798 /*I2C config for Bahama*/
799 rc = bahama_bt(1);
800 if (rc < 0) {
801 pr_err("%s: bahama_bt rc = %d", __func__, rc);
802 goto fail_i2c;
803 }
804 msleep(20);
805
806 /*setup BT PCM lines*/
807 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
808 if (rc < 0) {
809 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
810 __func__, rc);
811 goto fail_power;
812 }
813 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
814 PMAPP_CLOCK_VOTE_PIN_CTRL);
815 if (rc < 0)
816 pr_err("%s:Pin Control Failed, rc = %d",
817 __func__, rc);
818
819 } else {
820 rc = bahama_bt(0);
821 if (rc < 0)
822 pr_err("%s: bahama_bt rc = %d", __func__, rc);
823
824 rc = bt_set_gpio(on);
825 if (rc) {
826 pr_err("%s: bt_set_gpio = %d\n",
827 __func__, rc);
828 }
829fail_i2c:
830 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
831 PMAPP_CLOCK_VOTE_OFF);
832 if (rc < 0)
833 pr_err("%s: Failed to vote Off D1\n", __func__);
834fail_clock:
835 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
836 pin++) {
837 rc = gpio_tlmm_config(bt_config_power_off[pin],
838 GPIO_CFG_ENABLE);
839 if (rc < 0) {
840 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
841 __func__, bt_config_power_off[pin], rc);
842 }
843 }
844 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
845 if (rc < 0) {
846 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
847 __func__, rc);
848 }
849fail_power:
850 rc = bluetooth_switch_regulators(0);
851 if (rc < 0) {
852 pr_err("%s: switch_regulators : rc = %d",\
853 __func__, rc);
854 goto exit;
855 }
856 }
857 return rc;
858exit:
859 pr_err("%s: failed with rc = %d", __func__, rc);
860 return rc;
861}
862
863static int __init bt_power_init(void)
864{
865 int i, rc = 0;
866 for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
867 bt_vregs[i].vregs = vreg_get(NULL,
868 bt_vregs[i].name);
869 if (IS_ERR(bt_vregs[i].vregs)) {
870 pr_err("%s: vreg get %s failed (%ld)\n",
871 __func__, bt_vregs[i].name,
872 PTR_ERR(bt_vregs[i].vregs));
873 rc = PTR_ERR(bt_vregs[i].vregs);
874 goto vreg_get_fail;
875 }
876 }
877
878 msm_bt_power_device.dev.platform_data = &bluetooth_power;
879
880 return rc;
881
882vreg_get_fail:
883 while (i)
884 vreg_put(bt_vregs[--i].vregs);
885 return rc;
886}
887
888static struct marimba_platform_data marimba_pdata = {
889 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
890 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
891 .bahama_setup = msm_bahama_setup_power,
892 .bahama_shutdown = msm_bahama_shutdown_power,
893 .bahama_core_config = msm_bahama_core_config,
894 .fm = &marimba_fm_pdata,
895};
896
897#endif
898
899#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
900static struct i2c_board_info bahama_devices[] = {
901{
902 I2C_BOARD_INFO("marimba", 0xc),
903 .platform_data = &marimba_pdata,
904},
905};
906#endif
907
908static struct msm_gpio qup_i2c_gpios_io[] = {
909 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
910 "qup_scl" },
911 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
912 "qup_sda" },
913 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
914 "qup_scl" },
915 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
916 "qup_sda" },
917};
918
919static struct msm_gpio qup_i2c_gpios_hw[] = {
920 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
921 "qup_scl" },
922 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
923 "qup_sda" },
924 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
925 "qup_scl" },
926 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
927 "qup_sda" },
928};
929
930static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
931{
932 int rc;
933
934 if (adap_id < 0 || adap_id > 1)
935 return;
936
937 /* Each adapter gets 2 lines from the table */
938 if (config_type)
939 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
940 else
941 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
942 if (rc < 0)
943 pr_err("QUP GPIO request/enable failed: %d\n", rc);
944}
945
946static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
947 .clk_freq = 100000,
948 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
949};
950
951static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
952 .clk_freq = 100000,
953 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
954};
955
956#ifdef CONFIG_ARCH_MSM7X27A
957#define MSM_PMEM_MDP_SIZE 0x1DD1000
958#define MSM_PMEM_ADSP_SIZE 0x1000000
959
960#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
961#define MSM_FB_SIZE 0x260000
962#else
963#define MSM_FB_SIZE 0x195000
964#endif
965
966#endif
967
Taniya Dasda408822011-09-06 12:54:06 +0530968#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C) || \
969defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C_MODULE)
970
971#ifndef CLEARPAD3000_ATTEN_GPIO
972#define CLEARPAD3000_ATTEN_GPIO (48)
973#endif
974
975#ifndef CLEARPAD3000_RESET_GPIO
976#define CLEARPAD3000_RESET_GPIO (26)
977#endif
978
979static int synaptics_touchpad_setup(void);
980
981static struct msm_gpio clearpad3000_cfg_data[] = {
982 {GPIO_CFG(CLEARPAD3000_ATTEN_GPIO, 0, GPIO_CFG_INPUT,
983 GPIO_CFG_NO_PULL, GPIO_CFG_6MA), "rmi4_attn"},
984 {GPIO_CFG(CLEARPAD3000_RESET_GPIO, 0, GPIO_CFG_OUTPUT,
985 GPIO_CFG_PULL_DOWN, GPIO_CFG_8MA), "rmi4_reset"},
986};
987
988static struct rmi_XY_pair rmi_offset = {.x = 0, .y = 0};
989static struct rmi_range rmi_clipx = {.min = 48, .max = 980};
990static struct rmi_range rmi_clipy = {.min = 7, .max = 1647};
991static struct rmi_f11_functiondata synaptics_f11_data = {
992 .swap_axes = false,
993 .flipX = false,
994 .flipY = false,
995 .offset = &rmi_offset,
996 .button_height = 113,
997 .clipX = &rmi_clipx,
998 .clipY = &rmi_clipy,
999};
1000
1001#define MAX_LEN 100
1002
1003static ssize_t clearpad3000_virtual_keys_register(struct kobject *kobj,
1004 struct kobj_attribute *attr, char *buf)
1005{
1006 char *virtual_keys = __stringify(EV_KEY) ":" __stringify(KEY_MENU) \
1007 ":60:830:120:60" ":" __stringify(EV_KEY) \
1008 ":" __stringify(KEY_HOME) ":180:830:120:60" \
1009 ":" __stringify(EV_KEY) ":" \
1010 __stringify(KEY_SEARCH) ":300:830:120:60" \
1011 ":" __stringify(EV_KEY) ":" \
1012 __stringify(KEY_BACK) ":420:830:120:60" "\n";
1013
1014 return snprintf(buf, strnlen(virtual_keys, MAX_LEN) + 1 , "%s",
1015 virtual_keys);
1016}
1017
1018static struct kobj_attribute clearpad3000_virtual_keys_attr = {
1019 .attr = {
1020 .name = "virtualkeys.sensor00fn11",
1021 .mode = S_IRUGO,
1022 },
1023 .show = &clearpad3000_virtual_keys_register,
1024};
1025
1026static struct attribute *virtual_key_properties_attrs[] = {
1027 &clearpad3000_virtual_keys_attr.attr,
1028 NULL
1029};
1030
1031static struct attribute_group virtual_key_properties_attr_group = {
1032 .attrs = virtual_key_properties_attrs,
1033};
1034
1035struct kobject *virtual_key_properties_kobj;
1036
1037static struct rmi_functiondata synaptics_functiondata[] = {
1038 {
1039 .function_index = RMI_F11_INDEX,
1040 .data = &synaptics_f11_data,
1041 },
1042};
1043
1044static struct rmi_functiondata_list synaptics_perfunctiondata = {
1045 .count = ARRAY_SIZE(synaptics_functiondata),
1046 .functiondata = synaptics_functiondata,
1047};
1048
1049static struct rmi_sensordata synaptics_sensordata = {
1050 .perfunctiondata = &synaptics_perfunctiondata,
1051 .rmi_sensor_setup = synaptics_touchpad_setup,
1052};
1053
1054static struct rmi_i2c_platformdata synaptics_platformdata = {
1055 .i2c_address = 0x2c,
1056 .irq_type = IORESOURCE_IRQ_LOWLEVEL,
1057 .sensordata = &synaptics_sensordata,
1058};
1059
1060static struct i2c_board_info synaptic_i2c_clearpad3k[] = {
1061 {
1062 I2C_BOARD_INFO("rmi4_ts", 0x2c),
1063 .platform_data = &synaptics_platformdata,
1064 },
1065};
1066
1067static int synaptics_touchpad_setup(void)
1068{
1069 int retval = 0;
1070
1071 virtual_key_properties_kobj =
1072 kobject_create_and_add("board_properties", NULL);
1073 if (virtual_key_properties_kobj)
1074 retval = sysfs_create_group(virtual_key_properties_kobj,
1075 &virtual_key_properties_attr_group);
1076 if (!virtual_key_properties_kobj || retval)
1077 pr_err("failed to create ft5202 board_properties\n");
1078
1079 retval = msm_gpios_request_enable(clearpad3000_cfg_data,
1080 sizeof(clearpad3000_cfg_data)/sizeof(struct msm_gpio));
1081 if (retval) {
1082 pr_err("%s:Failed to obtain touchpad GPIO %d. Code: %d.",
1083 __func__, CLEARPAD3000_ATTEN_GPIO, retval);
1084 retval = 0; /* ignore the err */
1085 }
1086 synaptics_platformdata.irq = gpio_to_irq(CLEARPAD3000_ATTEN_GPIO);
1087
1088 gpio_set_value(CLEARPAD3000_RESET_GPIO, 0);
1089 usleep(10000);
1090 gpio_set_value(CLEARPAD3000_RESET_GPIO, 1);
1091 usleep(50000);
1092
1093 return retval;
1094}
1095#endif
1096
1097
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301098static struct android_usb_platform_data android_usb_pdata = {
Pankaj Kumar6f841742011-10-10 15:52:14 +05301099 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301100};
1101
1102static struct platform_device android_usb_device = {
1103 .name = "android_usb",
1104 .id = -1,
1105 .dev = {
1106 .platform_data = &android_usb_pdata,
1107 },
1108};
1109
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301110#ifdef CONFIG_USB_EHCI_MSM_72K
1111static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1112{
1113 int rc = 0;
1114 unsigned gpio;
1115
1116 gpio = GPIO_HOST_VBUS_EN;
1117
1118 rc = gpio_request(gpio, "i2c_host_vbus_en");
1119 if (rc < 0) {
1120 pr_err("failed to request %d GPIO\n", gpio);
1121 return;
1122 }
1123 gpio_direction_output(gpio, !!on);
1124 gpio_set_value_cansleep(gpio, !!on);
1125 gpio_free(gpio);
1126}
1127
1128static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1129 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1130};
1131
1132static void __init msm7627a_init_host(void)
1133{
1134 msm_add_host(0, &msm_usb_host_pdata);
1135}
1136#endif
1137
1138#ifdef CONFIG_USB_MSM_OTG_72K
1139static int hsusb_rpc_connect(int connect)
1140{
1141 if (connect)
1142 return msm_hsusb_rpc_connect();
1143 else
1144 return msm_hsusb_rpc_close();
1145}
1146
1147static struct vreg *vreg_3p3;
1148static int msm_hsusb_ldo_init(int init)
1149{
1150 if (init) {
1151 vreg_3p3 = vreg_get(NULL, "usb");
1152 if (IS_ERR(vreg_3p3))
1153 return PTR_ERR(vreg_3p3);
1154 } else
1155 vreg_put(vreg_3p3);
1156
1157 return 0;
1158}
1159
1160static int msm_hsusb_ldo_enable(int enable)
1161{
1162 static int ldo_status;
1163
1164 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1165 return -ENODEV;
1166
1167 if (ldo_status == enable)
1168 return 0;
1169
1170 ldo_status = enable;
1171
1172 if (enable)
1173 return vreg_enable(vreg_3p3);
1174
1175 return vreg_disable(vreg_3p3);
1176}
1177
1178#ifndef CONFIG_USB_EHCI_MSM_72K
1179static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1180{
1181 int ret = 0;
1182
1183 if (init)
1184 ret = msm_pm_app_rpc_init(callback);
1185 else
1186 msm_pm_app_rpc_deinit(callback);
1187
1188 return ret;
1189}
1190#endif
1191
1192static struct msm_otg_platform_data msm_otg_pdata = {
1193#ifndef CONFIG_USB_EHCI_MSM_72K
1194 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1195#else
1196 .vbus_power = msm_hsusb_vbus_power,
1197#endif
1198 .rpc_connect = hsusb_rpc_connect,
1199 .core_clk = 1,
1200 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1201 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1202 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1203 .se1_gating = SE1_GATING_DISABLE,
1204 .ldo_init = msm_hsusb_ldo_init,
1205 .ldo_enable = msm_hsusb_ldo_enable,
1206 .chg_init = hsusb_chg_init,
1207 .chg_connected = hsusb_chg_connected,
1208 .chg_vbus_draw = hsusb_chg_vbus_draw,
1209};
1210#endif
1211
1212static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1213 .is_phy_status_timer_on = 1,
1214};
1215
1216#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1217 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1218 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1219 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1220
1221static unsigned long vreg_sts, gpio_sts;
1222static struct vreg *vreg_mmc;
1223static struct vreg *vreg_emmc;
1224
1225struct sdcc_vreg {
1226 struct vreg *vreg_data;
1227 unsigned level;
1228};
1229
1230static struct sdcc_vreg sdcc_vreg_data[4];
1231
1232struct sdcc_gpio {
1233 struct msm_gpio *cfg_data;
1234 uint32_t size;
1235 struct msm_gpio *sleep_cfg_data;
1236};
1237
1238/**
1239 * Due to insufficient drive strengths for SDC GPIO lines some old versioned
1240 * SD/MMC cards may cause data CRC errors. Hence, set optimal values
1241 * for SDC slots based on timing closure and marginality. SDC1 slot
1242 * require higher value since it should handle bad signal quality due
1243 * to size of T-flash adapters.
1244 */
1245static struct msm_gpio sdc1_cfg_data[] = {
1246 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
1247 "sdc1_dat_3"},
1248 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
1249 "sdc1_dat_2"},
1250 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
1251 "sdc1_dat_1"},
1252 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
1253 "sdc1_dat_0"},
1254 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
1255 "sdc1_cmd"},
1256 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_14MA),
1257 "sdc1_clk"},
1258};
1259
1260static struct msm_gpio sdc2_cfg_data[] = {
1261 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1262 "sdc2_clk"},
1263 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1264 "sdc2_cmd"},
1265 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1266 "sdc2_dat_3"},
1267 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1268 "sdc2_dat_2"},
1269 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1270 "sdc2_dat_1"},
1271 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1272 "sdc2_dat_0"},
1273};
1274
1275static struct msm_gpio sdc2_sleep_cfg_data[] = {
1276 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1277 "sdc2_clk"},
1278 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1279 "sdc2_cmd"},
1280 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1281 "sdc2_dat_3"},
1282 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1283 "sdc2_dat_2"},
1284 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1285 "sdc2_dat_1"},
1286 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1287 "sdc2_dat_0"},
1288};
1289static struct msm_gpio sdc3_cfg_data[] = {
1290 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1291 "sdc3_clk"},
1292 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1293 "sdc3_cmd"},
1294 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1295 "sdc3_dat_3"},
1296 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1297 "sdc3_dat_2"},
1298 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1299 "sdc3_dat_1"},
1300 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1301 "sdc3_dat_0"},
1302#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1303 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1304 "sdc3_dat_7"},
1305 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1306 "sdc3_dat_6"},
1307 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1308 "sdc3_dat_5"},
1309 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1310 "sdc3_dat_4"},
1311#endif
1312};
1313
1314static struct msm_gpio sdc4_cfg_data[] = {
1315 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1316 "sdc4_dat_3"},
1317 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1318 "sdc4_dat_2"},
1319 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1320 "sdc4_dat_1"},
1321 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1322 "sdc4_cmd"},
1323 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1324 "sdc4_dat_0"},
1325 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1326 "sdc4_clk"},
1327};
1328
1329static struct sdcc_gpio sdcc_cfg_data[] = {
1330 {
1331 .cfg_data = sdc1_cfg_data,
1332 .size = ARRAY_SIZE(sdc1_cfg_data),
1333 },
1334 {
1335 .cfg_data = sdc2_cfg_data,
1336 .size = ARRAY_SIZE(sdc2_cfg_data),
1337 .sleep_cfg_data = sdc2_sleep_cfg_data,
1338 },
1339 {
1340 .cfg_data = sdc3_cfg_data,
1341 .size = ARRAY_SIZE(sdc3_cfg_data),
1342 },
1343 {
1344 .cfg_data = sdc4_cfg_data,
1345 .size = ARRAY_SIZE(sdc4_cfg_data),
1346 },
1347};
1348
1349static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1350{
1351 int rc = 0;
1352 struct sdcc_gpio *curr;
1353
1354 curr = &sdcc_cfg_data[dev_id - 1];
1355 if (!(test_bit(dev_id, &gpio_sts)^enable))
1356 return rc;
1357
1358 if (enable) {
1359 set_bit(dev_id, &gpio_sts);
1360 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1361 if (rc)
1362 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1363 __func__, dev_id);
1364 } else {
1365 clear_bit(dev_id, &gpio_sts);
1366 if (curr->sleep_cfg_data) {
1367 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1368 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1369 return rc;
1370 }
1371 msm_gpios_disable_free(curr->cfg_data, curr->size);
1372 }
1373 return rc;
1374}
1375
1376static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1377{
1378 int rc = 0;
1379 struct sdcc_vreg *curr;
1380
1381 curr = &sdcc_vreg_data[dev_id - 1];
1382
1383 if (!(test_bit(dev_id, &vreg_sts)^enable))
1384 return rc;
1385
1386 if (enable) {
1387 set_bit(dev_id, &vreg_sts);
1388 rc = vreg_set_level(curr->vreg_data, curr->level);
1389 if (rc)
1390 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1391
1392 rc = vreg_enable(curr->vreg_data);
1393 if (rc)
1394 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1395 } else {
1396 clear_bit(dev_id, &vreg_sts);
1397 rc = vreg_disable(curr->vreg_data);
1398 if (rc)
1399 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1400 }
1401 return rc;
1402}
1403
1404static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1405{
1406 int rc = 0;
1407 struct platform_device *pdev;
1408
1409 pdev = container_of(dv, struct platform_device, dev);
1410
1411 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1412 if (rc)
1413 goto out;
1414
1415 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1416out:
1417 return rc;
1418}
1419
Sujit Reddy Thumma535c9e32011-10-28 09:45:33 +05301420#define GPIO_SDC1_HW_DET 42
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301421
1422#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1423 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1424static unsigned int msm7627a_sdcc_slot_status(struct device *dev)
1425{
1426 int status;
1427
1428 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1429 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1430 if (status)
1431 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1432 GPIO_SDC1_HW_DET);
1433
1434 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1435 if (status) {
1436 pr_err("%s:Failed to request GPIO %d\n", __func__,
1437 GPIO_SDC1_HW_DET);
1438 } else {
1439 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1440 if (!status)
Sujit Reddy Thumma535c9e32011-10-28 09:45:33 +05301441 status = !gpio_get_value(GPIO_SDC1_HW_DET);
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301442 gpio_free(GPIO_SDC1_HW_DET);
1443 }
1444 return status;
1445}
1446#endif
1447
1448#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1449static struct mmc_platform_data sdc1_plat_data = {
1450 .ocr_mask = MMC_VDD_28_29,
1451 .translate_vdd = msm_sdcc_setup_power,
1452 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1453 .msmsdcc_fmin = 144000,
1454 .msmsdcc_fmid = 24576000,
1455 .msmsdcc_fmax = 49152000,
1456#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1457 .status = msm7627a_sdcc_slot_status,
1458 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1459 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1460#endif
1461};
1462#endif
1463
1464#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1465static struct mmc_platform_data sdc2_plat_data = {
1466 /*
1467 * SDC2 supports only 1.8V, claim for 2.85V range is just
1468 * for allowing buggy cards who advertise 2.8V even though
1469 * they can operate at 1.8V supply.
1470 */
1471 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1472 .translate_vdd = msm_sdcc_setup_power,
1473 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1474#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1475 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1476#endif
1477 .msmsdcc_fmin = 144000,
1478 .msmsdcc_fmid = 24576000,
1479 .msmsdcc_fmax = 49152000,
1480#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1481 .dummy52_required = 1,
1482#endif
1483};
1484#endif
1485
1486#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1487static struct mmc_platform_data sdc3_plat_data = {
1488 .ocr_mask = MMC_VDD_28_29,
1489 .translate_vdd = msm_sdcc_setup_power,
1490#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1491 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1492#else
1493 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1494#endif
1495 .msmsdcc_fmin = 144000,
1496 .msmsdcc_fmid = 24576000,
1497 .msmsdcc_fmax = 49152000,
1498 .nonremovable = 1,
1499};
1500#endif
1501
1502#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1503 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1504static struct mmc_platform_data sdc4_plat_data = {
1505 .ocr_mask = MMC_VDD_28_29,
1506 .translate_vdd = msm_sdcc_setup_power,
1507 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1508 .msmsdcc_fmin = 144000,
1509 .msmsdcc_fmid = 24576000,
1510 .msmsdcc_fmax = 49152000,
1511};
1512#endif
1513#endif
1514
1515#ifdef CONFIG_SERIAL_MSM_HS
1516static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1517 .inject_rx_on_wakeup = 1,
1518 .rx_to_inject = 0xFD,
1519};
1520#endif
1521static struct msm_pm_platform_data msm7627a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1522 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1523 .idle_supported = 1,
1524 .suspend_supported = 1,
1525 .idle_enabled = 1,
1526 .suspend_enabled = 1,
1527 .latency = 16000,
1528 .residency = 20000,
1529 },
1530 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1531 .idle_supported = 1,
1532 .suspend_supported = 1,
1533 .idle_enabled = 1,
1534 .suspend_enabled = 1,
1535 .latency = 12000,
1536 .residency = 20000,
1537 },
1538 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1539 .idle_supported = 1,
1540 .suspend_supported = 1,
1541 .idle_enabled = 0,
1542 .suspend_enabled = 1,
1543 .latency = 2000,
1544 .residency = 0,
1545 },
1546 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1547 .idle_supported = 1,
1548 .suspend_supported = 1,
1549 .idle_enabled = 1,
1550 .suspend_enabled = 1,
1551 .latency = 2,
1552 .residency = 0,
1553 },
1554};
1555
1556static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1557 .name = "pmem_adsp",
1558 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1559 .cached = 1,
1560 .memory_type = MEMTYPE_EBI1,
1561};
1562
1563static struct platform_device android_pmem_adsp_device = {
1564 .name = "android_pmem",
1565 .id = 1,
1566 .dev = { .platform_data = &android_pmem_adsp_pdata },
1567};
1568
1569static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1570static int __init pmem_mdp_size_setup(char *p)
1571{
1572 pmem_mdp_size = memparse(p, NULL);
1573 return 0;
1574}
1575
1576early_param("pmem_mdp_size", pmem_mdp_size_setup);
1577
1578static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1579static int __init pmem_adsp_size_setup(char *p)
1580{
1581 pmem_adsp_size = memparse(p, NULL);
1582 return 0;
1583}
1584
1585early_param("pmem_adsp_size", pmem_adsp_size_setup);
1586
1587static unsigned fb_size = MSM_FB_SIZE;
1588static int __init fb_size_setup(char *p)
1589{
1590 fb_size = memparse(p, NULL);
1591 return 0;
1592}
1593
1594early_param("fb_size", fb_size_setup);
1595
Taniya Das0a5303a2011-08-23 18:47:48 +05301596static struct resource msm_fb_resources[] = {
1597 {
1598 .flags = IORESOURCE_DMA,
1599 }
1600};
1601
1602static int msm_fb_detect_panel(const char *name)
1603{
1604 int ret;
1605
1606 if (!strncmp(name, "mipi_video_truly_wvga", 21))
1607 ret = 0;
1608 else
1609 ret = -ENODEV;
1610
1611 return ret;
1612}
1613
1614static int mipi_truly_set_bl(int on)
1615{
1616 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, !!on);
1617
1618 return 1;
1619}
1620
1621static struct msm_fb_platform_data msm_fb_pdata = {
1622 .detect_client = msm_fb_detect_panel,
1623};
1624
1625static struct platform_device msm_fb_device = {
1626 .name = "msm_fb",
1627 .id = 0,
1628 .num_resources = ARRAY_SIZE(msm_fb_resources),
1629 .resource = msm_fb_resources,
1630 .dev = {
1631 .platform_data = &msm_fb_pdata,
1632 }
1633};
1634
1635static struct msm_panel_common_pdata mipi_truly_pdata = {
1636 .pmic_backlight = mipi_truly_set_bl,
1637};
1638
1639static struct platform_device mipi_dsi_truly_panel_device = {
1640 .name = "mipi_truly",
1641 .id = 0,
1642 .dev = {
1643 .platform_data = &mipi_truly_pdata,
1644 }
1645};
1646
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301647static void __init msm7627a_init_mmc(void)
1648{
1649 vreg_emmc = vreg_get(NULL, "emmc");
1650 if (IS_ERR(vreg_emmc)) {
1651 pr_err("%s: vreg get failed (%ld)\n",
1652 __func__, PTR_ERR(vreg_emmc));
1653 return;
1654 }
1655
1656 vreg_mmc = vreg_get(NULL, "mmc");
1657 if (IS_ERR(vreg_mmc)) {
1658 pr_err("%s: vreg get failed (%ld)\n",
1659 __func__, PTR_ERR(vreg_mmc));
1660 return;
1661 }
1662
1663 /* eMMC slot */
1664#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1665 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1666 sdcc_vreg_data[2].level = 3000;
1667 msm_add_sdcc(3, &sdc3_plat_data);
1668#endif
1669 /* Micro-SD slot */
1670#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1671 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1672 sdcc_vreg_data[0].level = 2850;
1673 msm_add_sdcc(1, &sdc1_plat_data);
1674#endif
1675 /* SDIO WLAN slot */
1676#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1677 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1678 sdcc_vreg_data[1].level = 2850;
1679 msm_add_sdcc(2, &sdc2_plat_data);
1680#endif
1681 /* Not Used */
1682#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1683 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1684 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1685 sdcc_vreg_data[3].level = 2850;
1686 msm_add_sdcc(4, &sdc4_plat_data);
1687#endif
1688}
1689
1690#define SND(desc, num) { .name = #desc, .id = num }
1691static struct snd_endpoint snd_endpoints_list[] = {
1692 SND(HANDSET, 0),
1693 SND(MONO_HEADSET, 2),
1694 SND(HEADSET, 3),
1695 SND(SPEAKER, 6),
1696 SND(TTY_HEADSET, 8),
1697 SND(TTY_VCO, 9),
1698 SND(TTY_HCO, 10),
1699 SND(BT, 12),
1700 SND(IN_S_SADC_OUT_HANDSET, 16),
1701 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1702 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1703 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1704 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
Shashi Kumar64e07602011-10-11 13:18:57 +05301705 SND(STEREO_HEADSET_AND_SPEAKER, 31),
Phani Kumar Alladad6971252011-10-19 10:50:15 +05301706 SND(CURRENT, 0x7FFFFFFE),
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301707 SND(FM_ANALOG_STEREO_HEADSET, 35),
1708 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1709};
1710#undef SND
1711
1712static struct msm_snd_endpoints msm_device_snd_endpoints = {
1713 .endpoints = snd_endpoints_list,
1714 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1715};
1716
1717static struct platform_device msm_device_snd = {
1718 .name = "msm_snd",
1719 .id = -1,
1720 .dev = {
1721 .platform_data = &msm_device_snd_endpoints
1722 },
1723};
1724
1725#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1726 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1727 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1728 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1729 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1730 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1731#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1732 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1733 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1734 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1735 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1736 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1737#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1738 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1739 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1740 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1741 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1742 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1743#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1744 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1745 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1746 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1747 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1748 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1749#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1750
1751static unsigned int dec_concurrency_table[] = {
1752 /* Audio LP */
1753 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1754 0, 0, 0,
1755
1756 /* Concurrency 1 */
1757 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1758 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1759 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1760 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1761 (DEC4_FORMAT),
1762
1763 /* Concurrency 2 */
1764 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1765 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1766 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1767 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1768 (DEC4_FORMAT),
1769
1770 /* Concurrency 3 */
1771 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1772 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1773 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1774 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1775 (DEC4_FORMAT),
1776
1777 /* Concurrency 4 */
1778 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1779 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1780 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1781 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1782 (DEC4_FORMAT),
1783
1784 /* Concurrency 5 */
1785 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1786 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1787 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1788 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1789 (DEC4_FORMAT),
1790
1791 /* Concurrency 6 */
1792 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1793 0, 0, 0, 0,
1794
1795 /* Concurrency 7 */
1796 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1797 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1798 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1799 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1800 (DEC4_FORMAT),
1801};
1802
1803#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1804 .module_queueid = queueid, .module_decid = decid, \
1805 .nr_codec_support = nr_codec}
1806
1807static struct msm_adspdec_info dec_info_list[] = {
1808 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1809 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1810 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1811 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1812 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1813};
1814
1815static struct msm_adspdec_database msm_device_adspdec_database = {
1816 .num_dec = ARRAY_SIZE(dec_info_list),
1817 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
1818 ARRAY_SIZE(dec_info_list)),
1819 .dec_concurrency_table = dec_concurrency_table,
1820 .dec_info_list = dec_info_list,
1821};
1822
1823static struct platform_device msm_device_adspdec = {
1824 .name = "msm_adspdec",
1825 .id = -1,
1826 .dev = {
1827 .platform_data = &msm_device_adspdec_database
1828 },
1829};
1830
1831static struct android_pmem_platform_data android_pmem_audio_pdata = {
1832 .name = "pmem_audio",
1833 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1834 .cached = 0,
1835 .memory_type = MEMTYPE_EBI1,
1836};
1837
1838static struct platform_device android_pmem_audio_device = {
1839 .name = "android_pmem",
1840 .id = 2,
1841 .dev = { .platform_data = &android_pmem_audio_pdata },
1842};
1843
1844static struct android_pmem_platform_data android_pmem_pdata = {
1845 .name = "pmem",
1846 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1847 .cached = 1,
1848 .memory_type = MEMTYPE_EBI1,
1849};
1850static struct platform_device android_pmem_device = {
1851 .name = "android_pmem",
1852 .id = 0,
1853 .dev = { .platform_data = &android_pmem_pdata },
1854};
1855
1856static u32 msm_calculate_batt_capacity(u32 current_voltage);
1857
1858static struct msm_psy_batt_pdata msm_psy_batt_data = {
1859 .voltage_min_design = 2800,
1860 .voltage_max_design = 4300,
1861 .avail_chg_sources = AC_CHG | USB_CHG ,
1862 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
1863 .calculate_capacity = &msm_calculate_batt_capacity,
1864};
1865
1866static u32 msm_calculate_batt_capacity(u32 current_voltage)
1867{
1868 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
1869 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
1870
1871 return (current_voltage - low_voltage) * 100
1872 / (high_voltage - low_voltage);
1873}
1874
1875static struct platform_device msm_batt_device = {
1876 .name = "msm-battery",
1877 .id = -1,
1878 .dev.platform_data = &msm_psy_batt_data,
1879};
1880
Taniya Das7a22cdd2011-09-08 14:57:00 +05301881#ifdef CONFIG_MSM_CAMERA
1882static uint32_t camera_off_gpio_table[] = {
1883 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1884};
1885
1886static uint32_t camera_on_gpio_table[] = {
1887 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1888};
1889
1890static void qrd1_camera_gpio_cfg(void)
1891{
1892
1893 int rc = 0;
1894
1895 rc = gpio_request(GPIO_CAM_5MP_SHDN_EN, "ov5640");
1896 if (rc < 0)
1897 pr_err("%s: gpio_request---GPIO_CAM_5MP_SHDN_EN failed!",
1898 __func__);
1899
1900
1901 rc = gpio_tlmm_config(GPIO_CFG(GPIO_CAM_5MP_SHDN_EN, 0,
1902 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
1903 GPIO_CFG_2MA), GPIO_CFG_ENABLE);
1904 if (rc < 0) {
1905 pr_err("%s: unable to enable Power Down gpio for main"
1906 "camera!\n", __func__);
1907 gpio_free(GPIO_CAM_5MP_SHDN_EN);
1908 }
1909
1910
1911 rc = gpio_request(GPIO_CAM_5MP_RESET, "ov5640");
1912 if (rc < 0) {
1913 pr_err("%s: gpio_request---GPIO_CAM_5MP_RESET failed!",
1914 __func__);
1915 gpio_free(GPIO_CAM_5MP_SHDN_EN);
1916 }
1917
1918
1919 rc = gpio_tlmm_config(GPIO_CFG(GPIO_CAM_5MP_RESET, 0,
1920 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
1921 GPIO_CFG_2MA), GPIO_CFG_ENABLE);
1922 if (rc < 0) {
1923 pr_err("%s: unable to enable reset gpio for main camera!\n",
1924 __func__);
1925 gpio_free(GPIO_CAM_5MP_RESET);
1926 }
1927
1928 rc = gpio_request(GPIO_CAM_3MP_PWDN, "ov7692");
1929 if (rc < 0)
1930 pr_err("%s: gpio_request---GPIO_CAM_3MP_PWDN failed!",
1931 __func__);
1932
1933 rc = gpio_tlmm_config(GPIO_CFG(GPIO_CAM_3MP_PWDN, 0,
1934 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
1935 GPIO_CFG_2MA), GPIO_CFG_ENABLE);
1936 if (rc < 0) {
1937 pr_err("%s: unable to enable Power Down gpio for front"
1938 "camera!\n", __func__);
1939 gpio_free(GPIO_CAM_3MP_PWDN);
1940 }
1941
1942 gpio_direction_output(GPIO_CAM_5MP_SHDN_EN, 1);
1943 gpio_direction_output(GPIO_CAM_5MP_RESET, 1);
1944 gpio_direction_output(GPIO_CAM_3MP_PWDN, 1);
1945}
1946
1947#endif
1948static struct vreg *vreg_gp1;
1949static struct vreg *vreg_gp2;
1950static struct vreg *vreg_gp3;
1951static void msm_camera_vreg_config(int vreg_en)
1952{
1953 int rc;
1954
1955 if (vreg_gp1 == NULL) {
1956 vreg_gp1 = vreg_get(NULL, "msme1");
1957 if (IS_ERR(vreg_gp1)) {
1958 pr_err("%s: vreg_get(%s) failed (%ld)\n",
1959 __func__, "msme1", PTR_ERR(vreg_gp1));
1960 return;
1961 }
1962
1963 rc = vreg_set_level(vreg_gp1, 1800);
1964 if (rc) {
1965 pr_err("%s: GP1 set_level failed (%d)\n",
1966 __func__, rc);
1967 return;
1968 }
1969 }
1970
1971 if (vreg_gp2 == NULL) {
1972 vreg_gp2 = vreg_get(NULL, "gp2");
1973 if (IS_ERR(vreg_gp2)) {
1974 pr_err("%s: vreg_get(%s) failed (%ld)\n",
1975 __func__, "gp2", PTR_ERR(vreg_gp2));
1976 return;
1977 }
1978
1979 rc = vreg_set_level(vreg_gp2, 2850);
1980 if (rc) {
1981 pr_err("%s: GP2 set_level failed (%d)\n",
1982 __func__, rc);
1983 }
1984 }
1985
1986 if (vreg_gp3 == NULL) {
1987 vreg_gp3 = vreg_get(NULL, "usb2");
1988 if (IS_ERR(vreg_gp3)) {
1989 pr_err("%s: vreg_get(%s) failed (%ld)\n",
1990 __func__, "gp3", PTR_ERR(vreg_gp3));
1991 return;
1992 }
1993
1994 rc = vreg_set_level(vreg_gp3, 1800);
1995 if (rc) {
1996 pr_err("%s: GP3 set level failed (%d)\n",
1997 __func__, rc);
1998 }
1999 }
2000
2001 if (vreg_en) {
2002 rc = vreg_enable(vreg_gp1);
2003 if (rc) {
2004 pr_err("%s: GP1 enable failed (%d)\n",
2005 __func__, rc);
2006 return;
2007 }
2008
2009 rc = vreg_enable(vreg_gp2);
2010 if (rc) {
2011 pr_err("%s: GP2 enable failed (%d)\n",
2012 __func__, rc);
2013 }
2014
2015 rc = vreg_enable(vreg_gp3);
2016 if (rc) {
2017 pr_err("%s: GP3 enable failed (%d)\n",
2018 __func__, rc);
2019 }
2020 } else {
2021 rc = vreg_disable(vreg_gp1);
2022 if (rc)
2023 pr_err("%s: GP1 disable failed (%d)\n",
2024 __func__, rc);
2025
2026 rc = vreg_disable(vreg_gp2);
2027 if (rc) {
2028 pr_err("%s: GP2 disable failed (%d)\n",
2029 __func__, rc);
2030 }
2031
2032 rc = vreg_disable(vreg_gp3);
2033 if (rc) {
2034 pr_err("%s: GP3 disable failed (%d)\n",
2035 __func__, rc);
2036 }
2037 }
2038}
2039
2040static int config_gpio_table(uint32_t *table, int len)
2041{
2042 int rc = 0, i = 0;
2043
2044 for (i = 0; i < len; i++) {
2045 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2046 if (rc) {
2047 pr_err("%s not able to get gpio\n", __func__);
2048 for (i--; i >= 0; i--)
2049 gpio_tlmm_config(camera_off_gpio_table[i],
2050 GPIO_CFG_ENABLE);
2051 break;
2052 }
2053 }
2054 return rc;
2055}
2056
2057static int config_camera_on_gpios_rear(void)
2058{
2059 int rc = 0;
2060
2061 msm_camera_vreg_config(1);
2062
2063 rc = config_gpio_table(camera_on_gpio_table,
2064 ARRAY_SIZE(camera_on_gpio_table));
2065 if (rc < 0) {
2066 pr_err("%s: CAMSENSOR gpio table request"
2067 "failed\n", __func__);
2068 return rc;
2069 }
2070
2071 return rc;
2072}
2073
2074static void config_camera_off_gpios_rear(void)
2075{
2076 msm_camera_vreg_config(0);
2077 config_gpio_table(camera_off_gpio_table,
2078 ARRAY_SIZE(camera_off_gpio_table));
2079}
2080
2081static int config_camera_on_gpios_front(void)
2082{
2083 int rc = 0;
2084
2085 msm_camera_vreg_config(1);
2086
2087 rc = config_gpio_table(camera_on_gpio_table,
2088 ARRAY_SIZE(camera_on_gpio_table));
2089 if (rc < 0) {
2090 pr_err("%s: CAMSENSOR gpio table request"
2091 "failed\n", __func__);
2092 return rc;
2093 }
2094
2095 return rc;
2096}
2097
2098static void config_camera_off_gpios_front(void)
2099{
2100 msm_camera_vreg_config(0);
2101
2102 config_gpio_table(camera_off_gpio_table,
2103 ARRAY_SIZE(camera_off_gpio_table));
2104}
2105
2106struct msm_camera_device_platform_data msm_camera_data_rear = {
2107 .camera_gpio_on = config_camera_on_gpios_rear,
2108 .camera_gpio_off = config_camera_off_gpios_rear,
2109 .ioext.csiphy = 0xA1000000,
2110 .ioext.csisz = 0x00100000,
2111 .ioext.csiirq = INT_CSI_IRQ_1,
2112 .ioclk.mclk_clk_rate = 24000000,
2113 .ioclk.vfe_clk_rate = 192000000,
2114 .ioext.appphy = MSM_CLK_CTL_PHYS,
2115 .ioext.appsz = MSM_CLK_CTL_SIZE,
2116};
2117
2118struct msm_camera_device_platform_data msm_camera_data_front = {
2119 .camera_gpio_on = config_camera_on_gpios_front,
2120 .camera_gpio_off = config_camera_off_gpios_front,
2121 .ioext.csiphy = 0xA0F00000,
2122 .ioext.csisz = 0x00100000,
2123 .ioext.csiirq = INT_CSI_IRQ_0,
2124 .ioclk.mclk_clk_rate = 24000000,
2125 .ioclk.vfe_clk_rate = 192000000,
2126 .ioext.appphy = MSM_CLK_CTL_PHYS,
2127 .ioext.appsz = MSM_CLK_CTL_SIZE,
2128};
2129
2130#ifdef CONFIG_OV5640
2131static struct msm_camera_sensor_platform_info ov5640_sensor_info = {
2132 .mount_angle = 90
2133};
2134
2135static struct msm_camera_sensor_flash_src msm_flash_src_ov5640 = {
2136 .flash_sr_type = MSM_CAMERA_FLASH_SRC_LED,
2137 ._fsrc.led_src.led_name = "flashlight",
2138 ._fsrc.led_src.led_name_len = 10,
2139};
2140
2141static struct msm_camera_sensor_flash_data flash_ov5640 = {
2142 .flash_type = MSM_CAMERA_FLASH_LED,
2143 .flash_src = &msm_flash_src_ov5640,
2144};
2145
2146static struct msm_camera_sensor_info msm_camera_sensor_ov5640_data = {
2147 .sensor_name = "ov5640",
2148 .sensor_reset_enable = 1,
2149 .sensor_reset = GPIO_CAM_5MP_RESET,
2150 .sensor_pwd = GPIO_CAM_5MP_SHDN_EN,
2151 .vcm_pwd = 0,
2152 .vcm_enable = 0,
2153 .pdata = &msm_camera_data_rear,
2154 .flash_data = &flash_ov5640,
2155 .sensor_platform_info = &ov5640_sensor_info,
2156 .csi_if = 1,
2157};
2158
2159static struct platform_device msm_camera_sensor_ov5640 = {
2160 .name = "msm_camera_ov5640",
2161 .dev = {
2162 .platform_data = &msm_camera_sensor_ov5640_data,
2163 },
2164};
2165#endif
2166
2167#ifdef CONFIG_WEBCAM_OV7692_QRD
2168static struct msm_camera_sensor_platform_info ov7692_sensor_7627a_info = {
2169 .mount_angle = 90
2170};
2171
2172static struct msm_camera_sensor_flash_data flash_ov7692 = {
2173 .flash_type = MSM_CAMERA_FLASH_NONE,
2174};
2175
2176static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2177 .sensor_name = "ov7692",
2178 .sensor_reset_enable = 0,
2179 .sensor_reset = 0,
2180 .sensor_pwd = GPIO_CAM_3MP_PWDN,
2181 .vcm_pwd = 0,
2182 .vcm_enable = 0,
2183 .pdata = &msm_camera_data_front,
2184 .flash_data = &flash_ov7692,
2185 .sensor_platform_info = &ov7692_sensor_7627a_info,
2186 .csi_if = 1,
2187};
2188
2189static struct platform_device msm_camera_sensor_ov7692 = {
2190 .name = "msm_camera_ov7692",
2191 .dev = {
2192 .platform_data = &msm_camera_sensor_ov7692_data,
2193 },
2194};
2195#endif
2196
2197static struct i2c_board_info i2c_camera_devices[] = {
2198 #ifdef CONFIG_OV5640
2199 {
2200 I2C_BOARD_INFO("ov5640", 0x78 >> 1),
2201 },
2202 #endif
2203 #ifdef CONFIG_WEBCAM_OV7692_QRD
2204 {
2205 I2C_BOARD_INFO("ov7692", 0x78),
2206 },
2207 #endif
2208};
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302209static struct platform_device *qrd1_devices[] __initdata = {
2210 &msm_device_dmov,
2211 &msm_device_smd,
2212 &msm_device_uart1,
2213 &msm_device_uart_dm1,
2214 &msm_gsbi0_qup_i2c_device,
2215 &msm_gsbi1_qup_i2c_device,
2216 &msm_device_otg,
2217 &msm_device_gadget_peripheral,
2218 &android_usb_device,
2219 &android_pmem_device,
2220 &android_pmem_adsp_device,
Taniya Das0a5303a2011-08-23 18:47:48 +05302221 &msm_fb_device,
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302222 &android_pmem_audio_device,
2223 &msm_device_snd,
2224 &msm_device_adspdec,
2225 &msm_batt_device,
Taniya Das7a22cdd2011-09-08 14:57:00 +05302226#ifdef CONFIG_OV5640
2227 &msm_camera_sensor_ov5640,
2228#endif
2229#ifdef CONFIG_WEBCAM_OV7692_QRD
2230 &msm_camera_sensor_ov7692,
2231#endif
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302232 &msm_kgsl_3d0,
2233#ifdef CONFIG_BT
2234 &msm_bt_power_device,
2235#endif
Taniya Das0a5303a2011-08-23 18:47:48 +05302236 &mipi_dsi_truly_panel_device,
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302237 &msm_wlan_ar6000_pm_device,
2238 &asoc_msm_pcm,
2239 &asoc_msm_dai0,
2240 &asoc_msm_dai1,
2241};
2242
2243static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2244static int __init pmem_kernel_ebi1_size_setup(char *p)
2245{
2246 pmem_kernel_ebi1_size = memparse(p, NULL);
2247 return 0;
2248}
2249early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2250
2251static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2252static int __init pmem_audio_size_setup(char *p)
2253{
2254 pmem_audio_size = memparse(p, NULL);
2255 return 0;
2256}
2257early_param("pmem_audio_size", pmem_audio_size_setup);
2258
2259static void __init msm_msm7627a_allocate_memory_regions(void)
2260{
Taniya Das0a5303a2011-08-23 18:47:48 +05302261 void *addr;
2262 unsigned long size;
2263
2264 size = fb_size ? : MSM_FB_SIZE;
2265 addr = alloc_bootmem_align(size, 0x1000);
2266 msm_fb_resources[0].start = __pa(addr);
2267 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2268 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n", size,
2269 addr, __pa(addr));
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302270}
2271
2272static struct memtype_reserve msm7627a_reserve_table[] __initdata = {
2273 [MEMTYPE_SMI] = {
2274 },
2275 [MEMTYPE_EBI0] = {
2276 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2277 },
2278 [MEMTYPE_EBI1] = {
2279 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2280 },
2281};
2282
Taniya Das0a5303a2011-08-23 18:47:48 +05302283static struct msm_panel_common_pdata mdp_pdata = {
2284 .gpio = 97,
2285 .mdp_rev = MDP_REV_303,
2286};
2287
2288#define GPIO_LCDC_BRDG_PD 128
2289#define GPIO_LCDC_BRDG_RESET_N 129
2290#define GPIO_LCD_DSI_SEL 125
2291
2292static unsigned mipi_dsi_gpio[] = {
2293 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT,
2294 GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2295 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT,
2296 GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* LCDC_BRDG_PD */
2297};
2298
2299static unsigned lcd_dsi_sel_gpio[] = {
2300 GPIO_CFG(GPIO_LCD_DSI_SEL, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
2301 GPIO_CFG_2MA),
2302};
2303
2304enum {
2305 DSI_SINGLE_LANE = 1,
2306 DSI_TWO_LANES,
2307};
2308
2309static int msm_fb_get_lane_config(void)
2310{
2311 pr_info("DSI_TWO_LANES\n");
2312 return DSI_TWO_LANES;
2313}
2314
2315static int mipi_truly_sel_mode(int video_mode)
2316{
2317 int rc = 0;
2318
2319 rc = gpio_request(GPIO_LCD_DSI_SEL, "lcd_dsi_sel");
2320 if (rc < 0)
2321 goto gpio_error;
2322
2323 rc = gpio_tlmm_config(lcd_dsi_sel_gpio[0], GPIO_CFG_ENABLE);
2324 if (rc)
2325 goto gpio_error;
2326
2327 rc = gpio_direction_output(GPIO_LCD_DSI_SEL, 1);
2328 if (!rc) {
2329 gpio_set_value_cansleep(GPIO_LCD_DSI_SEL, video_mode);
2330 return rc;
2331 } else {
2332 goto gpio_error;
2333 }
2334
2335gpio_error:
2336 pr_err("mipi_truly_sel_mode failed\n");
2337 gpio_free(GPIO_LCD_DSI_SEL);
2338 return rc;
2339}
2340
2341static int msm_fb_dsi_client_qrd1_reset(void)
2342{
2343 int rc = 0;
2344
2345 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2346 if (rc < 0) {
2347 pr_err("failed to request lcd brdg reset_n\n");
2348 return rc;
2349 }
2350
2351 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2352 if (rc < 0) {
2353 pr_err("Failed to enable LCDC Bridge reset enable\n");
2354 return rc;
2355 }
2356
2357 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2358 if (rc < 0) {
2359 pr_err("Failed GPIO bridge pd\n");
2360 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2361 return rc;
2362 }
2363
2364 mipi_truly_sel_mode(1);
2365
2366 return rc;
2367}
2368
2369static int msm_fb_dsi_client_reset(void)
2370{
2371 int rc = 0;
2372
2373 rc = msm_fb_dsi_client_qrd1_reset();
2374 return rc;
2375}
2376
2377static int dsi_gpio_initialized;
2378
2379static int mipi_dsi_panel_qrd1_power(int on)
2380{
2381 int rc = 0;
2382
2383 if (!dsi_gpio_initialized) {
2384 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2385 if (rc < 0)
2386 return rc;
2387
Jeevan Shriram72e4cc62011-11-10 14:57:22 +05302388 rc = gpio_tlmm_config(GPIO_CFG(GPIO_BACKLIGHT_EN, 0,
2389 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2390 GPIO_CFG_ENABLE);
2391 if (rc < 0) {
2392 pr_err("failed GPIO_BACKLIGHT_EN tlmm config\n");
2393 return rc;
2394 }
2395
Taniya Das0a5303a2011-08-23 18:47:48 +05302396 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2397 if (rc < 0) {
2398 pr_err("failed to enable backlight\n");
2399 gpio_free(GPIO_BACKLIGHT_EN);
2400 return rc;
2401 }
2402 dsi_gpio_initialized = 1;
2403 }
2404
2405 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, !!on);
2406
2407 if (!on) {
2408 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 1);
2409 msleep(20);
2410 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 0);
2411 msleep(20);
2412 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 1);
2413
2414 }
2415
2416 return rc;
2417}
2418
2419static int mipi_dsi_panel_power(int on)
2420{
2421 int rc = 0;
2422
2423 rc = mipi_dsi_panel_qrd1_power(on);
2424 return rc;
2425}
2426
2427#define MDP_303_VSYNC_GPIO 97
2428
2429#ifdef CONFIG_FB_MSM_MDP303
2430static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2431 .vsync_gpio = MDP_303_VSYNC_GPIO,
2432 .dsi_power_save = mipi_dsi_panel_power,
2433 .dsi_client_reset = msm_fb_dsi_client_reset,
2434 .get_lane_config = msm_fb_get_lane_config,
2435};
2436#endif
2437
2438static void __init msm_fb_add_devices(void)
2439{
2440 msm_fb_register_device("mdp", &mdp_pdata);
2441 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2442}
2443
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302444static void __init size_pmem_devices(void)
2445{
2446#ifdef CONFIG_ANDROID_PMEM
2447 android_pmem_adsp_pdata.size = pmem_adsp_size;
2448 android_pmem_pdata.size = pmem_mdp_size;
2449 android_pmem_audio_pdata.size = pmem_audio_size;
2450#endif
2451}
2452
2453static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2454{
2455 msm7627a_reserve_table[p->memory_type].size += p->size;
2456}
2457
2458static void __init reserve_pmem_memory(void)
2459{
2460#ifdef CONFIG_ANDROID_PMEM
2461 reserve_memory_for(&android_pmem_adsp_pdata);
2462 reserve_memory_for(&android_pmem_pdata);
2463 reserve_memory_for(&android_pmem_audio_pdata);
2464 msm7627a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2465#endif
2466}
2467
2468static void __init msm7627a_calculate_reserve_sizes(void)
2469{
2470 size_pmem_devices();
2471 reserve_pmem_memory();
2472}
2473
2474static int msm7627a_paddr_to_memtype(unsigned int paddr)
2475{
2476 return MEMTYPE_EBI1;
2477}
2478
2479static struct reserve_info msm7627a_reserve_info __initdata = {
2480 .memtype_reserve_table = msm7627a_reserve_table,
2481 .calculate_reserve_sizes = msm7627a_calculate_reserve_sizes,
2482 .paddr_to_memtype = msm7627a_paddr_to_memtype,
2483};
2484
2485static void __init msm7627a_reserve(void)
2486{
2487 reserve_info = &msm7627a_reserve_info;
2488 msm_reserve();
2489}
2490
2491static void __init msm_device_i2c_init(void)
2492{
2493 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2494 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2495}
2496
2497static struct msm_handset_platform_data hs_platform_data = {
2498 .hs_name = "7k_handset",
2499 .pwr_key_delay_ms = 500, /* 0 will disable end key */
2500};
2501
2502static struct platform_device hs_pdev = {
2503 .name = "msm-handset",
2504 .id = -1,
2505 .dev = {
2506 .platform_data = &hs_platform_data,
2507 },
2508};
2509
Pankaj Kumar3cec0582011-11-18 11:13:29 +05302510static struct platform_device msm_proccomm_regulator_dev = {
2511 .name = PROCCOMM_REGULATOR_DEV_NAME,
2512 .id = -1,
2513 .dev = {
2514 .platform_data = &msm7x27a_proccomm_regulator_data
2515 }
2516};
2517
2518static void __init msm7627a_init_regulators(void)
2519{
2520 int rc = platform_device_register(&msm_proccomm_regulator_dev);
2521 if (rc)
2522 pr_err("%s: could not register regulator device: %d\n",
2523 __func__, rc);
2524}
2525
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302526#define UART1DM_RX_GPIO 45
2527static void __init msm_qrd1_init(void)
2528{
2529 msm7x2x_misc_init();
Pankaj Kumar3cec0582011-11-18 11:13:29 +05302530 msm7627a_init_regulators();
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302531 msm_device_i2c_init();
2532 msm7627a_init_mmc();
2533
Taniya Das7a22cdd2011-09-08 14:57:00 +05302534 qrd1_camera_gpio_cfg();
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302535#ifdef CONFIG_SERIAL_MSM_HS
2536 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
2537 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
2538#endif
2539
2540#ifdef CONFIG_USB_MSM_OTG_72K
2541 msm_otg_pdata.swfi_latency = msm7627a_pm_data
2542 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
2543 msm_device_otg.dev.platform_data = &msm_otg_pdata;
2544#endif
2545 msm_device_gadget_peripheral.dev.platform_data =
Taniya Das7a22cdd2011-09-08 14:57:00 +05302546 &msm_gadget_pdata;
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302547 platform_add_devices(qrd1_devices,
Taniya Das7a22cdd2011-09-08 14:57:00 +05302548 ARRAY_SIZE(qrd1_devices));
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302549#ifdef CONFIG_USB_EHCI_MSM_72K
2550 msm7627a_init_host();
2551#endif
2552 msm_pm_set_platform_data(msm7627a_pm_data,
2553 ARRAY_SIZE(msm7627a_pm_data));
Murali Nalajalaa1827842011-11-13 14:12:39 +05302554 BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_RESET_VECTOR,
2555 ioremap(0, PAGE_SIZE)));
2556
Taniya Das0a5303a2011-08-23 18:47:48 +05302557 msm_fb_add_devices();
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302558
2559#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
2560 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
Taniya Das7a22cdd2011-09-08 14:57:00 +05302561 bahama_devices,
2562 ARRAY_SIZE(bahama_devices));
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302563 bt_power_init();
2564#endif
Taniya Dasda408822011-09-06 12:54:06 +05302565
Taniya Das7a22cdd2011-09-08 14:57:00 +05302566 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID, i2c_camera_devices,
2567 ARRAY_SIZE(i2c_camera_devices));
2568
Taniya Dasda408822011-09-06 12:54:06 +05302569#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C) || \
2570 defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C_MODULE)
2571 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
2572 synaptic_i2c_clearpad3k,
2573 ARRAY_SIZE(synaptic_i2c_clearpad3k));
2574#endif
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302575 platform_device_register(&hs_pdev);
2576
2577#ifdef CONFIG_MSM_RPC_VIBRATOR
2578 msm_init_pmic_vibrator();
2579#endif
2580}
2581
2582static void __init qrd7627a_init_early(void)
2583{
2584 msm_msm7627a_allocate_memory_regions();
2585}
2586
2587MACHINE_START(MSM7627A_QRD1, "QRD MSM7627a QRD1")
2588 .boot_params = PHYS_OFFSET + 0x100,
2589 .map_io = msm_common_io_init,
2590 .reserve = msm7627a_reserve,
2591 .init_irq = msm_init_irq,
2592 .init_machine = msm_qrd1_init,
2593 .timer = &msm_timer,
2594 .init_early = qrd7627a_init_early,
Pankaj Kumarbf8a2a32011-10-21 11:47:21 +05302595 .handle_irq = vic_handle_irq,
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302596MACHINE_END