blob: 6f2249b4ca0bfae71c85c72bfd154d32c7a716b9 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/gpio_event.h>
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/board.h>
18#include <mach/msm_iomap.h>
19#include <mach/msm_hsusb.h>
20#include <mach/rpc_hsusb.h>
21#include <mach/rpc_pmapp.h>
22#include <mach/usbdiag.h>
23#include <mach/msm_memtypes.h>
24#include <mach/msm_serial_hs.h>
25#include <linux/usb/android.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/gpio.h>
29#include <mach/vreg.h>
30#include <mach/pmic.h>
31#include <mach/socinfo.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/mach/mmc.h>
35#include <linux/i2c.h>
36#include <linux/i2c/sx150x.h>
37#include <linux/gpio.h>
38#include <linux/android_pmem.h>
39#include <linux/bootmem.h>
40#include <linux/mfd/marimba.h>
41#include <mach/vreg.h>
42#include <linux/power_supply.h>
43#include <mach/rpc_pmapp.h>
44
45#include <mach/msm_battery.h>
46#include <linux/smsc911x.h>
47#include <linux/atmel_maxtouch.h>
48#include "devices.h"
49#include "timer.h"
50#include "devices-msm7x2xa.h"
51#include "pm.h"
52#include <mach/rpc_server_handset.h>
53#include <mach/socinfo.h>
54
55#define PMEM_KERNEL_EBI1_SIZE 0x3A000
56#define MSM_PMEM_AUDIO_SIZE 0x5B000
57#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
58#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
59#define FM_GPIO 83
60
61enum {
62 GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
63 GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
64 /* SURF expander */
65 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
66 GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
67 GPIO_WLAN_EXT_POR_N,
68 GPIO_DISPLAY_PWR_EN,
69 GPIO_BACKLIGHT_EN,
70 GPIO_PRESSURE_XCLR,
71 GPIO_VREG_S3_EXP,
72 GPIO_UBM2M_PWRDWN,
73 GPIO_ETM_MODE_CS_N,
74 GPIO_HOST_VBUS_EN,
75 GPIO_SPI_MOSI,
76 GPIO_SPI_MISO,
77 GPIO_SPI_CLK,
78 GPIO_SPI_CS0_N,
79 GPIO_CORE_EXPANDER_IO13,
80 GPIO_CORE_EXPANDER_IO14,
81 GPIO_CORE_EXPANDER_IO15,
82 /* Camera expander */
83 GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
84 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
85 GPIO_CAM_GP_AFBUSY,
86 GPIO_CAM_GP_CAM_PWDN,
87 GPIO_CAM_GP_CAM1MP_XCLR,
88 GPIO_CAM_GP_CAMIF_RESET_N,
89 GPIO_CAM_GP_STROBE_CE,
90 GPIO_CAM_GP_LED_EN1,
91 GPIO_CAM_GP_LED_EN2,
92};
93
94#if defined(CONFIG_GPIO_SX150X)
95enum {
96 SX150X_CORE,
97 SX150X_CAM,
98};
99
100static struct sx150x_platform_data sx150x_data[] __initdata = {
101 [SX150X_CORE] = {
102 .gpio_base = GPIO_CORE_EXPANDER_BASE,
103 .oscio_is_gpo = false,
104 .io_pullup_ena = 0,
105 .io_pulldn_ena = 0,
106 .io_open_drain_ena = 0xfef8,
107 .irq_summary = -1,
108 },
109 [SX150X_CAM] = {
110 .gpio_base = GPIO_CAM_EXPANDER_BASE,
111 .oscio_is_gpo = false,
112 .io_pullup_ena = 0,
113 .io_pulldn_ena = 0,
114 .io_open_drain_ena = 0x23,
115 .irq_summary = -1,
116 },
117};
118#endif
119
120#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
121
122 /* FM Platform power and shutdown routines */
123#define FPGA_MSM_CNTRL_REG2 0x90008010
124static void config_pcm_i2s_mode(int mode)
125{
126 void __iomem *cfg_ptr;
127 u8 reg2;
128
129 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
130
131 if (!cfg_ptr)
132 return;
133 if (mode) {
134 /*enable the pcm mode in FPGA*/
135 reg2 = readb_relaxed(cfg_ptr);
136 if (reg2 == 0) {
137 reg2 = 1;
138 writeb_relaxed(reg2, cfg_ptr);
139 }
140 } else {
141 /*enable i2s mode in FPGA*/
142 reg2 = readb_relaxed(cfg_ptr);
143 if (reg2 == 1) {
144 reg2 = 0;
145 writeb_relaxed(reg2, cfg_ptr);
146 }
147 }
148 iounmap(cfg_ptr);
149}
150
151static unsigned fm_i2s_config_power_on[] = {
152 /*FM_I2S_SD*/
153 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
154 /*FM_I2S_WS*/
155 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
156 /*FM_I2S_SCK*/
157 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
158};
159
160static unsigned fm_i2s_config_power_off[] = {
161 /*FM_I2S_SD*/
162 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
163 /*FM_I2S_WS*/
164 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
165 /*FM_I2S_SCK*/
166 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
167};
168
169static unsigned bt_config_power_on[] = {
170 /*RFR*/
171 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
172 /*CTS*/
173 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
174 /*RX*/
175 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
176 /*TX*/
177 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
178};
179static unsigned bt_config_pcm_on[] = {
180 /*PCM_DOUT*/
181 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
182 /*PCM_DIN*/
183 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
184 /*PCM_SYNC*/
185 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
186 /*PCM_CLK*/
187 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
188};
189static unsigned bt_config_power_off[] = {
190 /*RFR*/
191 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
192 /*CTS*/
193 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
194 /*RX*/
195 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
196 /*TX*/
197 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
198};
199static unsigned bt_config_pcm_off[] = {
200 /*PCM_DOUT*/
201 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
202 /*PCM_DIN*/
203 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
204 /*PCM_SYNC*/
205 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
206 /*PCM_CLK*/
207 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
208};
209
210static int config_i2s(int mode)
211{
212 int pin, rc = 0;
213
214 if (mode == FM_I2S_ON) {
215 if (machine_is_msm7x27a_surf())
216 config_pcm_i2s_mode(0);
217 pr_err("%s mode = FM_I2S_ON", __func__);
218 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
219 pin++) {
220 rc = gpio_tlmm_config(
221 fm_i2s_config_power_on[pin],
222 GPIO_CFG_ENABLE
223 );
224 if (rc < 0)
225 return rc;
226 }
227 } else if (mode == FM_I2S_OFF) {
228 pr_err("%s mode = FM_I2S_OFF", __func__);
229 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
230 pin++) {
231 rc = gpio_tlmm_config(
232 fm_i2s_config_power_off[pin],
233 GPIO_CFG_ENABLE
234 );
235 if (rc < 0)
236 return rc;
237 }
238 }
239 return rc;
240}
241static int config_pcm(int mode)
242{
243 int pin, rc = 0;
244
245 if (mode == BT_PCM_ON) {
246 if (machine_is_msm7x27a_surf())
247 config_pcm_i2s_mode(1);
248 pr_err("%s mode =BT_PCM_ON", __func__);
249 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
250 pin++) {
251 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
252 GPIO_CFG_ENABLE);
253 if (rc < 0)
254 return rc;
255 }
256 } else if (mode == BT_PCM_OFF) {
257 pr_err("%s mode =BT_PCM_OFF", __func__);
258 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
259 pin++) {
260 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
261 GPIO_CFG_ENABLE);
262 if (rc < 0)
263 return rc;
264 }
265
266 }
267
268 return rc;
269}
270
271static int msm_bahama_setup_pcm_i2s(int mode)
272{
273 int fm_state = 0, bt_state = 0;
274 int rc = 0;
275 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
276
277 fm_state = marimba_get_fm_status(&config);
278 bt_state = marimba_get_bt_status(&config);
279
280 switch (mode) {
281 case BT_PCM_ON:
282 case BT_PCM_OFF:
283 if (!fm_state)
284 rc = config_pcm(mode);
285 break;
286 case FM_I2S_ON:
287 rc = config_i2s(mode);
288 break;
289 case FM_I2S_OFF:
290 if (bt_state)
291 rc = config_pcm(BT_PCM_ON);
292 else
293 rc = config_i2s(mode);
294 break;
295 default:
296 rc = -EIO;
297 pr_err("%s:Unsupported mode", __func__);
298 }
299 return rc;
300}
301
302static struct vreg *fm_regulator;
303static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
304{
305 int rc = 0;
306 const char *id = "FMPW";
307 uint32_t irqcfg;
308
309 /* Voting for 1.8V Regulator */
310 fm_regulator = vreg_get(NULL , "msme1");
311 if (IS_ERR(fm_regulator)) {
312 pr_err("%s: vreg get failed with : (%ld)\n",
313 __func__, PTR_ERR(fm_regulator));
314 return -EINVAL;
315 }
316
317 /* Set the voltage level to 1.8V */
318 rc = vreg_set_level(fm_regulator, 1800);
319 if (rc < 0) {
320 pr_err("%s: set regulator level failed with :(%d)\n",
321 __func__, rc);
322 goto fm_vreg_fail;
323 }
324
325 /* Enabling the 1.8V regulator */
326 rc = vreg_enable(fm_regulator);
327 if (rc) {
328 pr_err("%s: enable regulator failed with :(%d)\n",
329 __func__, rc);
330 goto fm_vreg_fail;
331 }
332
333 /* Voting for 19.2MHz clock */
334 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
335 PMAPP_CLOCK_VOTE_ON);
336 if (rc < 0) {
337 pr_err("%s: clock vote failed with :(%d)\n",
338 __func__, rc);
339 goto fm_clock_vote_fail;
340 }
341
342 /* Configuring the FM GPIO */
343 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
344 GPIO_CFG_2MA);
345
346 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
347 if (rc) {
348 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
349 __func__, irqcfg, rc);
350 goto fm_gpio_config_fail;
351 }
352
353 return 0;
354
355fm_gpio_config_fail:
356 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
357 PMAPP_CLOCK_VOTE_OFF);
358fm_clock_vote_fail:
359 vreg_disable(fm_regulator);
360
361fm_vreg_fail:
362 vreg_put(fm_regulator);
363
364 return rc;
365};
366
367static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
368{
369 int rc;
370 const char *id = "FMPW";
371
372 /* Releasing the GPIO line used by FM */
373 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
374 GPIO_CFG_2MA);
375
376 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
377 if (rc)
378 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
379 __func__, irqcfg, rc);
380
381 /* Releasing the 1.8V Regulator */
382 if (fm_regulator != NULL) {
383 rc = vreg_disable(fm_regulator);
384
385 if (rc)
386 pr_err("%s: disable regulator failed:(%d)\n",
387 __func__, rc);
388 fm_regulator = NULL;
389 }
390
391 /* Voting off the clock */
392 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
393 PMAPP_CLOCK_VOTE_OFF);
394
395 if (rc < 0)
396 pr_err("%s: voting off failed with :(%d)\n",
397 __func__, rc);
398}
399
400static struct marimba_fm_platform_data marimba_fm_pdata = {
401 .fm_setup = fm_radio_setup,
402 .fm_shutdown = fm_radio_shutdown,
403 .irq = MSM_GPIO_TO_INT(FM_GPIO),
404 .vreg_s2 = NULL,
405 .vreg_xo_out = NULL,
406 /* Configuring the FM SoC as I2S Master */
407 .is_fm_soc_i2s_master = true,
408 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
409};
410
411static struct platform_device msm_bt_power_device = {
412 .name = "bt_power",
413};
414 struct bahama_config_register {
415 u8 reg;
416 u8 value;
417 u8 mask;
418 };
419static const char * const vregs_bahama_name[] = {
420 "msme1",
421 "bt",
422};
423static struct vreg *vregs_bahama[ARRAY_SIZE(vregs_bahama_name)];
424
425static int bahama_bt(int on)
426{
427
428 int rc = 0;
429 int i;
430
431 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
432
433 struct bahama_variant_register {
434 const size_t size;
435 const struct bahama_config_register *set;
436 };
437
438 const struct bahama_config_register *p;
439
440 u8 version;
441
442 const struct bahama_config_register v10_bt_on[] = {
443 { 0xE9, 0x00, 0xFF },
444 { 0xF4, 0x80, 0xFF },
445 { 0xE4, 0x00, 0xFF },
446 { 0xE5, 0x00, 0x0F },
447#ifdef CONFIG_WLAN
448 { 0xE6, 0x38, 0x7F },
449 { 0xE7, 0x06, 0xFF },
450#endif
451 { 0xE9, 0x21, 0xFF },
452 { 0x01, 0x0C, 0x1F },
453 { 0x01, 0x08, 0x1F },
454 };
455
456 const struct bahama_config_register v20_bt_on_fm_off[] = {
457 { 0x11, 0x0C, 0xFF },
458 { 0x13, 0x01, 0xFF },
459 { 0xF4, 0x80, 0xFF },
460 { 0xF0, 0x00, 0xFF },
461 { 0xE9, 0x00, 0xFF },
462#ifdef CONFIG_WLAN
463 { 0x81, 0x00, 0x7F },
464 { 0x82, 0x00, 0xFF },
465 { 0xE6, 0x38, 0x7F },
466 { 0xE7, 0x06, 0xFF },
467#endif
468 { 0x8E, 0x15, 0xFF },
469 { 0x8F, 0x15, 0xFF },
470 { 0x90, 0x15, 0xFF },
471
472 { 0xE9, 0x21, 0xFF },
473 };
474
475 const struct bahama_config_register v20_bt_on_fm_on[] = {
476 { 0x11, 0x0C, 0xFF },
477 { 0x13, 0x01, 0xFF },
478 { 0xF4, 0x86, 0xFF },
479 { 0xF0, 0x06, 0xFF },
480 { 0xE9, 0x00, 0xFF },
481#ifdef CONFIG_WLAN
482 { 0x81, 0x00, 0x7F },
483 { 0x82, 0x00, 0xFF },
484 { 0xE6, 0x38, 0x7F },
485 { 0xE7, 0x06, 0xFF },
486#endif
487 { 0xE9, 0x21, 0xFF },
488 };
489
490 const struct bahama_config_register v10_bt_off[] = {
491 { 0xE9, 0x00, 0xFF },
492 };
493
494 const struct bahama_config_register v20_bt_off_fm_off[] = {
495 { 0xF4, 0x84, 0xFF },
496 { 0xF0, 0x04, 0xFF },
497 { 0xE9, 0x00, 0xFF }
498 };
499
500 const struct bahama_config_register v20_bt_off_fm_on[] = {
501 { 0xF4, 0x86, 0xFF },
502 { 0xF0, 0x06, 0xFF },
503 { 0xE9, 0x00, 0xFF }
504 };
505 const struct bahama_variant_register bt_bahama[2][3] = {
506 {
507 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
508 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
509 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
510 },
511 {
512 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
513 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
514 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
515 }
516 };
517
518 u8 offset = 0; /* index into bahama configs */
519 on = on ? 1 : 0;
520 version = marimba_read_bahama_ver(&config);
521
522 if (version == BAHAMA_VER_UNSUPPORTED) {
523 dev_err(&msm_bt_power_device.dev,
524 "%s: unsupported version\n",
525 __func__);
526 return -EIO;
527 }
528
529 if (version == BAHAMA_VER_2_0) {
530 if (marimba_get_fm_status(&config))
531 offset = 0x01;
532 }
533
534 p = bt_bahama[on][version + offset].set;
535
536 dev_info(&msm_bt_power_device.dev,
537 "%s: found version %d\n", __func__, version);
538
539 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
540 u8 value = (p+i)->value;
541 rc = marimba_write_bit_mask(&config,
542 (p+i)->reg,
543 &value,
544 sizeof((p+i)->value),
545 (p+i)->mask);
546 if (rc < 0) {
547 dev_err(&msm_bt_power_device.dev,
548 "%s: reg %x write failed: %d\n",
549 __func__, (p+i)->reg, rc);
550 return rc;
551 }
552 dev_info(&msm_bt_power_device.dev,
553 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
554 __func__, (p+i)->reg,
555 value, (p+i)->mask);
556 value = 0;
557 rc = marimba_read_bit_mask(&config,
558 (p+i)->reg, &value,
559 sizeof((p+i)->value), (p+i)->mask);
560 if (rc < 0)
561 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
562 __func__);
563 dev_info(&msm_bt_power_device.dev,
564 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
565 __func__, (p+i)->reg,
566 value, (p+i)->mask);
567 }
568 /* Update BT Status */
569 if (on)
570 marimba_set_bt_status(&config, true);
571 else
572 marimba_set_bt_status(&config, false);
573 return rc;
574}
575static int bluetooth_switch_regulators(int on)
576{
577 int i, rc = 0;
578
579 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
580 if (!vregs_bahama[i]) {
581 pr_err("%s: vreg_get %s failed(%d)\n",
582 __func__, vregs_bahama_name[i], rc);
583 goto vreg_fail;
584 }
585 rc = on ? vreg_set_level(vregs_bahama[i], i ? 2900 :
586 1800) : 0;
587
588 if (rc < 0) {
589 pr_err("%s: vreg set level failed (%d)\n",
590 __func__, rc);
591 goto vreg_set_level_fail;
592 }
593
594 rc = on ? vreg_enable(vregs_bahama[i]) :
595 vreg_disable(vregs_bahama[i]);
596
597 if (rc < 0) {
598 pr_err("%s: vreg %s %s failed(%d)\n",
599 __func__, vregs_bahama_name[i],
600 on ? "enable" : "disable", rc);
601 goto vreg_fail;
602 }
603 }
604 return rc;
605
606vreg_fail:
607 while (i) {
608 if (on)
609 vreg_disable(vregs_bahama[--i]);
610 }
611vreg_set_level_fail:
612 vreg_put(vregs_bahama[0]);
613 vreg_put(vregs_bahama[1]);
614 return rc;
615}
616
617static unsigned int msm_bahama_setup_power(void)
618{
619 int rc = 0;
620 struct vreg *vreg_s3 = NULL;
621
622 vreg_s3 = vreg_get(NULL, "msme1");
623 if (IS_ERR(vreg_s3)) {
624 pr_err("%s: vreg get failed (%ld)\n",
625 __func__, PTR_ERR(vreg_s3));
626 return PTR_ERR(vreg_s3);
627 }
628 rc = vreg_set_level(vreg_s3, 1800);
629 if (rc < 0) {
630 pr_err("%s: vreg set level failed (%d)\n",
631 __func__, rc);
632 goto vreg_fail;
633 }
634 rc = vreg_enable(vreg_s3);
635 if (rc < 0) {
636 pr_err("%s: vreg enable failed (%d)\n",
637 __func__, rc);
638 goto vreg_fail;
639 }
640
641 /*setup Bahama_sys_reset_n*/
642 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
643 if (rc < 0) {
644 pr_err("%s: gpio_request %d = %d\n", __func__,
645 GPIO_BT_SYS_REST_EN, rc);
646 goto vreg_fail;
647 }
648 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
649 if (rc < 0) {
650 pr_err("%s: gpio_direction_output %d = %d\n", __func__,
651 GPIO_BT_SYS_REST_EN, rc);
652 goto gpio_fail;
653 }
654 return rc;
655
656gpio_fail:
657 gpio_free(GPIO_BT_SYS_REST_EN);
658vreg_fail:
659 vreg_put(vreg_s3);
660 return rc;
661}
662
663static unsigned int msm_bahama_shutdown_power(int value)
664{
665 int rc = 0;
666 struct vreg *vreg_s3 = NULL;
667
668 vreg_s3 = vreg_get(NULL, "msme1");
669 if (IS_ERR(vreg_s3)) {
670 pr_err("%s: vreg get failed (%ld)\n",
671 __func__, PTR_ERR(vreg_s3));
672 return PTR_ERR(vreg_s3);
673 }
674 rc = vreg_disable(vreg_s3);
675 if (rc) {
676 pr_err("%s: vreg disable failed (%d)\n",
677 __func__, rc);
678 vreg_put(vreg_s3);
679 return rc;
680 }
681
682 return rc;
683}
684
685
686static unsigned int msm_bahama_core_config(int type)
687{
688 int rc = 0;
689
690 if (type == BAHAMA_ID) {
691 int i;
692 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
693 const struct bahama_config_register v20_init[] = {
694 /* reg, value, mask */
695 { 0xF4, 0x84, 0xFF }, /* AREG */
696 { 0xF0, 0x04, 0xFF } /* DREG */
697 };
698 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
699 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
700 u8 value = v20_init[i].value;
701 rc = marimba_write_bit_mask(&config,
702 v20_init[i].reg,
703 &value,
704 sizeof(v20_init[i].value),
705 v20_init[i].mask);
706 if (rc < 0) {
707 pr_err("%s: reg %d write failed: %d\n",
708 __func__, v20_init[i].reg, rc);
709 return rc;
710 }
711 pr_debug("%s: reg 0x%02x value 0x%02x"
712 " mask 0x%02x\n",
713 __func__, v20_init[i].reg,
714 v20_init[i].value, v20_init[i].mask);
715 }
716 }
717 }
718 pr_debug("core type: %d\n", type);
719 return rc;
720}
721
722static int bluetooth_power(int on)
723{
724 int pin, rc = 0;
725 const char *id = "BTPW";
726 int cid = 0;
727
728 cid = adie_get_detected_connectivity_type();
729 if (cid != BAHAMA_ID) {
730 pr_err("%s: unexpected adie connectivity type: %d\n",
731 __func__, cid);
732 return -ENODEV;
733 }
734 if (on) {
735 /*setup power for BT SOC*/
736 rc = bluetooth_switch_regulators(on);
737 if (rc < 0) {
738 pr_err("%s: bluetooth_switch_regulators rc = %d",
739 __func__, rc);
740 goto exit;
741 }
742 /*setup BT GPIO lines*/
743 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
744 pin++) {
745 rc = gpio_tlmm_config(bt_config_power_on[pin],
746 GPIO_CFG_ENABLE);
747 if (rc < 0) {
748 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
749 __func__,
750 bt_config_power_on[pin],
751 rc);
752 goto fail_power;
753 }
754 }
755 /*Setup BT clocks*/
756 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
757 PMAPP_CLOCK_VOTE_ON);
758 if (rc < 0) {
759 pr_err("Failed to vote for TCXO_D1 ON\n");
760 goto fail_clock;
761 }
762 msleep(20);
763
764 /*I2C config for Bahama*/
765 rc = bahama_bt(1);
766 if (rc < 0) {
767 pr_err("%s: bahama_bt rc = %d", __func__, rc);
768 goto fail_i2c;
769 }
770 msleep(20);
771
772 /*setup BT PCM lines*/
773 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
774 if (rc < 0) {
775 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
776 __func__, rc);
777 goto fail_power;
778 }
779 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
780 PMAPP_CLOCK_VOTE_PIN_CTRL);
781 if (rc < 0)
782 pr_err("%s:Pin Control Failed, rc = %d",
783 __func__, rc);
784
785 } else {
786 rc = bahama_bt(0);
787 if (rc < 0)
788 pr_err("%s: bahama_bt rc = %d", __func__, rc);
789fail_i2c:
790 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
791 PMAPP_CLOCK_VOTE_OFF);
792 if (rc < 0)
793 pr_err("%s: Failed to vote Off D1\n", __func__);
794fail_clock:
795 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
796 pin++) {
797 rc = gpio_tlmm_config(bt_config_power_off[pin],
798 GPIO_CFG_ENABLE);
799 if (rc < 0) {
800 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
801 __func__, bt_config_power_off[pin], rc);
802 }
803 }
804 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
805 if (rc < 0) {
806 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
807 __func__, rc);
808 }
809fail_power:
810 rc = bluetooth_switch_regulators(0);
811 if (rc < 0) {
812 pr_err("%s: switch_regulators : rc = %d",\
813 __func__, rc);
814 goto exit;
815 }
816 }
817 return rc;
818exit:
819 pr_err("%s: failed with rc = %d", __func__, rc);
820 return rc;
821}
822
823static int __init bt_power_init(void)
824{
825 int i, rc = 0;
826 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
827 vregs_bahama[i] = vreg_get(NULL,
828 vregs_bahama_name[i]);
829 if (IS_ERR(vregs_bahama[i])) {
830 pr_err("%s: vreg get %s failed (%ld)\n",
831 __func__, vregs_bahama_name[i],
832 PTR_ERR(vregs_bahama[i]));
833 rc = PTR_ERR(vregs_bahama[i]);
834 goto vreg_get_fail;
835 }
836 }
837
838 msm_bt_power_device.dev.platform_data = &bluetooth_power;
839
840 return rc;
841
842vreg_get_fail:
843 while (i)
844 vreg_put(vregs_bahama[--i]);
845 return rc;
846}
847
848static struct marimba_platform_data marimba_pdata = {
849 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
850 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
851 .bahama_setup = msm_bahama_setup_power,
852 .bahama_shutdown = msm_bahama_shutdown_power,
853 .bahama_core_config = msm_bahama_core_config,
854 .fm = &marimba_fm_pdata,
855};
856
857#endif
858
859#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
860static struct i2c_board_info core_exp_i2c_info[] __initdata = {
861 {
862 I2C_BOARD_INFO("sx1509q", 0x3e),
863 },
864};
865static struct i2c_board_info cam_exp_i2c_info[] __initdata = {
866 {
867 I2C_BOARD_INFO("sx1508q", 0x22),
868 .platform_data = &sx150x_data[SX150X_CAM],
869 },
870};
871#endif
872#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
873static struct i2c_board_info bahama_devices[] = {
874{
875 I2C_BOARD_INFO("marimba", 0xc),
876 .platform_data = &marimba_pdata,
877},
878};
879#endif
880
881#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
882static void __init register_i2c_devices(void)
883{
884
885 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
886 cam_exp_i2c_info,
887 ARRAY_SIZE(cam_exp_i2c_info));
888
889 if (machine_is_msm7x27a_surf())
890 sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
891
892 core_exp_i2c_info[0].platform_data =
893 &sx150x_data[SX150X_CORE];
894
895 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
896 core_exp_i2c_info,
897 ARRAY_SIZE(core_exp_i2c_info));
898#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
899 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
900 bahama_devices,
901 ARRAY_SIZE(bahama_devices));
902#endif
903}
904#endif
905
906static struct msm_gpio qup_i2c_gpios_io[] = {
907 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
908 "qup_scl" },
909 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
910 "qup_sda" },
911 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
912 "qup_scl" },
913 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
914 "qup_sda" },
915};
916
917static struct msm_gpio qup_i2c_gpios_hw[] = {
918 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
919 "qup_scl" },
920 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
921 "qup_sda" },
922 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
923 "qup_scl" },
924 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
925 "qup_sda" },
926};
927
928static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
929{
930 int rc;
931
932 if (adap_id < 0 || adap_id > 1)
933 return;
934
935 /* Each adapter gets 2 lines from the table */
936 if (config_type)
937 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
938 else
939 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
940 if (rc < 0)
941 pr_err("QUP GPIO request/enable failed: %d\n", rc);
942}
943
944static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
945 .clk_freq = 100000,
946 .clk = "gsbi_qup_clk",
947 .pclk = "gsbi_qup_pclk",
948 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
949};
950
951static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
952 .clk_freq = 100000,
953 .clk = "gsbi_qup_clk",
954 .pclk = "gsbi_qup_pclk",
955 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
956};
957
958#ifdef CONFIG_ARCH_MSM7X27A
959#define MSM_PMEM_MDP_SIZE 0x1DD1000
960#define MSM_PMEM_ADSP_SIZE 0x1000000
961
962#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
963#define MSM_FB_SIZE 0x260000
964#else
965#define MSM_FB_SIZE 0x195000
966#endif
967
968#endif
969
970static struct android_usb_platform_data android_usb_pdata = {
971 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
972};
973
974static struct platform_device android_usb_device = {
975 .name = "android_usb",
976 .id = -1,
977 .dev = {
978 .platform_data = &android_usb_pdata,
979 },
980};
981
982#ifdef CONFIG_USB_EHCI_MSM_72K
983static void msm_hsusb_vbus_power(unsigned phy_info, int on)
984{
985 int rc = 0;
986 unsigned gpio;
987
988 gpio = GPIO_HOST_VBUS_EN;
989
990 rc = gpio_request(gpio, "i2c_host_vbus_en");
991 if (rc < 0) {
992 pr_err("failed to request %d GPIO\n", gpio);
993 return;
994 }
995 gpio_direction_output(gpio, !!on);
996 gpio_set_value_cansleep(gpio, !!on);
997 gpio_free(gpio);
998}
999
1000static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1001 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1002};
1003
1004static void __init msm7x2x_init_host(void)
1005{
1006 msm_add_host(0, &msm_usb_host_pdata);
1007}
1008#endif
1009
1010#ifdef CONFIG_USB_MSM_OTG_72K
1011static int hsusb_rpc_connect(int connect)
1012{
1013 if (connect)
1014 return msm_hsusb_rpc_connect();
1015 else
1016 return msm_hsusb_rpc_close();
1017}
1018
1019static struct vreg *vreg_3p3;
1020static int msm_hsusb_ldo_init(int init)
1021{
1022 if (init) {
1023 vreg_3p3 = vreg_get(NULL, "usb");
1024 if (IS_ERR(vreg_3p3))
1025 return PTR_ERR(vreg_3p3);
1026 } else
1027 vreg_put(vreg_3p3);
1028
1029 return 0;
1030}
1031
1032static int msm_hsusb_ldo_enable(int enable)
1033{
1034 static int ldo_status;
1035
1036 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1037 return -ENODEV;
1038
1039 if (ldo_status == enable)
1040 return 0;
1041
1042 ldo_status = enable;
1043
1044 if (enable)
1045 return vreg_enable(vreg_3p3);
1046
1047 return vreg_disable(vreg_3p3);
1048}
1049
1050#ifndef CONFIG_USB_EHCI_MSM_72K
1051static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1052{
1053 int ret = 0;
1054
1055 if (init)
1056 ret = msm_pm_app_rpc_init(callback);
1057 else
1058 msm_pm_app_rpc_deinit(callback);
1059
1060 return ret;
1061}
1062#endif
1063
1064static struct msm_otg_platform_data msm_otg_pdata = {
1065#ifndef CONFIG_USB_EHCI_MSM_72K
1066 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1067#else
1068 .vbus_power = msm_hsusb_vbus_power,
1069#endif
1070 .rpc_connect = hsusb_rpc_connect,
1071 .core_clk = 1,
1072 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1073 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1074 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1075 .se1_gating = SE1_GATING_DISABLE,
1076 .ldo_init = msm_hsusb_ldo_init,
1077 .ldo_enable = msm_hsusb_ldo_enable,
1078 .chg_init = hsusb_chg_init,
1079 .chg_connected = hsusb_chg_connected,
1080 .chg_vbus_draw = hsusb_chg_vbus_draw,
1081};
1082#endif
1083
1084static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1085 .is_phy_status_timer_on = 1,
1086};
1087
1088static struct resource smc91x_resources[] = {
1089 [0] = {
1090 .start = 0x90000300,
1091 .end = 0x900003ff,
1092 .flags = IORESOURCE_MEM,
1093 },
1094 [1] = {
1095 .start = MSM_GPIO_TO_INT(4),
1096 .end = MSM_GPIO_TO_INT(4),
1097 .flags = IORESOURCE_IRQ,
1098 },
1099};
1100
1101static struct platform_device smc91x_device = {
1102 .name = "smc91x",
1103 .id = 0,
1104 .num_resources = ARRAY_SIZE(smc91x_resources),
1105 .resource = smc91x_resources,
1106};
1107
1108#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1109 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1110 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1111 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1112
1113static unsigned long vreg_sts, gpio_sts;
1114static struct vreg *vreg_mmc;
1115static struct vreg *vreg_emmc;
1116
1117struct sdcc_vreg {
1118 struct vreg *vreg_data;
1119 unsigned level;
1120};
1121
1122static struct sdcc_vreg sdcc_vreg_data[4];
1123
1124struct sdcc_gpio {
1125 struct msm_gpio *cfg_data;
1126 uint32_t size;
1127 struct msm_gpio *sleep_cfg_data;
1128};
1129
1130static struct msm_gpio sdc1_cfg_data[] = {
1131 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1132 "sdc1_dat_3"},
1133 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1134 "sdc1_dat_2"},
1135 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1136 "sdc1_dat_1"},
1137 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1138 "sdc1_dat_0"},
1139 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1140 "sdc1_cmd"},
1141 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1142 "sdc1_clk"},
1143};
1144
1145static struct msm_gpio sdc2_cfg_data[] = {
1146 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1147 "sdc2_clk"},
1148 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1149 "sdc2_cmd"},
1150 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1151 "sdc2_dat_3"},
1152 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1153 "sdc2_dat_2"},
1154 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1155 "sdc2_dat_1"},
1156 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1157 "sdc2_dat_0"},
1158};
1159
1160static struct msm_gpio sdc2_sleep_cfg_data[] = {
1161 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1162 "sdc2_clk"},
1163 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1164 "sdc2_cmd"},
1165 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1166 "sdc2_dat_3"},
1167 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1168 "sdc2_dat_2"},
1169 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1170 "sdc2_dat_1"},
1171 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1172 "sdc2_dat_0"},
1173};
1174static struct msm_gpio sdc3_cfg_data[] = {
1175 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1176 "sdc3_clk"},
1177 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1178 "sdc3_cmd"},
1179 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1180 "sdc3_dat_3"},
1181 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1182 "sdc3_dat_2"},
1183 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1184 "sdc3_dat_1"},
1185 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1186 "sdc3_dat_0"},
1187#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1188 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1189 "sdc3_dat_7"},
1190 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1191 "sdc3_dat_6"},
1192 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1193 "sdc3_dat_5"},
1194 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1195 "sdc3_dat_4"},
1196#endif
1197};
1198
1199static struct msm_gpio sdc4_cfg_data[] = {
1200 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1201 "sdc4_dat_3"},
1202 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1203 "sdc4_dat_2"},
1204 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1205 "sdc4_dat_1"},
1206 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1207 "sdc4_cmd"},
1208 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1209 "sdc4_dat_0"},
1210 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1211 "sdc4_clk"},
1212};
1213
1214static struct sdcc_gpio sdcc_cfg_data[] = {
1215 {
1216 .cfg_data = sdc1_cfg_data,
1217 .size = ARRAY_SIZE(sdc1_cfg_data),
1218 },
1219 {
1220 .cfg_data = sdc2_cfg_data,
1221 .size = ARRAY_SIZE(sdc2_cfg_data),
1222 .sleep_cfg_data = sdc2_sleep_cfg_data,
1223 },
1224 {
1225 .cfg_data = sdc3_cfg_data,
1226 .size = ARRAY_SIZE(sdc3_cfg_data),
1227 },
1228 {
1229 .cfg_data = sdc4_cfg_data,
1230 .size = ARRAY_SIZE(sdc4_cfg_data),
1231 },
1232};
1233
1234static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1235{
1236 int rc = 0;
1237 struct sdcc_gpio *curr;
1238
1239 curr = &sdcc_cfg_data[dev_id - 1];
1240 if (!(test_bit(dev_id, &gpio_sts)^enable))
1241 return rc;
1242
1243 if (enable) {
1244 set_bit(dev_id, &gpio_sts);
1245 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1246 if (rc)
1247 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1248 __func__, dev_id);
1249 } else {
1250 clear_bit(dev_id, &gpio_sts);
1251 if (curr->sleep_cfg_data) {
1252 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1253 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1254 return rc;
1255 }
1256 msm_gpios_disable_free(curr->cfg_data, curr->size);
1257 }
1258 return rc;
1259}
1260
1261static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1262{
1263 int rc = 0;
1264 struct sdcc_vreg *curr;
1265
1266 curr = &sdcc_vreg_data[dev_id - 1];
1267
1268 if (!(test_bit(dev_id, &vreg_sts)^enable))
1269 return rc;
1270
1271 if (enable) {
1272 set_bit(dev_id, &vreg_sts);
1273 rc = vreg_set_level(curr->vreg_data, curr->level);
1274 if (rc)
1275 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1276
1277 rc = vreg_enable(curr->vreg_data);
1278 if (rc)
1279 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1280 } else {
1281 clear_bit(dev_id, &vreg_sts);
1282 rc = vreg_disable(curr->vreg_data);
1283 if (rc)
1284 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1285 }
1286 return rc;
1287}
1288
1289static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1290{
1291 int rc = 0;
1292 struct platform_device *pdev;
1293
1294 pdev = container_of(dv, struct platform_device, dev);
1295
1296 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1297 if (rc)
1298 goto out;
1299
1300 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1301out:
1302 return rc;
1303}
1304
1305#define GPIO_SDC1_HW_DET 85
1306
1307#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1308 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1309static unsigned int msm7x2xa_sdcc_slot_status(struct device *dev)
1310{
1311 int status;
1312
1313 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1314 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1315 if (status)
1316 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1317 GPIO_SDC1_HW_DET);
1318
1319 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1320 if (status) {
1321 pr_err("%s:Failed to request GPIO %d\n", __func__,
1322 GPIO_SDC1_HW_DET);
1323 } else {
1324 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1325 if (!status)
1326 status = gpio_get_value(GPIO_SDC1_HW_DET);
1327 gpio_free(GPIO_SDC1_HW_DET);
1328 }
1329 return status;
1330}
1331#endif
1332
1333#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1334static struct mmc_platform_data sdc1_plat_data = {
1335 .ocr_mask = MMC_VDD_28_29,
1336 .translate_vdd = msm_sdcc_setup_power,
1337 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1338 .msmsdcc_fmin = 144000,
1339 .msmsdcc_fmid = 24576000,
1340 .msmsdcc_fmax = 49152000,
1341#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1342 .status = msm7x2xa_sdcc_slot_status,
1343 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1344 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1345#endif
1346};
1347#endif
1348
1349#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1350static struct mmc_platform_data sdc2_plat_data = {
1351 /*
1352 * SDC2 supports only 1.8V, claim for 2.85V range is just
1353 * for allowing buggy cards who advertise 2.8V even though
1354 * they can operate at 1.8V supply.
1355 */
1356 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1357 .translate_vdd = msm_sdcc_setup_power,
1358 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1359#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1360 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1361#endif
1362 .msmsdcc_fmin = 144000,
1363 .msmsdcc_fmid = 24576000,
1364 .msmsdcc_fmax = 49152000,
1365#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1366 .dummy52_required = 1,
1367#endif
1368};
1369#endif
1370
1371#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1372static struct mmc_platform_data sdc3_plat_data = {
1373 .ocr_mask = MMC_VDD_28_29,
1374 .translate_vdd = msm_sdcc_setup_power,
1375#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1376 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1377#else
1378 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1379#endif
1380 .msmsdcc_fmin = 144000,
1381 .msmsdcc_fmid = 24576000,
1382 .msmsdcc_fmax = 49152000,
1383 .nonremovable = 1,
1384};
1385#endif
1386
1387#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1388 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1389static struct mmc_platform_data sdc4_plat_data = {
1390 .ocr_mask = MMC_VDD_28_29,
1391 .translate_vdd = msm_sdcc_setup_power,
1392 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1393 .msmsdcc_fmin = 144000,
1394 .msmsdcc_fmid = 24576000,
1395 .msmsdcc_fmax = 49152000,
1396};
1397#endif
1398#endif
1399
1400#ifdef CONFIG_SERIAL_MSM_HS
1401static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1402 .inject_rx_on_wakeup = 1,
1403 .rx_to_inject = 0xFD,
1404};
1405#endif
1406static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1407 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1408 .idle_supported = 1,
1409 .suspend_supported = 1,
1410 .idle_enabled = 1,
1411 .suspend_enabled = 1,
1412 .latency = 16000,
1413 .residency = 20000,
1414 },
1415 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1416 .idle_supported = 1,
1417 .suspend_supported = 1,
1418 .idle_enabled = 1,
1419 .suspend_enabled = 1,
1420 .latency = 12000,
1421 .residency = 20000,
1422 },
1423 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1424 .idle_supported = 1,
1425 .suspend_supported = 1,
1426 .idle_enabled = 0,
1427 .suspend_enabled = 1,
1428 .latency = 2000,
1429 .residency = 0,
1430 },
1431 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1432 .idle_supported = 1,
1433 .suspend_supported = 1,
1434 .idle_enabled = 1,
1435 .suspend_enabled = 1,
1436 .latency = 2,
1437 .residency = 0,
1438 },
1439};
1440
1441static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1442 .name = "pmem_adsp",
1443 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1444 .cached = 0,
1445 .memory_type = MEMTYPE_EBI1,
1446};
1447
1448static struct platform_device android_pmem_adsp_device = {
1449 .name = "android_pmem",
1450 .id = 1,
1451 .dev = { .platform_data = &android_pmem_adsp_pdata },
1452};
1453
1454static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1455static int __init pmem_mdp_size_setup(char *p)
1456{
1457 pmem_mdp_size = memparse(p, NULL);
1458 return 0;
1459}
1460
1461early_param("pmem_mdp_size", pmem_mdp_size_setup);
1462
1463static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1464static int __init pmem_adsp_size_setup(char *p)
1465{
1466 pmem_adsp_size = memparse(p, NULL);
1467 return 0;
1468}
1469
1470early_param("pmem_adsp_size", pmem_adsp_size_setup);
1471
1472static unsigned fb_size = MSM_FB_SIZE;
1473static int __init fb_size_setup(char *p)
1474{
1475 fb_size = memparse(p, NULL);
1476 return 0;
1477}
1478
1479early_param("fb_size", fb_size_setup);
1480
1481
1482#define LCDC_CONFIG_PROC 21
1483#define LCDC_UN_CONFIG_PROC 22
1484#define LCDC_API_PROG 0x30000066
1485#define LCDC_API_VERS 0x00010001
1486
1487static struct msm_rpc_endpoint *lcdc_ep;
1488
1489static int msm_fb_lcdc_config(int on)
1490{
1491 int rc = 0;
1492 struct rpc_request_hdr hdr;
1493
1494 if (on)
1495 pr_info("lcdc config\n");
1496 else
1497 pr_info("lcdc un-config\n");
1498
1499 lcdc_ep = msm_rpc_connect_compatible(LCDC_API_PROG, LCDC_API_VERS, 0);
1500
1501 if (IS_ERR(lcdc_ep)) {
1502 printk(KERN_ERR "%s: msm_rpc_connect failed! rc = %ld\n",
1503 __func__, PTR_ERR(lcdc_ep));
1504 return -EINVAL;
1505 }
1506
1507 rc = msm_rpc_call(lcdc_ep,
1508 (on) ? LCDC_CONFIG_PROC : LCDC_UN_CONFIG_PROC,
1509 &hdr, sizeof(hdr), 5 * HZ);
1510
1511 if (rc)
1512 printk(KERN_ERR
1513 "%s: msm_rpc_call failed! rc = %d\n", __func__, rc);
1514
1515 msm_rpc_close(lcdc_ep);
1516 return rc;
1517}
1518
1519static const char * const msm_fb_lcdc_vreg[] = {
1520 "gp2",
1521 "msme1",
1522};
1523
1524static const int msm_fb_lcdc_vreg_mV[] = {
1525 2850,
1526 1800,
1527};
1528
1529struct vreg *lcdc_vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
1530
1531static uint32_t lcdc_gpio_initialized;
1532
1533static void lcdc_toshiba_gpio_init(void)
1534{
1535 int i, rc = 0;
1536 if (!lcdc_gpio_initialized) {
1537 if (gpio_request(GPIO_SPI_CLK, "spi_clk")) {
1538 pr_err("failed to request gpio spi_clk\n");
1539 return;
1540 }
1541 if (gpio_request(GPIO_SPI_CS0_N, "spi_cs")) {
1542 pr_err("failed to request gpio spi_cs0_N\n");
1543 goto fail_gpio6;
1544 }
1545 if (gpio_request(GPIO_SPI_MOSI, "spi_mosi")) {
1546 pr_err("failed to request gpio spi_mosi\n");
1547 goto fail_gpio5;
1548 }
1549 if (gpio_request(GPIO_SPI_MISO, "spi_miso")) {
1550 pr_err("failed to request gpio spi_miso\n");
1551 goto fail_gpio4;
1552 }
1553 if (gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr")) {
1554 pr_err("failed to request gpio_disp_pwr\n");
1555 goto fail_gpio3;
1556 }
1557 if (gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en")) {
1558 pr_err("failed to request gpio_bkl_en\n");
1559 goto fail_gpio2;
1560 }
1561 pmapp_disp_backlight_init();
1562
1563 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1564 lcdc_vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
1565
1566 rc = vreg_set_level(lcdc_vreg[i],
1567 msm_fb_lcdc_vreg_mV[i]);
1568
1569 if (rc < 0) {
1570 pr_err("%s: set regulator level failed "
1571 "with :(%d)\n", __func__, rc);
1572 goto fail_gpio1;
1573 }
1574 }
1575 lcdc_gpio_initialized = 1;
1576 }
1577 return;
1578
1579fail_gpio1:
1580 for (; i > 0; i--)
1581 vreg_put(lcdc_vreg[i - 1]);
1582
1583 gpio_free(GPIO_BACKLIGHT_EN);
1584fail_gpio2:
1585 gpio_free(GPIO_DISPLAY_PWR_EN);
1586fail_gpio3:
1587 gpio_free(GPIO_SPI_MISO);
1588fail_gpio4:
1589 gpio_free(GPIO_SPI_MOSI);
1590fail_gpio5:
1591 gpio_free(GPIO_SPI_CS0_N);
1592fail_gpio6:
1593 gpio_free(GPIO_SPI_CLK);
1594 lcdc_gpio_initialized = 0;
1595}
1596
1597static uint32_t lcdc_gpio_table[] = {
1598 GPIO_SPI_CLK,
1599 GPIO_SPI_CS0_N,
1600 GPIO_SPI_MOSI,
1601 GPIO_DISPLAY_PWR_EN,
1602 GPIO_BACKLIGHT_EN,
1603 GPIO_SPI_MISO,
1604};
1605
1606static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
1607{
1608 int n;
1609
1610 if (lcdc_gpio_initialized) {
1611 /* All are IO Expander GPIOs */
1612 for (n = 0; n < (len - 1); n++)
1613 gpio_direction_output(table[n], 1);
1614 }
1615}
1616
1617static void lcdc_toshiba_config_gpios(int enable)
1618{
1619 config_lcdc_gpio_table(lcdc_gpio_table,
1620 ARRAY_SIZE(lcdc_gpio_table), enable);
1621}
1622
1623static int msm_fb_lcdc_power_save(int on)
1624{
1625 int i, rc = 0;
1626 /* Doing the init of the LCDC GPIOs very late as they are from
1627 an I2C-controlled IO Expander */
1628 lcdc_toshiba_gpio_init();
1629
1630 if (lcdc_gpio_initialized) {
1631 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
1632 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
1633
1634 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1635 if (on) {
1636 rc = vreg_enable(lcdc_vreg[i]);
1637
1638 if (rc) {
1639 printk(KERN_ERR "vreg_enable: %s vreg"
1640 "operation failed\n",
1641 msm_fb_lcdc_vreg[i]);
1642 goto lcdc_vreg_fail;
1643 }
1644 } else {
1645 rc = vreg_disable(lcdc_vreg[i]);
1646
1647 if (rc) {
1648 printk(KERN_ERR "vreg_disable: %s vreg "
1649 "operation failed\n",
1650 msm_fb_lcdc_vreg[i]);
1651 goto lcdc_vreg_fail;
1652 }
1653 }
1654 }
1655 }
1656
1657 return rc;
1658
1659lcdc_vreg_fail:
1660 if (on) {
1661 for (; i > 0; i--)
1662 vreg_disable(lcdc_vreg[i - 1]);
1663 } else {
1664 for (; i > 0; i--)
1665 vreg_enable(lcdc_vreg[i - 1]);
1666 }
1667
1668return rc;
1669
1670}
1671
1672
1673static int lcdc_toshiba_set_bl(int level)
1674{
1675 int ret;
1676
1677 ret = pmapp_disp_backlight_set_brightness(level);
1678 if (ret)
1679 pr_err("%s: can't set lcd backlight!\n", __func__);
1680
1681 return ret;
1682}
1683
1684
1685static struct lcdc_platform_data lcdc_pdata = {
1686 .lcdc_gpio_config = msm_fb_lcdc_config,
1687 .lcdc_power_save = msm_fb_lcdc_power_save,
1688};
1689
1690static int lcd_panel_spi_gpio_num[] = {
1691 GPIO_SPI_MOSI, /* spi_sdi */
1692 GPIO_SPI_MISO, /* spi_sdoi */
1693 GPIO_SPI_CLK, /* spi_clk */
1694 GPIO_SPI_CS0_N, /* spi_cs */
1695};
1696
1697static struct msm_panel_common_pdata lcdc_toshiba_panel_data = {
1698 .panel_config_gpio = lcdc_toshiba_config_gpios,
1699 .pmic_backlight = lcdc_toshiba_set_bl,
1700 .gpio_num = lcd_panel_spi_gpio_num,
1701};
1702
1703static struct platform_device lcdc_toshiba_panel_device = {
1704 .name = "lcdc_toshiba_fwvga_pt",
1705 .id = 0,
1706 .dev = {
1707 .platform_data = &lcdc_toshiba_panel_data,
1708 }
1709};
1710
1711static struct resource msm_fb_resources[] = {
1712 {
1713 .flags = IORESOURCE_DMA,
1714 }
1715};
1716
1717static int msm_fb_detect_panel(const char *name)
1718{
1719 int ret = -EPERM;
1720
1721 if (machine_is_msm7x27a_surf()) {
1722 if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21))
1723 ret = 0;
1724 } else {
1725 ret = -ENODEV;
1726 }
1727
1728 return ret;
1729}
1730
1731static struct msm_fb_platform_data msm_fb_pdata = {
1732 .detect_client = msm_fb_detect_panel,
1733};
1734
1735static struct platform_device msm_fb_device = {
1736 .name = "msm_fb",
1737 .id = 0,
1738 .num_resources = ARRAY_SIZE(msm_fb_resources),
1739 .resource = msm_fb_resources,
1740 .dev = {
1741 .platform_data = &msm_fb_pdata,
1742 }
1743};
1744
1745#ifdef CONFIG_FB_MSM_MIPI_DSI
1746static int mipi_renesas_set_bl(int level)
1747{
1748 int ret;
1749
1750 ret = pmapp_disp_backlight_set_brightness(level);
1751
1752 if (ret)
1753 pr_err("%s: can't set lcd backlight!\n", __func__);
1754
1755 return ret;
1756}
1757
1758static struct msm_panel_common_pdata mipi_renesas_pdata = {
1759 .pmic_backlight = mipi_renesas_set_bl,
1760};
1761
1762
1763static struct platform_device mipi_dsi_renesas_panel_device = {
1764 .name = "mipi_renesas",
1765 .id = 0,
1766 .dev = {
1767 .platform_data = &mipi_renesas_pdata,
1768 }
1769};
1770#endif
1771
1772static void __init msm7x27a_init_mmc(void)
1773{
1774 vreg_emmc = vreg_get(NULL, "emmc");
1775 if (IS_ERR(vreg_emmc)) {
1776 pr_err("%s: vreg get failed (%ld)\n",
1777 __func__, PTR_ERR(vreg_emmc));
1778 return;
1779 }
1780
1781 vreg_mmc = vreg_get(NULL, "mmc");
1782 if (IS_ERR(vreg_mmc)) {
1783 pr_err("%s: vreg get failed (%ld)\n",
1784 __func__, PTR_ERR(vreg_mmc));
1785 return;
1786 }
1787
1788 /* eMMC slot */
1789#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1790 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1791 sdcc_vreg_data[2].level = 3000;
1792 msm_add_sdcc(3, &sdc3_plat_data);
1793#endif
1794 /* Micro-SD slot */
1795#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1796 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1797 sdcc_vreg_data[0].level = 2850;
1798 msm_add_sdcc(1, &sdc1_plat_data);
1799#endif
1800 /* SDIO WLAN slot */
1801#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1802 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1803 sdcc_vreg_data[1].level = 2850;
1804 msm_add_sdcc(2, &sdc2_plat_data);
1805#endif
1806 /* Not Used */
1807#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1808 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1809 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1810 sdcc_vreg_data[3].level = 2850;
1811 msm_add_sdcc(4, &sdc4_plat_data);
1812#endif
1813}
1814#define SND(desc, num) { .name = #desc, .id = num }
1815static struct snd_endpoint snd_endpoints_list[] = {
1816 SND(HANDSET, 0),
1817 SND(MONO_HEADSET, 2),
1818 SND(HEADSET, 3),
1819 SND(SPEAKER, 6),
1820 SND(TTY_HEADSET, 8),
1821 SND(TTY_VCO, 9),
1822 SND(TTY_HCO, 10),
1823 SND(BT, 12),
1824 SND(IN_S_SADC_OUT_HANDSET, 16),
1825 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1826 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1827 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1828 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
1829 SND(CURRENT, 34),
1830 SND(FM_ANALOG_STEREO_HEADSET, 35),
1831 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1832};
1833#undef SND
1834
1835static struct msm_snd_endpoints msm_device_snd_endpoints = {
1836 .endpoints = snd_endpoints_list,
1837 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1838};
1839
1840static struct platform_device msm_device_snd = {
1841 .name = "msm_snd",
1842 .id = -1,
1843 .dev = {
1844 .platform_data = &msm_device_snd_endpoints
1845 },
1846};
1847
1848#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1849 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1850 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1851 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1852 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1853 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1854#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1855 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1856 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1857 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1858 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1859 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1860#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1861 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1862 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1863 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1864 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1865 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1866#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1867 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1868 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1869 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1870 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1871 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1872#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1873
1874static unsigned int dec_concurrency_table[] = {
1875 /* Audio LP */
1876 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1877 0, 0, 0,
1878
1879 /* Concurrency 1 */
1880 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1881 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1882 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1883 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1884 (DEC4_FORMAT),
1885
1886 /* Concurrency 2 */
1887 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1888 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1889 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1890 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1891 (DEC4_FORMAT),
1892
1893 /* Concurrency 3 */
1894 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1895 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1896 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1897 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1898 (DEC4_FORMAT),
1899
1900 /* Concurrency 4 */
1901 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1902 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1903 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1904 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1905 (DEC4_FORMAT),
1906
1907 /* Concurrency 5 */
1908 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1909 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1910 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1911 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1912 (DEC4_FORMAT),
1913
1914 /* Concurrency 6 */
1915 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1916 0, 0, 0, 0,
1917
1918 /* Concurrency 7 */
1919 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1920 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1921 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1922 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1923 (DEC4_FORMAT),
1924};
1925
1926#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1927 .module_queueid = queueid, .module_decid = decid, \
1928 .nr_codec_support = nr_codec}
1929
1930static struct msm_adspdec_info dec_info_list[] = {
1931 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1932 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1933 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1934 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1935 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1936};
1937
1938static struct msm_adspdec_database msm_device_adspdec_database = {
1939 .num_dec = ARRAY_SIZE(dec_info_list),
1940 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
1941 ARRAY_SIZE(dec_info_list)),
1942 .dec_concurrency_table = dec_concurrency_table,
1943 .dec_info_list = dec_info_list,
1944};
1945
1946static struct platform_device msm_device_adspdec = {
1947 .name = "msm_adspdec",
1948 .id = -1,
1949 .dev = {
1950 .platform_data = &msm_device_adspdec_database
1951 },
1952};
1953
1954static struct android_pmem_platform_data android_pmem_audio_pdata = {
1955 .name = "pmem_audio",
1956 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1957 .cached = 0,
1958 .memory_type = MEMTYPE_EBI1,
1959};
1960
1961static struct platform_device android_pmem_audio_device = {
1962 .name = "android_pmem",
1963 .id = 2,
1964 .dev = { .platform_data = &android_pmem_audio_pdata },
1965};
1966
1967static struct android_pmem_platform_data android_pmem_pdata = {
1968 .name = "pmem",
1969 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1970 .cached = 1,
1971 .memory_type = MEMTYPE_EBI1,
1972};
1973static struct platform_device android_pmem_device = {
1974 .name = "android_pmem",
1975 .id = 0,
1976 .dev = { .platform_data = &android_pmem_pdata },
1977};
1978
1979static u32 msm_calculate_batt_capacity(u32 current_voltage);
1980
1981static struct msm_psy_batt_pdata msm_psy_batt_data = {
1982 .voltage_min_design = 2800,
1983 .voltage_max_design = 4300,
1984 .avail_chg_sources = AC_CHG | USB_CHG ,
1985 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
1986 .calculate_capacity = &msm_calculate_batt_capacity,
1987};
1988
1989static u32 msm_calculate_batt_capacity(u32 current_voltage)
1990{
1991 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
1992 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
1993
1994 return (current_voltage - low_voltage) * 100
1995 / (high_voltage - low_voltage);
1996}
1997
1998static struct platform_device msm_batt_device = {
1999 .name = "msm-battery",
2000 .id = -1,
2001 .dev.platform_data = &msm_psy_batt_data,
2002};
2003
2004static struct smsc911x_platform_config smsc911x_config = {
2005 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
2006 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
2007 .flags = SMSC911X_USE_16BIT,
2008};
2009
2010static struct resource smsc911x_resources[] = {
2011 [0] = {
2012 .start = 0x90000000,
2013 .end = 0x90007fff,
2014 .flags = IORESOURCE_MEM,
2015 },
2016 [1] = {
2017 .start = MSM_GPIO_TO_INT(48),
2018 .end = MSM_GPIO_TO_INT(48),
2019 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
2020 },
2021};
2022
2023static struct platform_device smsc911x_device = {
2024 .name = "smsc911x",
2025 .id = 0,
2026 .num_resources = ARRAY_SIZE(smsc911x_resources),
2027 .resource = smsc911x_resources,
2028 .dev = {
2029 .platform_data = &smsc911x_config,
2030 },
2031};
2032
2033static struct msm_gpio smsc911x_gpios[] = {
2034 { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2035 "smsc911x_irq" },
2036 { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2037 "eth_fifo_sel" },
2038};
2039
2040#define ETH_FIFO_SEL_GPIO 49
2041static void msm7x27a_cfg_smsc911x(void)
2042{
2043 int res;
2044
2045 res = msm_gpios_request_enable(smsc911x_gpios,
2046 ARRAY_SIZE(smsc911x_gpios));
2047 if (res) {
2048 pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
2049 return;
2050 }
2051
2052 /* ETH_FIFO_SEL */
2053 res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
2054 if (res) {
2055 pr_err("%s: unable to get direction for gpio %d\n", __func__,
2056 ETH_FIFO_SEL_GPIO);
2057 msm_gpios_disable_free(smsc911x_gpios,
2058 ARRAY_SIZE(smsc911x_gpios));
2059 return;
2060 }
2061 gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
2062}
2063
2064#ifdef CONFIG_MSM_CAMERA
2065static uint32_t camera_off_gpio_table[] = {
2066 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2067};
2068
2069static uint32_t camera_on_gpio_table[] = {
2070 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2071};
2072
2073#ifdef CONFIG_MSM_CAMERA_FLASH
2074static struct msm_camera_sensor_flash_src msm_flash_src = {
2075 .flash_sr_type = MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER,
2076 ._fsrc.current_driver_src.led1 = GPIO_CAM_GP_LED_EN1,
2077 ._fsrc.current_driver_src.led2 = GPIO_CAM_GP_LED_EN2,
2078};
2079#endif
2080
2081static struct vreg *vreg_gp1;
2082static struct vreg *vreg_gp2;
2083static struct vreg *vreg_gp3;
2084static void msm_camera_vreg_config(int vreg_en)
2085{
2086 int rc;
2087
2088 if (vreg_gp1 == NULL) {
2089 vreg_gp1 = vreg_get(NULL, "msme1");
2090 if (IS_ERR(vreg_gp1)) {
2091 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2092 __func__, "msme1", PTR_ERR(vreg_gp1));
2093 return;
2094 }
2095
2096 rc = vreg_set_level(vreg_gp1, 1800);
2097 if (rc) {
2098 pr_err("%s: GP1 set_level failed (%d)\n",
2099 __func__, rc);
2100 return;
2101 }
2102 }
2103
2104 if (vreg_gp2 == NULL) {
2105 vreg_gp2 = vreg_get(NULL, "gp2");
2106 if (IS_ERR(vreg_gp2)) {
2107 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2108 __func__, "gp2", PTR_ERR(vreg_gp2));
2109 return;
2110 }
2111
2112 rc = vreg_set_level(vreg_gp2, 2850);
2113 if (rc) {
2114 pr_err("%s: GP2 set_level failed (%d)\n",
2115 __func__, rc);
2116 }
2117 }
2118
2119 if (vreg_gp3 == NULL) {
2120 vreg_gp3 = vreg_get(NULL, "usb2");
2121 if (IS_ERR(vreg_gp3)) {
2122 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2123 __func__, "gp3", PTR_ERR(vreg_gp3));
2124 return;
2125 }
2126
2127 rc = vreg_set_level(vreg_gp3, 1800);
2128 if (rc) {
2129 pr_err("%s: GP3 set level failed (%d)\n",
2130 __func__, rc);
2131 }
2132 }
2133
2134 if (vreg_en) {
2135 rc = vreg_enable(vreg_gp1);
2136 if (rc) {
2137 pr_err("%s: GP1 enable failed (%d)\n",
2138 __func__, rc);
2139 return;
2140 }
2141
2142 rc = vreg_enable(vreg_gp2);
2143 if (rc) {
2144 pr_err("%s: GP2 enable failed (%d)\n",
2145 __func__, rc);
2146 }
2147
2148 rc = vreg_enable(vreg_gp3);
2149 if (rc) {
2150 pr_err("%s: GP3 enable failed (%d)\n",
2151 __func__, rc);
2152 }
2153 } else {
2154 rc = vreg_disable(vreg_gp1);
2155 if (rc)
2156 pr_err("%s: GP1 disable failed (%d)\n",
2157 __func__, rc);
2158
2159 rc = vreg_disable(vreg_gp2);
2160 if (rc) {
2161 pr_err("%s: GP2 disable failed (%d)\n",
2162 __func__, rc);
2163 }
2164
2165 rc = vreg_disable(vreg_gp3);
2166 if (rc) {
2167 pr_err("%s: GP3 disable failed (%d)\n",
2168 __func__, rc);
2169 }
2170 }
2171}
2172
2173static int config_gpio_table(uint32_t *table, int len)
2174{
2175 int rc = 0, i = 0;
2176
2177 for (i = 0; i < len; i++) {
2178 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2179 if (rc) {
2180 pr_err("%s not able to get gpio\n", __func__);
2181 for (i--; i >= 0; i--)
2182 gpio_tlmm_config(camera_off_gpio_table[i],
2183 GPIO_CFG_ENABLE);
2184 break;
2185 }
2186 }
2187 return rc;
2188}
2189
2190static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
2191static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data;
2192static int config_camera_on_gpios_rear(void)
2193{
2194 int rc = 0;
2195
2196 if (machine_is_msm7x27a_ffa())
2197 msm_camera_vreg_config(1);
2198
2199 rc = config_gpio_table(camera_on_gpio_table,
2200 ARRAY_SIZE(camera_on_gpio_table));
2201 if (rc < 0) {
2202 pr_err("%s: CAMSENSOR gpio table request"
2203 "failed\n", __func__);
2204 return rc;
2205 }
2206
2207 return rc;
2208}
2209
2210static void config_camera_off_gpios_rear(void)
2211{
2212 if (machine_is_msm7x27a_ffa())
2213 msm_camera_vreg_config(0);
2214
2215 config_gpio_table(camera_off_gpio_table,
2216 ARRAY_SIZE(camera_off_gpio_table));
2217}
2218
2219static int config_camera_on_gpios_front(void)
2220{
2221 int rc = 0;
2222
2223 if (machine_is_msm7x27a_ffa())
2224 msm_camera_vreg_config(1);
2225
2226 rc = config_gpio_table(camera_on_gpio_table,
2227 ARRAY_SIZE(camera_on_gpio_table));
2228 if (rc < 0) {
2229 pr_err("%s: CAMSENSOR gpio table request"
2230 "failed\n", __func__);
2231 return rc;
2232 }
2233
2234 return rc;
2235}
2236
2237static void config_camera_off_gpios_front(void)
2238{
2239 if (machine_is_msm7x27a_ffa())
2240 msm_camera_vreg_config(0);
2241
2242 config_gpio_table(camera_off_gpio_table,
2243 ARRAY_SIZE(camera_off_gpio_table));
2244}
2245
2246struct msm_camera_device_platform_data msm_camera_device_data_rear = {
2247 .camera_gpio_on = config_camera_on_gpios_rear,
2248 .camera_gpio_off = config_camera_off_gpios_rear,
2249 .ioext.csiphy = 0xA1000000,
2250 .ioext.csisz = 0x00100000,
2251 .ioext.csiirq = INT_CSI_IRQ_1,
2252 .ioclk.mclk_clk_rate = 24000000,
2253 .ioclk.vfe_clk_rate = 192000000,
2254 .ioext.appphy = MSM_CLK_CTL_PHYS,
2255 .ioext.appsz = MSM_CLK_CTL_SIZE,
2256};
2257
2258struct msm_camera_device_platform_data msm_camera_device_data_front = {
2259 .camera_gpio_on = config_camera_on_gpios_front,
2260 .camera_gpio_off = config_camera_off_gpios_front,
2261 .ioext.csiphy = 0xA0F00000,
2262 .ioext.csisz = 0x00100000,
2263 .ioext.csiirq = INT_CSI_IRQ_0,
2264 .ioclk.mclk_clk_rate = 24000000,
2265 .ioclk.vfe_clk_rate = 192000000,
2266 .ioext.appphy = MSM_CLK_CTL_PHYS,
2267 .ioext.appsz = MSM_CLK_CTL_SIZE,
2268};
2269
2270#ifdef CONFIG_S5K4E1
2271static struct msm_camera_sensor_platform_info s5k4e1_sensor_7627a_info = {
2272 .mount_angle = 90
2273};
2274
2275static struct msm_camera_sensor_flash_data flash_s5k4e1 = {
2276 .flash_type = MSM_CAMERA_FLASH_LED,
2277 .flash_src = &msm_flash_src
2278};
2279
2280static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
2281 .sensor_name = "s5k4e1",
2282 .sensor_reset_enable = 1,
2283 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
2284 .sensor_pwd = 85,
2285 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2286 .vcm_enable = 1,
2287 .pdata = &msm_camera_device_data_rear,
2288 .flash_data = &flash_s5k4e1,
2289 .sensor_platform_info = &s5k4e1_sensor_7627a_info,
2290 .csi_if = 1
2291};
2292
2293static struct platform_device msm_camera_sensor_s5k4e1 = {
2294 .name = "msm_camera_s5k4e1",
2295 .dev = {
2296 .platform_data = &msm_camera_sensor_s5k4e1_data,
2297 },
2298};
2299#endif
2300
2301#ifdef CONFIG_IMX072
2302static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
2303 .mount_angle = 90
2304};
2305
2306static struct msm_camera_sensor_flash_data flash_imx072 = {
2307 .flash_type = MSM_CAMERA_FLASH_LED,
2308 .flash_src = &msm_flash_src
2309};
2310
2311static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
2312 .sensor_name = "imx072",
2313 .sensor_reset_enable = 1,
2314 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
2315 .sensor_pwd = 85,
2316 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2317 .vcm_enable = 1,
2318 .pdata = &msm_camera_device_data_rear,
2319 .flash_data = &flash_imx072,
2320 .sensor_platform_info = &imx072_sensor_7627a_info,
2321 .csi_if = 1
2322};
2323
2324static struct platform_device msm_camera_sensor_imx072 = {
2325 .name = "msm_camera_imx072",
2326 .dev = {
2327 .platform_data = &msm_camera_sensor_imx072_data,
2328 },
2329};
2330#endif
2331
2332#ifdef CONFIG_WEBCAM_OV9726
2333static struct msm_camera_sensor_platform_info ov9726_sensor_7627a_info = {
2334 .mount_angle = 90
2335};
2336
2337static struct msm_camera_sensor_flash_data flash_ov9726 = {
2338 .flash_type = MSM_CAMERA_FLASH_NONE,
2339 .flash_src = &msm_flash_src
2340};
2341
2342static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2343 .sensor_name = "ov9726",
2344 .sensor_reset_enable = 0,
2345 .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
2346 .sensor_pwd = 85,
2347 .vcm_pwd = 1,
2348 .vcm_enable = 0,
2349 .pdata = &msm_camera_device_data_front,
2350 .flash_data = &flash_ov9726,
2351 .sensor_platform_info = &ov9726_sensor_7627a_info,
2352 .csi_if = 1
2353};
2354
2355static struct platform_device msm_camera_sensor_ov9726 = {
2356 .name = "msm_camera_ov9726",
2357 .dev = {
2358 .platform_data = &msm_camera_sensor_ov9726_data,
2359 },
2360};
2361#endif
2362
2363#ifdef CONFIG_MT9E013
2364static struct msm_camera_sensor_platform_info mt9e013_sensor_7627a_info = {
2365 .mount_angle = 90
2366};
2367
2368static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2369 .flash_type = MSM_CAMERA_FLASH_LED,
2370 .flash_src = &msm_flash_src
2371};
2372
2373static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2374 .sensor_name = "mt9e013",
2375 .sensor_reset = 0,
2376 .sensor_reset_enable = 1,
2377 .sensor_pwd = 85,
2378 .vcm_pwd = 1,
2379 .vcm_enable = 0,
2380 .pdata = &msm_camera_device_data_rear,
2381 .flash_data = &flash_mt9e013,
2382 .sensor_platform_info = &mt9e013_sensor_7627a_info,
2383 .csi_if = 1
2384};
2385
2386static struct platform_device msm_camera_sensor_mt9e013 = {
2387 .name = "msm_camera_mt9e013",
2388 .dev = {
2389 .platform_data = &msm_camera_sensor_mt9e013_data,
2390 },
2391};
2392#endif
2393
2394static struct i2c_board_info i2c_camera_devices[] = {
2395 #ifdef CONFIG_S5K4E1
2396 {
2397 I2C_BOARD_INFO("s5k4e1", 0x36),
2398 },
2399 {
2400 I2C_BOARD_INFO("s5k4e1_af", 0x8c >> 1),
2401 },
2402 #endif
2403 #ifdef CONFIG_WEBCAM_OV9726
2404 {
2405 I2C_BOARD_INFO("ov9726", 0x10),
2406 },
2407 #endif
2408 #ifdef CONFIG_IMX072
2409 {
2410 I2C_BOARD_INFO("imx072", 0x34),
2411 },
2412 #endif
2413 #ifdef CONFIG_MT9E013
2414 {
2415 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2416 },
2417 #endif
2418 {
2419 I2C_BOARD_INFO("sc628a", 0x37),
2420 },
2421};
2422#endif
2423#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
2424 && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
2425static struct msm_gpio uart2dm_gpios[] = {
2426 {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2427 "uart2dm_rfr_n" },
2428 {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2429 "uart2dm_cts_n" },
2430 {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2431 "uart2dm_rx" },
2432 {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2433 "uart2dm_tx" },
2434};
2435
2436static void msm7x27a_cfg_uart2dm_serial(void)
2437{
2438 int ret;
2439 ret = msm_gpios_request_enable(uart2dm_gpios,
2440 ARRAY_SIZE(uart2dm_gpios));
2441 if (ret)
2442 pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
2443}
2444#else
2445static void msm7x27a_cfg_uart2dm_serial(void) { }
2446#endif
2447
2448static struct platform_device *rumi_sim_devices[] __initdata = {
2449 &msm_device_dmov,
2450 &msm_device_smd,
2451 &smc91x_device,
2452 &msm_device_uart1,
2453 &msm_device_nand,
2454 &msm_device_uart_dm1,
2455 &msm_gsbi0_qup_i2c_device,
2456 &msm_gsbi1_qup_i2c_device,
2457};
2458
2459static struct platform_device *surf_ffa_devices[] __initdata = {
2460 &msm_device_dmov,
2461 &msm_device_smd,
2462 &msm_device_uart1,
2463 &msm_device_uart_dm1,
2464 &msm_device_uart_dm2,
2465 &msm_device_nand,
2466 &msm_gsbi0_qup_i2c_device,
2467 &msm_gsbi1_qup_i2c_device,
2468 &msm_device_otg,
2469 &msm_device_gadget_peripheral,
2470 &android_usb_device,
2471 &android_pmem_device,
2472 &android_pmem_adsp_device,
2473 &android_pmem_audio_device,
2474 &msm_device_snd,
2475 &msm_device_adspdec,
2476 &msm_fb_device,
2477 &lcdc_toshiba_panel_device,
2478 &msm_batt_device,
2479 &smsc911x_device,
2480#ifdef CONFIG_S5K4E1
2481 &msm_camera_sensor_s5k4e1,
2482#endif
2483#ifdef CONFIG_IMX072
2484 &msm_camera_sensor_imx072,
2485#endif
2486#ifdef CONFIG_WEBCAM_OV9726
2487 &msm_camera_sensor_ov9726,
2488#endif
2489#ifdef CONFIG_MT9E013
2490 &msm_camera_sensor_mt9e013,
2491#endif
2492#ifdef CONFIG_FB_MSM_MIPI_DSI
2493 &mipi_dsi_renesas_panel_device,
2494#endif
2495 &msm_kgsl_3d0,
2496#ifdef CONFIG_BT
2497 &msm_bt_power_device,
2498#endif
2499};
2500
2501static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2502static int __init pmem_kernel_ebi1_size_setup(char *p)
2503{
2504 pmem_kernel_ebi1_size = memparse(p, NULL);
2505 return 0;
2506}
2507early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2508
2509static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2510static int __init pmem_audio_size_setup(char *p)
2511{
2512 pmem_audio_size = memparse(p, NULL);
2513 return 0;
2514}
2515early_param("pmem_audio_size", pmem_audio_size_setup);
2516
2517static void __init msm_msm7x2x_allocate_memory_regions(void)
2518{
2519 void *addr;
2520 unsigned long size;
2521
2522 size = fb_size ? : MSM_FB_SIZE;
2523 addr = alloc_bootmem_align(size, 0x1000);
2524 msm_fb_resources[0].start = __pa(addr);
2525 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2526 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2527 size, addr, __pa(addr));
2528}
2529
2530static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
2531 [MEMTYPE_SMI] = {
2532 },
2533 [MEMTYPE_EBI0] = {
2534 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2535 },
2536 [MEMTYPE_EBI1] = {
2537 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2538 },
2539};
2540
2541static void __init size_pmem_devices(void)
2542{
2543#ifdef CONFIG_ANDROID_PMEM
2544 android_pmem_adsp_pdata.size = pmem_adsp_size;
2545 android_pmem_pdata.size = pmem_mdp_size;
2546 android_pmem_audio_pdata.size = pmem_audio_size;
2547#endif
2548}
2549
2550static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2551{
2552 msm7x27a_reserve_table[p->memory_type].size += p->size;
2553}
2554
2555static void __init reserve_pmem_memory(void)
2556{
2557#ifdef CONFIG_ANDROID_PMEM
2558 reserve_memory_for(&android_pmem_adsp_pdata);
2559 reserve_memory_for(&android_pmem_pdata);
2560 reserve_memory_for(&android_pmem_audio_pdata);
2561 msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2562#endif
2563}
2564
2565static void __init msm7x27a_calculate_reserve_sizes(void)
2566{
2567 size_pmem_devices();
2568 reserve_pmem_memory();
2569}
2570
2571static int msm7x27a_paddr_to_memtype(unsigned int paddr)
2572{
2573 return MEMTYPE_EBI1;
2574}
2575
2576static struct reserve_info msm7x27a_reserve_info __initdata = {
2577 .memtype_reserve_table = msm7x27a_reserve_table,
2578 .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
2579 .paddr_to_memtype = msm7x27a_paddr_to_memtype,
2580};
2581
2582static void __init msm7x27a_reserve(void)
2583{
2584 reserve_info = &msm7x27a_reserve_info;
2585 msm_reserve();
2586}
2587
2588static void __init msm_device_i2c_init(void)
2589{
2590 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2591 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2592}
2593
2594static struct msm_panel_common_pdata mdp_pdata = {
2595 .gpio = 97,
2596 .mdp_rev = MDP_REV_303,
2597};
2598
2599#define GPIO_LCDC_BRDG_PD 128
2600#define GPIO_LCDC_BRDG_RESET_N 129
2601
2602#define LCDC_RESET_PHYS 0x90008014
2603static void __iomem *lcdc_reset_ptr;
2604
2605static unsigned mipi_dsi_gpio[] = {
2606 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2607 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2608 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2609 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2610};
2611
2612enum {
2613 DSI_SINGLE_LANE = 1,
2614 DSI_TWO_LANES,
2615};
2616
2617static int msm_fb_get_lane_config(void)
2618{
2619 int rc = DSI_TWO_LANES;
2620
2621 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
2622 rc = DSI_SINGLE_LANE;
2623 pr_info("DSI Single Lane\n");
2624 } else {
2625 pr_info("DSI Two Lanes\n");
2626 }
2627 return rc;
2628}
2629
2630static int msm_fb_dsi_client_reset(void)
2631{
2632 int rc = 0;
2633
2634 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2635 if (rc < 0) {
2636 pr_err("failed to request lcd brdg reset_n\n");
2637 return rc;
2638 }
2639
2640 rc = gpio_request(GPIO_LCDC_BRDG_PD, "lcdc_brdg_pd");
2641 if (rc < 0) {
2642 pr_err("failed to request lcd brdg pd\n");
2643 return rc;
2644 }
2645
2646 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2647 if (rc) {
2648 pr_err("Failed to enable LCDC Bridge reset enable\n");
2649 goto gpio_error;
2650 }
2651
2652 rc = gpio_tlmm_config(mipi_dsi_gpio[1], GPIO_CFG_ENABLE);
2653 if (rc) {
2654 pr_err("Failed to enable LCDC Bridge pd enable\n");
2655 goto gpio_error2;
2656 }
2657
2658 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2659 rc |= gpio_direction_output(GPIO_LCDC_BRDG_PD, 1);
2660 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2661
2662 if (!rc) {
2663 if (machine_is_msm7x27a_surf()) {
2664 lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
2665 sizeof(uint32_t));
2666
2667 if (!lcdc_reset_ptr)
2668 return 0;
2669 }
2670 return rc;
2671 } else {
2672 goto gpio_error;
2673 }
2674
2675gpio_error2:
2676 pr_err("Failed GPIO bridge pd\n");
2677 gpio_free(GPIO_LCDC_BRDG_PD);
2678
2679gpio_error:
2680 pr_err("Failed GPIO bridge reset\n");
2681 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2682 return rc;
2683}
2684
2685static const char * const msm_fb_dsi_vreg[] = {
2686 "gp2",
2687 "msme1",
2688};
2689
2690static const int msm_fb_dsi_vreg_mV[] = {
2691 2850,
2692 1800,
2693};
2694
2695static struct vreg *dsi_vreg[ARRAY_SIZE(msm_fb_dsi_vreg)];
2696static int dsi_gpio_initialized;
2697
2698static int mipi_dsi_panel_power(int on)
2699{
2700 int i, rc = 0;
2701 uint32_t lcdc_reset_cfg;
2702
2703 /* I2C-controlled GPIO Expander -init of the GPIOs very late */
2704 if (!dsi_gpio_initialized) {
2705 pmapp_disp_backlight_init();
2706
2707 rc = gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr");
2708 if (rc < 0) {
2709 pr_err("failed to request gpio_disp_pwr\n");
2710 return rc;
2711 }
2712
2713 if (machine_is_msm7x27a_surf()) {
2714 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
2715 if (rc < 0) {
2716 pr_err("failed to enable display pwr\n");
2717 goto fail_gpio1;
2718 }
2719
2720 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2721 if (rc < 0) {
2722 pr_err("failed to request gpio_bkl_en\n");
2723 goto fail_gpio1;
2724 }
2725
2726 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2727 if (rc < 0) {
2728 pr_err("failed to enable backlight\n");
2729 goto fail_gpio2;
2730 }
2731 }
2732
2733 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2734 dsi_vreg[i] = vreg_get(0, msm_fb_dsi_vreg[i]);
2735
2736 if (IS_ERR(dsi_vreg[i])) {
2737 pr_err("%s: vreg get failed with : (%ld)\n",
2738 __func__, PTR_ERR(dsi_vreg[i]));
2739 goto fail_gpio2;
2740 }
2741
2742 rc = vreg_set_level(dsi_vreg[i],
2743 msm_fb_dsi_vreg_mV[i]);
2744
2745 if (rc < 0) {
2746 pr_err("%s: set regulator level failed "
2747 "with :(%d)\n", __func__, rc);
2748 goto vreg_fail1;
2749 }
2750 }
2751 dsi_gpio_initialized = 1;
2752 }
2753
2754 if (machine_is_msm7x27a_surf()) {
2755 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
2756 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
2757 } else if (machine_is_msm7x27a_ffa()) {
2758 if (on) {
2759 /* This line drives an active low pin on FFA */
2760 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN,
2761 !on);
2762 if (rc < 0)
2763 pr_err("failed to set direction for "
2764 "display pwr\n");
2765 } else {
2766 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN,
2767 !on);
2768 rc = gpio_direction_input(GPIO_DISPLAY_PWR_EN);
2769 if (rc < 0)
2770 pr_err("failed to set direction for "
2771 "display pwr\n");
2772 }
2773 }
2774
2775 if (on) {
2776 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2777
2778 if (machine_is_msm7x27a_surf()) {
2779 lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
2780 rmb();
2781 lcdc_reset_cfg &= ~1;
2782
2783 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2784 msleep(20);
2785 wmb();
2786 lcdc_reset_cfg |= 1;
2787 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2788 } else {
2789 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2790 0);
2791 msleep(20);
2792 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2793 1);
2794 }
2795
2796 if (pmapp_disp_backlight_set_brightness(100))
2797 pr_err("backlight set brightness failed\n");
2798 } else {
2799 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 1);
2800
2801 if (pmapp_disp_backlight_set_brightness(0))
2802 pr_err("backlight set brightness failed\n");
2803 }
2804
2805 /*Configure vreg lines */
2806 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2807 if (on) {
2808 rc = vreg_enable(dsi_vreg[i]);
2809
2810 if (rc) {
2811 printk(KERN_ERR "vreg_enable: %s vreg"
2812 "operation failed\n",
2813 msm_fb_dsi_vreg[i]);
2814
2815 goto vreg_fail2;
2816 }
2817 } else {
2818 rc = vreg_disable(dsi_vreg[i]);
2819
2820 if (rc) {
2821 printk(KERN_ERR "vreg_disable: %s vreg "
2822 "operation failed\n",
2823 msm_fb_dsi_vreg[i]);
2824 goto vreg_fail2;
2825 }
2826 }
2827 }
2828
2829 return rc;
2830
2831vreg_fail2:
2832 if (on) {
2833 for (; i > 0; i--)
2834 vreg_disable(dsi_vreg[i - 1]);
2835 } else {
2836 for (; i > 0; i--)
2837 vreg_enable(dsi_vreg[i - 1]);
2838 }
2839
2840 return rc;
2841
2842vreg_fail1:
2843 for (; i > 0; i--)
2844 vreg_put(dsi_vreg[i - 1]);
2845
2846fail_gpio2:
2847 gpio_free(GPIO_BACKLIGHT_EN);
2848fail_gpio1:
2849 gpio_free(GPIO_DISPLAY_PWR_EN);
2850 dsi_gpio_initialized = 0;
2851 return rc;
2852}
2853
2854#define MDP_303_VSYNC_GPIO 97
2855
2856#ifdef CONFIG_FB_MSM_MDP303
2857static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2858 .vsync_gpio = MDP_303_VSYNC_GPIO,
2859 .dsi_power_save = mipi_dsi_panel_power,
2860 .dsi_client_reset = msm_fb_dsi_client_reset,
2861 .get_lane_config = msm_fb_get_lane_config,
2862};
2863#endif
2864
2865static void __init msm_fb_add_devices(void)
2866{
2867 msm_fb_register_device("mdp", &mdp_pdata);
2868 msm_fb_register_device("lcdc", &lcdc_pdata);
2869 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2870}
2871
2872#define MSM_EBI2_PHYS 0xa0d00000
2873#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
2874
2875static void __init msm7x27a_init_ebi2(void)
2876{
2877 uint32_t ebi2_cfg;
2878 void __iomem *ebi2_cfg_ptr;
2879
2880 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
2881 if (!ebi2_cfg_ptr)
2882 return;
2883
2884 ebi2_cfg = readl(ebi2_cfg_ptr);
2885 if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf())
2886 ebi2_cfg |= (1 << 4); /* CS2 */
2887
2888 writel(ebi2_cfg, ebi2_cfg_ptr);
2889 iounmap(ebi2_cfg_ptr);
2890
2891 /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
2892 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
2893 sizeof(uint32_t));
2894 if (!ebi2_cfg_ptr)
2895 return;
2896
2897 ebi2_cfg = readl(ebi2_cfg_ptr);
2898 if (machine_is_msm7x27a_surf())
2899 ebi2_cfg |= (1 << 31);
2900
2901 writel(ebi2_cfg, ebi2_cfg_ptr);
2902 iounmap(ebi2_cfg_ptr);
2903}
2904
2905#define ATMEL_TS_I2C_NAME "maXTouch"
2906static struct vreg *vreg_l12;
2907static struct vreg *vreg_s3;
2908
2909#define ATMEL_TS_GPIO_IRQ 82
2910
2911static int atmel_ts_power_on(bool on)
2912{
2913 int rc;
2914
2915 rc = on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2916 if (rc) {
2917 pr_err("%s: vreg %sable failed (%d)\n",
2918 __func__, on ? "en" : "dis", rc);
2919 return rc;
2920 }
2921
2922 rc = on ? vreg_enable(vreg_s3) : vreg_disable(vreg_s3);
2923 if (rc) {
2924 pr_err("%s: vreg %sable failed (%d) for S3\n",
2925 __func__, on ? "en" : "dis", rc);
2926 !on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2927 return rc;
2928 }
2929 /* vreg stabilization delay */
2930 msleep(50);
2931 return 0;
2932}
2933
2934static int atmel_ts_platform_init(struct i2c_client *client)
2935{
2936 int rc;
2937
2938 vreg_l12 = vreg_get(NULL, "gp2");
2939 if (IS_ERR(vreg_l12)) {
2940 pr_err("%s: vreg_get for L2 failed\n", __func__);
2941 return PTR_ERR(vreg_l12);
2942 }
2943
2944 rc = vreg_set_level(vreg_l12, 2850);
2945 if (rc) {
2946 pr_err("%s: vreg set level failed (%d) for l2\n",
2947 __func__, rc);
2948 goto vreg_put_l2;
2949 }
2950
2951 vreg_s3 = vreg_get(NULL, "msme1");
2952 if (IS_ERR(vreg_s3)) {
2953 pr_err("%s: vreg_get for S3 failed\n", __func__);
2954 rc = PTR_ERR(vreg_s3);
2955 goto vreg_put_l2;
2956 }
2957
2958 rc = vreg_set_level(vreg_s3, 1800);
2959 if (rc) {
2960 pr_err("%s: vreg set level failed (%d) for S3\n",
2961 __func__, rc);
2962 goto vreg_put_s3;
2963 }
2964
2965 rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
2966 GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
2967 GPIO_CFG_8MA), GPIO_CFG_ENABLE);
2968 if (rc) {
2969 pr_err("%s: gpio_tlmm_config for %d failed\n",
2970 __func__, ATMEL_TS_GPIO_IRQ);
2971 goto vreg_put_s3;
2972 }
2973
2974 /* configure touchscreen interrupt gpio */
2975 rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
2976 if (rc) {
2977 pr_err("%s: unable to request gpio %d\n",
2978 __func__, ATMEL_TS_GPIO_IRQ);
2979 goto ts_gpio_tlmm_unconfig;
2980 }
2981
2982 rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
2983 if (rc < 0) {
2984 pr_err("%s: unable to set the direction of gpio %d\n",
2985 __func__, ATMEL_TS_GPIO_IRQ);
2986 goto free_ts_gpio;
2987 }
2988 return 0;
2989
2990free_ts_gpio:
2991 gpio_free(ATMEL_TS_GPIO_IRQ);
2992ts_gpio_tlmm_unconfig:
2993 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
2994 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
2995 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
2996vreg_put_s3:
2997 vreg_put(vreg_s3);
2998vreg_put_l2:
2999 vreg_put(vreg_l12);
3000 return rc;
3001}
3002
3003static int atmel_ts_platform_exit(struct i2c_client *client)
3004{
3005 gpio_free(ATMEL_TS_GPIO_IRQ);
3006 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3007 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3008 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3009 vreg_disable(vreg_s3);
3010 vreg_put(vreg_s3);
3011 vreg_disable(vreg_l12);
3012 vreg_put(vreg_l12);
3013 return 0;
3014}
3015
3016static u8 atmel_ts_read_chg(void)
3017{
3018 return gpio_get_value(ATMEL_TS_GPIO_IRQ);
3019}
3020
3021static u8 atmel_ts_valid_interrupt(void)
3022{
3023 return !atmel_ts_read_chg();
3024}
3025
3026#define ATMEL_X_OFFSET 13
3027#define ATMEL_Y_OFFSET 0
3028
3029static struct mxt_platform_data atmel_ts_pdata = {
3030 .numtouch = 4,
3031 .init_platform_hw = atmel_ts_platform_init,
3032 .exit_platform_hw = atmel_ts_platform_exit,
3033 .power_on = atmel_ts_power_on,
3034 .display_res_x = 480,
3035 .display_res_y = 864,
3036 .min_x = ATMEL_X_OFFSET,
3037 .max_x = (505 - ATMEL_X_OFFSET),
3038 .min_y = ATMEL_Y_OFFSET,
3039 .max_y = (863 - ATMEL_Y_OFFSET),
3040 .valid_interrupt = atmel_ts_valid_interrupt,
3041 .read_chg = atmel_ts_read_chg,
3042};
3043
3044static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
3045 {
3046 I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
3047 .platform_data = &atmel_ts_pdata,
3048 .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
3049 },
3050};
3051
3052#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
3053
3054static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
3055static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
3056
3057static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
3058 ARRAY_SIZE(kp_row_gpios)] = {
3059 [KP_INDEX(0, 0)] = KEY_7,
3060 [KP_INDEX(0, 1)] = KEY_DOWN,
3061 [KP_INDEX(0, 2)] = KEY_UP,
3062 [KP_INDEX(0, 3)] = KEY_RIGHT,
3063 [KP_INDEX(0, 4)] = KEY_ENTER,
3064
3065 [KP_INDEX(1, 0)] = KEY_LEFT,
3066 [KP_INDEX(1, 1)] = KEY_SEND,
3067 [KP_INDEX(1, 2)] = KEY_1,
3068 [KP_INDEX(1, 3)] = KEY_4,
3069 [KP_INDEX(1, 4)] = KEY_CLEAR,
3070
3071 [KP_INDEX(2, 0)] = KEY_6,
3072 [KP_INDEX(2, 1)] = KEY_5,
3073 [KP_INDEX(2, 2)] = KEY_8,
3074 [KP_INDEX(2, 3)] = KEY_3,
3075 [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
3076
3077 [KP_INDEX(3, 0)] = KEY_9,
3078 [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
3079 [KP_INDEX(3, 2)] = KEY_0,
3080 [KP_INDEX(3, 3)] = KEY_2,
3081 [KP_INDEX(3, 4)] = KEY_SLEEP,
3082
3083 [KP_INDEX(4, 0)] = KEY_BACK,
3084 [KP_INDEX(4, 1)] = KEY_HOME,
3085 [KP_INDEX(4, 2)] = KEY_MENU,
3086 [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
3087 [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
3088};
3089
3090/* SURF keypad platform device information */
3091static struct gpio_event_matrix_info kp_matrix_info = {
3092 .info.func = gpio_event_matrix_func,
3093 .keymap = keymap,
3094 .output_gpios = kp_row_gpios,
3095 .input_gpios = kp_col_gpios,
3096 .noutputs = ARRAY_SIZE(kp_row_gpios),
3097 .ninputs = ARRAY_SIZE(kp_col_gpios),
3098 .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
3099 .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
3100 .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
3101 GPIOKPF_PRINT_UNMAPPED_KEYS,
3102};
3103
3104static struct gpio_event_info *kp_info[] = {
3105 &kp_matrix_info.info
3106};
3107
3108static struct gpio_event_platform_data kp_pdata = {
3109 .name = "7x27a_kp",
3110 .info = kp_info,
3111 .info_count = ARRAY_SIZE(kp_info)
3112};
3113
3114static struct platform_device kp_pdev = {
3115 .name = GPIO_EVENT_DEV_NAME,
3116 .id = -1,
3117 .dev = {
3118 .platform_data = &kp_pdata,
3119 },
3120};
3121
3122static struct msm_handset_platform_data hs_platform_data = {
3123 .hs_name = "7k_handset",
3124 .pwr_key_delay_ms = 500, /* 0 will disable end key */
3125};
3126
3127static struct platform_device hs_pdev = {
3128 .name = "msm-handset",
3129 .id = -1,
3130 .dev = {
3131 .platform_data = &hs_platform_data,
3132 },
3133};
3134
3135#define LED_GPIO_PDM 96
3136#define UART1DM_RX_GPIO 45
3137static void __init msm7x2x_init(void)
3138{
3139
3140 /* Common functions for SURF/FFA/RUMI3 */
3141 msm_device_i2c_init();
3142 msm7x27a_init_mmc();
3143 msm7x27a_init_ebi2();
3144 msm7x27a_cfg_uart2dm_serial();
3145#ifdef CONFIG_SERIAL_MSM_HS
3146 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
3147 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
3148#endif
3149
3150 if (machine_is_msm7x27a_rumi3()) {
3151 platform_add_devices(rumi_sim_devices,
3152 ARRAY_SIZE(rumi_sim_devices));
3153 }
3154 if (machine_is_msm7x27a_surf() || machine_is_msm7x27a_ffa()) {
3155#ifdef CONFIG_USB_MSM_OTG_72K
3156 msm_otg_pdata.swfi_latency =
3157 msm7x27a_pm_data
3158 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
3159 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3160#endif
3161 msm_device_gadget_peripheral.dev.platform_data =
3162 &msm_gadget_pdata;
3163 msm7x27a_cfg_smsc911x();
3164 platform_add_devices(msm_footswitch_devices,
3165 msm_num_footswitch_devices);
3166 platform_add_devices(surf_ffa_devices,
3167 ARRAY_SIZE(surf_ffa_devices));
3168 msm_fb_add_devices();
3169#ifdef CONFIG_USB_EHCI_MSM_72K
3170 msm7x2x_init_host();
3171#endif
3172 }
3173
3174 msm_pm_set_platform_data(msm7x27a_pm_data,
3175 ARRAY_SIZE(msm7x27a_pm_data));
3176
3177#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
3178 register_i2c_devices();
3179#endif
3180#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3181 bt_power_init();
3182#endif
3183 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
3184 atmel_ts_pdata.min_x = 0;
3185 atmel_ts_pdata.max_x = 480;
3186 atmel_ts_pdata.min_y = 0;
3187 atmel_ts_pdata.max_y = 320;
3188 }
3189
3190 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
3191 atmel_ts_i2c_info,
3192 ARRAY_SIZE(atmel_ts_i2c_info));
3193
3194 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
3195 i2c_camera_devices,
3196 ARRAY_SIZE(i2c_camera_devices));
3197 platform_device_register(&kp_pdev);
3198 platform_device_register(&hs_pdev);
3199
3200 /* configure it as a pdm function*/
3201 if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
3202 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
3203 GPIO_CFG_8MA), GPIO_CFG_ENABLE))
3204 pr_err("%s: gpio_tlmm_config for %d failed\n",
3205 __func__, LED_GPIO_PDM);
3206 else
3207 platform_device_register(&led_pdev);
3208
3209#ifdef CONFIG_MSM_RPC_VIBRATOR
3210 if (machine_is_msm7x27a_ffa())
3211 msm_init_pmic_vibrator();
3212#endif
3213 /*7x25a kgsl initializations*/
3214 msm7x25a_kgsl_3d0_init();
3215}
3216
3217static void __init msm7x2x_init_early(void)
3218{
3219 msm7x2x_misc_init();
3220 msm_msm7x2x_allocate_memory_regions();
3221}
3222
3223MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
3224 .boot_params = PHYS_OFFSET + 0x100,
3225 .map_io = msm_common_io_init,
3226 .reserve = msm7x27a_reserve,
3227 .init_irq = msm_init_irq,
3228 .init_machine = msm7x2x_init,
3229 .timer = &msm_timer,
3230 .init_early = msm7x2x_init_early,
3231MACHINE_END
3232MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
3233 .boot_params = PHYS_OFFSET + 0x100,
3234 .map_io = msm_common_io_init,
3235 .reserve = msm7x27a_reserve,
3236 .init_irq = msm_init_irq,
3237 .init_machine = msm7x2x_init,
3238 .timer = &msm_timer,
3239 .init_early = msm7x2x_init_early,
3240MACHINE_END
3241MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
3242 .boot_params = PHYS_OFFSET + 0x100,
3243 .map_io = msm_common_io_init,
3244 .reserve = msm7x27a_reserve,
3245 .init_irq = msm_init_irq,
3246 .init_machine = msm7x2x_init,
3247 .timer = &msm_timer,
3248 .init_early = msm7x2x_init_early,
3249MACHINE_END