blob: 9ed6fd15c0b446cdd203706b3a685a0c9b362a2b [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/*
2 * Copyright (C) 2008 Google, Inc.
3 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
19#include <linux/dma-mapping.h>
20#include <asm/clkdev.h>
21#include <mach/irqs.h>
22#include <mach/msm_iomap.h>
23#include <mach/dma.h>
24#include <mach/board.h>
25
26#include "devices.h"
27
28#include <asm/mach/flash.h>
29
30#include <asm/mach/mmc.h>
31#include <mach/msm_hsusb.h>
32
33static struct resource resources_uart1[] = {
34 {
35 .start = INT_UART1,
36 .end = INT_UART1,
37 .flags = IORESOURCE_IRQ,
38 },
39 {
40 .start = MSM_UART1_PHYS,
41 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
42 .flags = IORESOURCE_MEM,
43 },
44};
45
46static struct resource resources_uart2[] = {
47 {
48 .start = INT_UART2,
49 .end = INT_UART2,
50 .flags = IORESOURCE_IRQ,
51 },
52 {
53 .start = MSM_UART2_PHYS,
54 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
55 .flags = IORESOURCE_MEM,
56 },
57};
58
59static struct resource resources_uart3[] = {
60 {
61 .start = INT_UART3,
62 .end = INT_UART3,
63 .flags = IORESOURCE_IRQ,
64 },
65 {
66 .start = MSM_UART3_PHYS,
67 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
68 .flags = IORESOURCE_MEM,
69 },
70};
71
72struct platform_device msm_device_uart1 = {
73 .name = "msm_serial",
74 .id = 0,
75 .num_resources = ARRAY_SIZE(resources_uart1),
76 .resource = resources_uart1,
77};
78
79struct platform_device msm_device_uart2 = {
80 .name = "msm_serial",
81 .id = 1,
82 .num_resources = ARRAY_SIZE(resources_uart2),
83 .resource = resources_uart2,
84};
85
86struct platform_device msm_device_uart3 = {
87 .name = "msm_serial",
88 .id = 2,
89 .num_resources = ARRAY_SIZE(resources_uart3),
90 .resource = resources_uart3,
91};
92
93#define MSM_UART1DM_PHYS 0xA0200000
94#define MSM_UART2DM_PHYS 0xA0300000
95static struct resource msm_uart1_dm_resources[] = {
96 {
97 .start = MSM_UART1DM_PHYS,
98 .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
99 .flags = IORESOURCE_MEM,
100 },
101 {
102 .start = INT_UART1DM_IRQ,
103 .end = INT_UART1DM_IRQ,
104 .flags = IORESOURCE_IRQ,
105 },
106 {
107 .start = INT_UART1DM_RX,
108 .end = INT_UART1DM_RX,
109 .flags = IORESOURCE_IRQ,
110 },
111 {
112 .start = DMOV_HSUART1_TX_CHAN,
113 .end = DMOV_HSUART1_RX_CHAN,
114 .name = "uartdm_channels",
115 .flags = IORESOURCE_DMA,
116 },
117 {
118 .start = DMOV_HSUART1_TX_CRCI,
119 .end = DMOV_HSUART1_RX_CRCI,
120 .name = "uartdm_crci",
121 .flags = IORESOURCE_DMA,
122 },
123};
124
125static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
126
127struct platform_device msm_device_uart_dm1 = {
128 .name = "msm_serial_hs",
129 .id = 0,
130 .num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
131 .resource = msm_uart1_dm_resources,
132 .dev = {
133 .dma_mask = &msm_uart_dm1_dma_mask,
134 .coherent_dma_mask = DMA_BIT_MASK(32),
135 },
136};
137
138static struct resource msm_uart2_dm_resources[] = {
139 {
140 .start = MSM_UART2DM_PHYS,
141 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
142 .flags = IORESOURCE_MEM,
143 },
144 {
145 .start = INT_UART2DM_IRQ,
146 .end = INT_UART2DM_IRQ,
147 .flags = IORESOURCE_IRQ,
148 },
149 {
150 .start = INT_UART2DM_RX,
151 .end = INT_UART2DM_RX,
152 .flags = IORESOURCE_IRQ,
153 },
154 {
155 .start = DMOV_HSUART2_TX_CHAN,
156 .end = DMOV_HSUART2_RX_CHAN,
157 .name = "uartdm_channels",
158 .flags = IORESOURCE_DMA,
159 },
160 {
161 .start = DMOV_HSUART2_TX_CRCI,
162 .end = DMOV_HSUART2_RX_CRCI,
163 .name = "uartdm_crci",
164 .flags = IORESOURCE_DMA,
165 },
166};
167
168static u64 msm_uart_dm2_dma_mask = DMA_BIT_MASK(32);
169
170struct platform_device msm_device_uart_dm2 = {
171 .name = "msm_serial_hs",
172 .id = 1,
173 .num_resources = ARRAY_SIZE(msm_uart2_dm_resources),
174 .resource = msm_uart2_dm_resources,
175 .dev = {
176 .dma_mask = &msm_uart_dm2_dma_mask,
177 .coherent_dma_mask = DMA_BIT_MASK(32),
178 },
179};
180
181#define MSM_I2C_SIZE SZ_4K
182#define MSM_I2C_PHYS 0xA9900000
183static struct resource resources_i2c[] = {
184 {
185 .start = MSM_I2C_PHYS,
186 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
187 .flags = IORESOURCE_MEM,
188 },
189 {
190 .start = INT_PWB_I2C,
191 .end = INT_PWB_I2C,
192 .flags = IORESOURCE_IRQ,
193 },
194};
195
196struct platform_device msm_device_i2c = {
197 .name = "msm_i2c",
198 .id = 0,
199 .num_resources = ARRAY_SIZE(resources_i2c),
200 .resource = resources_i2c,
201};
202
203#define MSM_HSUSB_PHYS 0xA0800000
204static struct resource resources_hsusb_otg[] = {
205 {
206 .start = MSM_HSUSB_PHYS,
207 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
208 .flags = IORESOURCE_MEM,
209 },
210 {
211 .start = INT_USB_HS,
212 .end = INT_USB_HS,
213 .flags = IORESOURCE_IRQ,
214 },
215};
216
217static u64 dma_mask = 0xffffffffULL;
218struct platform_device msm_device_hsusb_otg = {
219 .name = "msm_hsusb_otg",
220 .id = -1,
221 .num_resources = ARRAY_SIZE(resources_hsusb_otg),
222 .resource = resources_hsusb_otg,
223 .dev = {
224 .dma_mask = &dma_mask,
225 .coherent_dma_mask = 0xffffffffULL,
226 },
227};
228
229static struct resource resources_hsusb_peripheral[] = {
230 {
231 .start = MSM_HSUSB_PHYS,
232 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
233 .flags = IORESOURCE_MEM,
234 },
235 {
236 .start = INT_USB_HS,
237 .end = INT_USB_HS,
238 .flags = IORESOURCE_IRQ,
239 },
240 {
241 .name = "vbus_interrupt",
242 .start = MSM_GPIO_TO_INT(112),
243 .end = MSM_GPIO_TO_INT(112),
244 .flags = IORESOURCE_IRQ,
245 },
246 {
247 .name = "id_interrupt",
248 .start = MSM_GPIO_TO_INT(114),
249 .end = MSM_GPIO_TO_INT(114),
250 .flags = IORESOURCE_IRQ,
251 },
252};
253
254static struct resource resources_gadget_peripheral[] = {
255 {
256 .start = MSM_HSUSB_PHYS,
257 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
258 .flags = IORESOURCE_MEM,
259 },
260 {
261 .start = INT_USB_HS,
262 .end = INT_USB_HS,
263 .flags = IORESOURCE_IRQ,
264 },
265};
266
267struct platform_device msm_device_hsusb_peripheral = {
268 .name = "msm_hsusb_peripheral",
269 .id = -1,
270 .num_resources = ARRAY_SIZE(resources_hsusb_peripheral),
271 .resource = resources_hsusb_peripheral,
272 .dev = {
273 .dma_mask = &dma_mask,
274 .coherent_dma_mask = 0xffffffffULL,
275 },
276};
277
278struct platform_device msm_device_gadget_peripheral = {
279 .name = "msm_hsusb",
280 .id = -1,
281 .num_resources = ARRAY_SIZE(resources_gadget_peripheral),
282 .resource = resources_gadget_peripheral,
283 .dev = {
284 .dma_mask = &dma_mask,
285 .coherent_dma_mask = 0xffffffffULL,
286 },
287};
288
289static struct resource resources_hsusb_host[] = {
290 {
291 .start = MSM_HSUSB_PHYS,
292 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
293 .flags = IORESOURCE_MEM,
294 },
295 {
296 .start = INT_USB_HS,
297 .end = INT_USB_HS,
298 .flags = IORESOURCE_IRQ,
299 },
300};
301
302struct platform_device msm_device_hsusb_host = {
303 .name = "msm_hsusb_host",
304 .id = 0,
305 .num_resources = ARRAY_SIZE(resources_hsusb_host),
306 .resource = resources_hsusb_host,
307 .dev = {
308 .dma_mask = &dma_mask,
309 .coherent_dma_mask = 0xffffffffULL,
310 },
311};
312
313static struct platform_device *msm_host_devices[] = {
314 &msm_device_hsusb_host,
315};
316
317int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat)
318{
319 struct platform_device *pdev;
320
321 pdev = msm_host_devices[host];
322 if (!pdev)
323 return -ENODEV;
324 pdev->dev.platform_data = plat;
325 return platform_device_register(pdev);
326}
327
328#define MSM_NAND_PHYS 0xA0A00000
329static struct resource resources_nand[] = {
330 [0] = {
331 .name = "msm_nand_dmac",
332 .start = DMOV_NAND_CHAN,
333 .end = DMOV_NAND_CHAN,
334 .flags = IORESOURCE_DMA,
335 },
336 [1] = {
337 .name = "msm_nand_phys",
338 .start = MSM_NAND_PHYS,
339 .end = MSM_NAND_PHYS + 0x7FF,
340 .flags = IORESOURCE_MEM,
341 },
342};
343
344static struct resource resources_otg[] = {
345 {
346 .start = MSM_HSUSB_PHYS,
347 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
348 .flags = IORESOURCE_MEM,
349 },
350 {
351 .start = INT_USB_HS,
352 .end = INT_USB_HS,
353 .flags = IORESOURCE_IRQ,
354 },
355};
356
357struct platform_device msm_device_otg = {
358 .name = "msm_otg",
359 .id = -1,
360 .num_resources = ARRAY_SIZE(resources_otg),
361 .resource = resources_otg,
362 .dev = {
363 .coherent_dma_mask = 0xffffffffULL,
364 },
365};
366
367struct flash_platform_data msm_nand_data = {
368 .parts = NULL,
369 .nr_parts = 0,
370};
371
372struct platform_device msm_device_nand = {
373 .name = "msm_nand",
374 .id = -1,
375 .num_resources = ARRAY_SIZE(resources_nand),
376 .resource = resources_nand,
377 .dev = {
378 .platform_data = &msm_nand_data,
379 },
380};
381
382struct platform_device msm_device_smd = {
383 .name = "msm_smd",
384 .id = -1,
385};
386
387struct resource msm_dmov_resource[] = {
388 {
389 .start = INT_ADM_AARM,
390 .end = (resource_size_t)MSM_DMOV_BASE,
391 .flags = IORESOURCE_IRQ,
392 },
393};
394
395struct platform_device msm_device_dmov = {
396 .name = "msm_dmov",
397 .id = -1,
398 .resource = msm_dmov_resource,
399 .num_resources = ARRAY_SIZE(msm_dmov_resource),
400};
401
402#define MSM_SDC1_BASE 0xA0400000
403#define MSM_SDC2_BASE 0xA0500000
404#define MSM_SDC3_BASE 0xA0600000
405#define MSM_SDC4_BASE 0xA0700000
406static struct resource resources_sdc1[] = {
407 {
408 .start = MSM_SDC1_BASE,
409 .end = MSM_SDC1_BASE + SZ_4K - 1,
410 .flags = IORESOURCE_MEM,
411 },
412 {
413 .start = INT_SDC1_0,
414 .end = INT_SDC1_1,
415 .flags = IORESOURCE_IRQ,
416 },
417 {
418 .start = 8,
419 .end = 8,
420 .flags = IORESOURCE_DMA,
421 },
422};
423
424static struct resource resources_sdc2[] = {
425 {
426 .start = MSM_SDC2_BASE,
427 .end = MSM_SDC2_BASE + SZ_4K - 1,
428 .flags = IORESOURCE_MEM,
429 },
430 {
431 .start = INT_SDC2_0,
432 .end = INT_SDC2_1,
433 .flags = IORESOURCE_IRQ,
434 },
435 {
436 .start = 8,
437 .end = 8,
438 .flags = IORESOURCE_DMA,
439 },
440};
441
442static struct resource resources_sdc3[] = {
443 {
444 .start = MSM_SDC3_BASE,
445 .end = MSM_SDC3_BASE + SZ_4K - 1,
446 .flags = IORESOURCE_MEM,
447 },
448 {
449 .start = INT_SDC3_0,
450 .end = INT_SDC3_1,
451 .flags = IORESOURCE_IRQ,
452 },
453 {
454 .start = 8,
455 .end = 8,
456 .flags = IORESOURCE_DMA,
457 },
458};
459
460static struct resource resources_sdc4[] = {
461 {
462 .start = MSM_SDC4_BASE,
463 .end = MSM_SDC4_BASE + SZ_4K - 1,
464 .flags = IORESOURCE_MEM,
465 },
466 {
467 .start = INT_SDC4_0,
468 .end = INT_SDC4_1,
469 .flags = IORESOURCE_IRQ,
470 },
471 {
472 .start = 8,
473 .end = 8,
474 .flags = IORESOURCE_DMA,
475 },
476};
477
478struct platform_device msm_device_sdc1 = {
479 .name = "msm_sdcc",
480 .id = 1,
481 .num_resources = ARRAY_SIZE(resources_sdc1),
482 .resource = resources_sdc1,
483 .dev = {
484 .coherent_dma_mask = 0xffffffff,
485 },
486};
487
488struct platform_device msm_device_sdc2 = {
489 .name = "msm_sdcc",
490 .id = 2,
491 .num_resources = ARRAY_SIZE(resources_sdc2),
492 .resource = resources_sdc2,
493 .dev = {
494 .coherent_dma_mask = 0xffffffff,
495 },
496};
497
498struct platform_device msm_device_sdc3 = {
499 .name = "msm_sdcc",
500 .id = 3,
501 .num_resources = ARRAY_SIZE(resources_sdc3),
502 .resource = resources_sdc3,
503 .dev = {
504 .coherent_dma_mask = 0xffffffff,
505 },
506};
507
508struct platform_device msm_device_sdc4 = {
509 .name = "msm_sdcc",
510 .id = 4,
511 .num_resources = ARRAY_SIZE(resources_sdc4),
512 .resource = resources_sdc4,
513 .dev = {
514 .coherent_dma_mask = 0xffffffff,
515 },
516};
517
518static struct platform_device *msm_sdcc_devices[] __initdata = {
519 &msm_device_sdc1,
520 &msm_device_sdc2,
521 &msm_device_sdc3,
522 &msm_device_sdc4,
523};
524
525int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
526{
527 struct platform_device *pdev;
528
529 if (controller < 1 || controller > 4)
530 return -EINVAL;
531
532 pdev = msm_sdcc_devices[controller-1];
533 pdev->dev.platform_data = plat;
534 return platform_device_register(pdev);
535}
536
537#if defined(CONFIG_FB_MSM_MDP40)
538#define MDP_BASE 0xA3F00000
539#define PMDH_BASE 0xAD600000
540#define EMDH_BASE 0xAD700000
541#define TVENC_BASE 0xAD400000
542#else
543#define MDP_BASE 0xAA200000
544#define PMDH_BASE 0xAA600000
545#define EMDH_BASE 0xAA700000
546#define TVENC_BASE 0xAA400000
547#endif
548
549static struct resource msm_mdp_resources[] = {
550 {
551 .name = "mdp",
552 .start = MDP_BASE,
553 .end = MDP_BASE + 0x000F0000 - 1,
554 .flags = IORESOURCE_MEM,
555 },
556 {
557 .start = INT_MDP,
558 .end = INT_MDP,
559 .flags = IORESOURCE_IRQ,
560 },
561};
562
563static struct resource msm_mddi_resources[] = {
564 {
565 .name = "pmdh",
566 .start = PMDH_BASE,
567 .end = PMDH_BASE + PAGE_SIZE - 1,
568 .flags = IORESOURCE_MEM,
569 }
570};
571
572static struct resource msm_mddi_ext_resources[] = {
573 {
574 .name = "emdh",
575 .start = EMDH_BASE,
576 .end = EMDH_BASE + PAGE_SIZE - 1,
577 .flags = IORESOURCE_MEM,
578 }
579};
580
581static struct resource msm_ebi2_lcd_resources[] = {
582 {
583 .name = "base",
584 .start = 0xa0d00000,
585 .end = 0xa0d00000 + PAGE_SIZE - 1,
586 .flags = IORESOURCE_MEM,
587 },
588 {
589 .name = "lcd01",
590 .start = 0x98000000,
591 .end = 0x98000000 + 0x80000 - 1,
592 .flags = IORESOURCE_MEM,
593 },
594 {
595 .name = "lcd02",
596 .start = 0x9c000000,
597 .end = 0x9c000000 + 0x80000 - 1,
598 .flags = IORESOURCE_MEM,
599 },
600};
601
602static struct resource msm_tvenc_resources[] = {
603 {
604 .name = "tvenc",
605 .start = TVENC_BASE,
606 .end = TVENC_BASE + PAGE_SIZE - 1,
607 .flags = IORESOURCE_MEM,
608 }
609};
610
611static struct platform_device msm_mdp_device = {
612 .name = "mdp",
613 .id = 0,
614 .num_resources = ARRAY_SIZE(msm_mdp_resources),
615 .resource = msm_mdp_resources,
616};
617
618static struct platform_device msm_mddi_device = {
619 .name = "mddi",
620 .id = 0,
621 .num_resources = ARRAY_SIZE(msm_mddi_resources),
622 .resource = msm_mddi_resources,
623};
624
625static struct platform_device msm_mddi_ext_device = {
626 .name = "mddi_ext",
627 .id = 0,
628 .num_resources = ARRAY_SIZE(msm_mddi_ext_resources),
629 .resource = msm_mddi_ext_resources,
630};
631
632static struct platform_device msm_ebi2_lcd_device = {
633 .name = "ebi2_lcd",
634 .id = 0,
635 .num_resources = ARRAY_SIZE(msm_ebi2_lcd_resources),
636 .resource = msm_ebi2_lcd_resources,
637};
638
639static struct platform_device msm_lcdc_device = {
640 .name = "lcdc",
641 .id = 0,
642};
643
644static struct platform_device msm_tvenc_device = {
645 .name = "tvenc",
646 .id = 0,
647 .num_resources = ARRAY_SIZE(msm_tvenc_resources),
648 .resource = msm_tvenc_resources,
649};
650
651/* TSIF begin */
652#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
653
654#define MSM_TSIF_PHYS (0xa0100000)
655#define MSM_TSIF_SIZE (0x200)
656
657static struct resource tsif_resources[] = {
658 [0] = {
659 .flags = IORESOURCE_IRQ,
660 .start = INT_TSIF_IRQ,
661 .end = INT_TSIF_IRQ,
662 },
663 [1] = {
664 .flags = IORESOURCE_MEM,
665 .start = MSM_TSIF_PHYS,
666 .end = MSM_TSIF_PHYS + MSM_TSIF_SIZE - 1,
667 },
668 [2] = {
669 .flags = IORESOURCE_DMA,
670 .start = DMOV_TSIF_CHAN,
671 .end = DMOV_TSIF_CRCI,
672 },
673};
674
675static void tsif_release(struct device *dev)
676{
677 dev_info(dev, "release\n");
678}
679
680struct platform_device msm_device_tsif = {
681 .name = "msm_tsif",
682 .id = 0,
683 .num_resources = ARRAY_SIZE(tsif_resources),
684 .resource = tsif_resources,
685 .dev = {
686 .release = tsif_release,
687 },
688};
689#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
690/* TSIF end */
691
692#define MSM_TSSC_PHYS 0xAA300000
693static struct resource resources_tssc[] = {
694 {
695 .start = MSM_TSSC_PHYS,
696 .end = MSM_TSSC_PHYS + SZ_4K - 1,
697 .name = "tssc",
698 .flags = IORESOURCE_MEM,
699 },
700 {
701 .start = INT_TCHSCRN1,
702 .end = INT_TCHSCRN1,
703 .name = "tssc1",
704 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
705 },
706 {
707 .start = INT_TCHSCRN2,
708 .end = INT_TCHSCRN2,
709 .name = "tssc2",
710 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
711 },
712};
713
714struct platform_device msm_device_tssc = {
715 .name = "msm_touchscreen",
716 .id = 0,
717 .num_resources = ARRAY_SIZE(resources_tssc),
718 .resource = resources_tssc,
719};
720
721static void __init msm_register_device(struct platform_device *pdev, void *data)
722{
723 int ret;
724
725 pdev->dev.platform_data = data;
726
727 ret = platform_device_register(pdev);
728 if (ret)
729 dev_err(&pdev->dev,
730 "%s: platform_device_register() failed = %d\n",
731 __func__, ret);
732}
733
734void __init msm_fb_register_device(char *name, void *data)
735{
736 if (!strncmp(name, "mdp", 3))
737 msm_register_device(&msm_mdp_device, data);
738 else if (!strncmp(name, "pmdh", 4))
739 msm_register_device(&msm_mddi_device, data);
740 else if (!strncmp(name, "emdh", 4))
741 msm_register_device(&msm_mddi_ext_device, data);
742 else if (!strncmp(name, "ebi2", 4))
743 msm_register_device(&msm_ebi2_lcd_device, data);
744 else if (!strncmp(name, "tvenc", 5))
745 msm_register_device(&msm_tvenc_device, data);
746 else if (!strncmp(name, "lcdc", 4))
747 msm_register_device(&msm_lcdc_device, data);
748 else
749 printk(KERN_ERR "%s: unknown device! %s\n", __func__, name);
750}
751
752static struct platform_device msm_camera_device = {
753 .name = "msm_camera",
754 .id = 0,
755};
756
757void __init msm_camera_register_device(void *res, uint32_t num,
758 void *data)
759{
760 msm_camera_device.num_resources = num;
761 msm_camera_device.resource = res;
762
763 msm_register_device(&msm_camera_device, data);
764}