blob: c74ff29baa19ea5984febd1c1d11caa70ddaec24 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/*
2 * Copyright (C) 2008 Google, Inc.
3 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18#include <linux/msm_kgsl.h>
19#include <linux/regulator/machine.h>
20#include <linux/dma-mapping.h>
21#include <asm/clkdev.h>
22#include <mach/irqs.h>
23#include <mach/msm_iomap.h>
24#include <mach/dma.h>
25#include <mach/board.h>
26
27#include "devices.h"
28#include "gpio_hw.h"
29#include "footswitch.h"
30
31#include <asm/mach/flash.h>
32
33#include <asm/mach/mmc.h>
34#include <mach/msm_hsusb.h>
35#include <mach/usbdiag.h>
36#include <mach/usb_gadget_fserial.h>
37#include <mach/rpc_hsusb.h>
38
39static struct resource resources_uart1[] = {
40 {
41 .start = INT_UART1,
42 .end = INT_UART1,
43 .flags = IORESOURCE_IRQ,
44 },
45 {
46 .start = MSM_UART1_PHYS,
47 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
48 .flags = IORESOURCE_MEM,
49 },
50};
51
52static struct resource resources_uart2[] = {
53 {
54 .start = INT_UART2,
55 .end = INT_UART2,
56 .flags = IORESOURCE_IRQ,
57 },
58 {
59 .start = MSM_UART2_PHYS,
60 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
61 .flags = IORESOURCE_MEM,
62 },
63};
64
65struct platform_device msm_device_uart1 = {
66 .name = "msm_serial",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(resources_uart1),
69 .resource = resources_uart1,
70};
71
72struct platform_device msm_device_uart2 = {
73 .name = "msm_serial",
74 .id = 1,
75 .num_resources = ARRAY_SIZE(resources_uart2),
76 .resource = resources_uart2,
77};
78
79#define MSM_UART1DM_PHYS 0xA0200000
80#define MSM_UART2DM_PHYS 0xA0300000
81static struct resource msm_uart1_dm_resources[] = {
82 {
83 .start = MSM_UART1DM_PHYS,
84 .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
85 .flags = IORESOURCE_MEM,
86 },
87 {
88 .start = INT_UART1DM_IRQ,
89 .end = INT_UART1DM_IRQ,
90 .flags = IORESOURCE_IRQ,
91 },
92 {
93 .start = INT_UART1DM_RX,
94 .end = INT_UART1DM_RX,
95 .flags = IORESOURCE_IRQ,
96 },
97 {
98 .start = DMOV_HSUART1_TX_CHAN,
99 .end = DMOV_HSUART1_RX_CHAN,
100 .name = "uartdm_channels",
101 .flags = IORESOURCE_DMA,
102 },
103 {
104 .start = DMOV_HSUART1_TX_CRCI,
105 .end = DMOV_HSUART1_RX_CRCI,
106 .name = "uartdm_crci",
107 .flags = IORESOURCE_DMA,
108 },
109};
110
111static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
112
113struct platform_device msm_device_uart_dm1 = {
114 .name = "msm_serial_hs",
115 .id = 0,
116 .num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
117 .resource = msm_uart1_dm_resources,
118 .dev = {
119 .dma_mask = &msm_uart_dm1_dma_mask,
120 .coherent_dma_mask = DMA_BIT_MASK(32),
121 },
122};
123
124static struct resource msm_uart2_dm_resources[] = {
125 {
126 .start = MSM_UART2DM_PHYS,
127 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
128 .flags = IORESOURCE_MEM,
129 },
130 {
131 .start = INT_UART2DM_IRQ,
132 .end = INT_UART2DM_IRQ,
133 .flags = IORESOURCE_IRQ,
134 },
135 {
136 .start = INT_UART2DM_RX,
137 .end = INT_UART2DM_RX,
138 .flags = IORESOURCE_IRQ,
139 },
140 {
141 .start = DMOV_HSUART2_TX_CHAN,
142 .end = DMOV_HSUART2_RX_CHAN,
143 .name = "uartdm_channels",
144 .flags = IORESOURCE_DMA,
145 },
146 {
147 .start = DMOV_HSUART2_TX_CRCI,
148 .end = DMOV_HSUART2_RX_CRCI,
149 .name = "uartdm_crci",
150 .flags = IORESOURCE_DMA,
151 },
152};
153
154static u64 msm_uart_dm2_dma_mask = DMA_BIT_MASK(32);
155
156struct platform_device msm_device_uart_dm2 = {
157 .name = "msm_serial_hs",
158 .id = 1,
159 .num_resources = ARRAY_SIZE(msm_uart2_dm_resources),
160 .resource = msm_uart2_dm_resources,
161 .dev = {
162 .dma_mask = &msm_uart_dm2_dma_mask,
163 .coherent_dma_mask = DMA_BIT_MASK(32),
164 },
165};
166
167#define MSM_I2C_SIZE SZ_4K
168#define MSM_I2C_PHYS 0xA9900000
169static struct resource resources_i2c[] = {
170 {
171 .start = MSM_I2C_PHYS,
172 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
173 .flags = IORESOURCE_MEM,
174 },
175 {
176 .start = INT_PWB_I2C,
177 .end = INT_PWB_I2C,
178 .flags = IORESOURCE_IRQ,
179 },
180};
181
182struct platform_device msm_device_i2c = {
183 .name = "msm_i2c",
184 .id = 0,
185 .num_resources = ARRAY_SIZE(resources_i2c),
186 .resource = resources_i2c,
187};
188
189#define MSM_HSUSB_PHYS 0xA0800000
190static struct resource resources_hsusb_otg[] = {
191 {
192 .start = MSM_HSUSB_PHYS,
193 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
194 .flags = IORESOURCE_MEM,
195 },
196 {
197 .start = INT_USB_HS,
198 .end = INT_USB_HS,
199 .flags = IORESOURCE_IRQ,
200 },
201};
202
203static u64 dma_mask = 0xffffffffULL;
204struct platform_device msm_device_hsusb_otg = {
205 .name = "msm_hsusb_otg",
206 .id = -1,
207 .num_resources = ARRAY_SIZE(resources_hsusb_otg),
208 .resource = resources_hsusb_otg,
209 .dev = {
210 .dma_mask = &dma_mask,
211 .coherent_dma_mask = 0xffffffffULL,
212 },
213};
214
215static struct resource resources_hsusb_peripheral[] = {
216 {
217 .start = MSM_HSUSB_PHYS,
218 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
219 .flags = IORESOURCE_MEM,
220 },
221 {
222 .start = INT_USB_HS,
223 .end = INT_USB_HS,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228static struct resource resources_gadget_peripheral[] = {
229 {
230 .start = MSM_HSUSB_PHYS,
231 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
232 .flags = IORESOURCE_MEM,
233 },
234 {
235 .start = INT_USB_HS,
236 .end = INT_USB_HS,
237 .flags = IORESOURCE_IRQ,
238 },
239};
240
241struct platform_device msm_device_hsusb_peripheral = {
242 .name = "msm_hsusb_peripheral",
243 .id = -1,
244 .num_resources = ARRAY_SIZE(resources_hsusb_peripheral),
245 .resource = resources_hsusb_peripheral,
246 .dev = {
247 .dma_mask = &dma_mask,
248 .coherent_dma_mask = 0xffffffffULL,
249 },
250};
251
252struct platform_device msm_device_gadget_peripheral = {
253 .name = "msm_hsusb",
254 .id = -1,
255 .num_resources = ARRAY_SIZE(resources_gadget_peripheral),
256 .resource = resources_gadget_peripheral,
257 .dev = {
258 .dma_mask = &dma_mask,
259 .coherent_dma_mask = 0xffffffffULL,
260 },
261};
262
263static struct resource resources_hsusb_host[] = {
264 {
265 .start = MSM_HSUSB_PHYS,
266 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
267 .flags = IORESOURCE_MEM,
268 },
269 {
270 .start = INT_USB_HS,
271 .end = INT_USB_HS,
272 .flags = IORESOURCE_IRQ,
273 },
274};
275
276struct platform_device msm_device_hsusb_host = {
277 .name = "msm_hsusb_host",
278 .id = 0,
279 .num_resources = ARRAY_SIZE(resources_hsusb_host),
280 .resource = resources_hsusb_host,
281 .dev = {
282 .dma_mask = &dma_mask,
283 .coherent_dma_mask = 0xffffffffULL,
284 },
285};
286
287static struct platform_device *msm_host_devices[] = {
288 &msm_device_hsusb_host,
289};
290
291int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat)
292{
293 struct platform_device *pdev;
294
295 pdev = msm_host_devices[host];
296 if (!pdev)
297 return -ENODEV;
298 pdev->dev.platform_data = plat;
299 return platform_device_register(pdev);
300}
301
302#ifdef CONFIG_USB_ANDROID_DIAG
303struct usb_diag_platform_data usb_diag_pdata = {
304 .ch_name = DIAG_LEGACY,
305 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
306};
307
308struct platform_device usb_diag_device = {
309 .name = "usb_diag",
310 .id = -1,
311 .dev = {
312 .platform_data = &usb_diag_pdata,
313 },
314};
315#endif
316
317#ifdef CONFIG_USB_F_SERIAL
318static struct usb_gadget_fserial_platform_data fserial_pdata = {
319 .no_ports = 2,
320};
321
322struct platform_device usb_gadget_fserial_device = {
323 .name = "usb_fserial",
324 .id = -1,
325 .dev = {
326 .platform_data = &fserial_pdata,
327 },
328};
329#endif
330
331struct platform_device asoc_msm_pcm = {
332 .name = "msm-dsp-audio",
333 .id = 0,
334};
335
336struct platform_device asoc_msm_dai0 = {
337 .name = "msm-codec-dai",
338 .id = 0,
339};
340
341struct platform_device asoc_msm_dai1 = {
342 .name = "msm-cpu-dai",
343 .id = 0,
344};
345
346#define MSM_NAND_PHYS 0xA0A00000
347static struct resource resources_nand[] = {
348 [0] = {
349 .name = "msm_nand_dmac",
350 .start = DMOV_NAND_CHAN,
351 .end = DMOV_NAND_CHAN,
352 .flags = IORESOURCE_DMA,
353 },
354 [1] = {
355 .name = "msm_nand_phys",
356 .start = MSM_NAND_PHYS,
357 .end = MSM_NAND_PHYS + 0x7FF,
358 .flags = IORESOURCE_MEM,
359 },
360};
361
362static struct resource resources_otg[] = {
363 {
364 .start = MSM_HSUSB_PHYS,
365 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
366 .flags = IORESOURCE_MEM,
367 },
368 {
369 .start = INT_USB_HS,
370 .end = INT_USB_HS,
371 .flags = IORESOURCE_IRQ,
372 },
373};
374
375struct platform_device msm_device_otg = {
376 .name = "msm_otg",
377 .id = -1,
378 .num_resources = ARRAY_SIZE(resources_otg),
379 .resource = resources_otg,
380 .dev = {
381 .coherent_dma_mask = 0xffffffffULL,
382 },
383};
384
385struct flash_platform_data msm_nand_data = {
386 .parts = NULL,
387 .nr_parts = 0,
388};
389
390struct platform_device msm_device_nand = {
391 .name = "msm_nand",
392 .id = -1,
393 .num_resources = ARRAY_SIZE(resources_nand),
394 .resource = resources_nand,
395 .dev = {
396 .platform_data = &msm_nand_data,
397 },
398};
399
400struct platform_device msm_device_smd = {
401 .name = "msm_smd",
402 .id = -1,
403};
404
405struct resource msm_dmov_resource[] = {
406 {
407 .start = INT_ADM_AARM,
408 .end = (resource_size_t)MSM_DMOV_BASE,
409 .flags = IORESOURCE_IRQ,
410 },
411};
412
413struct platform_device msm_device_dmov = {
414 .name = "msm_dmov",
415 .id = -1,
416 .resource = msm_dmov_resource,
417 .num_resources = ARRAY_SIZE(msm_dmov_resource),
418};
419
420#define MSM_SDC1_BASE 0xA0400000
421#define MSM_SDC2_BASE 0xA0500000
422#define MSM_SDC3_BASE 0xA0600000
423#define MSM_SDC4_BASE 0xA0700000
424static struct resource resources_sdc1[] = {
425 {
426 .start = MSM_SDC1_BASE,
427 .end = MSM_SDC1_BASE + SZ_4K - 1,
428 .flags = IORESOURCE_MEM,
429 },
430 {
431 .start = INT_SDC1_0,
432 .end = INT_SDC1_1,
433 .flags = IORESOURCE_IRQ,
434 },
435 {
436 .start = 8,
437 .end = 8,
438 .flags = IORESOURCE_DMA,
439 },
440};
441
442static struct resource resources_sdc2[] = {
443 {
444 .start = MSM_SDC2_BASE,
445 .end = MSM_SDC2_BASE + SZ_4K - 1,
446 .flags = IORESOURCE_MEM,
447 },
448 {
449 .start = INT_SDC2_0,
450 .end = INT_SDC2_1,
451 .flags = IORESOURCE_IRQ,
452 },
453 {
454 .start = 8,
455 .end = 8,
456 .flags = IORESOURCE_DMA,
457 },
458};
459
460static struct resource resources_sdc3[] = {
461 {
462 .start = MSM_SDC3_BASE,
463 .end = MSM_SDC3_BASE + SZ_4K - 1,
464 .flags = IORESOURCE_MEM,
465 },
466 {
467 .start = INT_SDC3_0,
468 .end = INT_SDC3_1,
469 .flags = IORESOURCE_IRQ,
470 },
471 {
472 .start = 8,
473 .end = 8,
474 .flags = IORESOURCE_DMA,
475 },
476};
477
478static struct resource resources_sdc4[] = {
479 {
480 .start = MSM_SDC4_BASE,
481 .end = MSM_SDC4_BASE + SZ_4K - 1,
482 .flags = IORESOURCE_MEM,
483 },
484 {
485 .start = INT_SDC4_0,
486 .end = INT_SDC4_1,
487 .flags = IORESOURCE_IRQ,
488 },
489 {
490 .start = 8,
491 .end = 8,
492 .flags = IORESOURCE_DMA,
493 },
494};
495
496struct platform_device msm_device_sdc1 = {
497 .name = "msm_sdcc",
498 .id = 1,
499 .num_resources = ARRAY_SIZE(resources_sdc1),
500 .resource = resources_sdc1,
501 .dev = {
502 .coherent_dma_mask = 0xffffffff,
503 },
504};
505
506struct platform_device msm_device_sdc2 = {
507 .name = "msm_sdcc",
508 .id = 2,
509 .num_resources = ARRAY_SIZE(resources_sdc2),
510 .resource = resources_sdc2,
511 .dev = {
512 .coherent_dma_mask = 0xffffffff,
513 },
514};
515
516struct platform_device msm_device_sdc3 = {
517 .name = "msm_sdcc",
518 .id = 3,
519 .num_resources = ARRAY_SIZE(resources_sdc3),
520 .resource = resources_sdc3,
521 .dev = {
522 .coherent_dma_mask = 0xffffffff,
523 },
524};
525
526struct platform_device msm_device_sdc4 = {
527 .name = "msm_sdcc",
528 .id = 4,
529 .num_resources = ARRAY_SIZE(resources_sdc4),
530 .resource = resources_sdc4,
531 .dev = {
532 .coherent_dma_mask = 0xffffffff,
533 },
534};
535
536static struct platform_device *msm_sdcc_devices[] __initdata = {
537 &msm_device_sdc1,
538 &msm_device_sdc2,
539 &msm_device_sdc3,
540 &msm_device_sdc4,
541};
542
543int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
544{
545 struct platform_device *pdev;
546
547 if (controller < 1 || controller > 4)
548 return -EINVAL;
549
550 pdev = msm_sdcc_devices[controller-1];
551 pdev->dev.platform_data = plat;
552 return platform_device_register(pdev);
553}
554
555#if defined(CONFIG_FB_MSM_MDP40)
556#define MDP_BASE 0xA3F00000
557#define PMDH_BASE 0xAD600000
558#define EMDH_BASE 0xAD700000
559#define TVENC_BASE 0xAD400000
560#else
561#define MDP_BASE 0xAA200000
562#define PMDH_BASE 0xAA600000
563#define EMDH_BASE 0xAA700000
564#define TVENC_BASE 0xAA400000
565#endif
566
567static struct resource msm_mdp_resources[] = {
568 {
569 .name = "mdp",
570 .start = MDP_BASE,
571 .end = MDP_BASE + 0x000F0000 - 1,
572 .flags = IORESOURCE_MEM,
573 },
574 {
575 .start = INT_MDP,
576 .end = INT_MDP,
577 .flags = IORESOURCE_IRQ,
578 },
579};
580
581static struct resource msm_mddi_resources[] = {
582 {
583 .name = "pmdh",
584 .start = PMDH_BASE,
585 .end = PMDH_BASE + PAGE_SIZE - 1,
586 .flags = IORESOURCE_MEM,
587 }
588};
589
590static struct resource msm_mddi_ext_resources[] = {
591 {
592 .name = "emdh",
593 .start = EMDH_BASE,
594 .end = EMDH_BASE + PAGE_SIZE - 1,
595 .flags = IORESOURCE_MEM,
596 }
597};
598
599static struct resource msm_ebi2_lcd_resources[] = {
600 {
601 .name = "base",
602 .start = 0xa0d00000,
603 .end = 0xa0d00000 + PAGE_SIZE - 1,
604 .flags = IORESOURCE_MEM,
605 },
606 {
607 .name = "lcd01",
608 .start = 0x98000000,
609 .end = 0x98000000 + 0x80000 - 1,
610 .flags = IORESOURCE_MEM,
611 },
612 {
613 .name = "lcd02",
614 .start = 0x9c000000,
615 .end = 0x9c000000 + 0x80000 - 1,
616 .flags = IORESOURCE_MEM,
617 },
618};
619
620static struct resource msm_tvenc_resources[] = {
621 {
622 .name = "tvenc",
623 .start = TVENC_BASE,
624 .end = TVENC_BASE + PAGE_SIZE - 1,
625 .flags = IORESOURCE_MEM,
626 }
627};
628
629static struct platform_device msm_mdp_device = {
630 .name = "mdp",
631 .id = 0,
632 .num_resources = ARRAY_SIZE(msm_mdp_resources),
633 .resource = msm_mdp_resources,
634};
635
636static struct platform_device msm_mddi_device = {
637 .name = "mddi",
638 .id = 0,
639 .num_resources = ARRAY_SIZE(msm_mddi_resources),
640 .resource = msm_mddi_resources,
641};
642
643static struct platform_device msm_mddi_ext_device = {
644 .name = "mddi_ext",
645 .id = 0,
646 .num_resources = ARRAY_SIZE(msm_mddi_ext_resources),
647 .resource = msm_mddi_ext_resources,
648};
649
650static struct platform_device msm_ebi2_lcd_device = {
651 .name = "ebi2_lcd",
652 .id = 0,
653 .num_resources = ARRAY_SIZE(msm_ebi2_lcd_resources),
654 .resource = msm_ebi2_lcd_resources,
655};
656
657static struct platform_device msm_lcdc_device = {
658 .name = "lcdc",
659 .id = 0,
660};
661
662static struct platform_device msm_tvenc_device = {
663 .name = "tvenc",
664 .id = 0,
665 .num_resources = ARRAY_SIZE(msm_tvenc_resources),
666 .resource = msm_tvenc_resources,
667};
668
669/* TSIF begin */
670#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
671
672#define MSM_TSIF_PHYS (0xa0100000)
673#define MSM_TSIF_SIZE (0x200)
674
675static struct resource tsif_resources[] = {
676 [0] = {
677 .flags = IORESOURCE_IRQ,
678 .start = INT_TSIF_IRQ,
679 .end = INT_TSIF_IRQ,
680 },
681 [1] = {
682 .flags = IORESOURCE_MEM,
683 .start = MSM_TSIF_PHYS,
684 .end = MSM_TSIF_PHYS + MSM_TSIF_SIZE - 1,
685 },
686 [2] = {
687 .flags = IORESOURCE_DMA,
688 .start = DMOV_TSIF_CHAN,
689 .end = DMOV_TSIF_CRCI,
690 },
691};
692
693static void tsif_release(struct device *dev)
694{
695 dev_info(dev, "release\n");
696}
697
698struct platform_device msm_device_tsif = {
699 .name = "msm_tsif",
700 .id = 0,
701 .num_resources = ARRAY_SIZE(tsif_resources),
702 .resource = tsif_resources,
703 .dev = {
704 .release = tsif_release,
705 },
706};
707#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
708/* TSIF end */
709
710#define MSM_TSSC_PHYS 0xAA300000
711static struct resource resources_tssc[] = {
712 {
713 .start = MSM_TSSC_PHYS,
714 .end = MSM_TSSC_PHYS + SZ_4K - 1,
715 .name = "tssc",
716 .flags = IORESOURCE_MEM,
717 },
718 {
719 .start = INT_TCHSCRN1,
720 .end = INT_TCHSCRN1,
721 .name = "tssc1",
722 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
723 },
724 {
725 .start = INT_TCHSCRN2,
726 .end = INT_TCHSCRN2,
727 .name = "tssc2",
728 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
729 },
730};
731
732struct platform_device msm_device_tssc = {
733 .name = "msm_touchscreen",
734 .id = 0,
735 .num_resources = ARRAY_SIZE(resources_tssc),
736 .resource = resources_tssc,
737};
738
739static void __init msm_register_device(struct platform_device *pdev, void *data)
740{
741 int ret;
742
743 pdev->dev.platform_data = data;
744
745 ret = platform_device_register(pdev);
746 if (ret)
747 dev_err(&pdev->dev,
748 "%s: platform_device_register() failed = %d\n",
749 __func__, ret);
750}
751
752void __init msm_fb_register_device(char *name, void *data)
753{
754 if (!strncmp(name, "mdp", 3))
755 msm_register_device(&msm_mdp_device, data);
756 else if (!strncmp(name, "pmdh", 4))
757 msm_register_device(&msm_mddi_device, data);
758 else if (!strncmp(name, "emdh", 4))
759 msm_register_device(&msm_mddi_ext_device, data);
760 else if (!strncmp(name, "ebi2", 4))
761 msm_register_device(&msm_ebi2_lcd_device, data);
762 else if (!strncmp(name, "tvenc", 5))
763 msm_register_device(&msm_tvenc_device, data);
764 else if (!strncmp(name, "lcdc", 4))
765 msm_register_device(&msm_lcdc_device, data);
766 else
767 printk(KERN_ERR "%s: unknown device! %s\n", __func__, name);
768}
769
770static struct platform_device msm_camera_device = {
771 .name = "msm_camera",
772 .id = 0,
773};
774
775void __init msm_camera_register_device(void *res, uint32_t num,
776 void *data)
777{
778 msm_camera_device.num_resources = num;
779 msm_camera_device.resource = res;
780
781 msm_register_device(&msm_camera_device, data);
782}
783
784static struct resource kgsl_3d0_resources[] = {
785 {
786 .name = KGSL_3D0_REG_MEMORY,
787 .start = 0xA0000000,
788 .end = 0xA001ffff,
789 .flags = IORESOURCE_MEM,
790 },
791 {
792 .name = KGSL_3D0_IRQ,
793 .start = INT_GRAPHICS,
794 .end = INT_GRAPHICS,
795 .flags = IORESOURCE_IRQ,
796 },
797};
798
799static struct kgsl_device_platform_data kgsl_3d0_pdata = {
800 .pwr_data = {
801 /* bus_freq has been set to 160000 for power savings.
802 * OEMs may modify the value at their discretion for performance
803 * The appropriate maximum replacement for 160000 is:
804 * msm7x2x_clock_data.max_axi_khz
805 */
806 .pwrlevel = {
807 {
808 .gpu_freq = 0,
809 .bus_freq = 160000000,
810 },
811 },
812 .init_level = 0,
813 .num_levels = 1,
814 .set_grp_async = NULL,
815 .idle_timeout = HZ/5,
816 },
817 .clk = {
818 .name = {
819 .clk = "grp_clk",
820 .pclk = "grp_pclk",
821 },
822 },
823 .imem_clk_name = {
824 .clk = "imem_clk",
825 },
826};
827
828struct platform_device msm_kgsl_3d0 = {
829 .name = "kgsl-3d0",
830 .id = 0,
831 .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
832 .resource = kgsl_3d0_resources,
833 .dev = {
834 .platform_data = &kgsl_3d0_pdata,
835 },
836};
837
838struct platform_device *msm_footswitch_devices[] = {
839 FS_PCOM(FS_GFX3D, "fs_gfx3d"),
840};
841unsigned msm_num_footswitch_devices = ARRAY_SIZE(msm_footswitch_devices);