blob: d392cce9d1abf122e76c040699af267f34abce32 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* arch/arm/mach-msm/qdsp5/adsp.c
2 *
3 * Register/Interrupt access for userspace aDSP library.
4 *
5 * Copyright (C) 2008 Google, Inc.
6 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
7 * Author: Iliyan Malchev <ibm@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20/* TODO:
21 * - move shareable rpc code outside of adsp.c
22 * - general solution for virt->phys patchup
23 * - queue IDs should be relative to modules
24 * - disallow access to non-associated queues
25 */
26
27#include <linux/clk.h>
28#include <linux/delay.h>
29#include <linux/interrupt.h>
30#include <linux/kernel.h>
31#include <linux/kthread.h>
32#include <linux/module.h>
33#include <linux/uaccess.h>
34#include <linux/wait.h>
35#include <linux/wakelock.h>
36#include <linux/slab.h>
37#include <mach/debug_mm.h>
38#include <linux/debugfs.h>
39
40#ifdef CONFIG_DEBUG_FS
41static struct dentry *dentry_adsp;
42static struct dentry *dentry_wdata;
43static struct dentry *dentry_rdata;
44static int wdump, rdump;
45#endif /* CONFIG_DEBUG_FS */
46static struct wake_lock adsp_wake_lock;
47static inline void prevent_suspend(void)
48{
49 wake_lock(&adsp_wake_lock);
50}
51static inline void allow_suspend(void)
52{
53 wake_unlock(&adsp_wake_lock);
54}
55
56#include <linux/io.h>
57#include <mach/msm_iomap.h>
58#include <mach/clk.h>
59#include <mach/msm_adsp.h>
60#include "adsp.h"
61
62#define INT_ADSP INT_ADSP_A9_A11
63
64static struct adsp_info adsp_info;
65static struct msm_rpc_endpoint *rpc_cb_server_client;
66static struct msm_adsp_module *adsp_modules;
67static int adsp_open_count;
68
69static uint32_t rpc_adsp_rtos_atom_prog;
70static uint32_t rpc_adsp_rtos_atom_vers;
71static uint32_t rpc_adsp_rtos_atom_vers_comp;
72static uint32_t rpc_adsp_rtos_mtoa_prog;
73static uint32_t rpc_adsp_rtos_mtoa_vers;
74static uint32_t rpc_adsp_rtos_mtoa_vers_comp;
75static DEFINE_MUTEX(adsp_open_lock);
76
77/* protect interactions with the ADSP command/message queue */
78static spinlock_t adsp_cmd_lock;
79static spinlock_t adsp_write_lock;
80
81static uint32_t current_image = -1;
82
83void adsp_set_image(struct adsp_info *info, uint32_t image)
84{
85 current_image = image;
86}
87
88/*
89 * Checks whether the module_id is available in the
90 * module_entries table.If module_id is available returns `0`.
91 * If module_id is not available returns `-ENXIO`.
92 */
93static int32_t adsp_validate_module(uint32_t module_id)
94{
95 uint32_t *ptr;
96 uint32_t module_index;
97 uint32_t num_mod_entries;
98
99 ptr = adsp_info.init_info_ptr->module_entries;
100 num_mod_entries = adsp_info.init_info_ptr->module_table_size;
101
102 for (module_index = 0; module_index < num_mod_entries; module_index++)
103 if (module_id == ptr[module_index])
104 return 0;
105
106 return -ENXIO;
107}
108
109static int32_t adsp_validate_queue(uint32_t mod_id, unsigned q_idx,
110 uint32_t size)
111{
112 int32_t i;
113 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
114
115 sptr = adsp_info.init_info_ptr;
116 for (i = 0; i < sptr->mod_to_q_entries; i++)
117 if (mod_id == sptr->mod_to_q_tbl[i].module)
118 if (q_idx == sptr->mod_to_q_tbl[i].q_type) {
119 if (size <= sptr->mod_to_q_tbl[i].q_max_len)
120 return 0;
121 MM_ERR("q_idx: %d is not a valid queue \
122 for module %x\n", q_idx, mod_id);
123 return -EINVAL;
124 }
125 MM_ERR("cmd_buf size is more than allowed size\n");
126 return -EINVAL;
127}
128
129uint32_t adsp_get_module(struct adsp_info *info, uint32_t task)
130{
131 return info->task_to_module[current_image][task];
132}
133
134uint32_t adsp_get_queue_offset(struct adsp_info *info, uint32_t queue_id)
135{
136 return info->queue_offset[current_image][queue_id];
137}
138
139static int rpc_adsp_rtos_app_to_modem(uint32_t cmd, uint32_t module,
140 struct msm_adsp_module *adsp_module)
141{
142 int rc;
143 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
144 struct rpc_reply_hdr rpc_rsp;
145
146 rpc_req.gotit = cpu_to_be32(1);
147 rpc_req.cmd = cpu_to_be32(cmd);
148 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
149 rpc_req.module = cpu_to_be32(module);
150 rc = msm_rpc_call_reply(adsp_module->rpc_client,
151 RPC_ADSP_RTOS_APP_TO_MODEM_PROC,
152 &rpc_req, sizeof(rpc_req),
153 &rpc_rsp, sizeof(rpc_rsp),
154 5 * HZ);
155
156 if (rc < 0) {
157 MM_ERR("error receiving RPC reply: %d (%d)\n",
158 rc, -ERESTARTSYS);
159 return rc;
160 }
161
162 if (be32_to_cpu(rpc_rsp.reply_stat) != RPCMSG_REPLYSTAT_ACCEPTED) {
163 MM_ERR("RPC call was denied!\n");
164 return -EPERM;
165 }
166
167 if (be32_to_cpu(rpc_rsp.data.acc_hdr.accept_stat) !=
168 RPC_ACCEPTSTAT_SUCCESS) {
169 MM_ERR("RPC call was not successful (%d)\n",
170 be32_to_cpu(rpc_rsp.data.acc_hdr.accept_stat));
171 return -EINVAL;
172 }
173
174 return 0;
175}
176
177static int get_module_index(uint32_t id)
178{
179 int mod_idx;
180 for (mod_idx = 0; mod_idx < adsp_info.module_count; mod_idx++)
181 if (adsp_info.module[mod_idx].id == id)
182 return mod_idx;
183
184 return -ENXIO;
185}
186
187static struct msm_adsp_module *find_adsp_module_by_id(
188 struct adsp_info *info, uint32_t id)
189{
190 int mod_idx;
191
192 if (id > info->max_module_id) {
193 return NULL;
194 } else {
195 mod_idx = get_module_index(id);
196 if (mod_idx < 0)
197 return NULL;
198 return info->id_to_module[mod_idx];
199 }
200}
201
202static struct msm_adsp_module *find_adsp_module_by_name(
203 struct adsp_info *info, const char *name)
204{
205 unsigned n;
206 for (n = 0; n < info->module_count; n++)
207 if (!strcmp(name, adsp_modules[n].name))
208 return adsp_modules + n;
209 return NULL;
210}
211
212static int adsp_rpc_init(struct msm_adsp_module *adsp_module)
213{
214 /* remove the original connect once compatible support is complete */
215 adsp_module->rpc_client = msm_rpc_connect(
216 rpc_adsp_rtos_atom_prog,
217 rpc_adsp_rtos_atom_vers,
218 MSM_RPC_UNINTERRUPTIBLE);
219 if (IS_ERR(adsp_module->rpc_client))
220 adsp_module->rpc_client = msm_rpc_connect_compatible(
221 rpc_adsp_rtos_atom_prog,
222 rpc_adsp_rtos_atom_vers_comp,
223 MSM_RPC_UNINTERRUPTIBLE);
224
225 if (IS_ERR(adsp_module->rpc_client)) {
226 int rc = PTR_ERR(adsp_module->rpc_client);
227 adsp_module->rpc_client = 0;
228 MM_ERR("could not open rpc client: %d\n", rc);
229 return rc;
230 }
231
232 return 0;
233}
234
235/*
236 * Send RPC_ADSP_RTOS_CMD_GET_INIT_INFO cmd to ARM9 and get
237 * queue offsets and module entries (init info) as part of the event.
238 */
239static void msm_get_init_info(void)
240{
241 int rc;
242 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
243 struct rpc_reply_hdr rpc_rsp;
244
245 adsp_info.init_info_rpc_client = msm_rpc_connect(
246 rpc_adsp_rtos_atom_prog,
247 rpc_adsp_rtos_atom_vers,
248 MSM_RPC_UNINTERRUPTIBLE);
249 if (IS_ERR(adsp_info.init_info_rpc_client)) {
250 adsp_info.init_info_rpc_client = msm_rpc_connect_compatible(
251 rpc_adsp_rtos_atom_prog,
252 rpc_adsp_rtos_atom_vers_comp,
253 MSM_RPC_UNINTERRUPTIBLE);
254 if (IS_ERR(adsp_info.init_info_rpc_client)) {
255 rc = PTR_ERR(adsp_info.init_info_rpc_client);
256 adsp_info.init_info_rpc_client = 0;
257 MM_ERR("could not open rpc client: %d\n", rc);
258 return;
259 }
260 }
261
262 rpc_req.gotit = cpu_to_be32(1);
263 rpc_req.cmd = cpu_to_be32(RPC_ADSP_RTOS_CMD_GET_INIT_INFO);
264 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
265 rpc_req.module = 0;
266
267 rc = msm_rpc_call_reply(adsp_info.init_info_rpc_client,
268 RPC_ADSP_RTOS_APP_TO_MODEM_PROC,
269 &rpc_req, sizeof(rpc_req),
270 &rpc_rsp, sizeof(rpc_rsp),
271 5 * HZ);
272
273 if (rc < 0)
274 MM_ERR("could not send RPC request: %d\n", rc);
275}
276
277int msm_adsp_get(const char *name, struct msm_adsp_module **out,
278 struct msm_adsp_ops *ops, void *driver_data)
279{
280 struct msm_adsp_module *module;
281 int rc = 0;
282 static uint32_t init_info_cmd_sent;
283
284 if (!init_info_cmd_sent) {
285 init_waitqueue_head(&adsp_info.init_info_wait);
286 msm_get_init_info();
287 rc = wait_event_timeout(adsp_info.init_info_wait,
288 adsp_info.init_info_state == ADSP_STATE_INIT_INFO,
289 5 * HZ);
290 if (!rc) {
291 MM_ERR("INIT_INFO failed\n");
292 return -ETIMEDOUT;
293 }
294 init_info_cmd_sent++;
295 }
296
297 module = find_adsp_module_by_name(&adsp_info, name);
298 if (!module)
299 return -ENODEV;
300
301 mutex_lock(&module->lock);
302 MM_INFO("opening module %s\n", module->name);
303
304 if (module->ops) {
305 rc = -EBUSY;
306 goto done;
307 }
308
309 rc = adsp_rpc_init(module);
310 if (rc)
311 goto done;
312
313 module->ops = ops;
314 module->driver_data = driver_data;
315 *out = module;
316 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_REGISTER_APP,
317 module->id, module);
318 if (rc) {
319 module->ops = NULL;
320 module->driver_data = NULL;
321 *out = NULL;
322 MM_ERR("REGISTER_APP failed\n");
323 goto done;
324 }
325
326 MM_DBG("module %s has been registered\n", module->name);
327
328done:
329 mutex_unlock(&module->lock);
330 return rc;
331}
332EXPORT_SYMBOL(msm_adsp_get);
333
334static int msm_adsp_disable_locked(struct msm_adsp_module *module);
335
336void msm_adsp_put(struct msm_adsp_module *module)
337{
338 unsigned long flags;
339
340 mutex_lock(&module->lock);
341 if (module->ops) {
342 MM_INFO("closing module %s\n", module->name);
343
344 /* lock to ensure a dsp event cannot be delivered
345 * during or after removal of the ops and driver_data
346 */
347 spin_lock_irqsave(&adsp_cmd_lock, flags);
348 module->ops = NULL;
349 module->driver_data = NULL;
350 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
351
352 if (module->state != ADSP_STATE_DISABLED) {
353 MM_INFO("disabling module %s\n", module->name);
354 msm_adsp_disable_locked(module);
355 }
356
357 msm_rpc_close(module->rpc_client);
358 module->rpc_client = 0;
359 } else {
360 MM_INFO("module %s is already closed\n", module->name);
361 }
362 mutex_unlock(&module->lock);
363}
364EXPORT_SYMBOL(msm_adsp_put);
365
366/* this should be common code with rpc_servers.c */
367static int rpc_send_accepted_void_reply(struct msm_rpc_endpoint *client,
368 uint32_t xid, uint32_t accept_status)
369{
370 int rc = 0;
371 uint8_t reply_buf[sizeof(struct rpc_reply_hdr)];
372 struct rpc_reply_hdr *reply = (struct rpc_reply_hdr *)reply_buf;
373
374 reply->xid = cpu_to_be32(xid);
375 reply->type = cpu_to_be32(1); /* reply */
376 reply->reply_stat = cpu_to_be32(RPCMSG_REPLYSTAT_ACCEPTED);
377
378 reply->data.acc_hdr.accept_stat = cpu_to_be32(accept_status);
379 reply->data.acc_hdr.verf_flavor = 0;
380 reply->data.acc_hdr.verf_length = 0;
381
382 rc = msm_rpc_write(rpc_cb_server_client, reply_buf, sizeof(reply_buf));
383 if (rc < 0)
384 MM_ERR("could not write RPC response: %d\n", rc);
385 return rc;
386}
387
388int __msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
389 void *cmd_buf, size_t cmd_size)
390{
391 uint32_t ctrl_word;
392 uint32_t dsp_q_addr;
393 uint32_t dsp_addr;
394 uint32_t cmd_id = 0;
395 int cnt = 0;
396 int ret_status = 0;
397 unsigned long flags;
398 struct adsp_info *info;
399
400 if (!module || !cmd_buf) {
401 MM_ERR("Called with NULL parameters\n");
402 return -EINVAL;
403 }
404 info = module->info;
405 spin_lock_irqsave(&adsp_write_lock, flags);
406
407 if (module->state != ADSP_STATE_ENABLED) {
408 spin_unlock_irqrestore(&adsp_write_lock, flags);
409 MM_ERR("module %s not enabled before write\n", module->name);
410 return -ENODEV;
411 }
412 if (adsp_validate_module(module->id)) {
413 spin_unlock_irqrestore(&adsp_write_lock, flags);
414 MM_ERR("module id validation failed %s %d\n",
415 module->name, module->id);
416 return -ENXIO;
417 }
418 if (dsp_queue_addr >= QDSP_MAX_NUM_QUEUES) {
419 spin_unlock_irqrestore(&adsp_write_lock, flags);
420 MM_ERR("Invalid Queue Index: %d\n", dsp_queue_addr);
421 return -ENXIO;
422 }
423 if (adsp_validate_queue(module->id, dsp_queue_addr, cmd_size)) {
424 spin_unlock_irqrestore(&adsp_write_lock, flags);
425 return -EINVAL;
426 }
427 dsp_q_addr = adsp_get_queue_offset(info, dsp_queue_addr);
428 dsp_q_addr &= ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M;
429
430 /* Poll until the ADSP is ready to accept a command.
431 * Wait for 100us, return error if it's not responding.
432 * If this returns an error, we need to disable ALL modules and
433 * then retry.
434 */
435 while (((ctrl_word = readl(info->write_ctrl)) &
436 ADSP_RTOS_WRITE_CTRL_WORD_READY_M) !=
437 ADSP_RTOS_WRITE_CTRL_WORD_READY_V) {
438 if (cnt > 50) {
439 MM_ERR("timeout waiting for DSP write ready\n");
440 ret_status = -EIO;
441 goto fail;
442 }
443 MM_DBG("waiting for DSP write ready\n");
444 udelay(2);
445 cnt++;
446 }
447
448 /* Set the mutex bits */
449 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
450 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
451
452 /* Clear the command bits */
453 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
454
455 /* Set the queue address bits */
456 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
457 ctrl_word |= dsp_q_addr;
458
459 writel(ctrl_word, info->write_ctrl);
460
461 /* Generate an interrupt to the DSP. This notifies the DSP that
462 * we are about to send a command on this particular queue. The
463 * DSP will in response change its state.
464 */
465 writel(1, info->send_irq);
466
467 /* Poll until the adsp responds to the interrupt; this does not
468 * generate an interrupt from the adsp. This should happen within
469 * 5ms.
470 */
471 cnt = 0;
472 while ((readl(info->write_ctrl) &
473 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M) ==
474 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V) {
475 if (cnt > 2500) {
476 MM_ERR("timeout waiting for adsp ack\n");
477 ret_status = -EIO;
478 goto fail;
479 }
480 udelay(2);
481 cnt++;
482 }
483
484 /* Read the ctrl word */
485 ctrl_word = readl(info->write_ctrl);
486
487 if ((ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_STATUS_M) !=
488 ADSP_RTOS_WRITE_CTRL_WORD_NO_ERR_V) {
489 ret_status = -EAGAIN;
490 goto fail;
491 } else {
492 /* No error */
493 /* Get the DSP buffer address */
494 dsp_addr = (ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M) +
495 (uint32_t)MSM_AD5_BASE;
496
497 if (dsp_addr < (uint32_t)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
498 uint16_t *buf_ptr = (uint16_t *) cmd_buf;
499 uint16_t *dsp_addr16 = (uint16_t *)dsp_addr;
500 cmd_size /= sizeof(uint16_t);
501
502 /* Save the command ID */
503 cmd_id = (uint32_t) buf_ptr[0];
504
505 /* Copy the command to DSP memory */
506 cmd_size++;
507 while (--cmd_size)
508 *dsp_addr16++ = *buf_ptr++;
509 } else {
510 uint32_t *buf_ptr = (uint32_t *) cmd_buf;
511 uint32_t *dsp_addr32 = (uint32_t *)dsp_addr;
512 cmd_size /= sizeof(uint32_t);
513
514 /* Save the command ID */
515 cmd_id = buf_ptr[0];
516
517 cmd_size++;
518 while (--cmd_size)
519 *dsp_addr32++ = *buf_ptr++;
520 }
521
522 /* Set the mutex bits */
523 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
524 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
525
526 /* Set the command bits to write done */
527 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
528 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_CMD_WRITE_DONE_V;
529
530 /* Set the queue address bits */
531 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
532 ctrl_word |= dsp_q_addr;
533
534 writel(ctrl_word, info->write_ctrl);
535
536 /* Generate an interrupt to the DSP. It does not respond with
537 * an interrupt, and we do not need to wait for it to
538 * acknowledge, because it will hold the mutex lock until it's
539 * ready to receive more commands again.
540 */
541 writel(1, info->send_irq);
542
543 module->num_commands++;
544 } /* Ctrl word status bits were 00, no error in the ctrl word */
545
546fail:
547 spin_unlock_irqrestore(&adsp_write_lock, flags);
548 return ret_status;
549}
550EXPORT_SYMBOL(msm_adsp_write);
551
552int msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
553 void *cmd_buf, size_t cmd_size)
554{
555 int rc, retries = 0;
556#ifdef CONFIG_DEBUG_FS
557 uint16_t *ptr;
558 int ii;
559
560 if (wdump > 0) {
561 ptr = cmd_buf;
562 pr_info("A->D:%x\n", module->id);
563 pr_info("adsp: %x %d\n", dsp_queue_addr, cmd_size);
564 for (ii = 0; ii < cmd_size/2; ii++)
565 pr_info("%x ", ptr[ii]);
566 pr_info("\n");
567 }
568#endif /* CONFIG_DEBUG_FS */
569 do {
570 rc = __msm_adsp_write(module, dsp_queue_addr, cmd_buf,
571 cmd_size);
572 if (rc == -EAGAIN)
573 udelay(10);
574 } while (rc == -EAGAIN && retries++ < 300);
575 if (retries > 50)
576 MM_ERR("adsp: %s command took %d attempts: rc %d\n",
577 module->name, retries, rc);
578 return rc;
579}
580
581static void *event_addr;
582static void read_event(void *buf, size_t len)
583{
584 uint32_t dptr[3];
585 struct rpc_adsp_rtos_modem_to_app_args_t *sptr;
586 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
587
588 sptr = event_addr;
589 pkt_ptr = &sptr->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
590
591 dptr[0] = be32_to_cpu(sptr->mtoa_pkt.mp_mtoa_header.event);
592 dptr[1] = be32_to_cpu(pkt_ptr->module);
593 dptr[2] = be32_to_cpu(pkt_ptr->image);
594
595 if (len > EVENT_LEN)
596 len = EVENT_LEN;
597
598 memcpy(buf, dptr, len);
599}
600
601static void handle_adsp_rtos_mtoa_app(struct rpc_request_hdr *req)
602{
603 struct rpc_adsp_rtos_modem_to_app_args_t *args =
604 (struct rpc_adsp_rtos_modem_to_app_args_t *)req;
605 uint32_t event;
606 uint32_t proc_id;
607 uint32_t module_id;
608 uint32_t image;
609 struct msm_adsp_module *module;
610 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
611 struct queue_to_offset_type *qptr;
612 struct queue_to_offset_type *qtbl;
613 struct mod_to_queue_offsets *mqptr;
614 struct mod_to_queue_offsets *mqtbl;
615 uint32_t *mptr;
616 uint32_t *mtbl;
617 uint32_t q_idx;
618 uint32_t num_entries;
619 uint32_t entries_per_image;
620 struct adsp_rtos_mp_mtoa_init_info_type *iptr;
621 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
622 int32_t i_no, e_idx;
623
624 event = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.event);
625 proc_id = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.proc_id);
626
627 if (event == RPC_ADSP_RTOS_INIT_INFO) {
628 MM_INFO("INIT_INFO Event\n");
629 sptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_init_packet;
630
631 iptr = adsp_info.init_info_ptr;
632 iptr->image_count = be32_to_cpu(sptr->image_count);
633 if (iptr->image_count > IMG_MAX)
634 iptr->image_count = IMG_MAX;
635 iptr->num_queue_offsets = be32_to_cpu(sptr->num_queue_offsets);
636 num_entries = iptr->num_queue_offsets;
637 if (num_entries > ENTRIES_MAX) {
638 num_entries = ENTRIES_MAX;
639 iptr->num_queue_offsets = ENTRIES_MAX;
640 }
641 qptr = &sptr->queue_offsets_tbl[0][0];
642 for (i_no = 0; i_no < iptr->image_count; i_no++) {
643 qtbl = &iptr->queue_offsets_tbl[i_no][0];
644 for (e_idx = 0; e_idx < num_entries; e_idx++) {
645 qtbl[e_idx].offset = be32_to_cpu(qptr->offset);
646 qtbl[e_idx].queue = be32_to_cpu(qptr->queue);
647 q_idx = be32_to_cpu(qptr->queue);
648 iptr->queue_offsets[i_no][q_idx] = qtbl[e_idx].offset;
649 qptr++;
650 }
651 }
652
653 num_entries = be32_to_cpu(sptr->num_task_module_entries);
654 if (num_entries > ENTRIES_MAX)
655 num_entries = ENTRIES_MAX;
656 iptr->num_task_module_entries = num_entries;
657 entries_per_image = num_entries / iptr->image_count;
658 mptr = &sptr->task_to_module_tbl[0][0];
659 for (i_no = 0; i_no < iptr->image_count; i_no++) {
660 mtbl = &iptr->task_to_module_tbl[i_no][0];
661 for (e_idx = 0; e_idx < entries_per_image; e_idx++) {
662 mtbl[e_idx] = be32_to_cpu(*mptr);
663 mptr++;
664 }
665 }
666
667 iptr->module_table_size = be32_to_cpu(sptr->module_table_size);
668#if CONFIG_ADSP_RPC_VER > 0x30001
669 if (iptr->module_table_size > MODULES_MAX)
670 iptr->module_table_size = MODULES_MAX;
671#else
672 if (iptr->module_table_size > ENTRIES_MAX)
673 iptr->module_table_size = ENTRIES_MAX;
674#endif
675 mptr = &sptr->module_entries[0];
676 for (i_no = 0; i_no < iptr->module_table_size; i_no++)
677 iptr->module_entries[i_no] = be32_to_cpu(mptr[i_no]);
678
679 mqptr = &sptr->mod_to_q_tbl[0];
680 mqtbl = &iptr->mod_to_q_tbl[0];
681 iptr->mod_to_q_entries = be32_to_cpu(sptr->mod_to_q_entries);
682 if (iptr->mod_to_q_entries > ENTRIES_MAX)
683 iptr->mod_to_q_entries = ENTRIES_MAX;
684 for (e_idx = 0; e_idx < iptr->mod_to_q_entries; e_idx++) {
685 mqtbl[e_idx].module = be32_to_cpu(mqptr->module);
686 mqtbl[e_idx].q_type = be32_to_cpu(mqptr->q_type);
687 mqtbl[e_idx].q_max_len = be32_to_cpu(mqptr->q_max_len);
688 mqptr++;
689 }
690
691 adsp_info.init_info_state = ADSP_STATE_INIT_INFO;
692 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
693 RPC_ACCEPTSTAT_SUCCESS);
694 wake_up(&adsp_info.init_info_wait);
695
696 return;
697 }
698
699 pkt_ptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
700 module_id = be32_to_cpu(pkt_ptr->module);
701 image = be32_to_cpu(pkt_ptr->image);
702
703 MM_DBG("rpc event=%d, proc_id=%d, module=%d, image=%d\n",
704 event, proc_id, module_id, image);
705
706 module = find_adsp_module_by_id(&adsp_info, module_id);
707 if (!module) {
708 MM_ERR("module %d is not supported!\n", module_id);
709 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
710 RPC_ACCEPTSTAT_GARBAGE_ARGS);
711 return;
712 }
713
714 mutex_lock(&module->lock);
715 switch (event) {
716 case RPC_ADSP_RTOS_MOD_READY:
717 MM_INFO("module %s: READY\n", module->name);
718 module->state = ADSP_STATE_ENABLED;
719 wake_up(&module->state_wait);
720 adsp_set_image(module->info, image);
721 break;
722 case RPC_ADSP_RTOS_MOD_DISABLE:
723 MM_INFO("module %s: DISABLED\n", module->name);
724 module->state = ADSP_STATE_DISABLED;
725 wake_up(&module->state_wait);
726 break;
727 case RPC_ADSP_RTOS_SERVICE_RESET:
728 MM_INFO("module %s: SERVICE_RESET\n", module->name);
729 module->state = ADSP_STATE_DISABLED;
730 wake_up(&module->state_wait);
731 break;
732 case RPC_ADSP_RTOS_CMD_SUCCESS:
733 MM_INFO("module %s: CMD_SUCCESS\n", module->name);
734 break;
735 case RPC_ADSP_RTOS_CMD_FAIL:
736 MM_INFO("module %s: CMD_FAIL\n", module->name);
737 break;
738 case RPC_ADSP_RTOS_DISABLE_FAIL:
739 MM_INFO("module %s: DISABLE_FAIL\n", module->name);
740 break;
741 default:
742 MM_ERR("unknown event %d\n", event);
743 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
744 RPC_ACCEPTSTAT_GARBAGE_ARGS);
745 mutex_unlock(&module->lock);
746 return;
747 }
748 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
749 RPC_ACCEPTSTAT_SUCCESS);
750#ifdef CONFIG_MSM_ADSP_REPORT_EVENTS
751 event_addr = (uint32_t *)req;
752 module->ops->event(module->driver_data,
753 EVENT_MSG_ID,
754 EVENT_LEN,
755 read_event);
756#endif
757 mutex_unlock(&module->lock);
758}
759
760static int handle_adsp_rtos_mtoa(struct rpc_request_hdr *req)
761{
762 switch (req->procedure) {
763 case RPC_ADSP_RTOS_MTOA_NULL_PROC:
764 rpc_send_accepted_void_reply(rpc_cb_server_client,
765 req->xid,
766 RPC_ACCEPTSTAT_SUCCESS);
767 break;
768#if CONFIG_ADSP_RPC_VER > 0x30001
769 case RPC_ADSP_RTOS_MTOA_INIT_INFO_PROC:
770 case RPC_ADSP_RTOS_MTOA_EVENT_INFO_PROC:
771#else
772 case RPC_ADSP_RTOS_MODEM_TO_APP_PROC:
773#endif
774 handle_adsp_rtos_mtoa_app(req);
775 break;
776 default:
777 MM_ERR("unknowned proc %d\n", req->procedure);
778 rpc_send_accepted_void_reply(
779 rpc_cb_server_client, req->xid,
780 RPC_ACCEPTSTAT_PROC_UNAVAIL);
781 break;
782 }
783 return 0;
784}
785
786/* this should be common code with rpc_servers.c */
787static int adsp_rpc_thread(void *data)
788{
789 void *buffer;
790 struct rpc_request_hdr *req;
791 int rc, exit = 0;
792
793 do {
794 rc = msm_rpc_read(rpc_cb_server_client, &buffer, -1, -1);
795 if (rc < 0) {
796 MM_ERR("could not read rpc: %d\n", rc);
797 break;
798 }
799 req = (struct rpc_request_hdr *)buffer;
800
801 req->type = be32_to_cpu(req->type);
802 req->xid = be32_to_cpu(req->xid);
803 req->rpc_vers = be32_to_cpu(req->rpc_vers);
804 req->prog = be32_to_cpu(req->prog);
805 req->vers = be32_to_cpu(req->vers);
806 req->procedure = be32_to_cpu(req->procedure);
807
808 if (req->type != 0)
809 goto bad_rpc;
810 if (req->rpc_vers != 2)
811 goto bad_rpc;
812 if (req->prog != rpc_adsp_rtos_mtoa_prog)
813 goto bad_rpc;
814 if (!msm_rpc_is_compatible_version(rpc_adsp_rtos_mtoa_vers,
815 req->vers))
816 goto bad_rpc;
817
818 handle_adsp_rtos_mtoa(req);
819 kfree(buffer);
820 continue;
821
822bad_rpc:
823 MM_ERR("bogus rpc from modem\n");
824 kfree(buffer);
825 } while (!exit);
826 do_exit(0);
827}
828
829static size_t read_event_size;
830static void *read_event_addr;
831
832static void read_event_16(void *buf, size_t len)
833{
834 uint16_t *dst = buf;
835 uint16_t *src = read_event_addr;
836 len /= 2;
837 if (len > read_event_size)
838 len = read_event_size;
839 while (len--)
840 *dst++ = *src++;
841}
842
843static void read_event_32(void *buf, size_t len)
844{
845 uint32_t *dst = buf;
846 uint32_t *src = read_event_addr;
847 len /= 2;
848 if (len > read_event_size)
849 len = read_event_size;
850 while (len--)
851 *dst++ = *src++;
852}
853
854static int adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(
855 struct adsp_info *info, void *dsp_addr)
856{
857 struct msm_adsp_module *module;
858 unsigned rtos_task_id;
859 unsigned msg_id;
860 unsigned msg_length;
861#ifdef CONFIG_DEBUG_FS
862 uint16_t *ptr;
863 int ii;
864#endif /* CONFIG_DEBUG_FS */
865 void (*func)(void *, size_t);
866
867 if (dsp_addr >= (void *)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
868 uint32_t *dsp_addr32 = dsp_addr;
869 uint32_t tmp = *dsp_addr32++;
870 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
871 msg_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M);
872 read_event_size = tmp >> 16;
873 read_event_addr = dsp_addr32;
874 msg_length = read_event_size * sizeof(uint32_t);
875 func = read_event_32;
876 } else {
877 uint16_t *dsp_addr16 = dsp_addr;
878 uint16_t tmp = *dsp_addr16++;
879 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
880 msg_id = tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M;
881 read_event_size = *dsp_addr16++;
882 read_event_addr = dsp_addr16;
883 msg_length = read_event_size * sizeof(uint16_t);
884 func = read_event_16;
885 }
886
887 if (rtos_task_id > info->max_task_id) {
888 MM_ERR("bogus task id %d\n", rtos_task_id);
889 return 0;
890 }
891 module = find_adsp_module_by_id(info,
892 adsp_get_module(info, rtos_task_id));
893
894 if (!module) {
895 MM_ERR("no module for task id %d\n", rtos_task_id);
896 return 0;
897 }
898
899 module->num_events++;
900
901 if (!module->ops) {
902 MM_ERR("module %s is not open\n", module->name);
903 return 0;
904 }
905#ifdef CONFIG_DEBUG_FS
906 if (rdump > 0) {
907 ptr = read_event_addr;
908 pr_info("D->A\n");
909 pr_info("m_id = %x id = %x\n", module->id, msg_id);
910 for (ii = 0; ii < msg_length/2; ii++)
911 pr_info("%x ", ptr[ii]);
912 pr_info("\n");
913 }
914#endif /* CONFIG_DEBUG_FS */
915
916 module->ops->event(module->driver_data, msg_id, msg_length, func);
917 return 0;
918}
919
920static int adsp_get_event(struct adsp_info *info)
921{
922 uint32_t ctrl_word;
923 uint32_t ready;
924 void *dsp_addr;
925 uint32_t cmd_type;
926 int cnt;
927 unsigned long flags;
928 int rc = 0;
929
930 spin_lock_irqsave(&adsp_cmd_lock, flags);
931
932 /* Whenever the DSP has a message, it updates this control word
933 * and generates an interrupt. When we receive the interrupt, we
934 * read this register to find out what ADSP task the command is
935 * comming from.
936 *
937 * The ADSP should *always* be ready on the first call, but the
938 * irq handler calls us in a loop (to handle back-to-back command
939 * processing), so we give the DSP some time to return to the
940 * ready state. The DSP will not issue another IRQ for events
941 * pending between the first IRQ and the event queue being drained,
942 * unfortunately.
943 */
944
945 for (cnt = 0; cnt < 50; cnt++) {
946 ctrl_word = readl(info->read_ctrl);
947
948 if ((ctrl_word & ADSP_RTOS_READ_CTRL_WORD_FLAG_M) ==
949 ADSP_RTOS_READ_CTRL_WORD_FLAG_UP_CONT_V)
950 goto ready;
951
952 udelay(2);
953 }
954 MM_ERR("not ready after 100uS\n");
955 rc = -EBUSY;
956 goto done;
957
958ready:
959 /* Here we check to see if there are pending messages. If there are
960 * none, we siply return -EAGAIN to indicate that there are no more
961 * messages pending.
962 */
963 ready = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_READY_M;
964 if ((ready != ADSP_RTOS_READ_CTRL_WORD_READY_V) &&
965 (ready != ADSP_RTOS_READ_CTRL_WORD_CONT_V)) {
966 rc = -EAGAIN;
967 goto done;
968 }
969
970 /* DSP says that there are messages waiting for the host to read */
971
972 /* Get the Command Type */
973 cmd_type = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_CMD_TYPE_M;
974
975 /* Get the DSP buffer address */
976 dsp_addr = (void *)((ctrl_word &
977 ADSP_RTOS_READ_CTRL_WORD_DSP_ADDR_M) +
978 (uint32_t)MSM_AD5_BASE);
979
980 /* We can only handle Task-to-Host messages */
981 if (cmd_type != ADSP_RTOS_READ_CTRL_WORD_CMD_TASK_TO_H_V) {
982 MM_ERR("unknown dsp cmd_type %d\n", cmd_type);
983 rc = -EIO;
984 goto done;
985 }
986
987 adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(info, dsp_addr);
988
989 ctrl_word = readl(info->read_ctrl);
990 ctrl_word &= ~ADSP_RTOS_READ_CTRL_WORD_READY_M;
991
992 /* Write ctrl word to the DSP */
993 writel(ctrl_word, info->read_ctrl);
994
995 /* Generate an interrupt to the DSP */
996 writel(1, info->send_irq);
997
998done:
999 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
1000 return rc;
1001}
1002
1003static irqreturn_t adsp_irq_handler(int irq, void *data)
1004{
1005 struct adsp_info *info = &adsp_info;
1006 int cnt = 0;
1007 for (cnt = 0; cnt < 15; cnt++)
1008 if (adsp_get_event(info) < 0)
1009 break;
1010 if (cnt > info->event_backlog_max)
1011 info->event_backlog_max = cnt;
1012 info->events_received += cnt;
1013 if (cnt == 15)
1014 MM_ERR("too many (%d) events for single irq!\n", cnt);
1015 return IRQ_HANDLED;
1016}
1017
1018int adsp_set_clkrate(struct msm_adsp_module *module, unsigned long clk_rate)
1019{
1020 if (module->clk && clk_rate)
1021 return clk_set_min_rate(module->clk, clk_rate);
1022
1023 return -EINVAL;
1024}
1025
1026int msm_adsp_enable(struct msm_adsp_module *module)
1027{
1028 int rc = 0;
1029
1030 MM_INFO("enable '%s'state[%d] id[%d]\n",
1031 module->name, module->state, module->id);
1032
1033 mutex_lock(&module->lock);
1034 switch (module->state) {
1035 case ADSP_STATE_DISABLED:
1036 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_ENABLE,
1037 module->id, module);
1038 if (rc)
1039 break;
1040 module->state = ADSP_STATE_ENABLING;
1041 mutex_unlock(&module->lock);
1042 rc = wait_event_timeout(module->state_wait,
1043 module->state != ADSP_STATE_ENABLING,
1044 1 * HZ);
1045 mutex_lock(&module->lock);
1046 if (module->state == ADSP_STATE_ENABLED) {
1047 rc = 0;
1048 } else {
1049 MM_ERR("module '%s' enable timed out\n", module->name);
1050 rc = -ETIMEDOUT;
1051 }
1052 if (module->open_count++ == 0 && module->clk)
1053 clk_enable(module->clk);
1054
1055 mutex_lock(&adsp_open_lock);
1056 if (adsp_open_count++ == 0) {
1057 enable_irq(INT_ADSP);
1058 prevent_suspend();
1059 }
1060 mutex_unlock(&adsp_open_lock);
1061 break;
1062 case ADSP_STATE_ENABLING:
1063 MM_DBG("module '%s' enable in progress\n", module->name);
1064 break;
1065 case ADSP_STATE_ENABLED:
1066 MM_DBG("module '%s' already enabled\n", module->name);
1067 break;
1068 case ADSP_STATE_DISABLING:
1069 MM_ERR("module '%s' disable in progress\n", module->name);
1070 rc = -EBUSY;
1071 break;
1072 }
1073 mutex_unlock(&module->lock);
1074 return rc;
1075}
1076EXPORT_SYMBOL(msm_adsp_enable);
1077
1078int msm_adsp_disable_event_rsp(struct msm_adsp_module *module)
1079{
1080 int rc = 0;
1081
1082 mutex_lock(&module->lock);
1083
1084 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE_EVENT_RSP,
1085 module->id, module);
1086 mutex_unlock(&module->lock);
1087
1088 return rc;
1089}
1090EXPORT_SYMBOL(msm_adsp_disable_event_rsp);
1091
1092static int msm_adsp_disable_locked(struct msm_adsp_module *module)
1093{
1094 int rc = 0;
1095
1096 switch (module->state) {
1097 case ADSP_STATE_DISABLED:
1098 MM_DBG("module '%s' already disabled\n", module->name);
1099 break;
1100 case ADSP_STATE_ENABLING:
1101 case ADSP_STATE_ENABLED:
1102 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE,
1103 module->id, module);
1104 module->state = ADSP_STATE_DISABLED;
1105 if (--module->open_count == 0 && module->clk)
1106 clk_disable(module->clk);
1107 mutex_lock(&adsp_open_lock);
1108 if (--adsp_open_count == 0) {
1109 disable_irq(INT_ADSP);
1110 allow_suspend();
1111 MM_DBG("disable interrupt\n");
1112 }
1113 mutex_unlock(&adsp_open_lock);
1114 }
1115 return rc;
1116}
1117
1118int msm_adsp_disable(struct msm_adsp_module *module)
1119{
1120 int rc;
1121 MM_INFO("disable '%s'\n", module->name);
1122 mutex_lock(&module->lock);
1123 rc = msm_adsp_disable_locked(module);
1124 mutex_unlock(&module->lock);
1125 return rc;
1126}
1127EXPORT_SYMBOL(msm_adsp_disable);
1128
1129static int msm_adsp_probe(struct platform_device *pdev)
1130{
1131 unsigned count;
1132 int rc, i;
1133
1134 if (pdev->id != (rpc_adsp_rtos_atom_vers & RPC_VERSION_MAJOR_MASK))
1135 return -EINVAL;
1136
1137 wake_lock_init(&adsp_wake_lock, WAKE_LOCK_SUSPEND, "adsp");
1138 adsp_info.init_info_ptr = kzalloc(
1139 (sizeof(struct adsp_rtos_mp_mtoa_init_info_type)), GFP_KERNEL);
1140 if (!adsp_info.init_info_ptr)
1141 return -ENOMEM;
1142
1143 rc = adsp_init_info(&adsp_info);
1144 if (rc)
1145 return rc;
1146 adsp_info.send_irq += (uint32_t) MSM_AD5_BASE;
1147 adsp_info.read_ctrl += (uint32_t) MSM_AD5_BASE;
1148 adsp_info.write_ctrl += (uint32_t) MSM_AD5_BASE;
1149 count = adsp_info.module_count;
1150
1151 adsp_modules = kzalloc(
1152 (sizeof(struct msm_adsp_module) + sizeof(void *)) *
1153 count, GFP_KERNEL);
1154 if (!adsp_modules)
1155 return -ENOMEM;
1156
1157 adsp_info.id_to_module = (void *) (adsp_modules + count);
1158
1159 spin_lock_init(&adsp_cmd_lock);
1160 spin_lock_init(&adsp_write_lock);
1161
1162 rc = request_irq(INT_ADSP, adsp_irq_handler, IRQF_TRIGGER_RISING,
1163 "adsp", 0);
1164 if (rc < 0)
1165 goto fail_request_irq;
1166 disable_irq(INT_ADSP);
1167
1168 rpc_cb_server_client = msm_rpc_open();
1169 if (IS_ERR(rpc_cb_server_client)) {
1170 rpc_cb_server_client = NULL;
1171 rc = PTR_ERR(rpc_cb_server_client);
1172 MM_ERR("could not create rpc server (%d)\n", rc);
1173 goto fail_rpc_open;
1174 }
1175
1176 rc = msm_rpc_register_server(rpc_cb_server_client,
1177 rpc_adsp_rtos_mtoa_prog,
1178 rpc_adsp_rtos_mtoa_vers);
1179 if (rc) {
1180 MM_ERR("could not register callback server (%d)\n", rc);
1181 goto fail_rpc_register;
1182 }
1183
1184 /* start the kernel thread to process the callbacks */
1185 kthread_run(adsp_rpc_thread, NULL, "kadspd");
1186
1187 for (i = 0; i < count; i++) {
1188 struct msm_adsp_module *mod = adsp_modules + i;
1189 mutex_init(&mod->lock);
1190 init_waitqueue_head(&mod->state_wait);
1191 mod->info = &adsp_info;
1192 mod->name = adsp_info.module[i].name;
1193 mod->id = adsp_info.module[i].id;
1194 if (adsp_info.module[i].clk_name)
1195 mod->clk = clk_get(NULL, adsp_info.module[i].clk_name);
1196 else
1197 mod->clk = NULL;
1198 if (mod->clk && adsp_info.module[i].clk_rate)
1199 clk_set_min_rate(mod->clk,
1200 adsp_info.module[i].clk_rate);
1201 mod->verify_cmd = adsp_info.module[i].verify_cmd;
1202 mod->patch_event = adsp_info.module[i].patch_event;
1203 INIT_HLIST_HEAD(&mod->pmem_regions);
1204 mod->pdev.name = adsp_info.module[i].pdev_name;
1205 mod->pdev.id = -1;
1206 adsp_info.id_to_module[i] = mod;
1207 platform_device_register(&mod->pdev);
1208 }
1209
1210 msm_adsp_publish_cdevs(adsp_modules, count);
1211 rmtask_init();
1212
1213 return 0;
1214
1215fail_rpc_register:
1216 msm_rpc_close(rpc_cb_server_client);
1217 rpc_cb_server_client = NULL;
1218fail_rpc_open:
1219 enable_irq(INT_ADSP);
1220 free_irq(INT_ADSP, 0);
1221fail_request_irq:
1222 kfree(adsp_modules);
1223 kfree(adsp_info.init_info_ptr);
1224 return rc;
1225}
1226#ifdef CONFIG_DEBUG_FS
1227static int get_parameters(char *buf, long int *param1, int num_of_par)
1228{
1229 char *token;
1230 int base, cnt;
1231
1232 token = strsep(&buf, " ");
1233
1234 for (cnt = 0; cnt < num_of_par; cnt++) {
1235 if (token != NULL) {
1236 if ((token[1] == 'x') || (token[1] == 'X'))
1237 base = 16;
1238 else
1239 base = 10;
1240
1241 if (strict_strtoul(token, base, &param1[cnt]) != 0)
1242 return -EINVAL;
1243
1244 token = strsep(&buf, " ");
1245 }
1246 else
1247 return -EINVAL;
1248 }
1249 return 0;
1250}
1251
1252
1253static ssize_t adsp_debug_open(struct inode *inode, struct file *file)
1254{
1255 file->private_data = inode->i_private;
1256 pr_debug("adsp debugfs opened\n");
1257 return 0;
1258}
1259static ssize_t adsp_debug_write(struct file *file, const char __user *buf,
1260 size_t cnt, loff_t *ppos)
1261{
1262 char *access_str = file->private_data;
1263 char lbuf[32];
1264 int rc;
1265 long int param[5];
1266
1267 if (cnt > sizeof(lbuf) - 1)
1268 return -EINVAL;
1269 rc = copy_from_user(lbuf, buf, cnt);
1270 if (rc) {
1271 pr_info("Unable to copy data from user space\n");
1272 return -EFAULT;
1273 }
1274 lbuf[cnt] = '\0';
1275
1276 if (!strcmp(access_str, "write_log")) {
1277 if (get_parameters(lbuf, param, 1) == 0) {
1278 switch (param[0]) {
1279 case 1:
1280 if (wdump <= 0)
1281 wdump = 1;
1282 pr_debug("write cmd to DSP(A->D) dump \
1283 started:%d\n", wdump);
1284 break;
1285 case 0:
1286 if (wdump > 0)
1287 wdump = 0;
1288 pr_debug("Stop write cmd to \
1289 DSP(A->D):%d\n", wdump);
1290 break;
1291 default:
1292 rc = -EINVAL;
1293 break;
1294 }
1295 } else
1296 rc = -EINVAL;
1297 } else if (!strcmp(access_str, "read_log")) {
1298 if (get_parameters(lbuf, param, 1) == 0) {
1299 switch (param[0]) {
1300 case 1:
1301 if (rdump <= 0)
1302 rdump = 1;
1303 pr_debug("write cmd from DSP(D->A) dump \
1304 started:%d\n", wdump);
1305 break;
1306 case 0:
1307 if (rdump > 0)
1308 rdump = 0;
1309 pr_debug("Stop write cmd from \
1310 DSP(D->A):%d\n", wdump);
1311 break;
1312 default:
1313 rc = -EINVAL;
1314 break;
1315 }
1316 } else
1317 rc = -EINVAL;
1318 } else {
1319 rc = -EINVAL;
1320 }
1321 if (rc == 0)
1322 rc = cnt;
1323 else {
1324 pr_err("%s: rc = %d\n", __func__, rc);
1325 pr_info("\nWrong command: Use =>\n");
1326 pr_info("-------------------------\n");
1327 pr_info("To Start A->D:: echo \"1\">/sys/kernel/debug/ \
1328 adsp_cmd/write_log\n");
1329 pr_info("To Start D->A:: echo \"1\">/sys/kernel/debug/ \
1330 adsp_cmd/read_log\n");
1331 pr_info("To Stop A->D:: echo \"0\">/sys/kernel/debug/ \
1332 adsp_cmd/write_log\n");
1333 pr_info("To Stop D->A:: echo \"0\">/sys/kernel/debug/ \
1334 adsp_cmd/read_log\n");
1335 pr_info("------------------------\n");
1336 }
1337
1338 return rc;
1339}
1340#endif
1341
1342static struct platform_driver msm_adsp_driver = {
1343 .probe = msm_adsp_probe,
1344 .driver = {
1345 .owner = THIS_MODULE,
1346 },
1347};
1348
1349static char msm_adsp_driver_name[] = "rs00000000";
1350
1351#ifdef CONFIG_DEBUG_FS
1352static const struct file_operations adsp_debug_fops = {
1353 .write = adsp_debug_write,
1354 .open = adsp_debug_open,
1355};
1356#endif
1357
1358static int __init adsp_init(void)
1359{
1360 int rc;
1361
1362#ifdef CONFIG_DEBUG_FS
1363 dentry_adsp = debugfs_create_dir("adsp_cmd", 0);
1364 if (!IS_ERR(dentry_adsp)) {
1365 dentry_wdata = debugfs_create_file("write_log", \
1366 S_IFREG | S_IRUGO, dentry_adsp,
1367 (void *) "write_log" , &adsp_debug_fops);
1368 dentry_rdata = debugfs_create_file("read_log", \
1369 S_IFREG | S_IRUGO, dentry_adsp,
1370 (void *) "read_log", &adsp_debug_fops);
1371 }
1372 rdump = 0;
1373 wdump = 0;
1374#endif /* CONFIG_DEBUG_FS */
1375
1376 rpc_adsp_rtos_atom_prog = 0x3000000a;
1377 rpc_adsp_rtos_atom_vers = 0x10001;
1378 rpc_adsp_rtos_atom_vers_comp = 0x00010001;
1379 rpc_adsp_rtos_mtoa_prog = 0x3000000b;
1380#if CONFIG_ADSP_RPC_VER > 0x30001
1381 rpc_adsp_rtos_mtoa_vers = 0x30002;
1382 rpc_adsp_rtos_mtoa_vers_comp = 0x00030002;
1383#else
1384 rpc_adsp_rtos_mtoa_vers = 0x30001;
1385 rpc_adsp_rtos_mtoa_vers_comp = 0x00030001;
1386#endif
1387
1388 snprintf(msm_adsp_driver_name, sizeof(msm_adsp_driver_name),
1389 "rs%08x",
1390 rpc_adsp_rtos_atom_prog);
1391 msm_adsp_driver.driver.name = msm_adsp_driver_name;
1392 rc = platform_driver_register(&msm_adsp_driver);
1393 MM_INFO("%s -- %d\n", msm_adsp_driver_name, rc);
1394 return rc;
1395}
1396
1397device_initcall(adsp_init);