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review.evervolv.com / android_kernel_htc_msm8960 / 3f2bc4d6eb5a4fada842462ba22bb6bbb41d00c7 / . / arch / arm / mach-msm / rpm_resources.h
blob: 49e4a84831b262a0a78116cd6da98a704352cf2e [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700[diff] [blame^]1/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#ifndef __ARCH_ARM_MACH_MSM_RPM_RESOURCES_H
15#define __ARCH_ARM_MACH_MSM_RPM_RESOURCES_H
16
17#include <mach/rpm.h>
18#include "pm.h"
19
20
21struct msm_rpmrs_limits {
22 uint32_t pxo;
23 uint32_t l2_cache;
24 uint32_t vdd_mem_upper_bound;
25 uint32_t vdd_mem;
26 uint32_t vdd_dig_upper_bound;
27 uint32_t vdd_dig;
28
29 uint32_t latency_us[NR_CPUS];
30 uint32_t power[NR_CPUS];
31};
32
33enum {
34 MSM_RPMRS_PXO_OFF = 0,
35 MSM_RPMRS_PXO_ON = 1,
36};
37
38enum {
39 MSM_RPMRS_L2_CACHE_HSFS_OPEN = 0,
40 MSM_RPMRS_L2_CACHE_GDHS = 1,
41 MSM_RPMRS_L2_CACHE_RETENTION = 2,
42 MSM_RPMRS_L2_CACHE_ACTIVE = 3,
43};
44
45enum {
46 MSM_RPMRS_VDD_MEM_RET_LOW = 500,
47 MSM_RPMRS_VDD_MEM_RET_HIGH = 750,
48 MSM_RPMRS_VDD_MEM_ACTIVE = 1000,
49 MSM_RPMRS_VDD_MEM_MAX = 1250,
50};
51
52enum {
53 MSM_RPMRS_VDD_DIG_RET_LOW = 500,
54 MSM_RPMRS_VDD_DIG_RET_HIGH = 750,
55 MSM_RPMRS_VDD_DIG_ACTIVE = 1000,
56 MSM_RPMRS_VDD_DIG_MAX = 1250,
57};
58
59#define MSM_RPMRS_LIMITS(_pxo, _l2, _vdd_upper_b, _vdd) { \
60 MSM_RPMRS_PXO_##_pxo, \
61 MSM_RPMRS_L2_CACHE_##_l2, \
62 MSM_RPMRS_VDD_MEM_##_vdd_upper_b, \
63 MSM_RPMRS_VDD_MEM_##_vdd, \
64 MSM_RPMRS_VDD_DIG_##_vdd_upper_b, \
65 MSM_RPMRS_VDD_DIG_##_vdd, \
66 {0}, {0}, \
67}
68
69struct msm_rpmrs_level {
70 enum msm_pm_sleep_mode sleep_mode;
71 struct msm_rpmrs_limits rs_limits;
72 bool available;
73 uint32_t latency_us;
74 uint32_t steady_state_power;
75 uint32_t energy_overhead;
76 uint32_t time_overhead_us;
77};
78
79int msm_rpmrs_set(int ctx, struct msm_rpm_iv_pair *req, int count);
80int msm_rpmrs_set_noirq(int ctx, struct msm_rpm_iv_pair *req, int count);
81
82static inline int msm_rpmrs_set_nosleep(
83 int ctx, struct msm_rpm_iv_pair *req, int count)
84{
85 unsigned long flags;
86 int rc;
87
88 local_irq_save(flags);
89 rc = msm_rpmrs_set_noirq(ctx, req, count);
90 local_irq_restore(flags);
91
92 return rc;
93}
94
95int msm_rpmrs_clear(int ctx, struct msm_rpm_iv_pair *req, int count);
96int msm_rpmrs_clear_noirq(int ctx, struct msm_rpm_iv_pair *req, int count);
97
98static inline int msm_rpmrs_clear_nosleep(
99 int ctx, struct msm_rpm_iv_pair *req, int count)
100{
101 unsigned long flags;
102 int rc;
103
104 local_irq_save(flags);
105 rc = msm_rpmrs_clear_noirq(ctx, req, count);
106 local_irq_restore(flags);
107
108 return rc;
109}
110
111void msm_rpmrs_show_resources(void);
112
113struct msm_rpmrs_limits *msm_rpmrs_lowest_limits(
114 bool from_idle, enum msm_pm_sleep_mode sleep_mode, uint32_t latency_us,
115 uint32_t sleep_us);
116
117int msm_rpmrs_enter_sleep(uint32_t sclk_count, struct msm_rpmrs_limits *limits,
118 bool from_idle, bool notify_rpm);
119void msm_rpmrs_exit_sleep(struct msm_rpmrs_limits *limits,
120 bool from_idle, bool notify_rpm);
121
122int msm_rpmrs_levels_init(struct msm_rpmrs_level *levels, int size);
123
124#endif /* __ARCH_ARM_MACH_MSM_RPM_RESOURCES_H */