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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#ifndef __ADRENO_H
14#define __ADRENO_H
15
16#include "kgsl_device.h"
17#include "adreno_drawctxt.h"
18#include "adreno_ringbuffer.h"
19
20#define DEVICE_3D_NAME "kgsl-3d"
21#define DEVICE_3D0_NAME "kgsl-3d0"
22
23#define ADRENO_DEVICE(device) \
24 KGSL_CONTAINER_OF(device, struct adreno_device, dev)
25
26/* Flags to control command packet settings */
27#define KGSL_CMD_FLAGS_PMODE 0x00000001
28#define KGSL_CMD_FLAGS_NO_TS_CMP 0x00000002
29#define KGSL_CMD_FLAGS_NOT_KERNEL_CMD 0x00000004
30
31/* Command identifiers */
32#define KGSL_CONTEXT_TO_MEM_IDENTIFIER 0xDEADBEEF
33#define KGSL_CMD_IDENTIFIER 0xFEEDFACE
34
35#ifdef CONFIG_MSM_SCM
36#define ADRENO_DEFAULT_PWRSCALE_POLICY (&kgsl_pwrscale_policy_tz)
37#else
38#define ADRENO_DEFAULT_PWRSCALE_POLICY NULL
39#endif
40
41#define KGSL_CP_INT_MASK \
42 (CP_INT_CNTL__SW_INT_MASK | \
43 CP_INT_CNTL__T0_PACKET_IN_IB_MASK | \
44 CP_INT_CNTL__OPCODE_ERROR_MASK | \
45 CP_INT_CNTL__PROTECTED_MODE_ERROR_MASK | \
46 CP_INT_CNTL__RESERVED_BIT_ERROR_MASK | \
47 CP_INT_CNTL__IB_ERROR_MASK | \
48 CP_INT_CNTL__IB2_INT_MASK | \
49 CP_INT_CNTL__IB1_INT_MASK | \
50 CP_INT_CNTL__RB_INT_MASK)
51
52enum adreno_gpurev {
53 ADRENO_REV_UNKNOWN = 0,
54 ADRENO_REV_A200 = 200,
55 ADRENO_REV_A205 = 205,
56 ADRENO_REV_A220 = 220,
57 ADRENO_REV_A225 = 225,
58};
59
60struct adreno_device {
61 struct kgsl_device dev; /* Must be first field in this struct */
62 unsigned int chip_id;
63 enum adreno_gpurev gpurev;
64 struct kgsl_memregion gmemspace;
65 struct adreno_context *drawctxt_active;
66 wait_queue_head_t ib1_wq;
67 unsigned int *pfp_fw;
68 size_t pfp_fw_size;
69 unsigned int *pm4_fw;
70 size_t pm4_fw_size;
71 struct adreno_ringbuffer ringbuffer;
72 unsigned int mharb;
73};
74
75int adreno_idle(struct kgsl_device *device, unsigned int timeout);
76void adreno_regread(struct kgsl_device *device, unsigned int offsetwords,
77 unsigned int *value);
78void adreno_regwrite(struct kgsl_device *device, unsigned int offsetwords,
79 unsigned int value);
80
81uint8_t *kgsl_sharedmem_convertaddr(struct kgsl_device *device,
82 unsigned int pt_base, unsigned int gpuaddr, unsigned int *size);
83
84static inline int adreno_is_a200(struct adreno_device *adreno_dev)
85{
86 return (adreno_dev->gpurev == ADRENO_REV_A200);
87}
88
89static inline int adreno_is_a205(struct adreno_device *adreno_dev)
90{
91 return (adreno_dev->gpurev == ADRENO_REV_A200);
92}
93
94static inline int adreno_is_a20x(struct adreno_device *adreno_dev)
95{
96 return (adreno_dev->gpurev == ADRENO_REV_A200 ||
97 adreno_dev->gpurev == ADRENO_REV_A205);
98}
99
100static inline int adreno_is_a220(struct adreno_device *adreno_dev)
101{
102 return (adreno_dev->gpurev == ADRENO_REV_A220);
103}
104
105static inline int adreno_is_a225(struct adreno_device *adreno_dev)
106{
107 return (adreno_dev->gpurev == ADRENO_REV_A225);
108}
109
110static inline int adreno_is_a22x(struct adreno_device *adreno_dev)
111{
112 return (adreno_dev->gpurev == ADRENO_REV_A220 ||
113 adreno_dev->gpurev == ADRENO_REV_A225);
114}
115
116#endif /*__ADRENO_H */