| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame^] | 1 | /* Copyright (c) 2011, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include "msm_fb.h" |
| 14 | #include "mipi_dsi.h" |
| 15 | #include "mipi_renesas.h" |
| 16 | |
| 17 | #define RENESAS_CMD_DELAY 0 /* 50 */ |
| 18 | #define RENESAS_SLEEP_OFF_DELAY 50 |
| 19 | static struct msm_panel_common_pdata *mipi_renesas_pdata; |
| 20 | |
| 21 | static struct dsi_buf renesas_tx_buf; |
| 22 | static struct dsi_buf renesas_rx_buf; |
| 23 | |
| 24 | static char config_sleep_out[2] = {0x11, 0x00}; |
| 25 | static char config_CMD_MODE[2] = {0x40, 0x01}; |
| 26 | static char config_WRTXHT[7] = {0x92, 0x16, 0x08, 0x08, 0x00, 0x01, 0xe0}; |
| 27 | static char config_WRTXVT[7] = {0x8b, 0x02, 0x02, 0x02, 0x00, 0x03, 0x60}; |
| 28 | static char config_PLL2NR[2] = {0xa0, 0x24}; |
| 29 | static char config_PLL2NF1[2] = {0xa2, 0xd0}; |
| 30 | static char config_PLL2NF2[2] = {0xa4, 0x00}; |
| 31 | static char config_PLL2BWADJ1[2] = {0xa6, 0xd0}; |
| 32 | static char config_PLL2BWADJ2[2] = {0xa8, 0x00}; |
| 33 | static char config_PLL2CTL[2] = {0xaa, 0x00}; |
| 34 | static char config_DBICBR[2] = {0x48, 0x03}; |
| 35 | static char config_DBICTYPE[2] = {0x49, 0x00}; |
| 36 | static char config_DBICSET1[2] = {0x4a, 0x1c}; |
| 37 | static char config_DBICADD[2] = {0x4b, 0x00}; |
| 38 | static char config_DBICCTL[2] = {0x4e, 0x01}; |
| 39 | /* static char config_COLMOD_565[2] = {0x3a, 0x05}; */ |
| 40 | /* static char config_COLMOD_666PACK[2] = {0x3a, 0x06}; */ |
| 41 | static char config_COLMOD_888[2] = {0x3a, 0x07}; |
| 42 | static char config_MADCTL[2] = {0x36, 0x00}; |
| 43 | static char config_DBIOC[2] = {0x82, 0x40}; |
| 44 | static char config_CASET[7] = {0x2a, 0x00, 0x00, 0x00, 0x00, 0x01, 0xdf }; |
| 45 | static char config_PASET[7] = {0x2b, 0x00, 0x00, 0x00, 0x00, 0x03, 0x5f }; |
| 46 | static char config_TXON[2] = {0x81, 0x00}; |
| 47 | static char config_BLSET_TM[2] = {0xff, 0x6c}; |
| 48 | |
| 49 | static char config_AGCPSCTL_TM[2] = {0x56, 0x08}; |
| 50 | |
| 51 | static char config_DBICADD70[2] = {0x4b, 0x70}; |
| 52 | static char config_DBICSET_15[2] = {0x4a, 0x15}; |
| 53 | static char config_DBICADD72[2] = {0x4b, 0x72}; |
| 54 | |
| 55 | static char config_Power_Ctrl_2a_cmd[3] = {0x4c, 0x40, 0x10}; |
| 56 | static char config_Auto_Sequencer_Setting_a_cmd[3] = {0x4c, 0x00, 0x00}; |
| 57 | static char Driver_Output_Ctrl_indx[3] = {0x4c, 0x00, 0x01}; |
| 58 | static char Driver_Output_Ctrl_cmd[3] = {0x4c, 0x03, 0x10}; |
| 59 | static char config_LCD_drive_AC_Ctrl_indx[3] = {0x4c, 0x00, 0x02}; |
| 60 | static char config_LCD_drive_AC_Ctrl_cmd[3] = {0x4c, 0x01, 0x00}; |
| 61 | static char config_Entry_Mode_indx[3] = {0x4c, 0x00, 0x03}; |
| 62 | static char config_Entry_Mode_cmd[3] = {0x4c, 0x00, 0x00}; |
| 63 | static char config_Display_Ctrl_1_indx[3] = {0x4c, 0x00, 0x07}; |
| 64 | static char config_Display_Ctrl_1_cmd[3] = {0x4c, 0x00, 0x00}; |
| 65 | static char config_Display_Ctrl_2_indx[3] = {0x4c, 0x00, 0x08}; |
| 66 | static char config_Display_Ctrl_2_cmd[3] = {0x4c, 0x00, 0x04}; |
| 67 | static char config_Display_Ctrl_3_indx[3] = {0x4c, 0x00, 0x09}; |
| 68 | static char config_Display_Ctrl_3_cmd[3] = {0x4c, 0x00, 0x0c}; |
| 69 | static char config_Display_IF_Ctrl_1_indx[3] = {0x4c, 0x00, 0x0c}; |
| 70 | static char config_Display_IF_Ctrl_1_cmd[3] = {0x4c, 0x40, 0x10}; |
| 71 | static char config_Display_IF_Ctrl_2_indx[3] = {0x4c, 0x00, 0x0e}; |
| 72 | static char config_Display_IF_Ctrl_2_cmd[3] = {0x4c, 0x00, 0x00}; |
| 73 | |
| 74 | static char config_Panel_IF_Ctrl_1_indx[3] = {0x4c, 0x00, 0x20}; |
| 75 | static char config_Panel_IF_Ctrl_1_cmd[3] = {0x4c, 0x01, 0x3f}; |
| 76 | static char config_Panel_IF_Ctrl_3_indx[3] = {0x4c, 0x00, 0x22}; |
| 77 | static char config_Panel_IF_Ctrl_3_cmd[3] = {0x4c, 0x76, 0x00}; |
| 78 | static char config_Panel_IF_Ctrl_4_indx[3] = {0x4c, 0x00, 0x23}; |
| 79 | static char config_Panel_IF_Ctrl_4_cmd[3] = {0x4c, 0x1c, 0x0a}; |
| 80 | static char config_Panel_IF_Ctrl_5_indx[3] = {0x4c, 0x00, 0x24}; |
| 81 | static char config_Panel_IF_Ctrl_5_cmd[3] = {0x4c, 0x1c, 0x2c}; |
| 82 | static char config_Panel_IF_Ctrl_6_indx[3] = {0x4c, 0x00, 0x25}; |
| 83 | static char config_Panel_IF_Ctrl_6_cmd[3] = {0x4c, 0x1c, 0x4e}; |
| 84 | static char config_Panel_IF_Ctrl_8_indx[3] = {0x4c, 0x00, 0x27}; |
| 85 | static char config_Panel_IF_Ctrl_8_cmd[3] = {0x4c, 0x00, 0x00}; |
| 86 | static char config_Panel_IF_Ctrl_9_indx[3] = {0x4c, 0x00, 0x28}; |
| 87 | static char config_Panel_IF_Ctrl_9_cmd[3] = {0x4c, 0x76, 0x0c}; |
| 88 | |
| 89 | |
| 90 | static char config_gam_adjust_00_indx[3] = {0x4c, 0x03, 0x00}; |
| 91 | static char config_gam_adjust_00_cmd[3] = {0x4c, 0x00, 0x00}; |
| 92 | static char config_gam_adjust_01_indx[3] = {0x4c, 0x03, 0x01}; |
| 93 | static char config_gam_adjust_01_cmd[3] = {0x4c, 0x05, 0x02}; |
| 94 | static char config_gam_adjust_02_indx[3] = {0x4c, 0x03, 0x02}; |
| 95 | static char config_gam_adjust_02_cmd[3] = {0x4c, 0x07, 0x05}; |
| 96 | static char config_gam_adjust_03_indx[3] = {0x4c, 0x03, 0x03}; |
| 97 | static char config_gam_adjust_03_cmd[3] = {0x4c, 0x00, 0x00}; |
| 98 | static char config_gam_adjust_04_indx[3] = {0x4c, 0x03, 0x04}; |
| 99 | static char config_gam_adjust_04_cmd[3] = {0x4c, 0x02, 0x00}; |
| 100 | static char config_gam_adjust_05_indx[3] = {0x4c, 0x03, 0x05}; |
| 101 | static char config_gam_adjust_05_cmd[3] = {0x4c, 0x07, 0x07}; |
| 102 | static char config_gam_adjust_06_indx[3] = {0x4c, 0x03, 0x06}; |
| 103 | static char config_gam_adjust_06_cmd[3] = {0x4c, 0x10, 0x10}; |
| 104 | static char config_gam_adjust_07_indx[3] = {0x4c, 0x03, 0x07}; |
| 105 | static char config_gam_adjust_07_cmd[3] = {0x4c, 0x02, 0x02}; |
| 106 | static char config_gam_adjust_08_indx[3] = {0x4c, 0x03, 0x08}; |
| 107 | static char config_gam_adjust_08_cmd[3] = {0x4c, 0x07, 0x04}; |
| 108 | static char config_gam_adjust_09_indx[3] = {0x4c, 0x03, 0x09}; |
| 109 | static char config_gam_adjust_09_cmd[3] = {0x4c, 0x07, 0x07}; |
| 110 | static char config_gam_adjust_0A_indx[3] = {0x4c, 0x03, 0x0a}; |
| 111 | static char config_gam_adjust_0A_cmd[3] = {0x4c, 0x00, 0x00}; |
| 112 | static char config_gam_adjust_0B_indx[3] = {0x4c, 0x03, 0x0b}; |
| 113 | static char config_gam_adjust_0B_cmd[3] = {0x4c, 0x00, 0x00}; |
| 114 | static char config_gam_adjust_0C_indx[3] = {0x4c, 0x03, 0x0c}; |
| 115 | static char config_gam_adjust_0C_cmd[3] = {0x4c, 0x07, 0x07}; |
| 116 | static char config_gam_adjust_0D_indx[3] = {0x4c, 0x03, 0x0d}; |
| 117 | static char config_gam_adjust_0D_cmd[3] = {0x4c, 0x10, 0x10}; |
| 118 | static char config_gam_adjust_10_indx[3] = {0x4c, 0x03, 0x10}; |
| 119 | static char config_gam_adjust_10_cmd[3] = {0x4c, 0x01, 0x04}; |
| 120 | static char config_gam_adjust_11_indx[3] = {0x4c, 0x03, 0x11}; |
| 121 | static char config_gam_adjust_11_cmd[3] = {0x4c, 0x05, 0x03}; |
| 122 | static char config_gam_adjust_12_indx[3] = {0x4c, 0x03, 0x12}; |
| 123 | static char config_gam_adjust_12_cmd[3] = {0x4c, 0x03, 0x04}; |
| 124 | static char config_gam_adjust_15_indx[3] = {0x4c, 0x03, 0x15}; |
| 125 | static char config_gam_adjust_15_cmd[3] = {0x4c, 0x03, 0x04}; |
| 126 | static char config_gam_adjust_16_indx[3] = {0x4c, 0x03, 0x16}; |
| 127 | static char config_gam_adjust_16_cmd[3] = {0x4c, 0x03, 0x1c}; |
| 128 | static char config_gam_adjust_17_indx[3] = {0x4c, 0x03, 0x17}; |
| 129 | static char config_gam_adjust_17_cmd[3] = {0x4c, 0x02, 0x04}; |
| 130 | static char config_gam_adjust_18_indx[3] = {0x4c, 0x03, 0x18}; |
| 131 | static char config_gam_adjust_18_cmd[3] = {0x4c, 0x04, 0x02}; |
| 132 | static char config_gam_adjust_19_indx[3] = {0x4c, 0x03, 0x19}; |
| 133 | static char config_gam_adjust_19_cmd[3] = {0x4c, 0x03, 0x05}; |
| 134 | static char config_gam_adjust_1C_indx[3] = {0x4c, 0x03, 0x1c}; |
| 135 | static char config_gam_adjust_1C_cmd[3] = {0x4c, 0x07, 0x07}; |
| 136 | static char config_gam_adjust_1D_indx[3] = {0x4c, 0x03, 0x1D}; |
| 137 | static char config_gam_adjust_1D_cmd[3] = {0x4c, 0x02, 0x1f}; |
| 138 | static char config_gam_adjust_20_indx[3] = {0x4c, 0x03, 0x20}; |
| 139 | static char config_gam_adjust_20_cmd[3] = {0x4c, 0x05, 0x07}; |
| 140 | static char config_gam_adjust_21_indx[3] = {0x4c, 0x03, 0x21}; |
| 141 | static char config_gam_adjust_21_cmd[3] = {0x4c, 0x06, 0x04}; |
| 142 | static char config_gam_adjust_22_indx[3] = {0x4c, 0x03, 0x22}; |
| 143 | static char config_gam_adjust_22_cmd[3] = {0x4c, 0x04, 0x05}; |
| 144 | static char config_gam_adjust_27_indx[3] = {0x4c, 0x03, 0x27}; |
| 145 | static char config_gam_adjust_27_cmd[3] = {0x4c, 0x02, 0x03}; |
| 146 | static char config_gam_adjust_28_indx[3] = {0x4c, 0x03, 0x28}; |
| 147 | static char config_gam_adjust_28_cmd[3] = {0x4c, 0x03, 0x00}; |
| 148 | static char config_gam_adjust_29_indx[3] = {0x4c, 0x03, 0x29}; |
| 149 | static char config_gam_adjust_29_cmd[3] = {0x4c, 0x00, 0x02}; |
| 150 | |
| 151 | static char config_Power_Ctrl_1_indx[3] = {0x4c, 0x01, 0x00}; |
| 152 | static char config_Power_Ctrl_1b_cmd[3] = {0x4c, 0x36, 0x3c}; |
| 153 | static char config_Power_Ctrl_2_indx[3] = {0x4c, 0x01, 0x01}; |
| 154 | static char config_Power_Ctrl_2b_cmd[3] = {0x4c, 0x40, 0x03}; |
| 155 | static char config_Power_Ctrl_3_indx[3] = {0x4c, 0x01, 0x02}; |
| 156 | static char config_Power_Ctrl_3a_cmd[3] = {0x4c, 0x00, 0x01}; |
| 157 | static char config_Power_Ctrl_4_indx[3] = {0x4c, 0x01, 0x03}; |
| 158 | static char config_Power_Ctrl_4a_cmd[3] = {0x4c, 0x3c, 0x58}; |
| 159 | static char config_Power_Ctrl_6_indx[3] = {0x4c, 0x01, 0x0c}; |
| 160 | static char config_Power_Ctrl_6a_cmd[3] = {0x4c, 0x01, 0x35}; |
| 161 | |
| 162 | static char config_Auto_Sequencer_Setting_b_cmd[3] = {0x4c, 0x00, 0x02}; |
| 163 | |
| 164 | static char config_Panel_IF_Ctrl_10_indx[3] = {0x4c, 0x00, 0x29}; |
| 165 | static char config_Panel_IF_Ctrl_10a_cmd[3] = {0x4c, 0x03, 0xbf}; |
| 166 | static char config_Auto_Sequencer_Setting_indx[3] = {0x4c, 0x01, 0x06}; |
| 167 | static char config_Auto_Sequencer_Setting_c_cmd[3] = {0x4c, 0x00, 0x03}; |
| 168 | static char config_Power_Ctrl_2c_cmd[3] = {0x4c, 0x40, 0x10}; |
| 169 | |
| 170 | static char config_VIDEO[2] = {0x40, 0x00}; |
| 171 | |
| 172 | static char config_Panel_IF_Ctrl_10_indx_off[3] = {0x4C, 0x00, 0x29}; |
| 173 | |
| 174 | static char config_Panel_IF_Ctrl_10b_cmd_off[3] = {0x4C, 0x00, 0x02}; |
| 175 | |
| 176 | static char config_Power_Ctrl_1a_cmd[3] = {0x4C, 0x30, 0x00}; |
| 177 | |
| 178 | static struct dsi_cmd_desc renesas_sleep_off_cmds[] = { |
| 179 | {DTYPE_DCS_WRITE, 1, 0, 0, RENESAS_SLEEP_OFF_DELAY, |
| 180 | sizeof(config_sleep_out), config_sleep_out } |
| 181 | }; |
| 182 | |
| 183 | static struct dsi_cmd_desc renesas_display_off_cmds[] = { |
| 184 | /* Choosing Command Mode */ |
| 185 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 186 | sizeof(config_CMD_MODE), config_CMD_MODE }, |
| 187 | |
| 188 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 189 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 190 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 191 | sizeof(config_Auto_Sequencer_Setting_indx), |
| 192 | config_Auto_Sequencer_Setting_indx}, |
| 193 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 194 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 195 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 196 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 197 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 198 | sizeof(config_Auto_Sequencer_Setting_b_cmd), |
| 199 | config_Auto_Sequencer_Setting_b_cmd}, |
| 200 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY * 2, |
| 201 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 202 | |
| 203 | /* After waiting >= 5 frames, turn OFF RGB signals |
| 204 | This is done by on DSI/MDP (depends on Vid/Cmd Mode. */ |
| 205 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 206 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 207 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 208 | sizeof(config_Auto_Sequencer_Setting_indx), |
| 209 | config_Auto_Sequencer_Setting_indx}, |
| 210 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 211 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 212 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 213 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 214 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 215 | sizeof(config_Auto_Sequencer_Setting_a_cmd), |
| 216 | config_Auto_Sequencer_Setting_a_cmd}, |
| 217 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 218 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 219 | |
| 220 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 221 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 222 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 223 | sizeof(config_Panel_IF_Ctrl_10_indx_off), |
| 224 | config_Panel_IF_Ctrl_10_indx_off}, |
| 225 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 226 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 227 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 228 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 229 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 230 | sizeof(config_Panel_IF_Ctrl_10b_cmd_off), |
| 231 | config_Panel_IF_Ctrl_10b_cmd_off}, |
| 232 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 233 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 234 | |
| 235 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 236 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 237 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 238 | sizeof(config_Power_Ctrl_1_indx), |
| 239 | config_Power_Ctrl_1_indx}, |
| 240 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 241 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 242 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 243 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 244 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 245 | sizeof(config_Power_Ctrl_1a_cmd), |
| 246 | config_Power_Ctrl_1a_cmd}, |
| 247 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 248 | sizeof(config_DBICSET_15), config_DBICSET_15} |
| 249 | }; |
| 250 | |
| 251 | static struct dsi_cmd_desc renesas_display_on_cmds[] = { |
| 252 | /* Choosing Command Mode */ |
| 253 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 254 | sizeof(config_CMD_MODE), config_CMD_MODE }, |
| 255 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 256 | sizeof(config_WRTXHT), config_WRTXHT }, |
| 257 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 258 | sizeof(config_WRTXVT), config_WRTXVT }, |
| 259 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 260 | sizeof(config_PLL2NR), config_PLL2NR }, |
| 261 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 262 | sizeof(config_PLL2NF1), config_PLL2NF1 }, |
| 263 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 264 | sizeof(config_PLL2NF2), config_PLL2NF2 }, |
| 265 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 266 | sizeof(config_PLL2BWADJ1), config_PLL2BWADJ1}, |
| 267 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 268 | sizeof(config_PLL2BWADJ2), config_PLL2BWADJ2}, |
| 269 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 270 | sizeof(config_PLL2CTL), config_PLL2CTL}, |
| 271 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 272 | sizeof(config_DBICBR), config_DBICBR}, |
| 273 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 274 | sizeof(config_DBICTYPE), config_DBICTYPE}, |
| 275 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 276 | sizeof(config_DBICSET1), config_DBICSET1}, |
| 277 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 278 | sizeof(config_DBICADD), config_DBICADD}, |
| 279 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 280 | sizeof(config_DBICCTL), config_DBICCTL}, |
| 281 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 282 | sizeof(config_COLMOD_888), config_COLMOD_888}, |
| 283 | /* Choose config_COLMOD_565 or config_COLMOD_666PACK for other modes */ |
| 284 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 285 | sizeof(config_MADCTL), config_MADCTL}, |
| 286 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 287 | sizeof(config_DBIOC), config_DBIOC}, |
| 288 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 289 | sizeof(config_CASET), config_CASET}, |
| 290 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 291 | sizeof(config_PASET), config_PASET}, |
| 292 | {DTYPE_DCS_WRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 293 | sizeof(config_TXON), config_TXON}, |
| 294 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 295 | sizeof(config_BLSET_TM), config_BLSET_TM}, |
| 296 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 297 | sizeof(config_AGCPSCTL_TM), config_AGCPSCTL_TM}, |
| 298 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 299 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 300 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 301 | sizeof(config_Power_Ctrl_1_indx), config_Power_Ctrl_1_indx }, |
| 302 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 303 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 304 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 305 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 306 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 307 | sizeof(config_Power_Ctrl_1a_cmd), config_Power_Ctrl_1a_cmd}, |
| 308 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 309 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 310 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 311 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 312 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 313 | sizeof(config_Power_Ctrl_2_indx), config_Power_Ctrl_2_indx }, |
| 314 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 315 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 316 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 317 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 318 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 319 | sizeof(config_Power_Ctrl_2a_cmd), config_Power_Ctrl_2a_cmd}, |
| 320 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 321 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 322 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 323 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 324 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 325 | sizeof(config_Auto_Sequencer_Setting_indx), |
| 326 | config_Auto_Sequencer_Setting_indx }, |
| 327 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 328 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 329 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 330 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 331 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 332 | sizeof(config_Auto_Sequencer_Setting_a_cmd), |
| 333 | config_Auto_Sequencer_Setting_a_cmd }, |
| 334 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 335 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 336 | |
| 337 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 338 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 339 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 340 | sizeof(Driver_Output_Ctrl_indx), Driver_Output_Ctrl_indx}, |
| 341 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 342 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 343 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 344 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 345 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 346 | sizeof(Driver_Output_Ctrl_cmd), |
| 347 | Driver_Output_Ctrl_cmd}, |
| 348 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 349 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 350 | |
| 351 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 352 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 353 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 354 | sizeof(config_LCD_drive_AC_Ctrl_indx), |
| 355 | config_LCD_drive_AC_Ctrl_indx}, |
| 356 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 357 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 358 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 359 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 360 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 361 | sizeof(config_LCD_drive_AC_Ctrl_cmd), |
| 362 | config_LCD_drive_AC_Ctrl_cmd }, |
| 363 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 364 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 365 | |
| 366 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 367 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 368 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 369 | sizeof(config_Entry_Mode_indx), |
| 370 | config_Entry_Mode_indx}, |
| 371 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 372 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 373 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 374 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 375 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 376 | sizeof(config_Entry_Mode_cmd), |
| 377 | config_Entry_Mode_cmd}, |
| 378 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 379 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 380 | |
| 381 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 382 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 383 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 384 | sizeof(config_Display_Ctrl_1_indx), |
| 385 | config_Display_Ctrl_1_indx}, |
| 386 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 387 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 388 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 389 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 390 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 391 | sizeof(config_Display_Ctrl_1_cmd), |
| 392 | config_Display_Ctrl_1_cmd}, |
| 393 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 394 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 395 | |
| 396 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 397 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 398 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 399 | sizeof(config_Display_Ctrl_2_indx), |
| 400 | config_Display_Ctrl_2_indx}, |
| 401 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 402 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 403 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 404 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 405 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 406 | sizeof(config_Display_Ctrl_2_cmd), |
| 407 | config_Display_Ctrl_2_cmd}, |
| 408 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 409 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 410 | |
| 411 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 412 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 413 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 414 | sizeof(config_Display_Ctrl_3_indx), |
| 415 | config_Display_Ctrl_3_indx}, |
| 416 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 417 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 418 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 419 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 420 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 421 | sizeof(config_Display_Ctrl_3_cmd), |
| 422 | config_Display_Ctrl_3_cmd}, |
| 423 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 424 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 425 | |
| 426 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 427 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 428 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 429 | sizeof(config_Display_IF_Ctrl_1_indx), |
| 430 | config_Display_IF_Ctrl_1_indx }, |
| 431 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 432 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 433 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 434 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 435 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 436 | sizeof(config_Display_IF_Ctrl_1_cmd), |
| 437 | config_Display_IF_Ctrl_1_cmd}, |
| 438 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 439 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 440 | |
| 441 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 442 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 443 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 444 | sizeof(config_Display_IF_Ctrl_2_indx), |
| 445 | config_Display_IF_Ctrl_2_indx}, |
| 446 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 447 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 448 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 449 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 450 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 451 | sizeof(config_Display_IF_Ctrl_2_cmd), |
| 452 | config_Display_IF_Ctrl_2_cmd}, |
| 453 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 454 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 455 | |
| 456 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 457 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 458 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 459 | sizeof(config_Panel_IF_Ctrl_1_indx), |
| 460 | config_Panel_IF_Ctrl_1_indx }, |
| 461 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 462 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 463 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 464 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 465 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 466 | sizeof(config_Panel_IF_Ctrl_1_cmd), |
| 467 | config_Panel_IF_Ctrl_1_cmd}, |
| 468 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 469 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 470 | |
| 471 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 472 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 473 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 474 | sizeof(config_Panel_IF_Ctrl_3_indx), |
| 475 | config_Panel_IF_Ctrl_3_indx }, |
| 476 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 477 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 478 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 479 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 480 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 481 | sizeof(config_Panel_IF_Ctrl_3_cmd), |
| 482 | config_Panel_IF_Ctrl_3_cmd}, |
| 483 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 484 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 485 | |
| 486 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 487 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 488 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 489 | sizeof(config_Panel_IF_Ctrl_4_indx), |
| 490 | config_Panel_IF_Ctrl_4_indx }, |
| 491 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 492 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 493 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 494 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 495 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 496 | sizeof(config_Panel_IF_Ctrl_4_cmd), |
| 497 | config_Panel_IF_Ctrl_4_cmd }, |
| 498 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 499 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 500 | |
| 501 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 502 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 503 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 504 | sizeof(config_Panel_IF_Ctrl_5_indx), |
| 505 | config_Panel_IF_Ctrl_5_indx }, |
| 506 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 507 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 508 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 509 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 510 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 511 | sizeof(config_Panel_IF_Ctrl_5_cmd), |
| 512 | config_Panel_IF_Ctrl_5_cmd}, |
| 513 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 514 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 515 | |
| 516 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 517 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 518 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 519 | sizeof(config_Panel_IF_Ctrl_6_indx), |
| 520 | config_Panel_IF_Ctrl_6_indx }, |
| 521 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 522 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 523 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 524 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 525 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 526 | sizeof(config_Panel_IF_Ctrl_6_cmd), |
| 527 | config_Panel_IF_Ctrl_6_cmd }, |
| 528 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 529 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 530 | |
| 531 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 532 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 533 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 534 | sizeof(config_Panel_IF_Ctrl_8_indx), |
| 535 | config_Panel_IF_Ctrl_8_indx }, |
| 536 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 537 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 538 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 539 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 540 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 541 | sizeof(config_Panel_IF_Ctrl_8_cmd), |
| 542 | config_Panel_IF_Ctrl_8_cmd }, |
| 543 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 544 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 545 | |
| 546 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 547 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 548 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 549 | sizeof(config_Panel_IF_Ctrl_9_indx), |
| 550 | config_Panel_IF_Ctrl_9_indx }, |
| 551 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 552 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 553 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 554 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 555 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 556 | sizeof(config_Panel_IF_Ctrl_9_cmd), |
| 557 | config_Panel_IF_Ctrl_9_cmd}, |
| 558 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 559 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 560 | |
| 561 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 562 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 563 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 564 | sizeof(config_gam_adjust_00_indx), |
| 565 | config_gam_adjust_00_indx}, |
| 566 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 567 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 568 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 569 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 570 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 571 | sizeof(config_gam_adjust_00_cmd), |
| 572 | config_gam_adjust_00_cmd}, |
| 573 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 574 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 575 | |
| 576 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 577 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 578 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 579 | sizeof(config_gam_adjust_01_indx), |
| 580 | config_gam_adjust_01_indx}, |
| 581 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 582 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 583 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 584 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 585 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 586 | sizeof(config_gam_adjust_01_cmd), |
| 587 | config_gam_adjust_01_cmd}, |
| 588 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 589 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 590 | |
| 591 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 592 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 593 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 594 | sizeof(config_gam_adjust_02_indx), |
| 595 | config_gam_adjust_02_indx}, |
| 596 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 597 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 598 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 599 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 600 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 601 | sizeof(config_gam_adjust_02_cmd), |
| 602 | config_gam_adjust_02_cmd}, |
| 603 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 604 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 605 | |
| 606 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 607 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 608 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 609 | sizeof(config_gam_adjust_03_indx), |
| 610 | config_gam_adjust_03_indx}, |
| 611 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 612 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 613 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 614 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 615 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 616 | sizeof(config_gam_adjust_03_cmd), |
| 617 | config_gam_adjust_03_cmd}, |
| 618 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 619 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 620 | |
| 621 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 622 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 623 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 624 | sizeof(config_gam_adjust_04_indx), config_gam_adjust_04_indx}, |
| 625 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 626 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 627 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 628 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 629 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 630 | sizeof(config_gam_adjust_04_cmd), config_gam_adjust_04_cmd}, |
| 631 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 632 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 633 | |
| 634 | |
| 635 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 636 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 637 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 638 | sizeof(config_gam_adjust_05_indx), config_gam_adjust_05_indx}, |
| 639 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 640 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 641 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 642 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 643 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 644 | sizeof(config_gam_adjust_05_cmd), config_gam_adjust_05_cmd}, |
| 645 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 646 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 647 | |
| 648 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 649 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 650 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 651 | sizeof(config_gam_adjust_06_indx), config_gam_adjust_06_indx}, |
| 652 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 653 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 654 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 655 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 656 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 657 | sizeof(config_gam_adjust_06_cmd), config_gam_adjust_06_cmd}, |
| 658 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 659 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 660 | |
| 661 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 662 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 663 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 664 | sizeof(config_gam_adjust_07_indx), config_gam_adjust_07_indx}, |
| 665 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 666 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 667 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 668 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 669 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 670 | sizeof(config_gam_adjust_07_cmd), config_gam_adjust_07_cmd}, |
| 671 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 672 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 673 | |
| 674 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 675 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 676 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 677 | sizeof(config_gam_adjust_08_indx), config_gam_adjust_08_indx}, |
| 678 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 679 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 680 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 681 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 682 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 683 | sizeof(config_gam_adjust_08_cmd), config_gam_adjust_08_cmd}, |
| 684 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 685 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 686 | |
| 687 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 688 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 689 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 690 | sizeof(config_gam_adjust_09_indx), config_gam_adjust_09_indx}, |
| 691 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 692 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 693 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 694 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 695 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 696 | sizeof(config_gam_adjust_09_cmd), config_gam_adjust_09_cmd}, |
| 697 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 698 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 699 | |
| 700 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 701 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 702 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 703 | sizeof(config_gam_adjust_0A_indx), config_gam_adjust_0A_indx}, |
| 704 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 705 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 706 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 707 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 708 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 709 | sizeof(config_gam_adjust_0A_cmd), config_gam_adjust_0A_cmd}, |
| 710 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 711 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 712 | |
| 713 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 714 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 715 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 716 | sizeof(config_gam_adjust_0B_indx), config_gam_adjust_0B_indx}, |
| 717 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 718 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 719 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 720 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 721 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 722 | sizeof(config_gam_adjust_0B_cmd), config_gam_adjust_0B_cmd}, |
| 723 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 724 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 725 | |
| 726 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 727 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 728 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 729 | sizeof(config_gam_adjust_0C_indx), config_gam_adjust_0C_indx}, |
| 730 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 731 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 732 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 733 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 734 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 735 | sizeof(config_gam_adjust_0C_cmd), config_gam_adjust_0C_cmd}, |
| 736 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 737 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 738 | |
| 739 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 740 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 741 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 742 | sizeof(config_gam_adjust_0D_indx), config_gam_adjust_0D_indx}, |
| 743 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 744 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 745 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 746 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 747 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 748 | sizeof(config_gam_adjust_0D_cmd), config_gam_adjust_0D_cmd}, |
| 749 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 750 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 751 | |
| 752 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 753 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 754 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 755 | sizeof(config_gam_adjust_10_indx), config_gam_adjust_10_indx}, |
| 756 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 757 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 758 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 759 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 760 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 761 | sizeof(config_gam_adjust_10_cmd), config_gam_adjust_10_cmd}, |
| 762 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 763 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 764 | |
| 765 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 766 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 767 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 768 | sizeof(config_gam_adjust_11_indx), config_gam_adjust_11_indx}, |
| 769 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 770 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 771 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 772 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 773 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 774 | sizeof(config_gam_adjust_11_cmd), config_gam_adjust_11_cmd}, |
| 775 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 776 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 777 | |
| 778 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 779 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 780 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 781 | sizeof(config_gam_adjust_12_indx), config_gam_adjust_12_indx}, |
| 782 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 783 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 784 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 785 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 786 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 787 | sizeof(config_gam_adjust_12_cmd), config_gam_adjust_12_cmd}, |
| 788 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 789 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 790 | |
| 791 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 792 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 793 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 794 | sizeof(config_gam_adjust_15_indx), config_gam_adjust_15_indx}, |
| 795 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 796 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 797 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 798 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 799 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 800 | sizeof(config_gam_adjust_15_cmd), config_gam_adjust_15_cmd}, |
| 801 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 802 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 803 | |
| 804 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 805 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 806 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 807 | sizeof(config_gam_adjust_16_indx), config_gam_adjust_16_indx}, |
| 808 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 809 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 810 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 811 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 812 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 813 | sizeof(config_gam_adjust_16_cmd), config_gam_adjust_16_cmd}, |
| 814 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 815 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 816 | |
| 817 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 818 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 819 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 820 | sizeof(config_gam_adjust_17_indx), config_gam_adjust_17_indx}, |
| 821 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 822 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 823 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 824 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 825 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 826 | sizeof(config_gam_adjust_17_cmd), config_gam_adjust_17_cmd}, |
| 827 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 828 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 829 | |
| 830 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 831 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 832 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 833 | sizeof(config_gam_adjust_18_indx), config_gam_adjust_18_indx}, |
| 834 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 835 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 836 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 837 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 838 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 839 | sizeof(config_gam_adjust_18_cmd), config_gam_adjust_18_cmd}, |
| 840 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 841 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 842 | |
| 843 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 844 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 845 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 846 | sizeof(config_gam_adjust_19_indx), config_gam_adjust_19_indx}, |
| 847 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 848 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 849 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 850 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 851 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 852 | sizeof(config_gam_adjust_19_cmd), config_gam_adjust_19_cmd}, |
| 853 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 854 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 855 | |
| 856 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 857 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 858 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 859 | sizeof(config_gam_adjust_1C_indx), config_gam_adjust_1C_indx}, |
| 860 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 861 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 862 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 863 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 864 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 865 | sizeof(config_gam_adjust_1C_cmd), config_gam_adjust_1C_cmd}, |
| 866 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 867 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 868 | |
| 869 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 870 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 871 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 872 | sizeof(config_gam_adjust_1D_indx), config_gam_adjust_1D_indx}, |
| 873 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 874 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 875 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 876 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 877 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 878 | sizeof(config_gam_adjust_1D_cmd), config_gam_adjust_1D_cmd}, |
| 879 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 880 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 881 | |
| 882 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 883 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 884 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 885 | sizeof(config_gam_adjust_20_indx), config_gam_adjust_20_indx}, |
| 886 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 887 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 888 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 889 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 890 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 891 | sizeof(config_gam_adjust_20_cmd), config_gam_adjust_20_cmd}, |
| 892 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 893 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 894 | |
| 895 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 896 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 897 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 898 | sizeof(config_gam_adjust_21_indx), config_gam_adjust_21_indx}, |
| 899 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 900 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 901 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 902 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 903 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 904 | sizeof(config_gam_adjust_21_cmd), config_gam_adjust_21_cmd}, |
| 905 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 906 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 907 | |
| 908 | |
| 909 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 910 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 911 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 912 | sizeof(config_gam_adjust_22_indx), config_gam_adjust_22_indx}, |
| 913 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 914 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 915 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 916 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 917 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 918 | sizeof(config_gam_adjust_22_cmd), config_gam_adjust_22_cmd}, |
| 919 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 920 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 921 | |
| 922 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 923 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 924 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 925 | sizeof(config_gam_adjust_27_indx), config_gam_adjust_27_indx}, |
| 926 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 927 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 928 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 929 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 930 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 931 | sizeof(config_gam_adjust_27_cmd), config_gam_adjust_27_cmd}, |
| 932 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 933 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 934 | |
| 935 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 936 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 937 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 938 | sizeof(config_gam_adjust_28_indx), config_gam_adjust_28_indx}, |
| 939 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 940 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 941 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 942 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 943 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 944 | sizeof(config_gam_adjust_28_cmd), config_gam_adjust_28_cmd}, |
| 945 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 946 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 947 | |
| 948 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 949 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 950 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 951 | sizeof(config_gam_adjust_29_indx), config_gam_adjust_29_indx}, |
| 952 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 953 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 954 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 955 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 956 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 957 | sizeof(config_gam_adjust_29_cmd), config_gam_adjust_29_cmd}, |
| 958 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 959 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 960 | |
| 961 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 962 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 963 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 964 | sizeof(config_Power_Ctrl_1_indx), config_Power_Ctrl_1_indx}, |
| 965 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 966 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 967 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 968 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 969 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 970 | sizeof(config_Power_Ctrl_1b_cmd), config_Power_Ctrl_1b_cmd}, |
| 971 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 972 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 973 | |
| 974 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 975 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 976 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 977 | sizeof(config_Power_Ctrl_2_indx), config_Power_Ctrl_2_indx}, |
| 978 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 979 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 980 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 981 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 982 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 983 | sizeof(config_Power_Ctrl_2b_cmd), config_Power_Ctrl_2b_cmd}, |
| 984 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 985 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 986 | |
| 987 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 988 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 989 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 990 | sizeof(config_Power_Ctrl_3_indx), config_Power_Ctrl_3_indx}, |
| 991 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 992 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 993 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 994 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 995 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 996 | sizeof(config_Power_Ctrl_3a_cmd), config_Power_Ctrl_3a_cmd}, |
| 997 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 998 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 999 | |
| 1000 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1001 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 1002 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1003 | sizeof(config_Power_Ctrl_4_indx), config_Power_Ctrl_4_indx}, |
| 1004 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1005 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1006 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1007 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 1008 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1009 | sizeof(config_Power_Ctrl_4a_cmd), config_Power_Ctrl_4a_cmd}, |
| 1010 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1011 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1012 | |
| 1013 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1014 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 1015 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1016 | sizeof(config_Power_Ctrl_6_indx), config_Power_Ctrl_6_indx}, |
| 1017 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1018 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1019 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1020 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 1021 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1022 | sizeof(config_Power_Ctrl_6a_cmd), config_Power_Ctrl_6a_cmd}, |
| 1023 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1024 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1025 | |
| 1026 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1027 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 1028 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1029 | sizeof(config_Auto_Sequencer_Setting_indx), |
| 1030 | config_Auto_Sequencer_Setting_indx}, |
| 1031 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1032 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1033 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1034 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 1035 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1036 | sizeof(config_Auto_Sequencer_Setting_b_cmd), |
| 1037 | config_Auto_Sequencer_Setting_b_cmd}, |
| 1038 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1039 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1040 | |
| 1041 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1042 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 1043 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1044 | sizeof(config_Panel_IF_Ctrl_10_indx), |
| 1045 | config_Panel_IF_Ctrl_10_indx}, |
| 1046 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1047 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1048 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1049 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 1050 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1051 | sizeof(config_Panel_IF_Ctrl_10a_cmd), |
| 1052 | config_Panel_IF_Ctrl_10a_cmd}, |
| 1053 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1054 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1055 | |
| 1056 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1057 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 1058 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1059 | sizeof(config_Auto_Sequencer_Setting_indx), |
| 1060 | config_Auto_Sequencer_Setting_indx}, |
| 1061 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1062 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1063 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1064 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 1065 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1066 | sizeof(config_Auto_Sequencer_Setting_c_cmd), |
| 1067 | config_Auto_Sequencer_Setting_c_cmd}, |
| 1068 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1069 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1070 | |
| 1071 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1072 | sizeof(config_DBICADD70), config_DBICADD70}, |
| 1073 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1074 | sizeof(config_Power_Ctrl_2_indx), |
| 1075 | config_Power_Ctrl_2_indx}, |
| 1076 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1077 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1078 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1079 | sizeof(config_DBICADD72), config_DBICADD72}, |
| 1080 | {DTYPE_DCS_LWRITE, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1081 | sizeof(config_Power_Ctrl_2c_cmd), |
| 1082 | config_Power_Ctrl_2c_cmd}, |
| 1083 | |
| 1084 | {DTYPE_DCS_WRITE1, 1, 0, 0, 0/* RENESAS_CMD_DELAY */, |
| 1085 | sizeof(config_DBICSET_15), config_DBICSET_15}, |
| 1086 | |
| 1087 | }; |
| 1088 | |
| 1089 | static struct dsi_cmd_desc renesas_video_on_cmds[] = { |
| 1090 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1091 | sizeof(config_VIDEO), config_VIDEO} |
| 1092 | }; |
| 1093 | |
| 1094 | static struct dsi_cmd_desc renesas_cmd_on_cmds[] = { |
| 1095 | {DTYPE_DCS_WRITE1, 1, 0, 0, RENESAS_CMD_DELAY, |
| 1096 | sizeof(config_CMD_MODE), config_CMD_MODE}, |
| 1097 | }; |
| 1098 | |
| 1099 | static int mipi_renesas_lcd_on(struct platform_device *pdev) |
| 1100 | { |
| 1101 | struct msm_fb_data_type *mfd; |
| 1102 | struct mipi_panel_info *mipi; |
| 1103 | |
| 1104 | mfd = platform_get_drvdata(pdev); |
| 1105 | mipi = &mfd->panel_info.mipi; |
| 1106 | |
| 1107 | if (!mfd) |
| 1108 | return -ENODEV; |
| 1109 | if (mfd->key != MFD_KEY) |
| 1110 | return -EINVAL; |
| 1111 | |
| 1112 | mipi_dsi_cmds_tx(mfd, &renesas_tx_buf, renesas_sleep_off_cmds, |
| 1113 | ARRAY_SIZE(renesas_sleep_off_cmds)); |
| 1114 | |
| 1115 | mipi_set_tx_power_mode(1); |
| 1116 | mipi_dsi_cmds_tx(mfd, &renesas_tx_buf, renesas_display_on_cmds, |
| 1117 | ARRAY_SIZE(renesas_display_on_cmds)); |
| 1118 | |
| 1119 | if (mipi->mode == DSI_VIDEO_MODE) |
| 1120 | mipi_dsi_cmds_tx(mfd, &renesas_tx_buf, renesas_video_on_cmds, |
| 1121 | ARRAY_SIZE(renesas_video_on_cmds)); |
| 1122 | else |
| 1123 | mipi_dsi_cmds_tx(mfd, &renesas_tx_buf, renesas_cmd_on_cmds, |
| 1124 | ARRAY_SIZE(renesas_cmd_on_cmds)); |
| 1125 | mipi_set_tx_power_mode(0); |
| 1126 | |
| 1127 | return 0; |
| 1128 | } |
| 1129 | |
| 1130 | static int mipi_renesas_lcd_off(struct platform_device *pdev) |
| 1131 | { |
| 1132 | struct msm_fb_data_type *mfd; |
| 1133 | |
| 1134 | mfd = platform_get_drvdata(pdev); |
| 1135 | |
| 1136 | if (!mfd) |
| 1137 | return -ENODEV; |
| 1138 | if (mfd->key != MFD_KEY) |
| 1139 | return -EINVAL; |
| 1140 | |
| 1141 | mipi_dsi_cmds_tx(mfd, &renesas_tx_buf, renesas_display_off_cmds, |
| 1142 | ARRAY_SIZE(renesas_display_off_cmds)); |
| 1143 | |
| 1144 | return 0; |
| 1145 | } |
| 1146 | |
| 1147 | static int __devinit mipi_renesas_lcd_probe(struct platform_device *pdev) |
| 1148 | { |
| 1149 | if (pdev->id == 0) { |
| 1150 | mipi_renesas_pdata = pdev->dev.platform_data; |
| 1151 | return 0; |
| 1152 | } |
| 1153 | |
| 1154 | msm_fb_add_device(pdev); |
| 1155 | |
| 1156 | return 0; |
| 1157 | } |
| 1158 | |
| 1159 | static void mipi_renesas_set_backlight(struct msm_fb_data_type *mfd) |
| 1160 | { |
| 1161 | int ret = -EPERM; |
| 1162 | int bl_level; |
| 1163 | |
| 1164 | bl_level = mfd->bl_level; |
| 1165 | |
| 1166 | if (mipi_renesas_pdata && mipi_renesas_pdata->pmic_backlight) |
| 1167 | ret = mipi_renesas_pdata->pmic_backlight(bl_level); |
| 1168 | else |
| 1169 | pr_err("%s(): Backlight level set failed", __func__); |
| 1170 | } |
| 1171 | |
| 1172 | static struct platform_driver this_driver = { |
| 1173 | .probe = mipi_renesas_lcd_probe, |
| 1174 | .driver = { |
| 1175 | .name = "mipi_renesas", |
| 1176 | }, |
| 1177 | }; |
| 1178 | |
| 1179 | static struct msm_fb_panel_data renesas_panel_data = { |
| 1180 | .on = mipi_renesas_lcd_on, |
| 1181 | .off = mipi_renesas_lcd_off, |
| 1182 | .set_backlight = mipi_renesas_set_backlight, |
| 1183 | }; |
| 1184 | |
| 1185 | static int ch_used[3]; |
| 1186 | |
| 1187 | int mipi_renesas_device_register(struct msm_panel_info *pinfo, |
| 1188 | u32 channel, u32 panel) |
| 1189 | { |
| 1190 | struct platform_device *pdev = NULL; |
| 1191 | int ret; |
| 1192 | if ((channel >= 3) || ch_used[channel]) |
| 1193 | return -ENODEV; |
| 1194 | |
| 1195 | ch_used[channel] = TRUE; |
| 1196 | |
| 1197 | pdev = platform_device_alloc("mipi_renesas", (panel << 8)|channel); |
| 1198 | if (!pdev) |
| 1199 | return -ENOMEM; |
| 1200 | |
| 1201 | renesas_panel_data.panel_info = *pinfo; |
| 1202 | |
| 1203 | ret = platform_device_add_data(pdev, &renesas_panel_data, |
| 1204 | sizeof(renesas_panel_data)); |
| 1205 | if (ret) { |
| 1206 | pr_err("%s: platform_device_add_data failed!\n", __func__); |
| 1207 | goto err_device_put; |
| 1208 | } |
| 1209 | |
| 1210 | ret = platform_device_add(pdev); |
| 1211 | if (ret) { |
| 1212 | pr_err("%s: platform_device_register failed!\n", __func__); |
| 1213 | goto err_device_put; |
| 1214 | } |
| 1215 | |
| 1216 | return 0; |
| 1217 | |
| 1218 | err_device_put: |
| 1219 | platform_device_put(pdev); |
| 1220 | return ret; |
| 1221 | } |
| 1222 | |
| 1223 | static int __init mipi_renesas_lcd_init(void) |
| 1224 | { |
| 1225 | mipi_dsi_buf_alloc(&renesas_tx_buf, DSI_BUF_SIZE); |
| 1226 | mipi_dsi_buf_alloc(&renesas_rx_buf, DSI_BUF_SIZE); |
| 1227 | |
| 1228 | return platform_driver_register(&this_driver); |
| 1229 | } |
| 1230 | |
| 1231 | module_init(mipi_renesas_lcd_init); |