blob: de1b1995fbb9e1eb63650c153935ec0fbb50f70e [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/slab.h>
15#include <linux/platform_device.h>
16#include <linux/printk.h>
17#include <linux/ratelimit.h>
18#include <linux/mfd/wcd9310/core.h>
19#include <linux/mfd/wcd9310/registers.h>
20#include <sound/jack.h>
21#include <sound/soc.h>
22#include <sound/soc-dapm.h>
23#include <sound/tlv.h>
24#include <linux/bitops.h>
25#include <linux/delay.h>
26#include "wcd9310.h"
27
28static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
29static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
30static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
31
32enum tabla_bandgap_type {
33 TABLA_BANDGAP_OFF = 0,
34 TABLA_BANDGAP_AUDIO_MODE,
35 TABLA_BANDGAP_MBHC_MODE,
36};
37
38struct tabla_priv { /* member undecided */
39 struct snd_soc_codec *codec;
40 u32 ref_cnt;
41 u32 adc_count;
42 u32 dec_count;
43 enum tabla_bandgap_type bandgap_type;
44 bool clock_active;
45 bool config_mode_active;
46 bool mbhc_polling_active;
47
48 struct tabla_mbhc_calibration *calibration;
49
50 struct snd_soc_jack *jack;
51};
52
53static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
54 struct snd_kcontrol *kcontrol, int event)
55{
56 struct snd_soc_codec *codec = w->codec;
57 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
58
59 pr_debug("%s %d\n", __func__, event);
60 switch (event) {
61 case SND_SOC_DAPM_POST_PMU:
62 if ((tabla->bandgap_type != TABLA_BANDGAP_AUDIO_MODE) ||
63 (!tabla->clock_active)) {
64 pr_err("%s: Error, Tabla must have clocks enabled for "
65 "charge pump\n", __func__);
66 return -EINVAL;
67 }
68
69 snd_soc_update_bits(codec, TABLA_A_CP_EN, 0x01, 0x01);
70 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
71 0x01);
72 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
73 usleep_range(200, 200);
74 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
75 break;
76 case SND_SOC_DAPM_PRE_PMD:
77 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
78 0x10);
79 usleep_range(20, 20);
80 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
81 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
82 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
83 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
84 0x00);
85 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
86 snd_soc_update_bits(codec, TABLA_A_CP_EN, 0x01, 0x00);
87 break;
88 }
89 return 0;
90}
91
92static const struct snd_kcontrol_new tabla_snd_controls[] = {
93 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
94 line_gain),
95 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
96 line_gain),
97 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
98 line_gain),
99 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
100 line_gain),
101
102 SOC_SINGLE_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL, 0,
103 100, 0, digital_gain),
104 SOC_SINGLE_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL, 0,
105 100, 0, digital_gain),
106
107 SOC_SINGLE_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, 0, 100, 0,
108 digital_gain),
109 SOC_SINGLE_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, 0, 100, 0,
110 digital_gain),
111
112 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
113 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
114
115 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
116};
117
118static const char *rx_mix1_text[] = {
119 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
120 "RX5", "RX6", "RX7"
121};
122
123static const char *sb_tx1_mux_text[] = {
124 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
125 "DEC1"
126};
127
128static const char *sb_tx5_mux_text[] = {
129 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
130 "DEC5"
131};
132
133static const char *sb_tx6_mux_text[] = {
134 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
135 "DEC6"
136};
137
138static const char const *sb_tx7_to_tx10_mux_text[] = {
139 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
140 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
141 "DEC9", "DEC10"
142};
143
144static const char *dec1_mux_text[] = {
145 "ZERO", "DMIC1", "ADC6",
146};
147
148static const char *dec5_mux_text[] = {
149 "ZERO", "DMIC5", "ADC2",
150};
151
152static const char *dec6_mux_text[] = {
153 "ZERO", "DMIC6", "ADC1",
154};
155
156static const char const *dec7_mux_text[] = {
157 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
158};
159
160static const char *iir1_inp1_text[] = {
161 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
162 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
163};
164
165static const struct soc_enum rx_mix1_inp1_chain_enum =
166 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
167
168static const struct soc_enum rx2_mix1_inp1_chain_enum =
169 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
170
171static const struct soc_enum rx3_mix1_inp1_chain_enum =
172 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
173
174static const struct soc_enum rx4_mix1_inp1_chain_enum =
175 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
176
177static const struct soc_enum rx5_mix1_inp1_chain_enum =
178 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
179
180static const struct soc_enum sb_tx5_mux_enum =
181 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
182
183static const struct soc_enum sb_tx6_mux_enum =
184 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
185
186static const struct soc_enum sb_tx7_mux_enum =
187 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
188 sb_tx7_to_tx10_mux_text);
189
190static const struct soc_enum sb_tx8_mux_enum =
191 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
192 sb_tx7_to_tx10_mux_text);
193
194static const struct soc_enum sb_tx1_mux_enum =
195 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
196
197static const struct soc_enum dec1_mux_enum =
198 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
199
200static const struct soc_enum dec5_mux_enum =
201 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
202
203static const struct soc_enum dec6_mux_enum =
204 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
205
206static const struct soc_enum dec7_mux_enum =
207 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
208
209static const struct soc_enum iir1_inp1_mux_enum =
210 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
211
212static const struct snd_kcontrol_new rx_mix1_inp1_mux =
213 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
214
215static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
216 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
217
218static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
219 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
220
221static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
222 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
223
224static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
225 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
226
227static const struct snd_kcontrol_new sb_tx5_mux =
228 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
229
230static const struct snd_kcontrol_new sb_tx6_mux =
231 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
232
233static const struct snd_kcontrol_new sb_tx7_mux =
234 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
235
236static const struct snd_kcontrol_new sb_tx8_mux =
237 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
238
239static const struct snd_kcontrol_new sb_tx1_mux =
240 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
241
242static const struct snd_kcontrol_new dec1_mux =
243 SOC_DAPM_ENUM("DEC1 MUX Mux", dec1_mux_enum);
244
245static const struct snd_kcontrol_new dec5_mux =
246 SOC_DAPM_ENUM("DEC5 MUX Mux", dec5_mux_enum);
247
248static const struct snd_kcontrol_new dec6_mux =
249 SOC_DAPM_ENUM("DEC6 MUX Mux", dec6_mux_enum);
250
251static const struct snd_kcontrol_new dec7_mux =
252 SOC_DAPM_ENUM("DEC7 MUX Mux", dec7_mux_enum);
253
254static const struct snd_kcontrol_new iir1_inp1_mux =
255 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
256
257static const struct snd_kcontrol_new dac1_control =
258 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0);
259
260static const struct snd_kcontrol_new hphl_switch =
261 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0);
262
263static const struct snd_kcontrol_new hphr_switch =
264 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_R_DAC_CTL, 6, 1, 0);
265
266static const struct snd_kcontrol_new lineout1_switch =
267 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_1_DAC_CTL, 6, 1, 0);
268
269static const struct snd_kcontrol_new lineout3_switch =
270 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
271
272static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
273 int enable)
274{
275 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
276
277 pr_debug("%s %d\n", __func__, enable);
278
279 if (enable) {
280 tabla->adc_count++;
281 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
282 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
283 } else {
284 tabla->adc_count--;
285 if (!tabla->adc_count) {
286 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
287 0x2, 0x0);
288 if (!tabla->mbhc_polling_active)
289 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS,
290 0xE0, 0x0);
291 }
292 }
293}
294
295static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
296 struct snd_kcontrol *kcontrol, int event)
297{
298 struct snd_soc_codec *codec = w->codec;
299 u16 adc_reg;
300
301 pr_debug("%s %d\n", __func__, event);
302
303 if (w->reg == TABLA_A_TX_1_2_EN)
304 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
305 else if (w->reg == TABLA_A_TX_3_4_EN)
306 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
307 else if (w->reg == TABLA_A_TX_5_6_EN)
308 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
309 else {
310 pr_err("%s: Error, invalid adc register\n", __func__);
311 return -EINVAL;
312 }
313
314 switch (event) {
315 case SND_SOC_DAPM_PRE_PMU:
316 tabla_codec_enable_adc_block(codec, 1);
317 break;
318 case SND_SOC_DAPM_POST_PMU:
319 snd_soc_update_bits(codec, adc_reg, 1 << w->shift,
320 1 << w->shift);
321 usleep_range(1000, 1000);
322 snd_soc_update_bits(codec, adc_reg, 1 << w->shift, 0x00);
323 usleep_range(1000, 1000);
324 break;
325 case SND_SOC_DAPM_POST_PMD:
326 tabla_codec_enable_adc_block(codec, 0);
327 break;
328 }
329 return 0;
330}
331
332static int tabla_codec_enable_pamp_gain(struct snd_soc_dapm_widget *w,
333 struct snd_kcontrol *kcontrol, int event)
334{
335 struct snd_soc_codec *codec = w->codec;
336
337 pr_debug("%s %d\n", __func__, event);
338 switch (event) {
339 case SND_SOC_DAPM_PRE_PMU:
340 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0x80, 0x80);
341 break;
342 case SND_SOC_DAPM_POST_PMD:
343 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0x80, 0x00);
344 break;
345 }
346 return 0;
347}
348
349static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
350 struct snd_kcontrol *kcontrol, int event)
351{
352 struct snd_soc_codec *codec = w->codec;
353 u16 lineout_gain_reg;
354
355 pr_debug("%s %d\n", __func__, event);
356
357 switch (w->shift) {
358 case 0:
359 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
360 break;
361 case 1:
362 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
363 break;
364 case 2:
365 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
366 break;
367 case 3:
368 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
369 break;
370 case 4:
371 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
372 break;
373 default:
374 pr_err("%s: Error, incorrect lineout register value\n",
375 __func__);
376 return -EINVAL;
377 }
378
379 switch (event) {
380 case SND_SOC_DAPM_PRE_PMU:
381 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
382 break;
383 case SND_SOC_DAPM_POST_PMU:
384 usleep_range(40000, 40000);
385 break;
386 case SND_SOC_DAPM_POST_PMD:
387 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
388 break;
389 }
390 return 0;
391}
392
393static int tabla_codec_enable_dmic1(struct snd_soc_dapm_widget *w,
394 struct snd_kcontrol *kcontrol, int event)
395{
396 struct snd_soc_codec *codec = w->codec;
397
398 pr_debug("%s %d\n", __func__, event);
399 switch (event) {
400 case SND_SOC_DAPM_PRE_PMU:
401 snd_soc_update_bits(codec, TABLA_A_CDC_TX1_MUX_CTL, 0x1, 0x1);
402 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL, 0x2, 0x2);
403 snd_soc_update_bits(codec, TABLA_A_CDC_TX1_DMIC_CTL, 0x1, 0x1);
404 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL, 0x1, 0x1);
405 break;
406 case SND_SOC_DAPM_POST_PMD:
407 snd_soc_update_bits(codec, TABLA_A_CDC_TX1_DMIC_CTL, 0x1, 0);
408 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL, 0x3, 0);
409 break;
410 }
411 return 0;
412}
413
414static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
415 struct snd_kcontrol *kcontrol, int event)
416{
417 struct snd_soc_codec *codec = w->codec;
418 u16 micb_cfilt_reg, micb_int_reg;
419 char *internal_text = "Internal";
420
421 pr_debug("%s %d\n", __func__, event);
422 switch (w->reg) {
423 case TABLA_A_MICB_1_CTL:
424 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
425 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
426 break;
427 case TABLA_A_MICB_2_CTL:
428 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
429 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
430 break;
431 case TABLA_A_MICB_3_CTL:
432 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
433 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
434 break;
435 default:
436 pr_err("%s: Error, invalid micbias register\n", __func__);
437 return -EINVAL;
438 }
439
440 switch (event) {
441 case SND_SOC_DAPM_PRE_PMU:
442 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
443 if (strnstr(w->name, internal_text, 20))
444 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
445 break;
446 case SND_SOC_DAPM_POST_PMD:
447 if (strnstr(w->name, internal_text, 20))
448 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
449 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
450 break;
451 }
452
453 return 0;
454}
455
456static void tabla_codec_enable_dec_clock(struct snd_soc_codec *codec,
457 int enable)
458{
459 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
460
461 if (enable) {
462 tabla->dec_count++;
463 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x4, 0x4);
464 } else {
465 tabla->dec_count--;
466 if (!tabla->dec_count)
467 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
468 0x4, 0x0);
469 }
470}
471
472static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
473 struct snd_kcontrol *kcontrol, int event)
474{
475 struct snd_soc_codec *codec = w->codec;
476 u16 dec_reset_reg;
477
478 pr_debug("%s %d\n", __func__, event);
479
480 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL)
481 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
482 else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL)
483 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
484 else {
485 pr_err("%s: Error, incorrect dec\n", __func__);
486 return -EINVAL;
487 }
488
489 switch (event) {
490 case SND_SOC_DAPM_PRE_PMU:
491 tabla_codec_enable_dec_clock(codec, 1);
492 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
493 1 << w->shift);
494 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
495 break;
496 case SND_SOC_DAPM_POST_PMD:
497 tabla_codec_enable_dec_clock(codec, 0);
498 break;
499 }
500 return 0;
501}
502
503static int tabla_codec_reset_interpolator_1(struct snd_soc_dapm_widget *w,
504 struct snd_kcontrol *kcontrol, int event)
505{
506 struct snd_soc_codec *codec = w->codec;
507
508 switch (event) {
509 case SND_SOC_DAPM_PRE_PMU:
510 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL, 0x1,
511 0x1);
512 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL, 0x1,
513 0x0);
514 break;
515 }
516 return 0;
517}
518
519static int tabla_codec_reset_interpolator_2(struct snd_soc_dapm_widget *w,
520 struct snd_kcontrol *kcontrol, int event)
521{
522 struct snd_soc_codec *codec = w->codec;
523
524 switch (event) {
525 case SND_SOC_DAPM_PRE_PMU:
526 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL, 0x2,
527 0x2);
528 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL, 0x2,
529 0x0);
530 break;
531 }
532 return 0;
533}
534
535static int tabla_codec_reset_interpolator_3(struct snd_soc_dapm_widget *w,
536 struct snd_kcontrol *kcontrol, int event)
537{
538 struct snd_soc_codec *codec = w->codec;
539
540 switch (event) {
541 case SND_SOC_DAPM_PRE_PMU:
542 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL, 0x4,
543 0x4);
544 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL, 0x4,
545 0x0);
546 break;
547 }
548 return 0;
549}
550
551static int tabla_codec_reset_interpolator_4(struct snd_soc_dapm_widget *w,
552 struct snd_kcontrol *kcontrol, int event)
553{
554 struct snd_soc_codec *codec = w->codec;
555
556 switch (event) {
557 case SND_SOC_DAPM_PRE_PMU:
558 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL, 0x8,
559 0x8);
560 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL, 0x8,
561 0x0);
562 break;
563 }
564 return 0;
565}
566
567static int tabla_codec_reset_interpolator_5(struct snd_soc_dapm_widget *w,
568 struct snd_kcontrol *kcontrol, int event)
569{
570 struct snd_soc_codec *codec = w->codec;
571
572 switch (event) {
573 case SND_SOC_DAPM_PRE_PMU:
574 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL, 0x10,
575 0x10);
576 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL, 0x10,
577 0x0);
578 break;
579 }
580 return 0;
581}
582
583static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
584 /*RX stuff */
585 SND_SOC_DAPM_OUTPUT("EAR"),
586
587 SND_SOC_DAPM_PGA_E("EAR PA", TABLA_A_RX_EAR_EN, 4, 0, NULL, 0,
588 tabla_codec_enable_pamp_gain, SND_SOC_DAPM_POST_PMU |
589 SND_SOC_DAPM_PRE_PMD),
590
591 SND_SOC_DAPM_PGA("EAR PA Input", TABLA_A_CDC_CLSG_CTL, 2, 0, NULL, 0),
592
593 SND_SOC_DAPM_SWITCH("DAC1", TABLA_A_RX_EAR_EN, 6, 0, &dac1_control),
594 SND_SOC_DAPM_PGA_E("RX1 CP", SND_SOC_NOPM, 0, 0, NULL, 0,
595 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
596 SND_SOC_DAPM_PRE_PMD),
597 SND_SOC_DAPM_PGA("RX BIAS", TABLA_A_RX_COM_BIAS, 7, 0, NULL, 0),
598 SND_SOC_DAPM_MUX_E("RX1 MIX1 INP1", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0,
599 &rx_mix1_inp1_mux, tabla_codec_reset_interpolator_1,
600 SND_SOC_DAPM_PRE_PMU),
601 SND_SOC_DAPM_AIF_IN("SLIM RX1", "AIF1 Playback", 0,
602 TABLA_A_CDC_RX1_B6_CTL, 5, 0),
603
604 /* RX 2 path */
605 SND_SOC_DAPM_PGA_E("RX2 CP", SND_SOC_NOPM, 0, 0, NULL, 0,
606 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
607 SND_SOC_DAPM_PRE_PMD),
608 SND_SOC_DAPM_MUX_E("RX2 MIX1 INP1", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0,
609 &rx2_mix1_inp1_mux, tabla_codec_reset_interpolator_2,
610 SND_SOC_DAPM_PRE_PMU),
611 SND_SOC_DAPM_AIF_IN("SLIM RX2", "AIF1 Playback", 0,
612 TABLA_A_CDC_RX2_B6_CTL, 5, 0),
613
614 /* Headphone */
615 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
616 SND_SOC_DAPM_PGA("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0),
617 SND_SOC_DAPM_SWITCH("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
618 &hphl_switch),
619
620 SND_SOC_DAPM_PGA("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0),
621 SND_SOC_DAPM_SWITCH("HPHR DAC", TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
622 &hphr_switch),
623
624 /* Speaker */
625 SND_SOC_DAPM_OUTPUT("LINEOUT"),
626 SND_SOC_DAPM_PGA_E("LINEOUT1", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL, 0,
627 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
628 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
629 SND_SOC_DAPM_SWITCH("LINEOUT1 DAC", TABLA_A_RX_LINE_1_DAC_CTL, 7, 0,
630 &lineout1_switch),
631 SND_SOC_DAPM_MUX_E("RX3 MIX1 INP1", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0,
632 &rx3_mix1_inp1_mux, tabla_codec_reset_interpolator_3,
633 SND_SOC_DAPM_PRE_PMU),
634
635 SND_SOC_DAPM_PGA_E("LINEOUT3", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL, 0,
636 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
637 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
638 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC", TABLA_A_RX_LINE_3_DAC_CTL, 7, 0,
639 &lineout3_switch),
640 SND_SOC_DAPM_MUX_E("RX4 MIX1 INP1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
641 &rx4_mix1_inp1_mux, tabla_codec_reset_interpolator_4,
642 SND_SOC_DAPM_PRE_PMU),
643 SND_SOC_DAPM_MUX_E("RX5 MIX1 INP1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0,
644 &rx5_mix1_inp1_mux, tabla_codec_reset_interpolator_5,
645 SND_SOC_DAPM_PRE_PMU),
646
647 /* TX */
648 SND_SOC_DAPM_INPUT("AMIC1"),
649 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
650 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
651 SND_SOC_DAPM_POST_PMD),
652 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal", TABLA_A_MICB_1_CTL, 7, 0,
653 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
654 SND_SOC_DAPM_POST_PMD),
655 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
656 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
657 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
658
659 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
660 &dec1_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU |
661 SND_SOC_DAPM_POST_PMD),
662
663 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
664 &dec5_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU |
665 SND_SOC_DAPM_POST_PMD),
666
667 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
668 &dec6_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU |
669 SND_SOC_DAPM_POST_PMD),
670
671 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
672 &dec7_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU |
673 SND_SOC_DAPM_POST_PMD),
674
675 SND_SOC_DAPM_INPUT("AMIC2"),
676 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
677 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
678 SND_SOC_DAPM_POST_PMD),
679 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal", TABLA_A_MICB_2_CTL, 7, 0,
680 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
681 SND_SOC_DAPM_POST_PMD),
682 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
683 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
684 SND_SOC_DAPM_POST_PMD),
685 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal", TABLA_A_MICB_3_CTL, 7, 0,
686 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
687 SND_SOC_DAPM_POST_PMD),
688 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
689 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
690 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
691
692 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
693 SND_SOC_DAPM_AIF_OUT("SLIM TX1", "AIF1 Capture", NULL, SND_SOC_NOPM,
694 0, 0),
695
696 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, 0, 0, &sb_tx5_mux),
697 SND_SOC_DAPM_AIF_OUT("SLIM TX5", "AIF1 Capture", NULL, SND_SOC_NOPM,
698 4, 0),
699
700 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, 0, 0, &sb_tx6_mux),
701 SND_SOC_DAPM_AIF_OUT("SLIM TX6", "AIF1 Capture", NULL, SND_SOC_NOPM,
702 5, 0),
703
704 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, 0, 0, &sb_tx7_mux),
705 SND_SOC_DAPM_AIF_OUT("SLIM TX7", "AIF1 Capture", NULL, SND_SOC_NOPM,
706 0, 0),
707
708 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, 0, 0, &sb_tx8_mux),
709 SND_SOC_DAPM_AIF_OUT("SLIM TX8", "AIF1 Capture", NULL, SND_SOC_NOPM,
710 0, 0),
711
712 /* Digital Mic */
713 SND_SOC_DAPM_INPUT("DMIC1 IN"),
714 SND_SOC_DAPM_MIC("DMIC1", &tabla_codec_enable_dmic1),
715
716 /* Sidetone */
717 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
718 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
719};
720
721static const struct snd_soc_dapm_route audio_map[] = {
722 /* SLIMBUS Connections */
723 {"RX BIAS", NULL, "SLIM RX1"},
724 {"RX BIAS", NULL, "SLIM RX2"},
725
726 {"SLIM TX1", NULL, "SLIM TX1 MUX"},
727 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
728
729 {"SLIM TX5", NULL, "SLIM TX5 MUX"},
730 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
731
732 {"SLIM TX6", NULL, "SLIM TX6 MUX"},
733 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
734
735 {"SLIM TX7", NULL, "SLIM TX7 MUX"},
736 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
737 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
738 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
739 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
740
741 {"SLIM TX8", NULL, "SLIM TX8 MUX"},
742 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
743 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
744
745 /* Earpiece (RX MIX1) */
746 {"EAR", NULL, "EAR PA"},
747 {"EAR PA", NULL, "EAR PA Input"},
748 {"EAR PA Input", NULL, "DAC1"},
749 {"DAC1", "Switch", "RX1 CP"},
750 {"RX1 CP", NULL, "RX1 MIX1 INP1"},
751 {"RX1 MIX1 INP1", "RX1", "RX BIAS"},
752
753 /* Headset (RX MIX1 and RX MIX2) */
754 {"HEADPHONE", NULL, "HPHL"},
755 {"HPHL", NULL, "HPHL DAC"},
756 {"HPHL DAC", "Switch", "RX1 MIX1 INP1"},
757
758 {"HEADPHONE", NULL, "HPHR"},
759 {"HPHR", NULL, "HPHR DAC"},
760 {"HPHR DAC", "Switch", "RX2 CP"},
761 {"RX2 CP", NULL, "RX2 MIX1 INP1"},
762 {"RX2 MIX1 INP1", "RX2", "RX BIAS"},
763
764 /* Speaker (RX MIX3 and RX MIX4) */
765 {"LINEOUT", NULL, "LINEOUT1"},
766 {"LINEOUT1", NULL, "LINEOUT1 DAC"},
767 {"LINEOUT1 DAC", "Switch", "RX3 MIX1 INP1"},
768 {"RX3 MIX1 INP1", "RX1", "RX BIAS"},
769
770 {"LINEOUT", NULL, "LINEOUT3"},
771 {"LINEOUT3", NULL, "LINEOUT3 DAC"},
772 {"LINEOUT3 DAC", "Switch", "RX5 MIX1 INP1"},
773 {"RX4 MIX1 INP1", "RX2", "RX BIAS"},
774 {"RX5 MIX1 INP1", "RX2", "RX BIAS"},
775
776 /* Handset TX */
777 {"DEC5 MUX", "ADC2", "ADC2"},
778 {"DEC6 MUX", "ADC1", "ADC1"},
779 {"ADC1", NULL, "AMIC1"},
780 {"ADC2", NULL, "AMIC2"},
781
782 /* Digital Mic */
783 {"DEC1 MUX", "DMIC1", "DMIC1"},
784 {"DEC7 MUX", "DMIC1", "DMIC1"},
785 {"DMIC1", NULL, "DMIC1 IN"},
786
787 /* Sidetone (IIR1) */
788 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
789 {"IIR1", NULL, "IIR1 INP1 MUX"},
790 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
791
792};
793
794static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
795{
796 return tabla_reg_readable[reg];
797}
798
799static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
800{
801 /* Registers lower than 0x100 are top level registers which can be
802 * written by the Tabla core driver.
803 */
804
805 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
806 return 1;
807
808 return 0;
809}
810
811#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
812static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
813 unsigned int value)
814{
815 int ret;
816 pr_debug("%s: write reg %x val %x\n", __func__, reg, value);
817
818 BUG_ON(reg > TABLA_MAX_REGISTER);
819
820 if (!tabla_volatile(codec, reg)) {
821 pr_debug("writing to cache\n");
822 ret = snd_soc_cache_write(codec, reg, value);
823 if (ret != 0)
824 dev_err(codec->dev, "Cache write to %x failed: %d\n",
825 reg, ret);
826 }
827
828 return tabla_reg_write(codec->control_data, reg, value);
829}
830static unsigned int tabla_read(struct snd_soc_codec *codec,
831 unsigned int reg)
832{
833 unsigned int val;
834 int ret;
835
836 BUG_ON(reg > TABLA_MAX_REGISTER);
837
838 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
839 reg < codec->driver->reg_cache_size) {
840 pr_debug("reading from cache\n");
841 ret = snd_soc_cache_read(codec, reg, &val);
842 if (ret >= 0) {
843 pr_debug("register %d, value %d\n", reg, val);
844 return val;
845 } else
846 dev_err(codec->dev, "Cache read from %x failed: %d\n",
847 reg, ret);
848 }
849
850 val = tabla_reg_read(codec->control_data, reg);
851 pr_debug("%s: read reg %x val %x\n", __func__, reg, val);
852 return val;
853}
854
855static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
856{
857 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL, 0x1C);
858 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
859 0x80);
860 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
861 0x04);
862 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
863 0x01);
864 usleep_range(1000, 1000);
865 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
866 0x00);
867}
868
869static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
870 enum tabla_bandgap_type choice)
871{
872 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
873
874 /* TODO lock resources accessed by audio streams and threaded
875 * interrupt handlers
876 */
877
878 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
879 tabla->bandgap_type);
880
881 if (tabla->bandgap_type == choice)
882 return;
883
884 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
885 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
886 tabla_codec_enable_audio_mode_bandgap(codec);
887 } else if ((tabla->bandgap_type == TABLA_BANDGAP_AUDIO_MODE) &&
888 (choice == TABLA_BANDGAP_MBHC_MODE)) {
889 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
890 0x2);
891 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
892 0x80);
893 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
894 0x4);
895 usleep_range(1000, 1000);
896 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
897 0x00);
898 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
899 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
900 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
901 usleep_range(100, 100);
902 tabla_codec_enable_audio_mode_bandgap(codec);
903 } else if (choice == TABLA_BANDGAP_OFF) {
904 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
905 } else {
906 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
907 }
908 tabla->bandgap_type = choice;
909}
910
911static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
912 int enable)
913{
914 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
915
916 if (enable) {
917 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
918 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
919 usleep_range(5, 5);
920 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
921 0x80);
922 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
923 0x80);
924 usleep_range(10, 10);
925 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
926 usleep_range(20, 20);
927 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
928 } else {
929 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
930 0);
931 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
932 }
933 tabla->config_mode_active = enable ? true : false;
934
935 return 0;
936}
937
938static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
939 int config_mode)
940{
941 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
942
943 pr_debug("%s\n", __func__);
944
945 if (config_mode) {
946 tabla_codec_enable_config_mode(codec, 1);
947 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x00);
948 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
949 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN1, 0x0D);
950 usleep_range(1000, 1000);
951 } else
952 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
953
954 if (!config_mode && tabla->mbhc_polling_active) {
955 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
956 tabla_codec_enable_config_mode(codec, 0);
957
958 }
959
960 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x05);
961 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
962 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
963 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
964 usleep_range(50, 50);
965 tabla->clock_active = true;
966 return 0;
967}
968static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
969{
970 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
971 pr_debug("%s\n", __func__);
972 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
973 ndelay(160);
974 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
975 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
976 tabla->clock_active = false;
977}
978
979static int tabla_startup(struct snd_pcm_substream *substream,
980 struct snd_soc_dai *dai)
981{
982 struct snd_soc_codec *codec = dai->codec;
983 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
984 int ret = 0;
985
986 pr_debug("%s()\n", __func__);
987
988 if (!codec) {
989 pr_err("Error, no codec found\n");
990 return -EINVAL;
991 }
992 tabla->ref_cnt++;
993
994 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
995 /* Enable LDO */
996 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
997 0xA0);
998 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x80);
999 usleep_range(1000, 1000);
1000 }
1001
1002 if (tabla->mbhc_polling_active && (tabla->ref_cnt == 1)) {
1003 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_AUDIO_MODE);
1004 tabla_codec_enable_clock_block(codec, 0);
1005 }
1006
1007 return ret;
1008}
1009
1010static void tabla_shutdown(struct snd_pcm_substream *substream,
1011 struct snd_soc_dai *dai)
1012{
1013 struct snd_soc_codec *codec = dai->codec;
1014 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1015
1016 pr_debug("%s()\n", __func__);
1017
1018 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
1019 /* Disable LDO */
1020 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x00);
1021 usleep_range(1000, 1000);
1022 }
1023
1024 if (!tabla->ref_cnt) {
1025 pr_err("Error, trying to shutdown codec when already down\n");
1026 return;
1027 }
1028 tabla->ref_cnt--;
1029
1030 if (tabla->mbhc_polling_active) {
1031 if (!tabla->ref_cnt) {
1032 tabla_codec_enable_bandgap(codec,
1033 TABLA_BANDGAP_MBHC_MODE);
1034 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS, 0x80,
1035 0x80);
1036 tabla_codec_enable_clock_block(codec, 1);
1037 }
1038 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
1039 }
1040}
1041
1042static int tabla_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1043{
1044 struct snd_soc_codec *codec = codec_dai->codec;
1045
1046 pr_debug("%s %d\n", __func__, mute);
1047
1048 /* TODO mute TX */
1049 if (mute)
1050 snd_soc_update_bits(codec, TABLA_A_CDC_RX1_B6_CTL, 0x01, 0x01);
1051 else
1052 snd_soc_update_bits(codec, TABLA_A_CDC_RX1_B6_CTL, 0x01, 0x00);
1053
1054 return 0;
1055}
1056
1057static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
1058 int clk_id, unsigned int freq, int dir)
1059{
1060 pr_debug("%s\n", __func__);
1061 return 0;
1062}
1063
1064static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1065{
1066 pr_debug("%s\n", __func__);
1067 return 0;
1068}
1069
1070static int tabla_hw_params(struct snd_pcm_substream *substream,
1071 struct snd_pcm_hw_params *params,
1072 struct snd_soc_dai *dai)
1073{
1074 pr_debug("%s: DAI-ID %x\n", __func__, dai->id);
1075 return 0;
1076}
1077
1078static struct snd_soc_dai_ops tabla_dai_ops = {
1079 .startup = tabla_startup,
1080 .shutdown = tabla_shutdown,
1081 .hw_params = tabla_hw_params,
1082 .set_sysclk = tabla_set_dai_sysclk,
1083 .set_fmt = tabla_set_dai_fmt,
1084 .digital_mute = tabla_digital_mute,
1085};
1086
1087static struct snd_soc_dai_driver tabla_dai[] = {
1088 {
1089 .name = "tabla_rx1",
1090 .id = 1,
1091 .playback = {
1092 .stream_name = "AIF1 Playback",
1093 .rates = SNDRV_PCM_RATE_8000_48000,
1094 .formats = TABLA_FORMATS,
1095 .rate_max = 48000,
1096 .rate_min = 8000,
1097 .channels_min = 1,
1098 .channels_max = 2,
1099 },
1100 .ops = &tabla_dai_ops,
1101 },
1102 {
1103 .name = "tabla_tx1",
1104 .id = 2,
1105 .capture = {
1106 .stream_name = "AIF1 Capture",
1107 .rates = SNDRV_PCM_RATE_8000_48000,
1108 .formats = TABLA_FORMATS,
1109 .rate_max = 48000,
1110 .rate_min = 8000,
1111 .channels_min = 1,
1112 .channels_max = 2,
1113 },
1114 .ops = &tabla_dai_ops,
1115 },
1116};
1117
1118static void tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
1119{
1120 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1121 struct tabla_mbhc_calibration *calibration = tabla->calibration;
1122 int micbias_ctl_reg, micbias_cfilt_val_reg, micbias_cfilt_ctl_reg;
1123
1124 if (!calibration) {
1125 pr_err("Error, no tabla calibration\n");
1126 return;
1127 }
1128
1129 tabla->mbhc_polling_active = true;
1130
1131 if (!tabla->ref_cnt) {
1132 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
1133 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS, 0x80, 0x80);
1134 tabla_codec_enable_clock_block(codec, 1);
1135 }
1136
1137 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
1138
1139 /* TODO store register values in calibration */
1140 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0x09);
1141 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0xEE);
1142 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL, 0xFC);
1143 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL, 0xCE);
1144
1145 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0F, 0x0D);
1146 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
1147
1148 /* TODO select cfilt separately from the micbias line inside the machine
1149 * driver
1150 */
1151 switch (calibration->bias) {
1152 case TABLA_MICBIAS1:
1153 micbias_ctl_reg = TABLA_A_MICB_1_CTL;
1154 micbias_cfilt_ctl_reg = TABLA_A_MICB_CFILT_1_CTL;
1155 micbias_cfilt_val_reg = TABLA_A_MICB_CFILT_1_VAL;
1156 break;
1157 case TABLA_MICBIAS2:
1158 micbias_ctl_reg = TABLA_A_MICB_2_CTL;
1159 micbias_cfilt_ctl_reg = TABLA_A_MICB_CFILT_2_CTL;
1160 micbias_cfilt_val_reg = TABLA_A_MICB_CFILT_2_VAL;
1161 break;
1162 case TABLA_MICBIAS3:
1163 micbias_ctl_reg = TABLA_A_MICB_3_CTL;
1164 micbias_cfilt_ctl_reg = TABLA_A_MICB_CFILT_3_CTL;
1165 micbias_cfilt_val_reg = TABLA_A_MICB_CFILT_3_VAL;
1166 break;
1167 case TABLA_MICBIAS4:
1168 pr_err("%s: Error, microphone bias 4 not supported\n",
1169 __func__);
1170 return;
1171 default:
1172 pr_err("Error, invalid mic bias line\n");
1173 return;
1174 }
1175 snd_soc_write(codec, micbias_cfilt_ctl_reg, 0x40);
1176
1177 snd_soc_write(codec, micbias_ctl_reg, 0x36);
1178
1179 snd_soc_write(codec, micbias_cfilt_val_reg, 0x68);
1180
1181 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
1182 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x4);
1183
1184 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
1185 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
1186 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
1187
1188 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
1189 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x80, 0x80);
1190 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x80, 0x00);
1191
1192 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL, 3);
1193 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL, 9);
1194 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL, 30);
1195 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 120);
1196 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL, 0x78, 0x58);
1197 snd_soc_write(codec, TABLA_A_CDC_MBHC_B2_CTL, 11);
1198
1199 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
1200 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
1201
1202 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
1203 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
1204 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1205 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
1206 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1207 /* TODO check if we need to maintain the other register bits */
1208}
1209
1210static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
1211 int insertion)
1212{
1213 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1214 struct tabla_mbhc_calibration *calibration = tabla->calibration;
1215 int central_bias_enabled = 0;
1216 int micbias_int_reg, micbias_ctl_reg, micbias_mbhc_reg;
1217
1218 if (!calibration) {
1219 pr_err("Error, no tabla calibration\n");
1220 return -EINVAL;
1221 }
1222
1223 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
1224
1225 if (insertion)
1226 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
1227 else
1228 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
1229
1230 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
1231 if (!(tabla->clock_active)) {
1232 tabla_codec_enable_config_mode(codec, 1);
1233 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
1234 0x04, 0);
1235 usleep_range(calibration->shutdown_plug_removal,
1236 calibration->shutdown_plug_removal);
1237 tabla_codec_enable_config_mode(codec, 0);
1238 } else
1239 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
1240 0x04, 0);
1241 }
1242
1243 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0xC,
1244 calibration->hph_current << 2);
1245
1246 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x13);
1247
1248 switch (calibration->bias) {
1249 case TABLA_MICBIAS1:
1250 micbias_mbhc_reg = TABLA_A_MICB_1_MBHC;
1251 micbias_int_reg = TABLA_A_MICB_1_INT_RBIAS;
1252 micbias_ctl_reg = TABLA_A_MICB_1_CTL;
1253 break;
1254 case TABLA_MICBIAS2:
1255 micbias_mbhc_reg = TABLA_A_MICB_2_MBHC;
1256 micbias_int_reg = TABLA_A_MICB_2_INT_RBIAS;
1257 micbias_ctl_reg = TABLA_A_MICB_2_CTL;
1258 break;
1259 case TABLA_MICBIAS3:
1260 micbias_mbhc_reg = TABLA_A_MICB_3_MBHC;
1261 micbias_int_reg = TABLA_A_MICB_3_INT_RBIAS;
1262 micbias_ctl_reg = TABLA_A_MICB_3_CTL;
1263 break;
1264 case TABLA_MICBIAS4:
1265 micbias_mbhc_reg = TABLA_A_MICB_4_MBHC;
1266 micbias_int_reg = TABLA_A_MICB_4_INT_RBIAS;
1267 micbias_ctl_reg = TABLA_A_MICB_4_CTL;
1268 break;
1269 default:
1270 pr_err("Error, invalid mic bias line\n");
1271 return -EINVAL;
1272 }
1273 snd_soc_update_bits(codec, micbias_int_reg, 0x80, 0);
1274 snd_soc_update_bits(codec, micbias_ctl_reg, 0x1, 0);
1275
1276 /* If central bandgap disabled */
1277 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
1278 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
1279 usleep_range(calibration->bg_fast_settle,
1280 calibration->bg_fast_settle);
1281 central_bias_enabled = 1;
1282 }
1283
1284 /* If LDO_H disabled */
1285 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
1286 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
1287 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
1288 usleep_range(calibration->tldoh, calibration->tldoh);
1289 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
1290
1291 if (central_bias_enabled)
1292 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
1293 }
1294 snd_soc_update_bits(codec, micbias_mbhc_reg, 0x60,
1295 calibration->mic_current << 5);
1296 snd_soc_update_bits(codec, micbias_mbhc_reg, 0x80, 0x80);
1297 usleep_range(calibration->mic_pid, calibration->mic_pid);
1298 snd_soc_update_bits(codec, micbias_mbhc_reg, 0x10, 0x10);
1299
1300 snd_soc_update_bits(codec, TABLA_A_MICB_4_MBHC, 0x3, calibration->bias);
1301
1302 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
1303 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
1304 return 0;
1305}
1306
1307int tabla_hs_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack,
1308 struct tabla_mbhc_calibration *calibration)
1309{
1310 struct tabla_priv *tabla;
1311 if (!codec || !calibration) {
1312 pr_err("Error: no codec or calibration\n");
1313 return -EINVAL;
1314 }
1315 tabla = snd_soc_codec_get_drvdata(codec);
1316 tabla->jack = jack;
1317 tabla->calibration = calibration;
1318
1319 return tabla_codec_enable_hs_detect(codec, 1);
1320}
1321EXPORT_SYMBOL_GPL(tabla_hs_detect);
1322
1323static irqreturn_t tabla_dummy_handler(int irq, void *data)
1324{
1325 struct tabla_priv *priv = data;
1326 struct snd_soc_codec *codec = priv->codec;
1327 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1328 return IRQ_HANDLED;
1329}
1330
1331static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
1332{
1333 struct tabla_priv *priv = data;
1334 struct snd_soc_codec *codec = priv->codec;
1335
1336 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
1337
1338 if (priv->jack) {
1339 pr_debug("reporting insertion %d\n", SND_JACK_HEADSET);
1340 snd_soc_jack_report(priv->jack, SND_JACK_HEADSET,
1341 SND_JACK_HEADSET);
1342 }
1343 usleep_range(priv->calibration->setup_plug_removal_delay,
1344 priv->calibration->setup_plug_removal_delay);
1345
1346 tabla_codec_setup_hs_polling(codec);
1347
1348 return IRQ_HANDLED;
1349}
1350
1351static void tabla_codec_shutdown_hs_polling(struct snd_soc_codec *codec)
1352{
1353 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1354 if (!tabla->ref_cnt) {
1355 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0x00);
1356 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_AUDIO_MODE);
1357 tabla_codec_enable_clock_block(codec, 0);
1358 }
1359
1360 tabla->mbhc_polling_active = false;
1361}
1362
1363static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
1364{
1365 struct tabla_priv *priv = data;
1366 struct snd_soc_codec *codec = priv->codec;
1367
1368 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
1369 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
1370
1371 usleep_range(priv->calibration->shutdown_plug_removal,
1372 priv->calibration->shutdown_plug_removal);
1373
1374 if (priv->jack) {
1375 pr_debug("reporting removal\n");
1376 snd_soc_jack_report(priv->jack, 0, SND_JACK_HEADSET);
1377 }
1378 tabla_codec_shutdown_hs_polling(codec);
1379
1380 tabla_codec_enable_hs_detect(codec, 1);
1381
1382 return IRQ_HANDLED;
1383}
1384
1385static unsigned long slimbus_value;
1386
1387static irqreturn_t tabla_slimbus_irq(int irq, void *data)
1388{
1389 struct tabla_priv *priv = data;
1390 struct snd_soc_codec *codec = priv->codec;
1391 int i, j;
1392 u8 val;
1393
1394 for (i = 0; i < TABLA_SLIM_NUM_PORT_REG; i++) {
1395 slimbus_value = tabla_interface_reg_read(codec->control_data,
1396 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
1397 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
1398 val = tabla_interface_reg_read(codec->control_data,
1399 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
1400 if (val & 0x1)
1401 pr_err_ratelimited("overflow error on port %x,"
1402 " value %x\n", i*8 + j, val);
1403 if (val & 0x2)
1404 pr_err_ratelimited("underflow error on port %x,"
1405 " value %x\n", i*8 + j, val);
1406 }
1407 tabla_interface_reg_write(codec->control_data,
1408 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, 0xFF);
1409 }
1410
1411 return IRQ_HANDLED;
1412}
1413
1414static int tabla_codec_probe(struct snd_soc_codec *codec)
1415{
1416 struct tabla *control;
1417 struct tabla_priv *tabla;
1418 struct snd_soc_dapm_context *dapm = &codec->dapm;
1419 int ret = 0;
1420 int i;
1421 int tx_channel;
1422
1423 codec->control_data = dev_get_drvdata(codec->dev->parent);
1424 control = codec->control_data;
1425
1426 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
1427 if (!tabla) {
1428 dev_err(codec->dev, "Failed to allocate private data\n");
1429 return -ENOMEM;
1430 }
1431
1432 snd_soc_codec_set_drvdata(codec, tabla);
1433
1434 tabla->ref_cnt = 0;
1435 tabla->bandgap_type = TABLA_BANDGAP_OFF;
1436 tabla->clock_active = false;
1437 tabla->config_mode_active = false;
1438 tabla->mbhc_polling_active = false;
1439 tabla->codec = codec;
1440
1441 /* TODO only enable bandgap when necessary in order to save power */
1442 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_AUDIO_MODE);
1443 tabla_codec_enable_clock_block(codec, 0);
1444
1445 /* Initialize gain registers to use register gain */
1446 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10);
1447 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10);
1448 snd_soc_update_bits(codec, TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10);
1449 snd_soc_update_bits(codec, TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10);
1450
1451 /* Initialize mic biases to differential mode */
1452 snd_soc_update_bits(codec, TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24);
1453 snd_soc_update_bits(codec, TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24);
1454 snd_soc_update_bits(codec, TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24);
1455 snd_soc_update_bits(codec, TABLA_A_MICB_4_INT_RBIAS, 0x24, 0x24);
1456
1457 /* Set headset CFILT to fast mode */
1458 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_CTL, 0x00, 0x00);
1459 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_CTL, 0x00, 0x00);
1460 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_CTL, 0x00, 0x00);
1461
1462 snd_soc_update_bits(codec, TABLA_A_CDC_CONN_CLSG_CTL, 0x30, 0x10);
1463
1464 /* Use 16 bit sample size for now */
1465 for (tx_channel = 0; tx_channel < 6; tx_channel++) {
1466 snd_soc_update_bits(codec,
1467 TABLA_A_CDC_CONN_TX_SB_B1_CTL + tx_channel, 0x30, 0x20);
1468 snd_soc_update_bits(codec,
1469 TABLA_A_CDC_TX1_MUX_CTL + tx_channel, 0x8, 0x0);
1470
1471 }
1472 for (tx_channel = 6; tx_channel < 10; tx_channel++) {
1473 snd_soc_update_bits(codec,
1474 TABLA_A_CDC_CONN_TX_SB_B1_CTL + tx_channel, 0x60, 0x40);
1475 snd_soc_update_bits(codec,
1476 TABLA_A_CDC_TX1_MUX_CTL + tx_channel, 0x8, 0x0);
1477 }
1478 snd_soc_write(codec, TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xAA);
1479 snd_soc_write(codec, TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xAA);
1480
1481 snd_soc_add_controls(codec, tabla_snd_controls,
1482 ARRAY_SIZE(tabla_snd_controls));
1483 snd_soc_dapm_new_controls(dapm, tabla_dapm_widgets,
1484 ARRAY_SIZE(tabla_dapm_widgets));
1485 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
1486 snd_soc_dapm_sync(dapm);
1487
1488 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
1489 tabla_hs_insert_irq, "Headset insert detect", tabla);
1490 if (ret) {
1491 pr_err("%s: Failed to request irq %d\n", __func__,
1492 TABLA_IRQ_MBHC_INSERTION);
1493 goto err_insert_irq;
1494 }
1495 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
1496
1497 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
1498 tabla_hs_remove_irq, "Headset remove detect", tabla);
1499 if (ret) {
1500 pr_err("%s: Failed to request irq %d\n", __func__,
1501 TABLA_IRQ_MBHC_REMOVAL);
1502 goto err_remove_irq;
1503 }
1504 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
1505
1506 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
1507 tabla_dummy_handler, "DC Estimation detect", tabla);
1508 if (ret) {
1509 pr_err("%s: Failed to request irq %d\n", __func__,
1510 TABLA_IRQ_MBHC_POTENTIAL);
1511 goto err_potential_irq;
1512 }
1513 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
1514
1515 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
1516 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
1517 if (ret) {
1518 pr_err("%s: Failed to request irq %d\n", __func__,
1519 TABLA_IRQ_SLIMBUS);
1520 goto err_slimbus_irq;
1521 }
1522
1523 for (i = 0; i < TABLA_SLIM_NUM_PORT_REG; i++)
1524 tabla_interface_reg_write(codec->control_data,
1525 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
1526
1527 return ret;
1528
1529err_slimbus_irq:
1530 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
1531err_potential_irq:
1532 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
1533err_remove_irq:
1534 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
1535err_insert_irq:
1536 kfree(tabla);
1537 return ret;
1538}
1539static int tabla_codec_remove(struct snd_soc_codec *codec)
1540{
1541 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1542 tabla_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
1543 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
1544 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
1545 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
1546 tabla_codec_disable_clock_block(codec);
1547 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
1548 kfree(tabla);
1549 return 0;
1550}
1551static struct snd_soc_codec_driver soc_codec_dev_tabla = {
1552 .probe = tabla_codec_probe,
1553 .remove = tabla_codec_remove,
1554 .read = tabla_read,
1555 .write = tabla_write,
1556
1557 .readable_register = tabla_readable,
1558 .volatile_register = tabla_volatile,
1559
1560 .reg_cache_size = TABLA_CACHE_SIZE,
1561 .reg_cache_default = tabla_reg_defaults,
1562 .reg_word_size = 1,
1563};
1564static int __devinit tabla_probe(struct platform_device *pdev)
1565{
1566 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
1567 tabla_dai, ARRAY_SIZE(tabla_dai));
1568}
1569static int __devexit tabla_remove(struct platform_device *pdev)
1570{
1571 snd_soc_unregister_codec(&pdev->dev);
1572 return 0;
1573}
1574static struct platform_driver tabla_codec_driver = {
1575 .probe = tabla_probe,
1576 .remove = tabla_remove,
1577 .driver = {
1578 .name = "tabla_codec",
1579 .owner = THIS_MODULE,
1580 },
1581};
1582
1583static int __init tabla_codec_init(void)
1584{
1585 return platform_driver_register(&tabla_codec_driver);
1586}
1587
1588static void __exit tabla_codec_exit(void)
1589{
1590 platform_driver_unregister(&tabla_codec_driver);
1591}
1592
1593module_init(tabla_codec_init);
1594module_exit(tabla_codec_exit);
1595
1596MODULE_DESCRIPTION("Tabla codec driver");
1597MODULE_VERSION("1.0");
1598MODULE_LICENSE("GPL v2");