blob: fde412910d16d9840738f94a9b7cad1f85f68721 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001#ifndef TABLA_CODEC_DIGITAL_H
2
3#define TABLA_CODEC_DIGITAL_H
4
5#define TABLA_A_CHIP_CTL (0x00)
6#define TABLA_A_CHIP_CTL__POR (0x00000000)
7#define TABLA_A_CHIP_STATUS (0x01)
8#define TABLA_A_CHIP_STATUS__POR (0x00000000)
9#define TABLA_A_CHIP_ID_BYTE_0 (0x04)
10#define TABLA_A_CHIP_ID_BYTE_0__POR (0x00000000)
11#define TABLA_A_CHIP_ID_BYTE_1 (0x05)
12#define TABLA_A_CHIP_ID_BYTE_1__POR (0x00000000)
13#define TABLA_A_CHIP_ID_BYTE_2 (0x06)
14#define TABLA_A_CHIP_ID_BYTE_2__POR (0x00000000)
15#define TABLA_A_CHIP_ID_BYTE_3 (0x07)
16#define TABLA_A_CHIP_ID_BYTE_3__POR (0x00000001)
17#define TABLA_A_CHIP_VERSION (0x08)
18#define TABLA_A_CHIP_VERSION__POR (0x00000020)
19#define TABLA_A_SB_VERSION (0x09)
20#define TABLA_A_SB_VERSION__POR (0x00000010)
21#define TABLA_A_SLAVE_ID_1 (0x0C)
22#define TABLA_A_SLAVE_ID_1__POR (0x00000077)
23#define TABLA_A_SLAVE_ID_2 (0x0D)
24#define TABLA_A_SLAVE_ID_2__POR (0x00000066)
25#define TABLA_A_SLAVE_ID_3 (0x0E)
26#define TABLA_A_SLAVE_ID_3__POR (0x00000055)
27#define TABLA_A_PIN_CTL_OE0 (0x10)
28#define TABLA_A_PIN_CTL_OE0__POR (0x00000000)
29#define TABLA_A_PIN_CTL_OE1 (0x11)
30#define TABLA_A_PIN_CTL_OE1__POR (0x00000000)
31#define TABLA_A_PIN_CTL_DATA0 (0x12)
32#define TABLA_A_PIN_CTL_DATA0__POR (0x00000000)
33#define TABLA_A_PIN_CTL_DATA1 (0x13)
34#define TABLA_A_PIN_CTL_DATA1__POR (0x00000000)
35#define TABLA_A_HDRIVE_GENERIC (0x18)
36#define TABLA_A_HDRIVE_GENERIC__POR (0x00000000)
37#define TABLA_A_HDRIVE_OVERRIDE (0x19)
38#define TABLA_A_HDRIVE_OVERRIDE__POR (0x00000008)
39#define TABLA_A_ANA_CSR_WAIT_STATE (0x20)
40#define TABLA_A_ANA_CSR_WAIT_STATE__POR (0x00000044)
41#define TABLA_A_PROCESS_MONITOR_CTL0 (0x40)
42#define TABLA_A_PROCESS_MONITOR_CTL0__POR (0x00000080)
43#define TABLA_A_PROCESS_MONITOR_CTL1 (0x41)
44#define TABLA_A_PROCESS_MONITOR_CTL1__POR (0x00000000)
45#define TABLA_A_PROCESS_MONITOR_CTL2 (0x42)
46#define TABLA_A_PROCESS_MONITOR_CTL2__POR (0x00000000)
47#define TABLA_A_PROCESS_MONITOR_CTL3 (0x43)
48#define TABLA_A_PROCESS_MONITOR_CTL3__POR (0x00000001)
49#define TABLA_A_QFUSE_CTL (0x48)
50#define TABLA_A_QFUSE_CTL__POR (0x00000000)
51#define TABLA_A_QFUSE_STATUS (0x49)
52#define TABLA_A_QFUSE_STATUS__POR (0x00000000)
53#define TABLA_A_QFUSE_DATA_OUT0 (0x4A)
54#define TABLA_A_QFUSE_DATA_OUT0__POR (0x00000000)
55#define TABLA_A_QFUSE_DATA_OUT1 (0x4B)
56#define TABLA_A_QFUSE_DATA_OUT1__POR (0x00000000)
57#define TABLA_A_QFUSE_DATA_OUT2 (0x4C)
58#define TABLA_A_QFUSE_DATA_OUT2__POR (0x00000000)
59#define TABLA_A_QFUSE_DATA_OUT3 (0x4D)
60#define TABLA_A_QFUSE_DATA_OUT3__POR (0x00000000)
61#define TABLA_A_CDC_CTL (0x80)
62#define TABLA_A_CDC_CTL__POR (0x00000000)
63#define TABLA_A_LEAKAGE_CTL (0x88)
64#define TABLA_A_LEAKAGE_CTL__POR (0x00000004)
65#define TABLA_A_INTR_MODE (0x90)
66#define TABLA_A_INTR_MODE__POR (0x00000000)
67#define TABLA_A_INTR_MASK0 (0x94)
68#define TABLA_A_INTR_MASK0__POR (0x000000ff)
69#define TABLA_A_INTR_MASK1 (0x95)
70#define TABLA_A_INTR_MASK1__POR (0x000000ff)
71#define TABLA_A_INTR_MASK2 (0x96)
72#define TABLA_A_INTR_MASK2__POR (0x000000ff)
73#define TABLA_A_INTR_STATUS0 (0x98)
74#define TABLA_A_INTR_STATUS0__POR (0x00000000)
75#define TABLA_A_INTR_STATUS1 (0x99)
76#define TABLA_A_INTR_STATUS1__POR (0x00000000)
77#define TABLA_A_INTR_STATUS2 (0x9A)
78#define TABLA_A_INTR_STATUS2__POR (0x00000000)
79#define TABLA_A_INTR_CLEAR0 (0x9C)
80#define TABLA_A_INTR_CLEAR0__POR (0x00000000)
81#define TABLA_A_INTR_CLEAR1 (0x9D)
82#define TABLA_A_INTR_CLEAR1__POR (0x00000000)
83#define TABLA_A_INTR_CLEAR2 (0x9E)
84#define TABLA_A_INTR_CLEAR2__POR (0x00000000)
85#define TABLA_A_INTR_LEVEL0 (0xA0)
86#define TABLA_A_INTR_LEVEL0__POR (0x00000001)
87#define TABLA_A_INTR_LEVEL1 (0xA1)
88#define TABLA_A_INTR_LEVEL1__POR (0x00000000)
89#define TABLA_A_INTR_LEVEL2 (0xA2)
90#define TABLA_A_INTR_LEVEL2__POR (0x00000000)
91#define TABLA_A_INTR_TEST0 (0xA4)
92#define TABLA_A_INTR_TEST0__POR (0x00000000)
93#define TABLA_A_INTR_TEST1 (0xA5)
94#define TABLA_A_INTR_TEST1__POR (0x00000000)
95#define TABLA_A_INTR_TEST2 (0xA6)
96#define TABLA_A_INTR_TEST2__POR (0x00000000)
97#define TABLA_A_INTR_SET0 (0xA8)
98#define TABLA_A_INTR_SET0__POR (0x00000000)
99#define TABLA_A_INTR_SET1 (0xA9)
100#define TABLA_A_INTR_SET1__POR (0x00000000)
101#define TABLA_A_INTR_SET2 (0xAA)
102#define TABLA_A_INTR_SET2__POR (0x00000000)
103#define TABLA_A_CDC_TX_I2S_SCK_MODE (0xC0)
104#define TABLA_A_CDC_TX_I2S_SCK_MODE__POR (0x00000000)
105#define TABLA_A_CDC_TX_I2S_WS_MODE (0xC1)
106#define TABLA_A_CDC_TX_I2S_WS_MODE__POR (0x00000000)
107#define TABLA_A_CDC_DMIC_DATA0_MODE (0xC4)
108#define TABLA_A_CDC_DMIC_DATA0_MODE__POR (0x00000000)
109#define TABLA_A_CDC_DMIC_CLK0_MODE (0xC5)
110#define TABLA_A_CDC_DMIC_CLK0_MODE__POR (0x00000000)
111#define TABLA_A_CDC_DMIC_DATA1_MODE (0xC6)
112#define TABLA_A_CDC_DMIC_DATA1_MODE__POR (0x00000000)
113#define TABLA_A_CDC_DMIC_CLK1_MODE (0xC7)
114#define TABLA_A_CDC_DMIC_CLK1_MODE__POR (0x00000000)
115#define TABLA_A_CDC_RX_I2S_SCK_MODE (0xC8)
116#define TABLA_A_CDC_RX_I2S_SCK_MODE__POR (0x00000000)
117#define TABLA_A_CDC_RX_I2S_WS_MODE (0xC9)
118#define TABLA_A_CDC_RX_I2S_WS_MODE__POR (0x00000000)
119#define TABLA_A_CDC_DMIC_DATA2_MODE (0xCA)
120#define TABLA_A_CDC_DMIC_DATA2_MODE__POR (0x00000000)
121#define TABLA_A_CDC_DMIC_CLK2_MODE (0xCB)
122#define TABLA_A_CDC_DMIC_CLK2_MODE__POR (0x00000000)
123#define TABLA_A_CDC_INTR_MODE (0xCC)
124#define TABLA_A_CDC_INTR_MODE__POR (0x00000000)
125#define TABLA_A_BIAS_REF_CTL (0x0100)
126#define TABLA_A_BIAS_REF_CTL__POR (0x0000001C)
127#define TABLA_A_BIAS_CENTRAL_BG_CTL (0x0101)
128#define TABLA_A_BIAS_CENTRAL_BG_CTL__POR (0x00000050)
129#define TABLA_A_BIAS_PRECHRG_CTL (0x0102)
130#define TABLA_A_BIAS_PRECHRG_CTL__POR (0x00000007)
131#define TABLA_A_BIAS_CURR_CTL_1 (0x0103)
132#define TABLA_A_BIAS_CURR_CTL_1__POR (0x00000052)
133#define TABLA_A_BIAS_CURR_CTL_2 (0x0104)
134#define TABLA_A_BIAS_CURR_CTL_2__POR (0x00000000)
135#define TABLA_A_BIAS_CONFIG_MODE_BG_CTL (0x0105)
136#define TABLA_A_BIAS_CONFIG_MODE_BG_CTL__POR (0x00000016)
137#define TABLA_A_BIAS_BG_STATUS (0x0106)
138#define TABLA_A_BIAS_BG_STATUS__POR (0x00000000)
139#define TABLA_A_CLK_BUFF_EN1 (0x0108)
140#define TABLA_A_CLK_BUFF_EN1__POR (0x00000004)
141#define TABLA_A_CLK_BUFF_EN2 (0x0109)
142#define TABLA_A_CLK_BUFF_EN2__POR (0x00000002)
143#define TABLA_A_LDO_H_MODE_1 (0x0110)
144#define TABLA_A_LDO_H_MODE_1__POR (0x00000065)
145#define TABLA_A_LDO_H_MODE_2 (0x0111)
146#define TABLA_A_LDO_H_MODE_2__POR (0x000000A8)
147#define TABLA_A_LDO_H_LOOP_CTL (0x0112)
148#define TABLA_A_LDO_H_LOOP_CTL__POR (0x0000006B)
149#define TABLA_A_LDO_H_COMP_1 (0x0113)
150#define TABLA_A_LDO_H_COMP_1__POR (0x00000084)
151#define TABLA_A_LDO_H_COMP_2 (0x0114)
152#define TABLA_A_LDO_H_COMP_2__POR (0x000000E0)
153#define TABLA_A_LDO_H_BIAS_1 (0x0115)
154#define TABLA_A_LDO_H_BIAS_1__POR (0x0000006D)
155#define TABLA_A_LDO_H_BIAS_2 (0x0116)
156#define TABLA_A_LDO_H_BIAS_2__POR (0x000000A5)
157#define TABLA_A_LDO_H_BIAS_3 (0x0117)
158#define TABLA_A_LDO_H_BIAS_3__POR (0x00000060)
159#define TABLA_A_LDO_L_MODE_1 (0x0118)
160#define TABLA_A_LDO_L_MODE_1__POR (0x00000028)
161#define TABLA_A_LDO_L_MODE_2 (0x0119)
162#define TABLA_A_LDO_L_MODE_2__POR (0x000000A8)
163#define TABLA_A_LDO_L_LOOP_CTL (0x011A)
164#define TABLA_A_LDO_L_LOOP_CTL__POR (0x0000006D)
165#define TABLA_A_LDO_L_COMP_1 (0x011B)
166#define TABLA_A_LDO_L_COMP_1__POR (0x00000031)
167#define TABLA_A_LDO_L_COMP_2 (0x011C)
168#define TABLA_A_LDO_L_COMP_2__POR (0x000000A0)
169#define TABLA_A_LDO_L_BIAS_1 (0x011D)
170#define TABLA_A_LDO_L_BIAS_1__POR (0x0000006D)
171#define TABLA_A_LDO_L_BIAS_2 (0x011E)
172#define TABLA_A_LDO_L_BIAS_2__POR (0x00000065)
173#define TABLA_A_LDO_L_BIAS_3 (0x011F)
174#define TABLA_A_LDO_L_BIAS_3__POR (0x00000050)
175#define TABLA_A_MICB_CFILT_1_CTL (0x0128)
176#define TABLA_A_MICB_CFILT_1_CTL__POR (0x00000040)
177#define TABLA_A_MICB_CFILT_1_VAL (0x0129)
178#define TABLA_A_MICB_CFILT_1_VAL__POR (0x00000080)
179#define TABLA_A_MICB_CFILT_1_PRECHRG (0x012A)
180#define TABLA_A_MICB_CFILT_1_PRECHRG__POR (0x00000038)
181#define TABLA_A_MICB_1_CTL (0x012B)
182#define TABLA_A_MICB_1_CTL__POR (0x00000016)
183#define TABLA_A_MICB_1_INT_RBIAS (0x012C)
184#define TABLA_A_MICB_1_INT_RBIAS__POR (0x00000000)
185#define TABLA_A_MICB_1_MBHC (0x012D)
186#define TABLA_A_MICB_1_MBHC__POR (0x00000001)
187#define TABLA_A_MICB_CFILT_2_CTL (0x012E)
188#define TABLA_A_MICB_CFILT_2_CTL__POR (0x00000040)
189#define TABLA_A_MICB_CFILT_2_VAL (0x012F)
190#define TABLA_A_MICB_CFILT_2_VAL__POR (0x00000080)
191#define TABLA_A_MICB_CFILT_2_PRECHRG (0x0130)
192#define TABLA_A_MICB_CFILT_2_PRECHRG__POR (0x00000038)
193#define TABLA_A_MICB_2_CTL (0x0131)
194#define TABLA_A_MICB_2_CTL__POR (0x00000016)
195#define TABLA_A_MICB_2_INT_RBIAS (0x0132)
196#define TABLA_A_MICB_2_INT_RBIAS__POR (0x00000000)
197#define TABLA_A_MICB_2_MBHC (0x0133)
198#define TABLA_A_MICB_2_MBHC__POR (0x00000000)
199#define TABLA_A_MICB_CFILT_3_CTL (0x0134)
200#define TABLA_A_MICB_CFILT_3_CTL__POR (0x00000040)
201#define TABLA_A_MICB_CFILT_3_VAL (0x0135)
202#define TABLA_A_MICB_CFILT_3_VAL__POR (0x00000080)
203#define TABLA_A_MICB_CFILT_3_PRECHRG (0x0136)
204#define TABLA_A_MICB_CFILT_3_PRECHRG__POR (0x00000038)
205#define TABLA_A_MICB_3_CTL (0x0137)
206#define TABLA_A_MICB_3_CTL__POR (0x00000016)
207#define TABLA_A_MICB_3_INT_RBIAS (0x0138)
208#define TABLA_A_MICB_3_INT_RBIAS__POR (0x00000000)
209#define TABLA_A_MICB_3_MBHC (0x0139)
210#define TABLA_A_MICB_3_MBHC__POR (0x00000000)
211#define TABLA_A_MICB_4_CTL (0x013A)
212#define TABLA_A_MICB_4_CTL__POR (0x00000016)
213#define TABLA_A_MICB_4_INT_RBIAS (0x013B)
214#define TABLA_A_MICB_4_INT_RBIAS__POR (0x00000000)
215#define TABLA_A_MICB_4_MBHC (0x013C)
216#define TABLA_A_MICB_4_MBHC__POR (0x00000001)
217#define TABLA_A_TX_COM_BIAS (0x014C)
218#define TABLA_A_TX_COM_BIAS__POR (0x000000E0)
219#define TABLA_A_MBHC_SCALING_MUX_1 (0x014E)
220#define TABLA_A_MBHC_SCALING_MUX_1__POR (0x00000000)
221#define TABLA_A_MBHC_SCALING_MUX_2 (0x014F)
222#define TABLA_A_MBHC_SCALING_MUX_2__POR (0x00000080)
223#define TABLA_A_TX_SUP_SWITCH_CTRL_1 (0x0151)
224#define TABLA_A_TX_SUP_SWITCH_CTRL_1__POR (0x00000000)
225#define TABLA_A_TX_SUP_SWITCH_CTRL_2 (0x0152)
226#define TABLA_A_TX_SUP_SWITCH_CTRL_2__POR (0x00000080)
227#define TABLA_A_TX_1_2_EN (0x0153)
228#define TABLA_A_TX_1_2_EN__POR (0x00000000)
229#define TABLA_A_TX_1_2_TEST_EN (0x0154)
230#define TABLA_A_TX_1_2_TEST_EN__POR (0x000000CC)
231#define TABLA_A_TX_1_2_ADC_CH1 (0x0155)
232#define TABLA_A_TX_1_2_ADC_CH1__POR (0x00000044)
233#define TABLA_A_TX_1_2_ADC_CH2 (0x0156)
234#define TABLA_A_TX_1_2_ADC_CH2__POR (0x00000044)
235#define TABLA_A_TX_1_2_ATEST_REFCTRL (0x0157)
236#define TABLA_A_TX_1_2_ATEST_REFCTRL__POR (0x00000000)
237#define TABLA_A_TX_1_2_TEST_CTL (0x0158)
238#define TABLA_A_TX_1_2_TEST_CTL__POR (0x00000038)
239#define TABLA_A_TX_1_2_TEST_BLOCK_EN (0x0159)
240#define TABLA_A_TX_1_2_TEST_BLOCK_EN__POR (0x000000FF)
241#define TABLA_A_TX_1_2_TXFE_CLKDIV (0x015A)
242#define TABLA_A_TX_1_2_TXFE_CLKDIV__POR (0x000000EE)
243#define TABLA_A_TX_1_2_SAR_ERR_CH1 (0x015B)
244#define TABLA_A_TX_1_2_SAR_ERR_CH1__POR (0x00000000)
245#define TABLA_A_TX_1_2_SAR_ERR_CH2 (0x015C)
246#define TABLA_A_TX_1_2_SAR_ERR_CH2__POR (0x00000000)
247#define TABLA_A_TX_3_4_EN (0x015D)
248#define TABLA_A_TX_3_4_EN__POR (0x00000000)
249#define TABLA_A_TX_3_4_TEST_EN (0x015E)
250#define TABLA_A_TX_3_4_TEST_EN__POR (0x000000CC)
251#define TABLA_A_TX_3_4_ADC_CH3 (0x015F)
252#define TABLA_A_TX_3_4_ADC_CH3__POR (0x00000044)
253#define TABLA_A_TX_3_4_ADC_CH4 (0x0160)
254#define TABLA_A_TX_3_4_ADC_CH4__POR (0x00000044)
255#define TABLA_A_TX_3_4_ATEST_REFCTRL (0x0161)
256#define TABLA_A_TX_3_4_ATEST_REFCTRL__POR (0x00000000)
257#define TABLA_A_TX_3_4_TEST_CTL (0x0162)
258#define TABLA_A_TX_3_4_TEST_CTL__POR (0x00000038)
259#define TABLA_A_TX_3_4_TEST_BLOCK_EN (0x0163)
260#define TABLA_A_TX_3_4_TEST_BLOCK_EN__POR (0x000000FF)
261#define TABLA_A_TX_3_4_TXFE_CKDIV (0x0164)
262#define TABLA_A_TX_3_4_TXFE_CKDIV__POR (0x000000EE)
263#define TABLA_A_TX_3_4_SAR_ERR_CH3 (0x0165)
264#define TABLA_A_TX_3_4_SAR_ERR_CH3__POR (0x00000000)
265#define TABLA_A_TX_3_4_SAR_ERR_CH4 (0x0166)
266#define TABLA_A_TX_3_4_SAR_ERR_CH4__POR (0x00000000)
267#define TABLA_A_TX_5_6_EN (0x0167)
268#define TABLA_A_TX_5_6_EN__POR (0x00000011)
269#define TABLA_A_TX_5_6_TEST_EN (0x0168)
270#define TABLA_A_TX_5_6_TEST_EN__POR (0x000000CC)
271#define TABLA_A_TX_5_6_ADC_CH5 (0x0169)
272#define TABLA_A_TX_5_6_ADC_CH5__POR (0x00000044)
273#define TABLA_A_TX_5_6_ADC_CH6 (0x016A)
274#define TABLA_A_TX_5_6_ADC_CH6__POR (0x00000044)
275#define TABLA_A_TX_5_6_ATEST_REFCTRL (0x016B)
276#define TABLA_A_TX_5_6_ATEST_REFCTRL__POR (0x00000000)
277#define TABLA_A_TX_5_6_TEST_CTL (0x016C)
278#define TABLA_A_TX_5_6_TEST_CTL__POR (0x00000038)
279#define TABLA_A_TX_5_6_TEST_BLOCK_EN (0x016D)
280#define TABLA_A_TX_5_6_TEST_BLOCK_EN__POR (0x000000FF)
281#define TABLA_A_TX_5_6_TXFE_CKDIV (0x016E)
282#define TABLA_A_TX_5_6_TXFE_CKDIV__POR (0x000000EE)
283#define TABLA_A_TX_5_6_SAR_ERR_CH5 (0x016F)
284#define TABLA_A_TX_5_6_SAR_ERR_CH5__POR (0x00000000)
285#define TABLA_A_TX_5_6_SAR_ERR_CH6 (0x0170)
286#define TABLA_A_TX_5_6_SAR_ERR_CH6__POR (0x00000000)
287#define TABLA_A_TX_7_MBHC_EN (0x0171)
288#define TABLA_A_TX_7_MBHC_EN__POR (0x0000000C)
289#define TABLA_A_TX_7_MBHC_ATEST_REFCTRL (0x0172)
290#define TABLA_A_TX_7_MBHC_ATEST_REFCTRL__POR (0x00000000)
291#define TABLA_A_TX_7_MBHC_ADC (0x0173)
292#define TABLA_A_TX_7_MBHC_ADC__POR (0x00000044)
293#define TABLA_A_TX_7_MBHC_TEST_CTL (0x0174)
294#define TABLA_A_TX_7_MBHC_TEST_CTL__POR (0x00000038)
295#define TABLA_A_TX_7_MBHC_SAR_ERR (0x0175)
296#define TABLA_A_TX_7_MBHC_SAR_ERR__POR (0x00000000)
297#define TABLA_A_TX_7_TXFE_CLKDIV (0x0176)
298#define TABLA_A_TX_7_TXFE_CLKDIV__POR (0x0000001C)
299#define TABLA_A_AUX_COM_CTL (0x0180)
300#define TABLA_A_AUX_COM_CTL__POR (0x00000034)
301#define TABLA_A_AUX_COM_ATEST (0x0181)
302#define TABLA_A_AUX_COM_ATEST__POR (0x00000000)
303#define TABLA_A_AUX_L_EN (0x0182)
304#define TABLA_A_AUX_L_EN__POR (0x00000000)
305#define TABLA_A_AUX_L_GAIN (0x0183)
306#define TABLA_A_AUX_L_GAIN__POR (0x0000001F)
307#define TABLA_A_AUX_L_PA_CONN (0x0184)
308#define TABLA_A_AUX_L_PA_CONN__POR (0x00000000)
309#define TABLA_A_AUX_L_PA_CONN_INV (0x0185)
310#define TABLA_A_AUX_L_PA_CONN_INV__POR (0x00000000)
311#define TABLA_A_AUX_R_EN (0x0186)
312#define TABLA_A_AUX_R_EN__POR (0x00000000)
313#define TABLA_A_AUX_R_GAIN (0x0187)
314#define TABLA_A_AUX_R_GAIN__POR (0x0000001F)
315#define TABLA_A_AUX_R_PA_CONN (0x0188)
316#define TABLA_A_AUX_R_PA_CONN__POR (0x00000000)
317#define TABLA_A_AUX_R_PA_CONN_INV (0x0189)
318#define TABLA_A_AUX_R_PA_CONN_INV__POR (0x00000000)
319#define TABLA_A_CP_EN (0x0192)
320#define TABLA_A_CP_EN__POR (0x000000E6)
321#define TABLA_A_CP_CLK (0x0193)
322#define TABLA_A_CP_CLK__POR (0x00000029)
323#define TABLA_A_CP_STATIC (0x0194)
324#define TABLA_A_CP_STATIC__POR (0x00000010)
325#define TABLA_A_CP_DCC1 (0x0195)
326#define TABLA_A_CP_DCC1__POR (0x00000052)
327#define TABLA_A_CP_DCC3 (0x0196)
328#define TABLA_A_CP_DCC3__POR (0x00000001)
329#define TABLA_A_CP_ATEST (0x0197)
330#define TABLA_A_CP_ATEST__POR (0x00000000)
331#define TABLA_A_CP_DTEST (0x0198)
332#define TABLA_A_CP_DTEST__POR (0x00000000)
333#define TABLA_A_RX_COM_TIMER_DIV (0x019E)
334#define TABLA_A_RX_COM_TIMER_DIV__POR (0x000000E8)
335#define TABLA_A_RX_COM_OCP_CTL (0x019F)
336#define TABLA_A_RX_COM_OCP_CTL__POR (0x0000001F)
337#define TABLA_A_RX_COM_OCP_COUNT (0x01A0)
338#define TABLA_A_RX_COM_OCP_COUNT__POR (0x00000077)
339#define TABLA_A_RX_COM_DAC_CTL (0x01A1)
340#define TABLA_A_RX_COM_DAC_CTL__POR (0x00000000)
341#define TABLA_A_RX_COM_BIAS (0x01A2)
342#define TABLA_A_RX_COM_BIAS__POR (0x00000000)
343#define TABLA_A_RX_HPH_BIAS_PA (0x01A6)
344#define TABLA_A_RX_HPH_BIAS_PA__POR (0x000000AA)
345#define TABLA_A_RX_HPH_BIAS_LDO (0x01A7)
346#define TABLA_A_RX_HPH_BIAS_LDO__POR (0x00000086)
347#define TABLA_A_RX_HPH_BIAS_CNP (0x01A8)
348#define TABLA_A_RX_HPH_BIAS_CNP__POR (0x0000008A)
349#define TABLA_A_RX_HPH_BIAS_WG (0x01A9)
350#define TABLA_A_RX_HPH_BIAS_WG__POR (0x00000060)
351#define TABLA_A_RX_HPH_OCP_CTL (0x01AA)
352#define TABLA_A_RX_HPH_OCP_CTL__POR (0x000000E8)
353#define TABLA_A_RX_HPH_CNP_EN (0x01AB)
354#define TABLA_A_RX_HPH_CNP_EN__POR (0x00000080)
355#define TABLA_A_RX_HPH_CNP_WG_CTL (0x01AC)
356#define TABLA_A_RX_HPH_CNP_WG_CTL__POR (0x000000DC)
357#define TABLA_A_RX_HPH_CNP_WG_TIME (0x01AD)
358#define TABLA_A_RX_HPH_CNP_WG_TIME__POR (0x00000028)
359#define TABLA_A_RX_HPH_L_GAIN (0x01AE)
360#define TABLA_A_RX_HPH_L_GAIN__POR (0x00000000)
361#define TABLA_A_RX_HPH_L_TEST (0x01AF)
362#define TABLA_A_RX_HPH_L_TEST__POR (0x00000001)
363#define TABLA_A_RX_HPH_L_PA_CTL (0x01B0)
364#define TABLA_A_RX_HPH_L_PA_CTL__POR (0x00000040)
365#define TABLA_A_RX_HPH_L_DAC_CTL (0x01B1)
366#define TABLA_A_RX_HPH_L_DAC_CTL__POR (0x00000000)
367#define TABLA_A_RX_HPH_L_ATEST (0x01B2)
368#define TABLA_A_RX_HPH_L_ATEST__POR (0x00000000)
369#define TABLA_A_RX_HPH_L_STATUS (0x01B3)
370#define TABLA_A_RX_HPH_L_STATUS__POR (0x00000004)
371#define TABLA_A_RX_HPH_R_GAIN (0x01B4)
372#define TABLA_A_RX_HPH_R_GAIN__POR (0x00000000)
373#define TABLA_A_RX_HPH_R_TEST (0x01B5)
374#define TABLA_A_RX_HPH_R_TEST__POR (0x00000001)
375#define TABLA_A_RX_HPH_R_PA_CTL (0x01B6)
376#define TABLA_A_RX_HPH_R_PA_CTL__POR (0x00000040)
377#define TABLA_A_RX_HPH_R_DAC_CTL (0x01B7)
378#define TABLA_A_RX_HPH_R_DAC_CTL__POR (0x00000000)
379#define TABLA_A_RX_HPH_R_ATEST (0x01B8)
380#define TABLA_A_RX_HPH_R_ATEST__POR (0x00000000)
381#define TABLA_A_RX_HPH_R_STATUS (0x01B9)
382#define TABLA_A_RX_HPH_R_STATUS__POR (0x00000004)
383#define TABLA_A_RX_EAR_BIAS_PA (0x01BA)
384#define TABLA_A_RX_EAR_BIAS_PA__POR (0x000000AA)
385#define TABLA_A_RX_EAR_BIAS_CMBUFF (0x01BB)
386#define TABLA_A_RX_EAR_BIAS_CMBUFF__POR (0x000000A0)
387#define TABLA_A_RX_EAR_EN (0x01BC)
388#define TABLA_A_RX_EAR_EN__POR (0x00000000)
389#define TABLA_A_RX_EAR_GAIN (0x01BD)
390#define TABLA_A_RX_EAR_GAIN__POR (0x00000008)
391#define TABLA_A_RX_EAR_CMBUFF (0x01BE)
392#define TABLA_A_RX_EAR_CMBUFF__POR (0x00000000)
393#define TABLA_A_RX_EAR_ICTL (0x01BF)
394#define TABLA_A_RX_EAR_ICTL__POR (0x00000040)
395#define TABLA_A_RX_EAR_CCOMP (0x01C0)
396#define TABLA_A_RX_EAR_CCOMP__POR (0x00000008)
397#define TABLA_A_RX_EAR_VCM (0x01C1)
398#define TABLA_A_RX_EAR_VCM__POR (0x00000000)
399#define TABLA_A_RX_EAR_CNP (0x01C2)
400#define TABLA_A_RX_EAR_CNP__POR (0x00000080)
401#define TABLA_A_RX_EAR_ATEST (0x01C3)
402#define TABLA_A_RX_EAR_ATEST__POR (0x00000000)
403#define TABLA_A_RX_EAR_STATUS (0x01C5)
404#define TABLA_A_RX_EAR_STATUS__POR (0x00000004)
405#define TABLA_A_RX_LINE_BIAS_PA (0x01C6)
406#define TABLA_A_RX_LINE_BIAS_PA__POR (0x000000AA)
407#define TABLA_A_RX_LINE_BIAS_DAC (0x01C7)
408#define TABLA_A_RX_LINE_BIAS_DAC__POR (0x000000A0)
409#define TABLA_A_RX_LINE_BIAS_CNP (0x01C8)
410#define TABLA_A_RX_LINE_BIAS_CNP__POR (0x0000003A)
411#define TABLA_A_RX_LINE_COM (0x01C9)
412#define TABLA_A_RX_LINE_COM__POR (0x00000000)
413#define TABLA_A_RX_LINE_CNP_EN (0x01CA)
414#define TABLA_A_RX_LINE_CNP_EN__POR (0x00000080)
415#define TABLA_A_RX_LINE_CNP_WG_CTL (0x01CB)
416#define TABLA_A_RX_LINE_CNP_WG_CTL__POR (0x0000001C)
417#define TABLA_A_RX_LINE_CNP_WG_TIME (0x01CC)
418#define TABLA_A_RX_LINE_CNP_WG_TIME__POR (0x00000064)
419#define TABLA_A_RX_LINE_1_GAIN (0x01CD)
420#define TABLA_A_RX_LINE_1_GAIN__POR (0x00000000)
421#define TABLA_A_RX_LINE_1_TEST (0x01CE)
422#define TABLA_A_RX_LINE_1_TEST__POR (0x00000000)
423#define TABLA_A_RX_LINE_1_DAC_CTL (0x01CF)
424#define TABLA_A_RX_LINE_1_DAC_CTL__POR (0x0000000C)
425#define TABLA_A_RX_LINE_1_STATUS (0x01D0)
426#define TABLA_A_RX_LINE_1_STATUS__POR (0x00000000)
427#define TABLA_A_RX_LINE_2_GAIN (0x01D1)
428#define TABLA_A_RX_LINE_2_GAIN__POR (0x00000000)
429#define TABLA_A_RX_LINE_2_TEST (0x01D2)
430#define TABLA_A_RX_LINE_2_TEST__POR (0x00000000)
431#define TABLA_A_RX_LINE_2_DAC_CTL (0x01D3)
432#define TABLA_A_RX_LINE_2_DAC_CTL__POR (0x0000000C)
433#define TABLA_A_RX_LINE_2_STATUS (0x01D4)
434#define TABLA_A_RX_LINE_2_STATUS__POR (0x00000000)
435#define TABLA_A_RX_LINE_3_GAIN (0x01D5)
436#define TABLA_A_RX_LINE_3_GAIN__POR (0x00000000)
437#define TABLA_A_RX_LINE_3_TEST (0x01D6)
438#define TABLA_A_RX_LINE_3_TEST__POR (0x00000000)
439#define TABLA_A_RX_LINE_3_DAC_CTL (0x01D7)
440#define TABLA_A_RX_LINE_3_DAC_CTL__POR (0x0000000C)
441#define TABLA_A_RX_LINE_3_STATUS (0x01D8)
442#define TABLA_A_RX_LINE_3_STATUS__POR (0x00000000)
443#define TABLA_A_RX_LINE_4_GAIN (0x01D9)
444#define TABLA_A_RX_LINE_4_GAIN__POR (0x00000000)
445#define TABLA_A_RX_LINE_4_TEST (0x01DA)
446#define TABLA_A_RX_LINE_4_TEST__POR (0x00000000)
447#define TABLA_A_RX_LINE_4_DAC_CTL (0x01DB)
448#define TABLA_A_RX_LINE_4_DAC_CTL__POR (0x0000000C)
449#define TABLA_A_RX_LINE_4_STATUS (0x01DC)
450#define TABLA_A_RX_LINE_4_STATUS__POR (0x00000000)
451#define TABLA_A_RX_LINE_5_GAIN (0x01DD)
452#define TABLA_A_RX_LINE_5_GAIN__POR (0x00000000)
453#define TABLA_A_RX_LINE_5_TEST (0x01DE)
454#define TABLA_A_RX_LINE_5_TEST__POR (0x00000000)
455#define TABLA_A_RX_LINE_5_DAC_CTL (0x01DF)
456#define TABLA_A_RX_LINE_5_DAC_CTL__POR (0x0000000C)
457#define TABLA_A_RX_LINE_5_STATUS (0x01E0)
458#define TABLA_A_RX_LINE_5_STATUS__POR (0x00000000)
459#define TABLA_A_RX_LINE_CNP_DBG (0x01EC)
460#define TABLA_A_RX_LINE_CNP_DBG__POR (0x00000000)
461#define TABLA_A_MBHC_HPH (0x01ED)
462#define TABLA_A_MBHC_HPH__POR (0x00000048)
463#define TABLA_A_CONFIG_MODE_FREQ (0x01F7)
464#define TABLA_A_CONFIG_MODE_FREQ__POR (0x00000047)
465#define TABLA_A_CONFIG_MODE_TEST (0x01F8)
466#define TABLA_A_CONFIG_MODE_TEST__POR (0x0000000A)
467#define TABLA_A_CONFIG_MODE_STATUS (0x01F9)
468#define TABLA_A_CONFIG_MODE_STATUS__POR (0x0000001C)
469#define TABLA_A_CONFIG_MODE_TUNER (0x01FA)
470#define TABLA_A_CONFIG_MODE_TUNER__POR (0x00000000)
Bradley Rubin229c6a52011-07-12 16:18:48 -0700471#define TABLA_A_CDC_ANC1_CTL (0x00000200)
472#define TABLA_A_CDC_ANC1_CTL__POR (0x00000000)
473#define TABLA_A_CDC_ANC2_CTL (0x00000280)
474#define TABLA_A_CDC_ANC2_CTL__POR (0x00000000)
475#define TABLA_A_CDC_ANC1_SHIFT (0x00000201)
476#define TABLA_A_CDC_ANC1_SHIFT__POR (0x00000000)
477#define TABLA_A_CDC_ANC2_SHIFT (0x00000281)
478#define TABLA_A_CDC_ANC2_SHIFT__POR (0x00000000)
479#define TABLA_A_CDC_ANC1_FILT1_B1_CTL (0x00000202)
480#define TABLA_A_CDC_ANC1_FILT1_B1_CTL__POR (0x00000000)
481#define TABLA_A_CDC_ANC2_FILT1_B1_CTL (0x00000282)
482#define TABLA_A_CDC_ANC2_FILT1_B1_CTL__POR (0x00000000)
483#define TABLA_A_CDC_ANC1_FILT1_B2_CTL (0x00000203)
484#define TABLA_A_CDC_ANC1_FILT1_B2_CTL__POR (0x00000000)
485#define TABLA_A_CDC_ANC2_FILT1_B2_CTL (0x00000283)
486#define TABLA_A_CDC_ANC2_FILT1_B2_CTL__POR (0x00000000)
487#define TABLA_A_CDC_ANC1_FILT1_B3_CTL (0x00000204)
488#define TABLA_A_CDC_ANC1_FILT1_B3_CTL__POR (0x00000000)
489#define TABLA_A_CDC_ANC2_FILT1_B3_CTL (0x00000284)
490#define TABLA_A_CDC_ANC2_FILT1_B3_CTL__POR (0x00000000)
491#define TABLA_A_CDC_ANC1_FILT1_B4_CTL (0x00000205)
492#define TABLA_A_CDC_ANC1_FILT1_B4_CTL__POR (0x00000000)
493#define TABLA_A_CDC_ANC2_FILT1_B4_CTL (0x00000285)
494#define TABLA_A_CDC_ANC2_FILT1_B4_CTL__POR (0x00000000)
495#define TABLA_A_CDC_ANC1_FILT2_B1_CTL (0x00000206)
496#define TABLA_A_CDC_ANC1_FILT2_B1_CTL__POR (0x00000000)
497#define TABLA_A_CDC_ANC2_FILT2_B1_CTL (0x00000286)
498#define TABLA_A_CDC_ANC2_FILT2_B1_CTL__POR (0x00000000)
499#define TABLA_A_CDC_ANC1_FILT2_B2_CTL (0x00000207)
500#define TABLA_A_CDC_ANC1_FILT2_B2_CTL__POR (0x00000000)
501#define TABLA_A_CDC_ANC2_FILT2_B2_CTL (0x00000287)
502#define TABLA_A_CDC_ANC2_FILT2_B2_CTL__POR (0x00000000)
503#define TABLA_A_CDC_ANC1_FILT2_B3_CTL (0x00000208)
504#define TABLA_A_CDC_ANC1_FILT2_B3_CTL__POR (0x00000000)
505#define TABLA_A_CDC_ANC2_FILT2_B3_CTL (0x00000288)
506#define TABLA_A_CDC_ANC2_FILT2_B3_CTL__POR (0x00000000)
507#define TABLA_A_CDC_ANC1_SPARE (0x00000209)
508#define TABLA_A_CDC_ANC1_SPARE__POR (0x00000000)
509#define TABLA_A_CDC_ANC2_SPARE (0x00000289)
510#define TABLA_A_CDC_ANC2_SPARE__POR (0x00000000)
511#define TABLA_A_CDC_ANC1_FILT3_CTL (0x0000020A)
512#define TABLA_A_CDC_ANC1_FILT3_CTL__POR (0x00000000)
513#define TABLA_A_CDC_ANC2_FILT3_CTL (0x0000028A)
514#define TABLA_A_CDC_ANC2_FILT3_CTL__POR (0x00000000)
515#define TABLA_A_CDC_ANC1_FILT4_CTL (0x0000020B)
516#define TABLA_A_CDC_ANC1_FILT4_CTL__POR (0x00000000)
517#define TABLA_A_CDC_ANC2_FILT4_CTL (0x0000028B)
518#define TABLA_A_CDC_ANC2_FILT4_CTL__POR (0x00000000)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700519#define TABLA_A_CDC_TX1_VOL_CTL_TIMER (0x00000220)
520#define TABLA_A_CDC_TX1_VOL_CTL_TIMER__POR (0x00000000)
521#define TABLA_A_CDC_TX2_VOL_CTL_TIMER (0x00000228)
522#define TABLA_A_CDC_TX2_VOL_CTL_TIMER__POR (0x00000000)
523#define TABLA_A_CDC_TX3_VOL_CTL_TIMER (0x00000230)
524#define TABLA_A_CDC_TX3_VOL_CTL_TIMER__POR (0x00000000)
525#define TABLA_A_CDC_TX4_VOL_CTL_TIMER (0x00000238)
526#define TABLA_A_CDC_TX4_VOL_CTL_TIMER__POR (0x00000000)
527#define TABLA_A_CDC_TX5_VOL_CTL_TIMER (0x00000240)
528#define TABLA_A_CDC_TX5_VOL_CTL_TIMER__POR (0x00000000)
529#define TABLA_A_CDC_TX6_VOL_CTL_TIMER (0x00000248)
530#define TABLA_A_CDC_TX6_VOL_CTL_TIMER__POR (0x00000000)
531#define TABLA_A_CDC_TX7_VOL_CTL_TIMER (0x00000250)
532#define TABLA_A_CDC_TX7_VOL_CTL_TIMER__POR (0x00000000)
533#define TABLA_A_CDC_TX8_VOL_CTL_TIMER (0x00000258)
534#define TABLA_A_CDC_TX8_VOL_CTL_TIMER__POR (0x00000000)
535#define TABLA_A_CDC_TX9_VOL_CTL_TIMER (0x00000260)
536#define TABLA_A_CDC_TX9_VOL_CTL_TIMER__POR (0x00000000)
537#define TABLA_A_CDC_TX10_VOL_CTL_TIMER (0x00000268)
538#define TABLA_A_CDC_TX10_VOL_CTL_TIMER__POR (0x00000000)
539#define TABLA_A_CDC_TX1_VOL_CTL_GAIN (0x00000221)
540#define TABLA_A_CDC_TX1_VOL_CTL_GAIN__POR (0x00000000)
541#define TABLA_A_CDC_TX2_VOL_CTL_GAIN (0x00000229)
542#define TABLA_A_CDC_TX2_VOL_CTL_GAIN__POR (0x00000000)
543#define TABLA_A_CDC_TX3_VOL_CTL_GAIN (0x00000231)
544#define TABLA_A_CDC_TX3_VOL_CTL_GAIN__POR (0x00000000)
545#define TABLA_A_CDC_TX4_VOL_CTL_GAIN (0x00000239)
546#define TABLA_A_CDC_TX4_VOL_CTL_GAIN__POR (0x00000000)
547#define TABLA_A_CDC_TX5_VOL_CTL_GAIN (0x00000241)
548#define TABLA_A_CDC_TX5_VOL_CTL_GAIN__POR (0x00000000)
549#define TABLA_A_CDC_TX6_VOL_CTL_GAIN (0x00000249)
550#define TABLA_A_CDC_TX6_VOL_CTL_GAIN__POR (0x00000000)
551#define TABLA_A_CDC_TX7_VOL_CTL_GAIN (0x00000251)
552#define TABLA_A_CDC_TX7_VOL_CTL_GAIN__POR (0x00000000)
553#define TABLA_A_CDC_TX8_VOL_CTL_GAIN (0x00000259)
554#define TABLA_A_CDC_TX8_VOL_CTL_GAIN__POR (0x00000000)
555#define TABLA_A_CDC_TX9_VOL_CTL_GAIN (0x00000261)
556#define TABLA_A_CDC_TX9_VOL_CTL_GAIN__POR (0x00000000)
557#define TABLA_A_CDC_TX10_VOL_CTL_GAIN (0x00000269)
558#define TABLA_A_CDC_TX10_VOL_CTL_GAIN__POR (0x00000000)
559#define TABLA_A_CDC_TX1_VOL_CTL_CFG (0x00000222)
560#define TABLA_A_CDC_TX1_VOL_CTL_CFG__POR (0x00000000)
561#define TABLA_A_CDC_TX2_VOL_CTL_CFG (0x0000022A)
562#define TABLA_A_CDC_TX2_VOL_CTL_CFG__POR (0x00000000)
563#define TABLA_A_CDC_TX3_VOL_CTL_CFG (0x00000232)
564#define TABLA_A_CDC_TX3_VOL_CTL_CFG__POR (0x00000000)
565#define TABLA_A_CDC_TX4_VOL_CTL_CFG (0x0000023A)
566#define TABLA_A_CDC_TX4_VOL_CTL_CFG__POR (0x00000000)
567#define TABLA_A_CDC_TX5_VOL_CTL_CFG (0x00000242)
568#define TABLA_A_CDC_TX5_VOL_CTL_CFG__POR (0x00000000)
569#define TABLA_A_CDC_TX6_VOL_CTL_CFG (0x0000024A)
570#define TABLA_A_CDC_TX6_VOL_CTL_CFG__POR (0x00000000)
571#define TABLA_A_CDC_TX7_VOL_CTL_CFG (0x00000252)
572#define TABLA_A_CDC_TX7_VOL_CTL_CFG__POR (0x00000000)
573#define TABLA_A_CDC_TX8_VOL_CTL_CFG (0x0000025A)
574#define TABLA_A_CDC_TX8_VOL_CTL_CFG__POR (0x00000000)
575#define TABLA_A_CDC_TX9_VOL_CTL_CFG (0x00000262)
576#define TABLA_A_CDC_TX9_VOL_CTL_CFG__POR (0x00000000)
577#define TABLA_A_CDC_TX10_VOL_CTL_CFG (0x0000026A)
578#define TABLA_A_CDC_TX10_VOL_CTL_CFG__POR (0x00000000)
579#define TABLA_A_CDC_TX1_MUX_CTL (0x00000223)
580#define TABLA_A_CDC_TX1_MUX_CTL__POR (0x00000008)
581#define TABLA_A_CDC_TX2_MUX_CTL (0x0000022B)
582#define TABLA_A_CDC_TX2_MUX_CTL__POR (0x00000008)
583#define TABLA_A_CDC_TX3_MUX_CTL (0x00000233)
584#define TABLA_A_CDC_TX3_MUX_CTL__POR (0x00000008)
585#define TABLA_A_CDC_TX4_MUX_CTL (0x0000023B)
586#define TABLA_A_CDC_TX4_MUX_CTL__POR (0x00000008)
587#define TABLA_A_CDC_TX5_MUX_CTL (0x00000243)
588#define TABLA_A_CDC_TX5_MUX_CTL__POR (0x00000008)
589#define TABLA_A_CDC_TX6_MUX_CTL (0x0000024B)
590#define TABLA_A_CDC_TX6_MUX_CTL__POR (0x00000008)
591#define TABLA_A_CDC_TX7_MUX_CTL (0x00000253)
592#define TABLA_A_CDC_TX7_MUX_CTL__POR (0x00000008)
593#define TABLA_A_CDC_TX8_MUX_CTL (0x0000025B)
594#define TABLA_A_CDC_TX8_MUX_CTL__POR (0x00000008)
595#define TABLA_A_CDC_TX9_MUX_CTL (0x00000263)
596#define TABLA_A_CDC_TX9_MUX_CTL__POR (0x00000008)
597#define TABLA_A_CDC_TX10_MUX_CTL (0x0000026B)
598#define TABLA_A_CDC_TX10_MUX_CTL__POR (0x00000008)
599#define TABLA_A_CDC_TX1_CLK_FS_CTL (0x00000224)
600#define TABLA_A_CDC_TX1_CLK_FS_CTL__POR (0x00000003)
601#define TABLA_A_CDC_TX2_CLK_FS_CTL (0x0000022C)
602#define TABLA_A_CDC_TX2_CLK_FS_CTL__POR (0x00000003)
603#define TABLA_A_CDC_TX3_CLK_FS_CTL (0x00000234)
604#define TABLA_A_CDC_TX3_CLK_FS_CTL__POR (0x00000003)
605#define TABLA_A_CDC_TX4_CLK_FS_CTL (0x0000023C)
606#define TABLA_A_CDC_TX4_CLK_FS_CTL__POR (0x00000003)
607#define TABLA_A_CDC_TX5_CLK_FS_CTL (0x00000244)
608#define TABLA_A_CDC_TX5_CLK_FS_CTL__POR (0x00000003)
609#define TABLA_A_CDC_TX6_CLK_FS_CTL (0x0000024C)
610#define TABLA_A_CDC_TX6_CLK_FS_CTL__POR (0x00000003)
611#define TABLA_A_CDC_TX7_CLK_FS_CTL (0x00000254)
612#define TABLA_A_CDC_TX7_CLK_FS_CTL__POR (0x00000003)
613#define TABLA_A_CDC_TX8_CLK_FS_CTL (0x0000025C)
614#define TABLA_A_CDC_TX8_CLK_FS_CTL__POR (0x00000003)
615#define TABLA_A_CDC_TX9_CLK_FS_CTL (0x00000264)
616#define TABLA_A_CDC_TX9_CLK_FS_CTL__POR (0x00000003)
617#define TABLA_A_CDC_TX10_CLK_FS_CTL (0x0000026C)
618#define TABLA_A_CDC_TX10_CLK_FS_CTL__POR (0x00000003)
619#define TABLA_A_CDC_TX1_DMIC_CTL (0x00000225)
620#define TABLA_A_CDC_TX1_DMIC_CTL__POR (0x00000000)
621#define TABLA_A_CDC_TX2_DMIC_CTL (0x0000022D)
622#define TABLA_A_CDC_TX2_DMIC_CTL__POR (0x00000000)
623#define TABLA_A_CDC_TX3_DMIC_CTL (0x00000235)
624#define TABLA_A_CDC_TX3_DMIC_CTL__POR (0x00000000)
625#define TABLA_A_CDC_TX4_DMIC_CTL (0x0000023D)
626#define TABLA_A_CDC_TX4_DMIC_CTL__POR (0x00000000)
627#define TABLA_A_CDC_TX5_DMIC_CTL (0x00000245)
628#define TABLA_A_CDC_TX5_DMIC_CTL__POR (0x00000000)
629#define TABLA_A_CDC_TX6_DMIC_CTL (0x0000024D)
630#define TABLA_A_CDC_TX6_DMIC_CTL__POR (0x00000000)
631#define TABLA_A_CDC_TX7_DMIC_CTL (0x00000255)
632#define TABLA_A_CDC_TX7_DMIC_CTL__POR (0x00000000)
633#define TABLA_A_CDC_TX8_DMIC_CTL (0x0000025D)
634#define TABLA_A_CDC_TX8_DMIC_CTL__POR (0x00000000)
635#define TABLA_A_CDC_TX9_DMIC_CTL (0x00000265)
636#define TABLA_A_CDC_TX9_DMIC_CTL__POR (0x00000000)
637#define TABLA_A_CDC_TX10_DMIC_CTL (0x0000026D)
638#define TABLA_A_CDC_TX10_DMIC_CTL__POR (0x00000000)
639#define TABLA_A_CDC_SRC1_PDA_CFG (0x000002A0)
640#define TABLA_A_CDC_SRC1_PDA_CFG__POR (0x00000000)
641#define TABLA_A_CDC_SRC2_PDA_CFG (0x000002A8)
642#define TABLA_A_CDC_SRC2_PDA_CFG__POR (0x00000000)
643#define TABLA_A_CDC_SRC1_FS_CTL (0x000002A1)
644#define TABLA_A_CDC_SRC1_FS_CTL__POR (0x0000001b)
645#define TABLA_A_CDC_SRC2_FS_CTL (0x000002A9)
646#define TABLA_A_CDC_SRC2_FS_CTL__POR (0x0000001b)
647#define TABLA_A_CDC_RX1_B1_CTL (0x000002B0)
648#define TABLA_A_CDC_RX1_B1_CTL__POR (0x00000000)
649#define TABLA_A_CDC_RX2_B1_CTL (0x000002B8)
650#define TABLA_A_CDC_RX2_B1_CTL__POR (0x00000000)
651#define TABLA_A_CDC_RX3_B1_CTL (0x000002C0)
652#define TABLA_A_CDC_RX3_B1_CTL__POR (0x00000000)
653#define TABLA_A_CDC_RX4_B1_CTL (0x000002C8)
654#define TABLA_A_CDC_RX4_B1_CTL__POR (0x00000000)
655#define TABLA_A_CDC_RX5_B1_CTL (0x000002D0)
656#define TABLA_A_CDC_RX5_B1_CTL__POR (0x00000000)
657#define TABLA_A_CDC_RX6_B1_CTL (0x000002D8)
658#define TABLA_A_CDC_RX6_B1_CTL__POR (0x00000000)
659#define TABLA_A_CDC_RX7_B1_CTL (0x000002E0)
660#define TABLA_A_CDC_RX7_B1_CTL__POR (0x00000000)
661#define TABLA_A_CDC_RX1_B2_CTL (0x000002B1)
662#define TABLA_A_CDC_RX1_B2_CTL__POR (0x00000000)
663#define TABLA_A_CDC_RX2_B2_CTL (0x000002B9)
664#define TABLA_A_CDC_RX2_B2_CTL__POR (0x00000000)
665#define TABLA_A_CDC_RX3_B2_CTL (0x000002C1)
666#define TABLA_A_CDC_RX3_B2_CTL__POR (0x00000000)
667#define TABLA_A_CDC_RX4_B2_CTL (0x000002C9)
668#define TABLA_A_CDC_RX4_B2_CTL__POR (0x00000000)
669#define TABLA_A_CDC_RX5_B2_CTL (0x000002D1)
670#define TABLA_A_CDC_RX5_B2_CTL__POR (0x00000000)
671#define TABLA_A_CDC_RX6_B2_CTL (0x000002D9)
672#define TABLA_A_CDC_RX6_B2_CTL__POR (0x00000000)
673#define TABLA_A_CDC_RX7_B2_CTL (0x000002E1)
674#define TABLA_A_CDC_RX7_B2_CTL__POR (0x00000000)
675#define TABLA_A_CDC_RX1_B3_CTL (0x000002B2)
676#define TABLA_A_CDC_RX1_B3_CTL__POR (0x00000000)
677#define TABLA_A_CDC_RX2_B3_CTL (0x000002BA)
678#define TABLA_A_CDC_RX2_B3_CTL__POR (0x00000000)
679#define TABLA_A_CDC_RX3_B3_CTL (0x000002C2)
680#define TABLA_A_CDC_RX3_B3_CTL__POR (0x00000000)
681#define TABLA_A_CDC_RX4_B3_CTL (0x000002CA)
682#define TABLA_A_CDC_RX4_B3_CTL__POR (0x00000000)
683#define TABLA_A_CDC_RX5_B3_CTL (0x000002D2)
684#define TABLA_A_CDC_RX5_B3_CTL__POR (0x00000000)
685#define TABLA_A_CDC_RX6_B3_CTL (0x000002DA)
686#define TABLA_A_CDC_RX6_B3_CTL__POR (0x00000000)
687#define TABLA_A_CDC_RX7_B3_CTL (0x000002E2)
688#define TABLA_A_CDC_RX7_B3_CTL__POR (0x00000000)
689#define TABLA_A_CDC_RX1_B4_CTL (0x000002B3)
690#define TABLA_A_CDC_RX1_B4_CTL__POR (0x00000000)
691#define TABLA_A_CDC_RX2_B4_CTL (0x000002BB)
692#define TABLA_A_CDC_RX2_B4_CTL__POR (0x00000000)
693#define TABLA_A_CDC_RX3_B4_CTL (0x000002C3)
694#define TABLA_A_CDC_RX3_B4_CTL__POR (0x00000000)
695#define TABLA_A_CDC_RX4_B4_CTL (0x000002CB)
696#define TABLA_A_CDC_RX4_B4_CTL__POR (0x00000000)
697#define TABLA_A_CDC_RX5_B4_CTL (0x000002D3)
698#define TABLA_A_CDC_RX5_B4_CTL__POR (0x00000000)
699#define TABLA_A_CDC_RX6_B4_CTL (0x000002DB)
700#define TABLA_A_CDC_RX6_B4_CTL__POR (0x00000000)
701#define TABLA_A_CDC_RX7_B4_CTL (0x000002E3)
702#define TABLA_A_CDC_RX7_B4_CTL__POR (0x00000000)
703#define TABLA_A_CDC_RX1_B5_CTL (0x000002B4)
704#define TABLA_A_CDC_RX1_B5_CTL__POR (0x00000060)
705#define TABLA_A_CDC_RX2_B5_CTL (0x000002BC)
706#define TABLA_A_CDC_RX2_B5_CTL__POR (0x00000060)
707#define TABLA_A_CDC_RX3_B5_CTL (0x000002C4)
708#define TABLA_A_CDC_RX3_B5_CTL__POR (0x00000060)
709#define TABLA_A_CDC_RX4_B5_CTL (0x000002CC)
710#define TABLA_A_CDC_RX4_B5_CTL__POR (0x00000060)
711#define TABLA_A_CDC_RX5_B5_CTL (0x000002D4)
712#define TABLA_A_CDC_RX5_B5_CTL__POR (0x00000060)
713#define TABLA_A_CDC_RX6_B5_CTL (0x000002DC)
714#define TABLA_A_CDC_RX6_B5_CTL__POR (0x00000060)
715#define TABLA_A_CDC_RX7_B5_CTL (0x000002E4)
716#define TABLA_A_CDC_RX7_B5_CTL__POR (0x00000060)
717#define TABLA_A_CDC_RX1_B6_CTL (0x000002B5)
718#define TABLA_A_CDC_RX1_B6_CTL__POR (0x00000000)
719#define TABLA_A_CDC_RX2_B6_CTL (0x000002BD)
720#define TABLA_A_CDC_RX2_B6_CTL__POR (0x00000000)
721#define TABLA_A_CDC_RX3_B6_CTL (0x000002C5)
722#define TABLA_A_CDC_RX3_B6_CTL__POR (0x00000000)
723#define TABLA_A_CDC_RX4_B6_CTL (0x000002CD)
724#define TABLA_A_CDC_RX4_B6_CTL__POR (0x00000000)
725#define TABLA_A_CDC_RX5_B6_CTL (0x000002D5)
726#define TABLA_A_CDC_RX5_B6_CTL__POR (0x00000000)
727#define TABLA_A_CDC_RX6_B6_CTL (0x000002DD)
728#define TABLA_A_CDC_RX6_B6_CTL__POR (0x00000000)
729#define TABLA_A_CDC_RX7_B6_CTL (0x000002E5)
730#define TABLA_A_CDC_RX7_B6_CTL__POR (0x00000000)
731#define TABLA_A_CDC_RX1_VOL_CTL_B1_CTL (0x000002B6)
732#define TABLA_A_CDC_RX1_VOL_CTL_B1_CTL__POR (0x00000000)
733#define TABLA_A_CDC_RX2_VOL_CTL_B1_CTL (0x000002BE)
734#define TABLA_A_CDC_RX2_VOL_CTL_B1_CTL__POR (0x00000000)
735#define TABLA_A_CDC_RX3_VOL_CTL_B1_CTL (0x000002C6)
736#define TABLA_A_CDC_RX3_VOL_CTL_B1_CTL__POR (0x00000000)
737#define TABLA_A_CDC_RX4_VOL_CTL_B1_CTL (0x000002CE)
738#define TABLA_A_CDC_RX4_VOL_CTL_B1_CTL__POR (0x00000000)
739#define TABLA_A_CDC_RX5_VOL_CTL_B1_CTL (0x000002D6)
740#define TABLA_A_CDC_RX5_VOL_CTL_B1_CTL__POR (0x00000000)
741#define TABLA_A_CDC_RX6_VOL_CTL_B1_CTL (0x000002DE)
742#define TABLA_A_CDC_RX6_VOL_CTL_B1_CTL__POR (0x00000000)
743#define TABLA_A_CDC_RX7_VOL_CTL_B1_CTL (0x000002E6)
744#define TABLA_A_CDC_RX7_VOL_CTL_B1_CTL__POR (0x00000000)
745#define TABLA_A_CDC_RX1_VOL_CTL_B2_CTL (0x000002B7)
746#define TABLA_A_CDC_RX1_VOL_CTL_B2_CTL__POR (0x00000000)
747#define TABLA_A_CDC_RX2_VOL_CTL_B2_CTL (0x000002BF)
748#define TABLA_A_CDC_RX2_VOL_CTL_B2_CTL__POR (0x00000000)
749#define TABLA_A_CDC_RX3_VOL_CTL_B2_CTL (0x000002C7)
750#define TABLA_A_CDC_RX3_VOL_CTL_B2_CTL__POR (0x00000000)
751#define TABLA_A_CDC_RX4_VOL_CTL_B2_CTL (0x000002CF)
752#define TABLA_A_CDC_RX4_VOL_CTL_B2_CTL__POR (0x00000000)
753#define TABLA_A_CDC_RX5_VOL_CTL_B2_CTL (0x000002D7)
754#define TABLA_A_CDC_RX5_VOL_CTL_B2_CTL__POR (0x00000000)
755#define TABLA_A_CDC_RX6_VOL_CTL_B2_CTL (0x000002DF)
756#define TABLA_A_CDC_RX6_VOL_CTL_B2_CTL__POR (0x00000000)
757#define TABLA_A_CDC_RX7_VOL_CTL_B2_CTL (0x000002E7)
758#define TABLA_A_CDC_RX7_VOL_CTL_B2_CTL__POR (0x00000000)
Bradley Rubin229c6a52011-07-12 16:18:48 -0700759#define TABLA_A_CDC_CLK_ANC_RESET_CTL (0x00000300)
760#define TABLA_A_CDC_CLK_ANC_RESET_CTL__POR (0x00000000)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700761#define TABLA_A_CDC_CLK_RX_RESET_CTL (0x00000301)
762#define TABLA_A_CDC_CLK_RX_RESET_CTL__POR (0x00000000)
763#define TABLA_A_CDC_CLK_TX_RESET_B1_CTL (0x00000302)
764#define TABLA_A_CDC_CLK_TX_RESET_B1_CTL__POR (0x00000000)
765#define TABLA_A_CDC_CLK_TX_RESET_B2_CTL (0x00000303)
766#define TABLA_A_CDC_CLK_TX_RESET_B2_CTL__POR (0x00000000)
767#define TABLA_A_CDC_CLK_DMIC_CTL (0x00000304)
768#define TABLA_A_CDC_CLK_DMIC_CTL__POR (0x00000000)
769#define TABLA_A_CDC_CLK_RX_I2S_CTL (0x00000305)
770#define TABLA_A_CDC_CLK_RX_I2S_CTL__POR (0x00000003)
771#define TABLA_A_CDC_CLK_TX_I2S_CTL (0x00000306)
772#define TABLA_A_CDC_CLK_TX_I2S_CTL__POR (0x00000003)
773#define TABLA_A_CDC_CLK_OTHR_RESET_CTL (0x00000307)
774#define TABLA_A_CDC_CLK_OTHR_RESET_CTL__POR (0x00000000)
775#define TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL (0x00000308)
776#define TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL__POR (0x00000000)
777#define TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL (0x00000309)
778#define TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL__POR (0x00000000)
779#define TABLA_A_CDC_CLK_OTHR_CTL (0x0000030A)
780#define TABLA_A_CDC_CLK_OTHR_CTL__POR (0x00000000)
781#define TABLA_A_CDC_CLK_RDAC_CLK_EN_CTL (0x0000030B)
782#define TABLA_A_CDC_CLK_RDAC_CLK_EN_CTL__POR (0x00000000)
Bradley Rubin229c6a52011-07-12 16:18:48 -0700783#define TABLA_A_CDC_CLK_ANC_CLK_EN_CTL (0x0000030C)
784#define TABLA_A_CDC_CLK_ANC_CLK_EN_CTL__POR (0x00000000)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700785#define TABLA_A_CDC_CLK_RX_B1_CTL (0x0000030D)
786#define TABLA_A_CDC_CLK_RX_B1_CTL__POR (0x00000000)
787#define TABLA_A_CDC_CLK_RX_B2_CTL (0x0000030E)
788#define TABLA_A_CDC_CLK_RX_B2_CTL__POR (0x00000000)
789#define TABLA_A_CDC_CLK_MCLK_CTL (0x0000030F)
790#define TABLA_A_CDC_CLK_MCLK_CTL__POR (0x00000000)
791#define TABLA_A_CDC_CLK_PDM_CTL (0x00000310)
792#define TABLA_A_CDC_CLK_PDM_CTL__POR (0x00000000)
793#define TABLA_A_CDC_CLK_SD_CTL (0x00000311)
794#define TABLA_A_CDC_CLK_SD_CTL__POR (0x00000000)
795#define TABLA_A_CDC_CLSG_FREQ_THRESH_B1_CTL (0x00000320)
796#define TABLA_A_CDC_CLSG_FREQ_THRESH_B1_CTL__POR (0x00000007)
797#define TABLA_A_CDC_CLSG_FREQ_THRESH_B2_CTL (0x00000321)
798#define TABLA_A_CDC_CLSG_FREQ_THRESH_B2_CTL__POR (0x00000013)
799#define TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL (0x00000322)
800#define TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL__POR (0x00000053)
801#define TABLA_A_CDC_CLSG_FREQ_THRESH_B4_CTL (0x00000323)
802#define TABLA_A_CDC_CLSG_FREQ_THRESH_B4_CTL__POR (0x0000007f)
803#define TABLA_A_CDC_CLSG_GAIN_THRESH_CTL (0x00000324)
804#define TABLA_A_CDC_CLSG_GAIN_THRESH_CTL__POR (0x00000026)
805#define TABLA_A_CDC_CLSG_TIMER_B1_CFG (0x00000325)
806#define TABLA_A_CDC_CLSG_TIMER_B1_CFG__POR (0x0000000a)
807#define TABLA_A_CDC_CLSG_TIMER_B2_CFG (0x00000326)
808#define TABLA_A_CDC_CLSG_TIMER_B2_CFG__POR (0x00000000)
809#define TABLA_A_CDC_CLSG_CTL (0x00000327)
810#define TABLA_A_CDC_CLSG_CTL__POR (0x00000013)
811#define TABLA_A_CDC_IIR1_GAIN_B1_CTL (0x00000340)
812#define TABLA_A_CDC_IIR1_GAIN_B1_CTL__POR (0x00000000)
813#define TABLA_A_CDC_IIR2_GAIN_B1_CTL (0x00000350)
814#define TABLA_A_CDC_IIR2_GAIN_B1_CTL__POR (0x00000000)
815#define TABLA_A_CDC_IIR1_GAIN_B2_CTL (0x00000341)
816#define TABLA_A_CDC_IIR1_GAIN_B2_CTL__POR (0x00000000)
817#define TABLA_A_CDC_IIR2_GAIN_B2_CTL (0x00000351)
818#define TABLA_A_CDC_IIR2_GAIN_B2_CTL__POR (0x00000000)
819#define TABLA_A_CDC_IIR1_GAIN_B3_CTL (0x00000342)
820#define TABLA_A_CDC_IIR1_GAIN_B3_CTL__POR (0x00000000)
821#define TABLA_A_CDC_IIR2_GAIN_B3_CTL (0x00000352)
822#define TABLA_A_CDC_IIR2_GAIN_B3_CTL__POR (0x00000000)
823#define TABLA_A_CDC_IIR1_GAIN_B4_CTL (0x00000343)
824#define TABLA_A_CDC_IIR1_GAIN_B4_CTL__POR (0x00000000)
825#define TABLA_A_CDC_IIR2_GAIN_B4_CTL (0x00000353)
826#define TABLA_A_CDC_IIR2_GAIN_B4_CTL__POR (0x00000000)
827#define TABLA_A_CDC_IIR1_GAIN_B5_CTL (0x00000344)
828#define TABLA_A_CDC_IIR1_GAIN_B5_CTL__POR (0x00000000)
829#define TABLA_A_CDC_IIR2_GAIN_B5_CTL (0x00000354)
830#define TABLA_A_CDC_IIR2_GAIN_B5_CTL__POR (0x00000000)
831#define TABLA_A_CDC_IIR1_GAIN_B6_CTL (0x00000345)
832#define TABLA_A_CDC_IIR1_GAIN_B6_CTL__POR (0x00000000)
833#define TABLA_A_CDC_IIR2_GAIN_B6_CTL (0x00000355)
834#define TABLA_A_CDC_IIR2_GAIN_B6_CTL__POR (0x00000000)
835#define TABLA_A_CDC_IIR1_GAIN_B7_CTL (0x00000346)
836#define TABLA_A_CDC_IIR1_GAIN_B7_CTL__POR (0x00000000)
837#define TABLA_A_CDC_IIR2_GAIN_B7_CTL (0x00000356)
838#define TABLA_A_CDC_IIR2_GAIN_B7_CTL__POR (0x00000000)
839#define TABLA_A_CDC_IIR1_GAIN_B8_CTL (0x00000347)
840#define TABLA_A_CDC_IIR1_GAIN_B8_CTL__POR (0x00000000)
841#define TABLA_A_CDC_IIR2_GAIN_B8_CTL (0x00000357)
842#define TABLA_A_CDC_IIR2_GAIN_B8_CTL__POR (0x00000000)
843#define TABLA_A_CDC_IIR1_CTL (0x00000348)
844#define TABLA_A_CDC_IIR1_CTL__POR (0x00000000)
845#define TABLA_A_CDC_IIR2_CTL (0x00000358)
846#define TABLA_A_CDC_IIR2_CTL__POR (0x00000000)
847#define TABLA_A_CDC_IIR1_GAIN_TIMER_CTL (0x00000349)
848#define TABLA_A_CDC_IIR1_GAIN_TIMER_CTL__POR (0x00000000)
849#define TABLA_A_CDC_IIR2_GAIN_TIMER_CTL (0x00000359)
850#define TABLA_A_CDC_IIR2_GAIN_TIMER_CTL__POR (0x00000000)
851#define TABLA_A_CDC_IIR1_COEF_B1_CTL (0x0000034A)
852#define TABLA_A_CDC_IIR1_COEF_B1_CTL__POR (0x00000000)
853#define TABLA_A_CDC_IIR2_COEF_B1_CTL (0x0000035A)
854#define TABLA_A_CDC_IIR2_COEF_B1_CTL__POR (0x00000000)
855#define TABLA_A_CDC_IIR1_COEF_B2_CTL (0x0000034B)
856#define TABLA_A_CDC_IIR1_COEF_B2_CTL__POR (0x00000000)
857#define TABLA_A_CDC_IIR2_COEF_B2_CTL (0x0000035B)
858#define TABLA_A_CDC_IIR2_COEF_B2_CTL__POR (0x00000000)
859#define TABLA_A_CDC_IIR1_COEF_B3_CTL (0x0000034C)
860#define TABLA_A_CDC_IIR1_COEF_B3_CTL__POR (0x00000000)
861#define TABLA_A_CDC_IIR2_COEF_B3_CTL (0x0000035C)
862#define TABLA_A_CDC_IIR2_COEF_B3_CTL__POR (0x00000000)
863#define TABLA_A_CDC_IIR1_COEF_B4_CTL (0x0000034D)
864#define TABLA_A_CDC_IIR1_COEF_B4_CTL__POR (0x00000000)
865#define TABLA_A_CDC_IIR2_COEF_B4_CTL (0x0000035D)
866#define TABLA_A_CDC_IIR2_COEF_B4_CTL__POR (0x00000000)
867#define TABLA_A_CDC_IIR1_COEF_B5_CTL (0x0000034E)
868#define TABLA_A_CDC_IIR1_COEF_B5_CTL__POR (0x00000000)
869#define TABLA_A_CDC_IIR2_COEF_B5_CTL (0x0000035E)
870#define TABLA_A_CDC_IIR2_COEF_B5_CTL__POR (0x00000000)
871#define TABLA_A_CDC_TOP_GAIN_UPDATE (0x00000360)
872#define TABLA_A_CDC_TOP_GAIN_UPDATE__POR (0x00000000)
873#define TABLA_A_CDC_DEBUG_B1_CTL (0x00000368)
874#define TABLA_A_CDC_DEBUG_B1_CTL__POR (0x00000000)
875#define TABLA_A_CDC_DEBUG_B2_CTL (0x00000369)
876#define TABLA_A_CDC_DEBUG_B2_CTL__POR (0x00000000)
877#define TABLA_A_CDC_DEBUG_B3_CTL (0x0000036A)
878#define TABLA_A_CDC_DEBUG_B3_CTL__POR (0x00000000)
879#define TABLA_A_CDC_DEBUG_B4_CTL (0x0000036B)
880#define TABLA_A_CDC_DEBUG_B4_CTL__POR (0x00000000)
881#define TABLA_A_CDC_DEBUG_B5_CTL (0x0000036C)
882#define TABLA_A_CDC_DEBUG_B5_CTL__POR (0x00000000)
883#define TABLA_A_CDC_DEBUG_B6_CTL (0x0000036D)
884#define TABLA_A_CDC_DEBUG_B6_CTL__POR (0x00000000)
885#define TABLA_A_CDC_CONN_RX1_B1_CTL (0x00000380)
886#define TABLA_A_CDC_CONN_RX1_B1_CTL__POR (0x00000000)
887#define TABLA_A_CDC_CONN_RX1_B2_CTL (0x00000381)
888#define TABLA_A_CDC_CONN_RX1_B2_CTL__POR (0x00000000)
889#define TABLA_A_CDC_CONN_RX1_B3_CTL (0x00000382)
890#define TABLA_A_CDC_CONN_RX1_B3_CTL__POR (0x00000000)
891#define TABLA_A_CDC_CONN_RX2_B1_CTL (0x00000383)
892#define TABLA_A_CDC_CONN_RX2_B1_CTL__POR (0x00000000)
893#define TABLA_A_CDC_CONN_RX2_B2_CTL (0x00000384)
894#define TABLA_A_CDC_CONN_RX2_B2_CTL__POR (0x00000000)
895#define TABLA_A_CDC_CONN_RX2_B3_CTL (0x00000385)
896#define TABLA_A_CDC_CONN_RX2_B3_CTL__POR (0x00000000)
897#define TABLA_A_CDC_CONN_RX3_B1_CTL (0x00000386)
898#define TABLA_A_CDC_CONN_RX3_B1_CTL__POR (0x00000000)
899#define TABLA_A_CDC_CONN_RX3_B2_CTL (0x00000387)
900#define TABLA_A_CDC_CONN_RX3_B2_CTL__POR (0x00000000)
901#define TABLA_A_CDC_CONN_RX3_B3_CTL (0x00000388)
902#define TABLA_A_CDC_CONN_RX3_B3_CTL__POR (0x00000000)
903#define TABLA_A_CDC_CONN_RX4_B1_CTL (0x00000389)
904#define TABLA_A_CDC_CONN_RX4_B1_CTL__POR (0x00000000)
905#define TABLA_A_CDC_CONN_RX4_B2_CTL (0x0000038A)
906#define TABLA_A_CDC_CONN_RX4_B2_CTL__POR (0x00000000)
907#define TABLA_A_CDC_CONN_RX5_B1_CTL (0x0000038B)
908#define TABLA_A_CDC_CONN_RX5_B1_CTL__POR (0x00000000)
909#define TABLA_A_CDC_CONN_RX5_B2_CTL (0x0000038C)
910#define TABLA_A_CDC_CONN_RX5_B2_CTL__POR (0x00000000)
911#define TABLA_A_CDC_CONN_RX6_B1_CTL (0x0000038D)
912#define TABLA_A_CDC_CONN_RX6_B1_CTL__POR (0x00000000)
913#define TABLA_A_CDC_CONN_RX6_B2_CTL (0x0000038E)
914#define TABLA_A_CDC_CONN_RX6_B2_CTL__POR (0x00000000)
915#define TABLA_A_CDC_CONN_RX7_B1_CTL (0x0000038F)
916#define TABLA_A_CDC_CONN_RX7_B1_CTL__POR (0x00000000)
917#define TABLA_A_CDC_CONN_RX7_B2_CTL (0x00000390)
918#define TABLA_A_CDC_CONN_RX7_B2_CTL__POR (0x00000000)
Bradley Rubin229c6a52011-07-12 16:18:48 -0700919#define TABLA_A_CDC_CONN_ANC_B1_CTL (0x00000391)
920#define TABLA_A_CDC_CONN_ANC_B1_CTL__POR (0x00000000)
921#define TABLA_A_CDC_CONN_ANC_B2_CTL (0x00000392)
922#define TABLA_A_CDC_CONN_ANC_B2_CTL__POR (0x00000000)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700923#define TABLA_A_CDC_CONN_TX_B1_CTL (0x00000393)
924#define TABLA_A_CDC_CONN_TX_B1_CTL__POR (0x00000000)
925#define TABLA_A_CDC_CONN_TX_B2_CTL (0x00000394)
926#define TABLA_A_CDC_CONN_TX_B2_CTL__POR (0x00000000)
927#define TABLA_A_CDC_CONN_TX_B3_CTL (0x00000395)
928#define TABLA_A_CDC_CONN_TX_B3_CTL__POR (0x00000000)
929#define TABLA_A_CDC_CONN_TX_B4_CTL (0x00000396)
930#define TABLA_A_CDC_CONN_TX_B4_CTL__POR (0x00000000)
931#define TABLA_A_CDC_CONN_EQ1_B1_CTL (0x00000397)
932#define TABLA_A_CDC_CONN_EQ1_B1_CTL__POR (0x00000000)
933#define TABLA_A_CDC_CONN_EQ1_B2_CTL (0x00000398)
934#define TABLA_A_CDC_CONN_EQ1_B2_CTL__POR (0x00000000)
935#define TABLA_A_CDC_CONN_EQ1_B3_CTL (0x00000399)
936#define TABLA_A_CDC_CONN_EQ1_B3_CTL__POR (0x00000000)
937#define TABLA_A_CDC_CONN_EQ1_B4_CTL (0x0000039A)
938#define TABLA_A_CDC_CONN_EQ1_B4_CTL__POR (0x00000000)
939#define TABLA_A_CDC_CONN_EQ2_B1_CTL (0x0000039B)
940#define TABLA_A_CDC_CONN_EQ2_B1_CTL__POR (0x00000000)
941#define TABLA_A_CDC_CONN_EQ2_B2_CTL (0x0000039C)
942#define TABLA_A_CDC_CONN_EQ2_B2_CTL__POR (0x00000000)
943#define TABLA_A_CDC_CONN_EQ2_B3_CTL (0x0000039D)
944#define TABLA_A_CDC_CONN_EQ2_B3_CTL__POR (0x00000000)
945#define TABLA_A_CDC_CONN_EQ2_B4_CTL (0x0000039E)
946#define TABLA_A_CDC_CONN_EQ2_B4_CTL__POR (0x00000000)
947#define TABLA_A_CDC_CONN_SRC1_B1_CTL (0x0000039F)
948#define TABLA_A_CDC_CONN_SRC1_B1_CTL__POR (0x00000000)
949#define TABLA_A_CDC_CONN_SRC1_B2_CTL (0x000003A0)
950#define TABLA_A_CDC_CONN_SRC1_B2_CTL__POR (0x00000000)
951#define TABLA_A_CDC_CONN_SRC2_B1_CTL (0x000003A1)
952#define TABLA_A_CDC_CONN_SRC2_B1_CTL__POR (0x00000000)
953#define TABLA_A_CDC_CONN_SRC2_B2_CTL (0x000003A2)
954#define TABLA_A_CDC_CONN_SRC2_B2_CTL__POR (0x00000000)
955#define TABLA_A_CDC_CONN_TX_SB_B1_CTL (0x000003A3)
956#define TABLA_A_CDC_CONN_TX_SB_B1_CTL__POR (0x00000000)
957#define TABLA_A_CDC_CONN_TX_SB_B2_CTL (0x000003A4)
958#define TABLA_A_CDC_CONN_TX_SB_B2_CTL__POR (0x00000000)
959#define TABLA_A_CDC_CONN_TX_SB_B3_CTL (0x000003A5)
960#define TABLA_A_CDC_CONN_TX_SB_B3_CTL__POR (0x00000000)
961#define TABLA_A_CDC_CONN_TX_SB_B4_CTL (0x000003A6)
962#define TABLA_A_CDC_CONN_TX_SB_B4_CTL__POR (0x00000000)
963#define TABLA_A_CDC_CONN_TX_SB_B5_CTL (0x000003A7)
964#define TABLA_A_CDC_CONN_TX_SB_B5_CTL__POR (0x00000000)
965#define TABLA_A_CDC_CONN_TX_SB_B6_CTL (0x000003A8)
966#define TABLA_A_CDC_CONN_TX_SB_B6_CTL__POR (0x00000000)
967#define TABLA_A_CDC_CONN_TX_SB_B7_CTL (0x000003A9)
968#define TABLA_A_CDC_CONN_TX_SB_B7_CTL__POR (0x00000000)
969#define TABLA_A_CDC_CONN_TX_SB_B8_CTL (0x000003AA)
970#define TABLA_A_CDC_CONN_TX_SB_B8_CTL__POR (0x00000000)
971#define TABLA_A_CDC_CONN_TX_SB_B9_CTL (0x000003AB)
972#define TABLA_A_CDC_CONN_TX_SB_B9_CTL__POR (0x00000000)
973#define TABLA_A_CDC_CONN_TX_SB_B10_CTL (0x000003AC)
974#define TABLA_A_CDC_CONN_TX_SB_B10_CTL__POR (0x00000000)
975#define TABLA_A_CDC_CONN_TX_SB_B11_CTL (0x000003AD)
976#define TABLA_A_CDC_CONN_TX_SB_B11_CTL__POR (0x00000000)
977#define TABLA_A_CDC_CONN_RX_SB_B1_CTL (0x000003AE)
978#define TABLA_A_CDC_CONN_RX_SB_B1_CTL__POR (0x00000000)
979#define TABLA_A_CDC_CONN_RX_SB_B2_CTL (0x000003AF)
980#define TABLA_A_CDC_CONN_RX_SB_B2_CTL__POR (0x00000000)
981#define TABLA_A_CDC_CONN_CLSG_CTL (0x000003B0)
982#define TABLA_A_CDC_CONN_CLSG_CTL__POR (0x00000000)
983#define TABLA_A_CDC_CONN_SPARE (0x000003B1)
984#define TABLA_A_CDC_CONN_SPARE__POR (0x00000000)
985#define TABLA_A_CDC_MBHC_EN_CTL (0x000003C0)
986#define TABLA_A_CDC_MBHC_EN_CTL__POR (0x00000000)
987#define TABLA_A_CDC_MBHC_FEATURE_B1_CFG (0x000003C1)
988#define TABLA_A_CDC_MBHC_FEATURE_B1_CFG__POR (0x00000000)
989#define TABLA_A_CDC_MBHC_FEATURE_B2_CFG (0x000003C2)
990#define TABLA_A_CDC_MBHC_FEATURE_B2_CFG__POR (0x00000006)
991#define TABLA_A_CDC_MBHC_TIMER_B1_CTL (0x000003C3)
992#define TABLA_A_CDC_MBHC_TIMER_B1_CTL__POR (0x00000003)
993#define TABLA_A_CDC_MBHC_TIMER_B2_CTL (0x000003C4)
994#define TABLA_A_CDC_MBHC_TIMER_B2_CTL__POR (0x00000009)
995#define TABLA_A_CDC_MBHC_TIMER_B3_CTL (0x000003C5)
996#define TABLA_A_CDC_MBHC_TIMER_B3_CTL__POR (0x0000001e)
997#define TABLA_A_CDC_MBHC_TIMER_B4_CTL (0x000003C6)
998#define TABLA_A_CDC_MBHC_TIMER_B4_CTL__POR (0x00000045)
999#define TABLA_A_CDC_MBHC_TIMER_B5_CTL (0x000003C7)
1000#define TABLA_A_CDC_MBHC_TIMER_B5_CTL__POR (0x00000004)
1001#define TABLA_A_CDC_MBHC_TIMER_B6_CTL (0x000003C8)
1002#define TABLA_A_CDC_MBHC_TIMER_B6_CTL__POR (0x00000078)
1003#define TABLA_A_CDC_MBHC_B1_STATUS (0x000003C9)
1004#define TABLA_A_CDC_MBHC_B1_STATUS__POR (0x00000000)
1005#define TABLA_A_CDC_MBHC_B2_STATUS (0x000003CA)
1006#define TABLA_A_CDC_MBHC_B2_STATUS__POR (0x00000000)
1007#define TABLA_A_CDC_MBHC_B3_STATUS (0x000003CB)
1008#define TABLA_A_CDC_MBHC_B3_STATUS__POR (0x00000000)
1009#define TABLA_A_CDC_MBHC_B4_STATUS (0x000003CC)
1010#define TABLA_A_CDC_MBHC_B4_STATUS__POR (0x00000000)
1011#define TABLA_A_CDC_MBHC_B5_STATUS (0x000003CD)
1012#define TABLA_A_CDC_MBHC_B5_STATUS__POR (0x00000000)
1013#define TABLA_A_CDC_MBHC_B1_CTL (0x000003CE)
1014#define TABLA_A_CDC_MBHC_B1_CTL__POR (0x000000c0)
1015#define TABLA_A_CDC_MBHC_B2_CTL (0x000003CF)
1016#define TABLA_A_CDC_MBHC_B2_CTL__POR (0x0000005d)
1017#define TABLA_A_CDC_MBHC_VOLT_B1_CTL (0x000003D0)
1018#define TABLA_A_CDC_MBHC_VOLT_B1_CTL__POR (0x00000000)
1019#define TABLA_A_CDC_MBHC_VOLT_B2_CTL (0x000003D1)
1020#define TABLA_A_CDC_MBHC_VOLT_B2_CTL__POR (0x00000000)
1021#define TABLA_A_CDC_MBHC_VOLT_B3_CTL (0x000003D2)
1022#define TABLA_A_CDC_MBHC_VOLT_B3_CTL__POR (0x00000000)
1023#define TABLA_A_CDC_MBHC_VOLT_B4_CTL (0x000003D3)
1024#define TABLA_A_CDC_MBHC_VOLT_B4_CTL__POR (0x00000000)
1025#define TABLA_A_CDC_MBHC_VOLT_B5_CTL (0x000003D4)
1026#define TABLA_A_CDC_MBHC_VOLT_B5_CTL__POR (0x00000000)
1027#define TABLA_A_CDC_MBHC_VOLT_B6_CTL (0x000003D5)
1028#define TABLA_A_CDC_MBHC_VOLT_B6_CTL__POR (0x00000000)
1029#define TABLA_A_CDC_MBHC_VOLT_B7_CTL (0x000003D6)
1030#define TABLA_A_CDC_MBHC_VOLT_B7_CTL__POR (0x000000ff)
1031#define TABLA_A_CDC_MBHC_VOLT_B8_CTL (0x000003D7)
1032#define TABLA_A_CDC_MBHC_VOLT_B8_CTL__POR (0x00000007)
1033#define TABLA_A_CDC_MBHC_VOLT_B9_CTL (0x000003D8)
1034#define TABLA_A_CDC_MBHC_VOLT_B9_CTL__POR (0x000000ff)
1035#define TABLA_A_CDC_MBHC_VOLT_B10_CTL (0x000003D9)
1036#define TABLA_A_CDC_MBHC_VOLT_B10_CTL__POR (0x0000007f)
1037#define TABLA_A_CDC_MBHC_VOLT_B11_CTL (0x000003DA)
1038#define TABLA_A_CDC_MBHC_VOLT_B11_CTL__POR (0x00000000)
1039#define TABLA_A_CDC_MBHC_VOLT_B12_CTL (0x000003DB)
1040#define TABLA_A_CDC_MBHC_VOLT_B12_CTL__POR (0x00000080)
1041#define TABLA_A_CDC_MBHC_CLK_CTL (0x000003DC)
1042#define TABLA_A_CDC_MBHC_CLK_CTL__POR (0x00000000)
1043#define TABLA_A_CDC_MBHC_INT_CTL (0x000003DD)
1044#define TABLA_A_CDC_MBHC_INT_CTL__POR (0x00000000)
1045#define TABLA_A_CDC_MBHC_DEBUG_CTL (0x000003DE)
1046#define TABLA_A_CDC_MBHC_DEBUG_CTL__POR (0x00000000)
1047#define TABLA_A_CDC_MBHC_SPARE (0x000003DF)
1048#define TABLA_A_CDC_MBHC_SPARE__POR (0x00000000)
1049
1050
1051/* SLIMBUS Slave Registers */
1052#define TABLA_SLIM_PGD_PORT_INT_EN0 (0x30)
1053#define TABLA_SLIM_PGD_PORT_INT_STATUS0 (0x34)
1054#define TABLA_SLIM_PGD_PORT_INT_CLR0 (0x38)
1055#define TABLA_SLIM_PGD_PORT_INT_SOURCE0 (0x60)
1056
Bradley Rubin229c6a52011-07-12 16:18:48 -07001057/* Macros for Packing Register Writes into a U32 */
1058#define TABLA_PACKED_REG_SIZE sizeof(u32)
1059
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001060#define TABLA_CODEC_PACK_ENTRY(reg, mask, val) ((val & 0xff)|\
1061 ((mask & 0xff) << 8)|((reg & 0xffff) << 16))
Bradley Rubin229c6a52011-07-12 16:18:48 -07001062
1063#define TABLA_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
1064 do { \
1065 ((reg) = ((packed >> 16) & (0xffff))); \
1066 ((mask) = ((packed >> 8) & (0xff))); \
1067 ((val) = ((packed) & (0xff))); \
1068 } while (0);
1069
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001070#endif