blob: 0624fb8edffb43f2aa9c25210f7b47fd073f2073 [file] [log] [blame]
Dinh Nguyenf9e9fc22011-03-28 10:14:57 -05001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11#include <linux/suspend.h>
12#include <linux/clk.h>
13#include <linux/io.h>
14#include <linux/err.h>
15#include <asm/cacheflush.h>
16#include <asm/tlbflush.h>
Shawn Guo41e7daf2011-09-28 17:16:06 +080017#include <mach/common.h>
18#include <mach/hardware.h>
Dinh Nguyenf9e9fc22011-03-28 10:14:57 -050019#include "crm_regs.h"
20
21static struct clk *gpc_dvfs_clk;
22
23static int mx5_suspend_enter(suspend_state_t state)
24{
25 clk_enable(gpc_dvfs_clk);
26 switch (state) {
27 case PM_SUSPEND_MEM:
28 mx5_cpu_lp_set(STOP_POWER_OFF);
29 break;
30 case PM_SUSPEND_STANDBY:
31 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
32 break;
33 default:
34 return -EINVAL;
35 }
36
37 if (state == PM_SUSPEND_MEM) {
38 local_flush_tlb_all();
39 flush_cache_all();
40
41 /*clear the EMPGC0/1 bits */
42 __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR);
43 __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
44 }
45 cpu_do_idle();
46 clk_disable(gpc_dvfs_clk);
47
48 return 0;
49}
50
51static int mx5_pm_valid(suspend_state_t state)
52{
53 return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX);
54}
55
56static const struct platform_suspend_ops mx5_suspend_ops = {
57 .valid = mx5_pm_valid,
58 .enter = mx5_suspend_enter,
59};
60
61static int __init mx5_pm_init(void)
62{
63 if (gpc_dvfs_clk == NULL)
64 gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
65
66 if (!IS_ERR(gpc_dvfs_clk)) {
67 if (cpu_is_mx51())
68 suspend_set_ops(&mx5_suspend_ops);
69 } else
70 return -EPERM;
71
72 return 0;
73}
74device_initcall(mx5_pm_init);