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Nagamalleswararao Ganji70fac1e2011-12-29 19:06:37 -08001/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Marc Zyngier89bdafd12011-12-22 11:39:20 +053056#include <asm/hardware/gic.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080059#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#include <mach/irqs.h>
61#include <mach/msm_spi.h>
62#include <mach/msm_serial_hs.h>
63#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080064#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070065#include <mach/msm_memtypes.h>
66#include <asm/mach/mmc.h>
67#include <mach/msm_battery.h>
68#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070069#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#ifdef CONFIG_MSM_DSPS
71#include <mach/msm_dsps.h>
72#endif
73#include <mach/msm_xo.h>
74#include <mach/msm_bus_board.h>
75#include <mach/socinfo.h>
76#include <linux/i2c/isl9519.h>
77#ifdef CONFIG_USB_G_ANDROID
78#include <linux/usb/android.h>
79#include <mach/usbdiag.h>
80#endif
81#include <linux/regulator/consumer.h>
82#include <linux/regulator/machine.h>
83#include <mach/sdio_al.h>
84#include <mach/rpm.h>
85#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070086#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053087#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070089#include "devices.h"
90#include "devices-msm8x60.h"
Abhijeet Dharmapurikarefaca4f2011-12-27 16:24:07 -080091#include <mach/cpuidle.h>
92#include <mach/pm.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070093#include "mpm.h"
94#include "spm.h"
95#include "rpm_log.h"
96#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097#include "gpiomux-8x60.h"
98#include "rpm_stats.h"
99#include "peripheral-loader.h"
100#include <linux/platform_data/qcom_crypto_device.h>
101#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700102#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600103#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700104
105#include <linux/ion.h>
106#include <mach/ion.h>
107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109#define MDM2AP_SYNC 129
110
Terence Hampson1c73fef2011-07-19 17:10:49 -0400111#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700112#define LCDC_SPI_GPIO_CLK 73
113#define LCDC_SPI_GPIO_CS 72
114#define LCDC_SPI_GPIO_MOSI 70
115#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
116#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
117#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
118#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
119#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400120#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700122#define PANEL_NAME_MAX_LEN 30
123#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
124#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
125#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
126#define HDMI_PANEL_NAME "hdmi_msm"
127#define TVOUT_PANEL_NAME "tvout_msm"
128
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700129#define DSPS_PIL_GENERIC_NAME "dsps"
130#define DSPS_PIL_FLUID_NAME "dsps_fluid"
131
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800132#ifdef CONFIG_ION_MSM
133static struct platform_device ion_dev;
134#endif
135
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700136enum {
137 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530138 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700139 /* CORE expander */
140 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
141 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
142 GPIO_WLAN_DEEP_SLEEP_N,
143 GPIO_LVDS_SHUTDOWN_N,
144 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
145 GPIO_MS_SYS_RESET_N,
146 GPIO_CAP_TS_RESOUT_N,
147 GPIO_CAP_GAUGE_BI_TOUT,
148 GPIO_ETHERNET_PME,
149 GPIO_EXT_GPS_LNA_EN,
150 GPIO_MSM_WAKES_BT,
151 GPIO_ETHERNET_RESET_N,
152 GPIO_HEADSET_DET_N,
153 GPIO_USB_UICC_EN,
154 GPIO_BACKLIGHT_EN,
155 GPIO_EXT_CAMIF_PWR_EN,
156 GPIO_BATT_GAUGE_INT_N,
157 GPIO_BATT_GAUGE_EN,
158 /* DOCKING expander */
159 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
160 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
161 GPIO_AUX_JTAG_DET_N,
162 GPIO_DONGLE_DET_N,
163 GPIO_SVIDEO_LOAD_DET,
164 GPIO_SVID_AMP_SHUTDOWN1_N,
165 GPIO_SVID_AMP_SHUTDOWN0_N,
166 GPIO_SDC_WP,
167 GPIO_IRDA_PWDN,
168 GPIO_IRDA_RESET_N,
169 GPIO_DONGLE_GPIO0,
170 GPIO_DONGLE_GPIO1,
171 GPIO_DONGLE_GPIO2,
172 GPIO_DONGLE_GPIO3,
173 GPIO_DONGLE_PWR_EN,
174 GPIO_EMMC_RESET_N,
175 GPIO_TP_EXP2_IO15,
176 /* SURF expander */
177 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
178 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
179 GPIO_SD_CARD_DET_2,
180 GPIO_SD_CARD_DET_4,
181 GPIO_SD_CARD_DET_5,
182 GPIO_UIM3_RST,
183 GPIO_SURF_EXPANDER_IO5,
184 GPIO_SURF_EXPANDER_IO6,
185 GPIO_ADC_I2C_EN,
186 GPIO_SURF_EXPANDER_IO8,
187 GPIO_SURF_EXPANDER_IO9,
188 GPIO_SURF_EXPANDER_IO10,
189 GPIO_SURF_EXPANDER_IO11,
190 GPIO_SURF_EXPANDER_IO12,
191 GPIO_SURF_EXPANDER_IO13,
192 GPIO_SURF_EXPANDER_IO14,
193 GPIO_SURF_EXPANDER_IO15,
194 /* LEFT KB IO expander */
195 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
196 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
197 GPIO_LEFT_LED_2,
198 GPIO_LEFT_LED_3,
199 GPIO_LEFT_LED_WLAN,
200 GPIO_JOYSTICK_EN,
201 GPIO_CAP_TS_SLEEP,
202 GPIO_LEFT_KB_IO6,
203 GPIO_LEFT_LED_5,
204 /* RIGHT KB IO expander */
205 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
206 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
207 GPIO_RIGHT_LED_2,
208 GPIO_RIGHT_LED_3,
209 GPIO_RIGHT_LED_BT,
210 GPIO_WEB_CAMIF_STANDBY,
211 GPIO_COMPASS_RST_N,
212 GPIO_WEB_CAMIF_RESET_N,
213 GPIO_RIGHT_LED_5,
214 GPIO_R_ALTIMETER_RESET_N,
215 /* FLUID S IO expander */
216 GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
218 GPIO_MIC1_ANCL_SEL,
219 GPIO_HS_MIC4_SEL,
220 GPIO_FML_MIC3_SEL,
221 GPIO_FMR_MIC5_SEL,
222 GPIO_TS_SLEEP,
223 GPIO_HAP_SHIFT_LVL_OE,
224 GPIO_HS_SW_DIR,
225 /* FLUID N IO expander */
226 GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
228 GPIO_EPM_5V_BOOST_EN,
229 GPIO_AUX_CAM_2P7_EN,
230 GPIO_LED_FLASH_EN,
231 GPIO_LED1_GREEN_N,
232 GPIO_LED2_RED_N,
233 GPIO_FRONT_CAM_RESET_N,
234 GPIO_EPM_LVLSFT_EN,
235 GPIO_N_ALTIMETER_RESET_N,
236 /* EPM expander */
237 GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
239 GPIO_PWR_MON_RESET_N,
240 GPIO_ADC1_PWDN_N,
241 GPIO_ADC2_PWDN_N,
242 GPIO_EPM_EXPANDER_IO4,
243 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
244 GPIO_ADC2_MUX_SPI_INT_N,
245 GPIO_EPM_EXPANDER_IO7,
246 GPIO_PWR_MON_ENABLE,
247 GPIO_EPM_SPI_ADC1_CS_N,
248 GPIO_EPM_SPI_ADC2_CS_N,
249 GPIO_EPM_EXPANDER_IO11,
250 GPIO_EPM_EXPANDER_IO12,
251 GPIO_EPM_EXPANDER_IO13,
252 GPIO_EPM_EXPANDER_IO14,
253 GPIO_EPM_EXPANDER_IO15,
254};
255
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530256struct pm8xxx_mpp_init_info {
257 unsigned mpp;
258 struct pm8xxx_mpp_config_data config;
259};
260
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530261#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530262{ \
263 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
264 .config = { \
265 .type = PM8XXX_MPP_TYPE_##_type, \
266 .level = _level, \
267 .control = PM8XXX_MPP_##_control, \
268 } \
269}
270
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530271#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
272{ \
273 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
274 .config = { \
275 .type = PM8XXX_MPP_TYPE_##_type, \
276 .level = _level, \
277 .control = PM8XXX_MPP_##_control, \
278 } \
279}
280
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700281/*
282 * The UI_INTx_N lines are pmic gpio lines which connect i2c
283 * gpio expanders to the pm8058.
284 */
285#define UI_INT1_N 25
286#define UI_INT2_N 34
287#define UI_INT3_N 14
288/*
289FM GPIO is GPIO 18 on PMIC 8058.
290As the index starts from 0 in the PMIC driver, and hence 17
291corresponds to GPIO 18 on PMIC 8058.
292*/
293#define FM_GPIO 17
294
295#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
296static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
297static void *sdc2_status_notify_cb_devid;
298#endif
299
300#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
301static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
302static void *sdc5_status_notify_cb_devid;
303#endif
304
305static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
306 [0] = {
307 .reg_base_addr = MSM_SAW0_BASE,
308
309#ifdef CONFIG_MSM_AVS_HW
310 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
311#endif
312 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
315 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
316
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
319 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
320
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
322 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
323 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
324
325 .awake_vlevel = 0x94,
326 .retention_vlevel = 0x81,
327 .collapse_vlevel = 0x20,
328 .retention_mid_vlevel = 0x94,
329 .collapse_mid_vlevel = 0x8C,
330
331 .vctl_timeout_us = 50,
332 },
333
334 [1] = {
335 .reg_base_addr = MSM_SAW1_BASE,
336
337#ifdef CONFIG_MSM_AVS_HW
338 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
339#endif
340 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
343 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
344
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
347 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
348
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
350 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
351 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
352
353 .awake_vlevel = 0x94,
354 .retention_vlevel = 0x81,
355 .collapse_vlevel = 0x20,
356 .retention_mid_vlevel = 0x94,
357 .collapse_mid_vlevel = 0x8C,
358
359 .vctl_timeout_us = 50,
360 },
361};
362
363static struct msm_spm_platform_data msm_spm_data[] __initdata = {
364 [0] = {
365 .reg_base_addr = MSM_SAW0_BASE,
366
367#ifdef CONFIG_MSM_AVS_HW
368 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
369#endif
370 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
373 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
374
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
377 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
378
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
380 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
381 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
382
383 .awake_vlevel = 0xA0,
384 .retention_vlevel = 0x89,
385 .collapse_vlevel = 0x20,
386 .retention_mid_vlevel = 0x89,
387 .collapse_mid_vlevel = 0x89,
388
389 .vctl_timeout_us = 50,
390 },
391
392 [1] = {
393 .reg_base_addr = MSM_SAW1_BASE,
394
395#ifdef CONFIG_MSM_AVS_HW
396 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
397#endif
398 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
401 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
402
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
405 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
406
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
408 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
409 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
410
411 .awake_vlevel = 0xA0,
412 .retention_vlevel = 0x89,
413 .collapse_vlevel = 0x20,
414 .retention_mid_vlevel = 0x89,
415 .collapse_mid_vlevel = 0x89,
416
417 .vctl_timeout_us = 50,
418 },
419};
420
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700421/*
422 * Consumer specific regulator names:
423 * regulator name consumer dev_name
424 */
425static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
426 REGULATOR_SUPPLY("8901_s0", NULL),
427};
428static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
429 REGULATOR_SUPPLY("8901_s1", NULL),
430};
431
432static struct regulator_init_data saw_s0_init_data = {
433 .constraints = {
434 .name = "8901_s0",
435 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700436 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700437 .max_uV = 1250000,
438 },
439 .consumer_supplies = vreg_consumers_8901_S0,
440 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
441};
442
443static struct regulator_init_data saw_s1_init_data = {
444 .constraints = {
445 .name = "8901_s1",
446 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700447 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700448 .max_uV = 1250000,
449 },
450 .consumer_supplies = vreg_consumers_8901_S1,
451 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
452};
453
454static struct platform_device msm_device_saw_s0 = {
455 .name = "saw-regulator",
456 .id = 0,
457 .dev = {
458 .platform_data = &saw_s0_init_data,
459 },
460};
461
462static struct platform_device msm_device_saw_s1 = {
463 .name = "saw-regulator",
464 .id = 1,
465 .dev = {
466 .platform_data = &saw_s1_init_data,
467 },
468};
469
470/*
471 * The smc91x configuration varies depending on platform.
472 * The resources data structure is filled in at runtime.
473 */
474static struct resource smc91x_resources[] = {
475 [0] = {
476 .flags = IORESOURCE_MEM,
477 },
478 [1] = {
479 .flags = IORESOURCE_IRQ,
480 },
481};
482
483static struct platform_device smc91x_device = {
484 .name = "smc91x",
485 .id = 0,
486 .num_resources = ARRAY_SIZE(smc91x_resources),
487 .resource = smc91x_resources,
488};
489
490static struct resource smsc911x_resources[] = {
491 [0] = {
492 .flags = IORESOURCE_MEM,
493 .start = 0x1b800000,
494 .end = 0x1b8000ff
495 },
496 [1] = {
497 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
498 },
499};
500
501static struct smsc911x_platform_config smsc911x_config = {
502 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
503 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
504 .flags = SMSC911X_USE_16BIT,
505 .has_reset_gpio = 1,
506 .reset_gpio = GPIO_ETHERNET_RESET_N
507};
508
509static struct platform_device smsc911x_device = {
510 .name = "smsc911x",
511 .id = 0,
512 .num_resources = ARRAY_SIZE(smsc911x_resources),
513 .resource = smsc911x_resources,
514 .dev = {
515 .platform_data = &smsc911x_config
516 }
517};
518
519#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
520 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
522 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
523
524#define QCE_SIZE 0x10000
525#define QCE_0_BASE 0x18500000
526
527#define QCE_HW_KEY_SUPPORT 0
528#define QCE_SHA_HMAC_SUPPORT 0
529#define QCE_SHARE_CE_RESOURCE 2
530#define QCE_CE_SHARED 1
531
532static struct resource qcrypto_resources[] = {
533 [0] = {
534 .start = QCE_0_BASE,
535 .end = QCE_0_BASE + QCE_SIZE - 1,
536 .flags = IORESOURCE_MEM,
537 },
538 [1] = {
539 .name = "crypto_channels",
540 .start = DMOV_CE_IN_CHAN,
541 .end = DMOV_CE_OUT_CHAN,
542 .flags = IORESOURCE_DMA,
543 },
544 [2] = {
545 .name = "crypto_crci_in",
546 .start = DMOV_CE_IN_CRCI,
547 .end = DMOV_CE_IN_CRCI,
548 .flags = IORESOURCE_DMA,
549 },
550 [3] = {
551 .name = "crypto_crci_out",
552 .start = DMOV_CE_OUT_CRCI,
553 .end = DMOV_CE_OUT_CRCI,
554 .flags = IORESOURCE_DMA,
555 },
556 [4] = {
557 .name = "crypto_crci_hash",
558 .start = DMOV_CE_HASH_CRCI,
559 .end = DMOV_CE_HASH_CRCI,
560 .flags = IORESOURCE_DMA,
561 },
562};
563
564static struct resource qcedev_resources[] = {
565 [0] = {
566 .start = QCE_0_BASE,
567 .end = QCE_0_BASE + QCE_SIZE - 1,
568 .flags = IORESOURCE_MEM,
569 },
570 [1] = {
571 .name = "crypto_channels",
572 .start = DMOV_CE_IN_CHAN,
573 .end = DMOV_CE_OUT_CHAN,
574 .flags = IORESOURCE_DMA,
575 },
576 [2] = {
577 .name = "crypto_crci_in",
578 .start = DMOV_CE_IN_CRCI,
579 .end = DMOV_CE_IN_CRCI,
580 .flags = IORESOURCE_DMA,
581 },
582 [3] = {
583 .name = "crypto_crci_out",
584 .start = DMOV_CE_OUT_CRCI,
585 .end = DMOV_CE_OUT_CRCI,
586 .flags = IORESOURCE_DMA,
587 },
588 [4] = {
589 .name = "crypto_crci_hash",
590 .start = DMOV_CE_HASH_CRCI,
591 .end = DMOV_CE_HASH_CRCI,
592 .flags = IORESOURCE_DMA,
593 },
594};
595
596#endif
597
598#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
599 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
600
601static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
602 .ce_shared = QCE_CE_SHARED,
603 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
604 .hw_key_support = QCE_HW_KEY_SUPPORT,
605 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800606 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700607};
608
609static struct platform_device qcrypto_device = {
610 .name = "qcrypto",
611 .id = 0,
612 .num_resources = ARRAY_SIZE(qcrypto_resources),
613 .resource = qcrypto_resources,
614 .dev = {
615 .coherent_dma_mask = DMA_BIT_MASK(32),
616 .platform_data = &qcrypto_ce_hw_suppport,
617 },
618};
619#endif
620
621#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
622 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
623
624static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
625 .ce_shared = QCE_CE_SHARED,
626 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
627 .hw_key_support = QCE_HW_KEY_SUPPORT,
628 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800629 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700630};
631
632static struct platform_device qcedev_device = {
633 .name = "qce",
634 .id = 0,
635 .num_resources = ARRAY_SIZE(qcedev_resources),
636 .resource = qcedev_resources,
637 .dev = {
638 .coherent_dma_mask = DMA_BIT_MASK(32),
639 .platform_data = &qcedev_ce_hw_suppport,
640 },
641};
642#endif
643
644#if defined(CONFIG_HAPTIC_ISA1200) || \
645 defined(CONFIG_HAPTIC_ISA1200_MODULE)
646
647static const char *vregs_isa1200_name[] = {
648 "8058_s3",
649 "8901_l4",
650};
651
652static const int vregs_isa1200_val[] = {
653 1800000,/* uV */
654 2600000,
655};
656static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
657static struct msm_xo_voter *xo_handle_a1;
658
659static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800660{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700661 int i, rc = 0;
662
663 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
664 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
665 regulator_disable(vregs_isa1200[i]);
666 if (rc < 0) {
667 pr_err("%s: vreg %s %s failed (%d)\n",
668 __func__, vregs_isa1200_name[i],
669 vreg_on ? "enable" : "disable", rc);
670 goto vreg_fail;
671 }
672 }
673
674 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
675 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
676 if (rc < 0) {
677 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
678 __func__, vreg_on ? "" : "de-", rc);
679 goto vreg_fail;
680 }
681 return 0;
682
683vreg_fail:
684 while (i--)
685 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
686 regulator_disable(vregs_isa1200[i]);
687 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800688}
689
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700690static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800691{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700692 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800693
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700694 if (enable == true) {
695 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
696 vregs_isa1200[i] = regulator_get(NULL,
697 vregs_isa1200_name[i]);
698 if (IS_ERR(vregs_isa1200[i])) {
699 pr_err("%s: regulator get of %s failed (%ld)\n",
700 __func__, vregs_isa1200_name[i],
701 PTR_ERR(vregs_isa1200[i]));
702 rc = PTR_ERR(vregs_isa1200[i]);
703 goto vreg_get_fail;
704 }
705 rc = regulator_set_voltage(vregs_isa1200[i],
706 vregs_isa1200_val[i], vregs_isa1200_val[i]);
707 if (rc) {
708 pr_err("%s: regulator_set_voltage(%s) failed\n",
709 __func__, vregs_isa1200_name[i]);
710 goto vreg_get_fail;
711 }
712 }
Steve Muckle9161d302010-02-11 11:50:40 -0800713
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700714 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
715 if (rc) {
716 pr_err("%s: unable to request gpio %d (%d)\n",
717 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
718 goto vreg_get_fail;
719 }
Steve Muckle9161d302010-02-11 11:50:40 -0800720
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700721 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
722 if (rc) {
723 pr_err("%s: Unable to set direction\n", __func__);;
724 goto free_gpio;
725 }
726
727 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
728 if (IS_ERR(xo_handle_a1)) {
729 rc = PTR_ERR(xo_handle_a1);
730 pr_err("%s: failed to get the handle for A1(%d)\n",
731 __func__, rc);
732 goto gpio_set_dir;
733 }
734 } else {
735 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
736 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
737
738 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
739 regulator_put(vregs_isa1200[i]);
740
741 msm_xo_put(xo_handle_a1);
742 }
743
744 return 0;
745gpio_set_dir:
746 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
747free_gpio:
748 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
749vreg_get_fail:
750 while (i)
751 regulator_put(vregs_isa1200[--i]);
752 return rc;
753}
754
755#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530756#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700757static struct isa1200_platform_data isa1200_1_pdata = {
758 .name = "vibrator",
759 .power_on = isa1200_power,
760 .dev_setup = isa1200_dev_setup,
761 /*gpio to enable haptic*/
762 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530763 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700764 .max_timeout = 15000,
765 .mode_ctrl = PWM_GEN_MODE,
766 .pwm_fd = {
767 .pwm_div = 256,
768 },
769 .is_erm = false,
770 .smart_en = true,
771 .ext_clk_en = true,
772 .chip_en = 1,
773};
774
775static struct i2c_board_info msm_isa1200_board_info[] = {
776 {
777 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
778 .platform_data = &isa1200_1_pdata,
779 },
780};
781#endif
782
783#if defined(CONFIG_BATTERY_BQ27520) || \
784 defined(CONFIG_BATTERY_BQ27520_MODULE)
785static struct bq27520_platform_data bq27520_pdata = {
786 .name = "fuel-gauge",
787 .vreg_name = "8058_s3",
788 .vreg_value = 1800000,
789 .soc_int = GPIO_BATT_GAUGE_INT_N,
790 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
791 .chip_en = GPIO_BATT_GAUGE_EN,
792 .enable_dlog = 0, /* if enable coulomb counter logger */
793};
794
795static struct i2c_board_info msm_bq27520_board_info[] = {
796 {
797 I2C_BOARD_INFO("bq27520", 0xaa>>1),
798 .platform_data = &bq27520_pdata,
799 },
800};
801#endif
802
803static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
804 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
805 .idle_supported = 1,
806 .suspend_supported = 1,
807 .idle_enabled = 0,
808 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700809 },
810
811 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
812 .idle_supported = 1,
813 .suspend_supported = 1,
814 .idle_enabled = 0,
815 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700816 },
817
818 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
819 .idle_supported = 1,
820 .suspend_supported = 1,
821 .idle_enabled = 1,
822 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700823 },
824
825 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
826 .idle_supported = 1,
827 .suspend_supported = 1,
828 .idle_enabled = 0,
829 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700830 },
831
832 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
833 .idle_supported = 1,
834 .suspend_supported = 1,
835 .idle_enabled = 0,
836 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700837 },
838
839 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
840 .idle_supported = 1,
841 .suspend_supported = 1,
842 .idle_enabled = 1,
843 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700844 },
845};
846
847static struct msm_cpuidle_state msm_cstates[] __initdata = {
848 {0, 0, "C0", "WFI",
849 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
850
851 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
852 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
853
854 {0, 2, "C2", "POWER_COLLAPSE",
855 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
856
857 {1, 0, "C0", "WFI",
858 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
859
860 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
861 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
862};
863
864static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
865 {
866 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
867 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
868 true,
869 1, 8000, 100000, 1,
870 },
871
872 {
873 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
874 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
875 true,
876 1500, 5000, 60100000, 3000,
877 },
878
879 {
880 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
881 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
882 false,
883 1800, 5000, 60350000, 3500,
884 },
885 {
886 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
887 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
888 false,
889 3800, 4500, 65350000, 5500,
890 },
891
892 {
893 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
894 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
895 false,
896 2800, 2500, 66850000, 4800,
897 },
898
899 {
900 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
901 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
902 false,
903 4800, 2000, 71850000, 6800,
904 },
905
906 {
907 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
908 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
909 false,
910 6800, 500, 75850000, 8800,
911 },
912
913 {
914 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
915 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
916 false,
917 7800, 0, 76350000, 9800,
918 },
919};
920
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600921static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
922 .mode = MSM_PM_BOOT_CONFIG_TZ,
923};
924
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700925#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
926
927#define ISP1763_INT_GPIO 117
928#define ISP1763_RST_GPIO 152
929static struct resource isp1763_resources[] = {
930 [0] = {
931 .flags = IORESOURCE_MEM,
932 .start = 0x1D000000,
933 .end = 0x1D005FFF, /* 24KB */
934 },
935 [1] = {
936 .flags = IORESOURCE_IRQ,
937 },
938};
939static void __init msm8x60_cfg_isp1763(void)
940{
941 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
942 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
943}
944
945static int isp1763_setup_gpio(int enable)
946{
947 int status = 0;
948
949 if (enable) {
950 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
951 if (status) {
952 pr_err("%s:Failed to request GPIO %d\n",
953 __func__, ISP1763_INT_GPIO);
954 return status;
955 }
956 status = gpio_direction_input(ISP1763_INT_GPIO);
957 if (status) {
958 pr_err("%s:Failed to configure GPIO %d\n",
959 __func__, ISP1763_INT_GPIO);
960 goto gpio_free_int;
961 }
962 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
963 if (status) {
964 pr_err("%s:Failed to request GPIO %d\n",
965 __func__, ISP1763_RST_GPIO);
966 goto gpio_free_int;
967 }
968 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
969 if (status) {
970 pr_err("%s:Failed to configure GPIO %d\n",
971 __func__, ISP1763_RST_GPIO);
972 goto gpio_free_rst;
973 }
974 pr_debug("\nISP GPIO configuration done\n");
975 return status;
976 }
977
978gpio_free_rst:
979 gpio_free(ISP1763_RST_GPIO);
980gpio_free_int:
981 gpio_free(ISP1763_INT_GPIO);
982
983 return status;
984}
985static struct isp1763_platform_data isp1763_pdata = {
986 .reset_gpio = ISP1763_RST_GPIO,
987 .setup_gpio = isp1763_setup_gpio
988};
989
990static struct platform_device isp1763_device = {
991 .name = "isp1763_usb",
992 .num_resources = ARRAY_SIZE(isp1763_resources),
993 .resource = isp1763_resources,
994 .dev = {
995 .platform_data = &isp1763_pdata
996 }
997};
998#endif
999
1000#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301001static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001002static struct regulator *ldo6_3p3;
1003static struct regulator *ldo7_1p8;
1004static struct regulator *vdd_cx;
1005#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301006#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001007notify_vbus_state notify_vbus_state_func_ptr;
1008static int usb_phy_susp_dig_vol = 750000;
1009static int pmic_id_notif_supported;
1010
1011#ifdef CONFIG_USB_EHCI_MSM_72K
1012#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1013struct delayed_work pmic_id_det;
1014
1015static int __init usb_id_pin_rework_setup(char *support)
1016{
1017 if (strncmp(support, "true", 4) == 0)
1018 pmic_id_notif_supported = 1;
1019
1020 return 1;
1021}
1022__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1023
1024static void pmic_id_detect(struct work_struct *w)
1025{
1026 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1027 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1028
1029 if (notify_vbus_state_func_ptr)
1030 (*notify_vbus_state_func_ptr) (val);
1031}
1032
1033static irqreturn_t pmic_id_on_irq(int irq, void *data)
1034{
1035 /*
1036 * Spurious interrupts are observed on pmic gpio line
1037 * even though there is no state change on USB ID. Schedule the
1038 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001039 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001040 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001041
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001042 return IRQ_HANDLED;
1043}
1044
Anji jonnalaae745e92011-11-14 18:34:31 +05301045static int msm_hsusb_phy_id_setup_init(int init)
1046{
1047 unsigned ret;
1048
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301049 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1050 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1051 .level = PM8901_MPP_DIG_LEVEL_L5,
1052 };
1053
Anji jonnalaae745e92011-11-14 18:34:31 +05301054 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301055 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1056 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1057 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301058 if (ret < 0)
1059 pr_err("%s:MPP2 configuration failed\n", __func__);
1060 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301061 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1062 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1063 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301064 if (ret < 0)
1065 pr_err("%s:MPP2 un config failed\n", __func__);
1066 }
1067 return ret;
1068}
1069
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001070static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1071{
1072 unsigned ret = -ENODEV;
1073
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301074 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301075 .direction = PM_GPIO_DIR_IN,
1076 .pull = PM_GPIO_PULL_UP_1P5,
1077 .function = PM_GPIO_FUNC_NORMAL,
1078 .vin_sel = 2,
1079 .inv_int_pol = 0,
1080 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301081 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301082 .direction = PM_GPIO_DIR_IN,
1083 .pull = PM_GPIO_PULL_NO,
1084 .function = PM_GPIO_FUNC_NORMAL,
1085 .vin_sel = 2,
1086 .inv_int_pol = 0,
1087 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001088 if (!callback)
1089 return -EINVAL;
1090
1091 if (machine_is_msm8x60_fluid())
1092 return -ENOTSUPP;
1093
1094 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1095 pr_debug("%s: USB_ID pin is not routed to PMIC"
1096 "on V1 surf/ffa\n", __func__);
1097 return -ENOTSUPP;
1098 }
1099
Manu Gautam62158eb2011-11-24 16:20:46 +05301100 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1101 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001102 pr_debug("%s: USB_ID is not routed to PMIC"
1103 "on V2 ffa\n", __func__);
1104 return -ENOTSUPP;
1105 }
1106
1107 usb_phy_susp_dig_vol = 500000;
1108
1109 if (init) {
1110 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301111 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301112 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1113 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301114 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301115 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301116 __func__, ret);
1117 return ret;
1118 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001119 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1120 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1121 "msm_otg_id", NULL);
1122 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001123 pr_err("%s:pmic_usb_id interrupt registration failed",
1124 __func__);
1125 return ret;
1126 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301127 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001128 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301129 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001130 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301131 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1132 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301133 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301134 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301135 __func__, ret);
1136 return ret;
1137 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301138 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001139 cancel_delayed_work_sync(&pmic_id_det);
1140 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001141 }
1142 return 0;
1143}
1144#endif
1145
1146#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1147#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1148static int msm_hsusb_init_vddcx(int init)
1149{
1150 int ret = 0;
1151
1152 if (init) {
1153 vdd_cx = regulator_get(NULL, "8058_s1");
1154 if (IS_ERR(vdd_cx)) {
1155 return PTR_ERR(vdd_cx);
1156 }
1157
1158 ret = regulator_set_voltage(vdd_cx,
1159 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1160 USB_PHY_MAX_VDD_DIG_VOL);
1161 if (ret) {
1162 pr_err("%s: unable to set the voltage for regulator"
1163 "vdd_cx\n", __func__);
1164 regulator_put(vdd_cx);
1165 return ret;
1166 }
1167
1168 ret = regulator_enable(vdd_cx);
1169 if (ret) {
1170 pr_err("%s: unable to enable regulator"
1171 "vdd_cx\n", __func__);
1172 regulator_put(vdd_cx);
1173 }
1174 } else {
1175 ret = regulator_disable(vdd_cx);
1176 if (ret) {
1177 pr_err("%s: Unable to disable the regulator:"
1178 "vdd_cx\n", __func__);
1179 return ret;
1180 }
1181
1182 regulator_put(vdd_cx);
1183 }
1184
1185 return ret;
1186}
1187
1188static int msm_hsusb_config_vddcx(int high)
1189{
1190 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1191 int min_vol;
1192 int ret;
1193
1194 if (high)
1195 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1196 else
1197 min_vol = usb_phy_susp_dig_vol;
1198
1199 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1200 if (ret) {
1201 pr_err("%s: unable to set the voltage for regulator"
1202 "vdd_cx\n", __func__);
1203 return ret;
1204 }
1205
1206 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1207
1208 return ret;
1209}
1210
1211#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1212#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1213#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1214#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1215
1216#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1217#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1218#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1219#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1220static int msm_hsusb_ldo_init(int init)
1221{
1222 int rc = 0;
1223
1224 if (init) {
1225 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1226 if (IS_ERR(ldo6_3p3))
1227 return PTR_ERR(ldo6_3p3);
1228
1229 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1230 if (IS_ERR(ldo7_1p8)) {
1231 rc = PTR_ERR(ldo7_1p8);
1232 goto put_3p3;
1233 }
1234
1235 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1236 USB_PHY_3P3_VOL_MAX);
1237 if (rc) {
1238 pr_err("%s: Unable to set voltage level for"
1239 "ldo6_3p3 regulator\n", __func__);
1240 goto put_1p8;
1241 }
1242 rc = regulator_enable(ldo6_3p3);
1243 if (rc) {
1244 pr_err("%s: Unable to enable the regulator:"
1245 "ldo6_3p3\n", __func__);
1246 goto put_1p8;
1247 }
1248 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1249 USB_PHY_1P8_VOL_MAX);
1250 if (rc) {
1251 pr_err("%s: Unable to set voltage level for"
1252 "ldo7_1p8 regulator\n", __func__);
1253 goto disable_3p3;
1254 }
1255 rc = regulator_enable(ldo7_1p8);
1256 if (rc) {
1257 pr_err("%s: Unable to enable the regulator:"
1258 "ldo7_1p8\n", __func__);
1259 goto disable_3p3;
1260 }
1261
1262 return 0;
1263 }
1264
1265 regulator_disable(ldo7_1p8);
1266disable_3p3:
1267 regulator_disable(ldo6_3p3);
1268put_1p8:
1269 regulator_put(ldo7_1p8);
1270put_3p3:
1271 regulator_put(ldo6_3p3);
1272 return rc;
1273}
1274
1275static int msm_hsusb_ldo_enable(int on)
1276{
1277 int ret = 0;
1278
1279 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1280 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1281 return -ENODEV;
1282 }
1283
1284 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1285 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1286 return -ENODEV;
1287 }
1288
1289 if (on) {
1290 ret = regulator_set_optimum_mode(ldo7_1p8,
1291 USB_PHY_1P8_HPM_LOAD);
1292 if (ret < 0) {
1293 pr_err("%s: Unable to set HPM of the regulator:"
1294 "ldo7_1p8\n", __func__);
1295 return ret;
1296 }
1297 ret = regulator_set_optimum_mode(ldo6_3p3,
1298 USB_PHY_3P3_HPM_LOAD);
1299 if (ret < 0) {
1300 pr_err("%s: Unable to set HPM of the regulator:"
1301 "ldo6_3p3\n", __func__);
1302 regulator_set_optimum_mode(ldo7_1p8,
1303 USB_PHY_1P8_LPM_LOAD);
1304 return ret;
1305 }
1306 } else {
1307 ret = regulator_set_optimum_mode(ldo7_1p8,
1308 USB_PHY_1P8_LPM_LOAD);
1309 if (ret < 0)
1310 pr_err("%s: Unable to set LPM of the regulator:"
1311 "ldo7_1p8\n", __func__);
1312 ret = regulator_set_optimum_mode(ldo6_3p3,
1313 USB_PHY_3P3_LPM_LOAD);
1314 if (ret < 0)
1315 pr_err("%s: Unable to set LPM of the regulator:"
1316 "ldo6_3p3\n", __func__);
1317 }
1318
1319 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1320 return ret < 0 ? ret : 0;
1321 }
1322#endif
1323#ifdef CONFIG_USB_EHCI_MSM_72K
1324#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1325static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1326{
1327 static int vbus_is_on;
1328
1329 /* If VBUS is already on (or off), do nothing. */
1330 if (on == vbus_is_on)
1331 return;
1332 smb137b_otg_power(on);
1333 vbus_is_on = on;
1334}
1335#endif
1336static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1337{
1338 static struct regulator *votg_5v_switch;
1339 static struct regulator *ext_5v_reg;
1340 static int vbus_is_on;
1341
1342 /* If VBUS is already on (or off), do nothing. */
1343 if (on == vbus_is_on)
1344 return;
1345
1346 if (!votg_5v_switch) {
1347 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1348 if (IS_ERR(votg_5v_switch)) {
1349 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1350 return;
1351 }
1352 }
1353 if (!ext_5v_reg) {
1354 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1355 if (IS_ERR(ext_5v_reg)) {
1356 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1357 return;
1358 }
1359 }
1360 if (on) {
1361 if (regulator_enable(ext_5v_reg)) {
1362 pr_err("%s: Unable to enable the regulator:"
1363 " ext_5v_reg\n", __func__);
1364 return;
1365 }
1366 if (regulator_enable(votg_5v_switch)) {
1367 pr_err("%s: Unable to enable the regulator:"
1368 " votg_5v_switch\n", __func__);
1369 return;
1370 }
1371 } else {
1372 if (regulator_disable(votg_5v_switch))
1373 pr_err("%s: Unable to enable the regulator:"
1374 " votg_5v_switch\n", __func__);
1375 if (regulator_disable(ext_5v_reg))
1376 pr_err("%s: Unable to enable the regulator:"
1377 " ext_5v_reg\n", __func__);
1378 }
1379
1380 vbus_is_on = on;
1381}
1382
1383static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1384 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1385 .power_budget = 390,
1386};
1387#endif
1388
1389#ifdef CONFIG_BATTERY_MSM8X60
1390static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1391 int init)
1392{
1393 int ret = -ENOTSUPP;
1394
1395#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1396 if (machine_is_msm8x60_fluid()) {
1397 if (init)
1398 msm_charger_register_vbus_sn(callback);
1399 else
1400 msm_charger_unregister_vbus_sn(callback);
1401 return 0;
1402 }
1403#endif
1404 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1405 * hence, irrespective of either peripheral only mode or
1406 * OTG (host and peripheral) modes, can depend on pmic for
1407 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001408 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001409 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1410 && (machine_is_msm8x60_surf() ||
1411 pmic_id_notif_supported)) {
1412 if (init)
1413 ret = msm_charger_register_vbus_sn(callback);
1414 else {
1415 msm_charger_unregister_vbus_sn(callback);
1416 ret = 0;
1417 }
1418 } else {
1419#if !defined(CONFIG_USB_EHCI_MSM_72K)
1420 if (init)
1421 ret = msm_charger_register_vbus_sn(callback);
1422 else {
1423 msm_charger_unregister_vbus_sn(callback);
1424 ret = 0;
1425 }
1426#endif
1427 }
1428 return ret;
1429}
1430#endif
1431
1432#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1433static struct msm_otg_platform_data msm_otg_pdata = {
1434 /* if usb link is in sps there is no need for
1435 * usb pclk as dayatona fabric clock will be
1436 * used instead
1437 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001438 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1439 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1440 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301441 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001442#ifdef CONFIG_USB_EHCI_MSM_72K
1443 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301444 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001445#endif
1446#ifdef CONFIG_USB_EHCI_MSM_72K
1447 .vbus_power = msm_hsusb_vbus_power,
1448#endif
1449#ifdef CONFIG_BATTERY_MSM8X60
1450 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1451#endif
1452 .ldo_init = msm_hsusb_ldo_init,
1453 .ldo_enable = msm_hsusb_ldo_enable,
1454 .config_vddcx = msm_hsusb_config_vddcx,
1455 .init_vddcx = msm_hsusb_init_vddcx,
1456#ifdef CONFIG_BATTERY_MSM8X60
1457 .chg_vbus_draw = msm_charger_vbus_draw,
1458#endif
1459};
1460#endif
1461
1462#ifdef CONFIG_USB_GADGET_MSM_72K
1463static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1464 .is_phy_status_timer_on = 1,
1465};
1466#endif
1467
1468#ifdef CONFIG_USB_G_ANDROID
1469
1470#define PID_MAGIC_ID 0x71432909
1471#define SERIAL_NUM_MAGIC_ID 0x61945374
1472#define SERIAL_NUMBER_LENGTH 127
1473#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1474
1475struct magic_num_struct {
1476 uint32_t pid;
1477 uint32_t serial_num;
1478};
1479
1480struct dload_struct {
1481 uint32_t reserved1;
1482 uint32_t reserved2;
1483 uint32_t reserved3;
1484 uint16_t reserved4;
1485 uint16_t pid;
1486 char serial_number[SERIAL_NUMBER_LENGTH];
1487 uint16_t reserved5;
1488 struct magic_num_struct
1489 magic_struct;
1490};
1491
1492static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1493{
1494 struct dload_struct __iomem *dload = 0;
1495
1496 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1497 if (!dload) {
1498 pr_err("%s: cannot remap I/O memory region: %08x\n",
1499 __func__, DLOAD_USB_BASE_ADD);
1500 return -ENXIO;
1501 }
1502
1503 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1504 __func__, dload, pid, snum);
1505 /* update pid */
1506 dload->magic_struct.pid = PID_MAGIC_ID;
1507 dload->pid = pid;
1508
1509 /* update serial number */
1510 dload->magic_struct.serial_num = 0;
1511 if (!snum)
1512 return 0;
1513
1514 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1515 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1516 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1517
1518 iounmap(dload);
1519
1520 return 0;
1521}
1522
1523static struct android_usb_platform_data android_usb_pdata = {
1524 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1525};
1526
1527static struct platform_device android_usb_device = {
1528 .name = "android_usb",
1529 .id = -1,
1530 .dev = {
1531 .platform_data = &android_usb_pdata,
1532 },
1533};
1534
1535
1536#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001537
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001538#ifdef CONFIG_MSM_VPE
1539static struct resource msm_vpe_resources[] = {
1540 {
1541 .start = 0x05300000,
1542 .end = 0x05300000 + SZ_1M - 1,
1543 .flags = IORESOURCE_MEM,
1544 },
1545 {
1546 .start = INT_VPE,
1547 .end = INT_VPE,
1548 .flags = IORESOURCE_IRQ,
1549 },
1550};
1551
1552static struct platform_device msm_vpe_device = {
1553 .name = "msm_vpe",
1554 .id = 0,
1555 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1556 .resource = msm_vpe_resources,
1557};
1558#endif
1559
1560#ifdef CONFIG_MSM_CAMERA
1561#ifdef CONFIG_MSM_CAMERA_FLASH
1562#define VFE_CAMIF_TIMER1_GPIO 29
1563#define VFE_CAMIF_TIMER2_GPIO 30
1564#define VFE_CAMIF_TIMER3_GPIO_INT 31
1565#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1566static struct msm_camera_sensor_flash_src msm_flash_src = {
1567 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1568 ._fsrc.pmic_src.num_of_src = 2,
1569 ._fsrc.pmic_src.low_current = 100,
1570 ._fsrc.pmic_src.high_current = 300,
1571 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1572 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1573 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1574};
1575#ifdef CONFIG_IMX074
1576static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1577 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1578 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1579 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1580 .flash_recharge_duration = 50000,
1581 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1582};
1583#endif
1584#endif
1585
1586int msm_cam_gpio_tbl[] = {
1587 32,/*CAMIF_MCLK*/
1588 47,/*CAMIF_I2C_DATA*/
1589 48,/*CAMIF_I2C_CLK*/
1590 105,/*STANDBY*/
1591};
1592
1593enum msm_cam_stat{
1594 MSM_CAM_OFF,
1595 MSM_CAM_ON,
1596};
1597
1598static int config_gpio_table(enum msm_cam_stat stat)
1599{
1600 int rc = 0, i = 0;
1601 if (stat == MSM_CAM_ON) {
1602 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1603 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1604 if (unlikely(rc < 0)) {
1605 pr_err("%s not able to get gpio\n", __func__);
1606 for (i--; i >= 0; i--)
1607 gpio_free(msm_cam_gpio_tbl[i]);
1608 break;
1609 }
1610 }
1611 } else {
1612 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1613 gpio_free(msm_cam_gpio_tbl[i]);
1614 }
1615 return rc;
1616}
1617
1618static struct msm_camera_sensor_platform_info sensor_board_info = {
1619 .mount_angle = 0
1620};
1621
1622/*external regulator VREG_5V*/
1623static struct regulator *reg_flash_5V;
1624
1625static int config_camera_on_gpios_fluid(void)
1626{
1627 int rc = 0;
1628
1629 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1630 if (IS_ERR(reg_flash_5V)) {
1631 pr_err("'%s' regulator not found, rc=%ld\n",
1632 "8901_mpp0", IS_ERR(reg_flash_5V));
1633 return -ENODEV;
1634 }
1635
1636 rc = regulator_enable(reg_flash_5V);
1637 if (rc) {
1638 pr_err("'%s' regulator enable failed, rc=%d\n",
1639 "8901_mpp0", rc);
1640 regulator_put(reg_flash_5V);
1641 return rc;
1642 }
1643
1644#ifdef CONFIG_IMX074
1645 sensor_board_info.mount_angle = 90;
1646#endif
1647 rc = config_gpio_table(MSM_CAM_ON);
1648 if (rc < 0) {
1649 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1650 "failed\n", __func__);
1651 return rc;
1652 }
1653
1654 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1655 if (rc < 0) {
1656 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1657 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1658 regulator_disable(reg_flash_5V);
1659 regulator_put(reg_flash_5V);
1660 return rc;
1661 }
1662 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1663 msleep(20);
1664 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1665
1666
1667 /*Enable LED_FLASH_EN*/
1668 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1669 if (rc < 0) {
1670 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1671 "failed\n", __func__, GPIO_LED_FLASH_EN);
1672
1673 regulator_disable(reg_flash_5V);
1674 regulator_put(reg_flash_5V);
1675 config_gpio_table(MSM_CAM_OFF);
1676 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1677 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1678 return rc;
1679 }
1680 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1681 msleep(20);
1682 return rc;
1683}
1684
1685
1686static void config_camera_off_gpios_fluid(void)
1687{
1688 regulator_disable(reg_flash_5V);
1689 regulator_put(reg_flash_5V);
1690
1691 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1692 gpio_free(GPIO_LED_FLASH_EN);
1693
1694 config_gpio_table(MSM_CAM_OFF);
1695
1696 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1697 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1698}
1699static int config_camera_on_gpios(void)
1700{
1701 int rc = 0;
1702
1703 if (machine_is_msm8x60_fluid())
1704 return config_camera_on_gpios_fluid();
1705
1706 rc = config_gpio_table(MSM_CAM_ON);
1707 if (rc < 0) {
1708 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1709 "failed\n", __func__);
1710 return rc;
1711 }
1712
Jilai Wang971f97f2011-07-13 14:25:25 -04001713 if (!machine_is_msm8x60_dragon()) {
1714 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1715 if (rc < 0) {
1716 config_gpio_table(MSM_CAM_OFF);
1717 pr_err("%s: CAMSENSOR gpio %d request"
1718 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1719 return rc;
1720 }
1721 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1722 msleep(20);
1723 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001724 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001725
1726#ifdef CONFIG_MSM_CAMERA_FLASH
1727#ifdef CONFIG_IMX074
1728 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1729 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1730#endif
1731#endif
1732 return rc;
1733}
1734
1735static void config_camera_off_gpios(void)
1736{
1737 if (machine_is_msm8x60_fluid())
1738 return config_camera_off_gpios_fluid();
1739
1740
1741 config_gpio_table(MSM_CAM_OFF);
1742
Jilai Wang971f97f2011-07-13 14:25:25 -04001743 if (!machine_is_msm8x60_dragon()) {
1744 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1745 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1746 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001747}
1748
1749#ifdef CONFIG_QS_S5K4E1
1750
1751#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1752
1753static int config_camera_on_gpios_qs_cam_fluid(void)
1754{
1755 int rc = 0;
1756
1757 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1758 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1759 if (rc < 0) {
1760 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1761 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1762 return rc;
1763 }
1764 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1765 msleep(20);
1766 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1767 msleep(20);
1768
1769 /*
1770 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1771 * to enable 2.7V power to Camera
1772 */
1773 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1774 if (rc < 0) {
1775 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1776 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1777 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1778 gpio_free(QS_CAM_HC37_CAM_PD);
1779 return rc;
1780 }
1781 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1782 msleep(20);
1783 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1784 msleep(20);
1785
1786 rc = config_camera_on_gpios_fluid();
1787 if (rc < 0) {
1788 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1789 " failed\n", __func__);
1790 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1791 gpio_free(QS_CAM_HC37_CAM_PD);
1792 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1793 gpio_free(GPIO_AUX_CAM_2P7_EN);
1794 return rc;
1795 }
1796 return rc;
1797}
1798
1799static void config_camera_off_gpios_qs_cam_fluid(void)
1800{
1801 /*
1802 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1803 * to disable 2.7V power to Camera
1804 */
1805 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1806 gpio_free(GPIO_AUX_CAM_2P7_EN);
1807
1808 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1809 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1810 gpio_free(QS_CAM_HC37_CAM_PD);
1811
1812 config_camera_off_gpios_fluid();
1813 return;
1814}
1815
1816static int config_camera_on_gpios_qs_cam(void)
1817{
1818 int rc = 0;
1819
1820 if (machine_is_msm8x60_fluid())
1821 return config_camera_on_gpios_qs_cam_fluid();
1822
1823 rc = config_camera_on_gpios();
1824 return rc;
1825}
1826
1827static void config_camera_off_gpios_qs_cam(void)
1828{
1829 if (machine_is_msm8x60_fluid())
1830 return config_camera_off_gpios_qs_cam_fluid();
1831
1832 config_camera_off_gpios();
1833 return;
1834}
1835#endif
1836
1837static int config_camera_on_gpios_web_cam(void)
1838{
1839 int rc = 0;
1840 rc = config_gpio_table(MSM_CAM_ON);
1841 if (rc < 0) {
1842 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1843 "failed\n", __func__);
1844 return rc;
1845 }
1846
Jilai Wang53d27a82011-07-13 14:32:58 -04001847 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001848 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1849 if (rc < 0) {
1850 config_gpio_table(MSM_CAM_OFF);
1851 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1852 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1853 return rc;
1854 }
1855 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1856 }
1857 return rc;
1858}
1859
1860static void config_camera_off_gpios_web_cam(void)
1861{
1862 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001863 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001864 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1865 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1866 }
1867 return;
1868}
1869
1870#ifdef CONFIG_MSM_BUS_SCALING
1871static struct msm_bus_vectors cam_init_vectors[] = {
1872 {
1873 .src = MSM_BUS_MASTER_VFE,
1874 .dst = MSM_BUS_SLAVE_SMI,
1875 .ab = 0,
1876 .ib = 0,
1877 },
1878 {
1879 .src = MSM_BUS_MASTER_VFE,
1880 .dst = MSM_BUS_SLAVE_EBI_CH0,
1881 .ab = 0,
1882 .ib = 0,
1883 },
1884 {
1885 .src = MSM_BUS_MASTER_VPE,
1886 .dst = MSM_BUS_SLAVE_SMI,
1887 .ab = 0,
1888 .ib = 0,
1889 },
1890 {
1891 .src = MSM_BUS_MASTER_VPE,
1892 .dst = MSM_BUS_SLAVE_EBI_CH0,
1893 .ab = 0,
1894 .ib = 0,
1895 },
1896 {
1897 .src = MSM_BUS_MASTER_JPEG_ENC,
1898 .dst = MSM_BUS_SLAVE_SMI,
1899 .ab = 0,
1900 .ib = 0,
1901 },
1902 {
1903 .src = MSM_BUS_MASTER_JPEG_ENC,
1904 .dst = MSM_BUS_SLAVE_EBI_CH0,
1905 .ab = 0,
1906 .ib = 0,
1907 },
1908};
1909
1910static struct msm_bus_vectors cam_preview_vectors[] = {
1911 {
1912 .src = MSM_BUS_MASTER_VFE,
1913 .dst = MSM_BUS_SLAVE_SMI,
1914 .ab = 0,
1915 .ib = 0,
1916 },
1917 {
1918 .src = MSM_BUS_MASTER_VFE,
1919 .dst = MSM_BUS_SLAVE_EBI_CH0,
1920 .ab = 283115520,
1921 .ib = 452984832,
1922 },
1923 {
1924 .src = MSM_BUS_MASTER_VPE,
1925 .dst = MSM_BUS_SLAVE_SMI,
1926 .ab = 0,
1927 .ib = 0,
1928 },
1929 {
1930 .src = MSM_BUS_MASTER_VPE,
1931 .dst = MSM_BUS_SLAVE_EBI_CH0,
1932 .ab = 0,
1933 .ib = 0,
1934 },
1935 {
1936 .src = MSM_BUS_MASTER_JPEG_ENC,
1937 .dst = MSM_BUS_SLAVE_SMI,
1938 .ab = 0,
1939 .ib = 0,
1940 },
1941 {
1942 .src = MSM_BUS_MASTER_JPEG_ENC,
1943 .dst = MSM_BUS_SLAVE_EBI_CH0,
1944 .ab = 0,
1945 .ib = 0,
1946 },
1947};
1948
1949static struct msm_bus_vectors cam_video_vectors[] = {
1950 {
1951 .src = MSM_BUS_MASTER_VFE,
1952 .dst = MSM_BUS_SLAVE_SMI,
1953 .ab = 283115520,
1954 .ib = 452984832,
1955 },
1956 {
1957 .src = MSM_BUS_MASTER_VFE,
1958 .dst = MSM_BUS_SLAVE_EBI_CH0,
1959 .ab = 283115520,
1960 .ib = 452984832,
1961 },
1962 {
1963 .src = MSM_BUS_MASTER_VPE,
1964 .dst = MSM_BUS_SLAVE_SMI,
1965 .ab = 319610880,
1966 .ib = 511377408,
1967 },
1968 {
1969 .src = MSM_BUS_MASTER_VPE,
1970 .dst = MSM_BUS_SLAVE_EBI_CH0,
1971 .ab = 0,
1972 .ib = 0,
1973 },
1974 {
1975 .src = MSM_BUS_MASTER_JPEG_ENC,
1976 .dst = MSM_BUS_SLAVE_SMI,
1977 .ab = 0,
1978 .ib = 0,
1979 },
1980 {
1981 .src = MSM_BUS_MASTER_JPEG_ENC,
1982 .dst = MSM_BUS_SLAVE_EBI_CH0,
1983 .ab = 0,
1984 .ib = 0,
1985 },
1986};
1987
1988static struct msm_bus_vectors cam_snapshot_vectors[] = {
1989 {
1990 .src = MSM_BUS_MASTER_VFE,
1991 .dst = MSM_BUS_SLAVE_SMI,
1992 .ab = 566231040,
1993 .ib = 905969664,
1994 },
1995 {
1996 .src = MSM_BUS_MASTER_VFE,
1997 .dst = MSM_BUS_SLAVE_EBI_CH0,
1998 .ab = 69984000,
1999 .ib = 111974400,
2000 },
2001 {
2002 .src = MSM_BUS_MASTER_VPE,
2003 .dst = MSM_BUS_SLAVE_SMI,
2004 .ab = 0,
2005 .ib = 0,
2006 },
2007 {
2008 .src = MSM_BUS_MASTER_VPE,
2009 .dst = MSM_BUS_SLAVE_EBI_CH0,
2010 .ab = 0,
2011 .ib = 0,
2012 },
2013 {
2014 .src = MSM_BUS_MASTER_JPEG_ENC,
2015 .dst = MSM_BUS_SLAVE_SMI,
2016 .ab = 320864256,
2017 .ib = 513382810,
2018 },
2019 {
2020 .src = MSM_BUS_MASTER_JPEG_ENC,
2021 .dst = MSM_BUS_SLAVE_EBI_CH0,
2022 .ab = 320864256,
2023 .ib = 513382810,
2024 },
2025};
2026
2027static struct msm_bus_vectors cam_zsl_vectors[] = {
2028 {
2029 .src = MSM_BUS_MASTER_VFE,
2030 .dst = MSM_BUS_SLAVE_SMI,
2031 .ab = 566231040,
2032 .ib = 905969664,
2033 },
2034 {
2035 .src = MSM_BUS_MASTER_VFE,
2036 .dst = MSM_BUS_SLAVE_EBI_CH0,
2037 .ab = 706199040,
2038 .ib = 1129918464,
2039 },
2040 {
2041 .src = MSM_BUS_MASTER_VPE,
2042 .dst = MSM_BUS_SLAVE_SMI,
2043 .ab = 0,
2044 .ib = 0,
2045 },
2046 {
2047 .src = MSM_BUS_MASTER_VPE,
2048 .dst = MSM_BUS_SLAVE_EBI_CH0,
2049 .ab = 0,
2050 .ib = 0,
2051 },
2052 {
2053 .src = MSM_BUS_MASTER_JPEG_ENC,
2054 .dst = MSM_BUS_SLAVE_SMI,
2055 .ab = 320864256,
2056 .ib = 513382810,
2057 },
2058 {
2059 .src = MSM_BUS_MASTER_JPEG_ENC,
2060 .dst = MSM_BUS_SLAVE_EBI_CH0,
2061 .ab = 320864256,
2062 .ib = 513382810,
2063 },
2064};
2065
2066static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2067 {
2068 .src = MSM_BUS_MASTER_VFE,
2069 .dst = MSM_BUS_SLAVE_SMI,
2070 .ab = 212336640,
2071 .ib = 339738624,
2072 },
2073 {
2074 .src = MSM_BUS_MASTER_VFE,
2075 .dst = MSM_BUS_SLAVE_EBI_CH0,
2076 .ab = 25090560,
2077 .ib = 40144896,
2078 },
2079 {
2080 .src = MSM_BUS_MASTER_VPE,
2081 .dst = MSM_BUS_SLAVE_SMI,
2082 .ab = 239708160,
2083 .ib = 383533056,
2084 },
2085 {
2086 .src = MSM_BUS_MASTER_VPE,
2087 .dst = MSM_BUS_SLAVE_EBI_CH0,
2088 .ab = 79902720,
2089 .ib = 127844352,
2090 },
2091 {
2092 .src = MSM_BUS_MASTER_JPEG_ENC,
2093 .dst = MSM_BUS_SLAVE_SMI,
2094 .ab = 0,
2095 .ib = 0,
2096 },
2097 {
2098 .src = MSM_BUS_MASTER_JPEG_ENC,
2099 .dst = MSM_BUS_SLAVE_EBI_CH0,
2100 .ab = 0,
2101 .ib = 0,
2102 },
2103};
2104
2105static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2106 {
2107 .src = MSM_BUS_MASTER_VFE,
2108 .dst = MSM_BUS_SLAVE_SMI,
2109 .ab = 0,
2110 .ib = 0,
2111 },
2112 {
2113 .src = MSM_BUS_MASTER_VFE,
2114 .dst = MSM_BUS_SLAVE_EBI_CH0,
2115 .ab = 300902400,
2116 .ib = 481443840,
2117 },
2118 {
2119 .src = MSM_BUS_MASTER_VPE,
2120 .dst = MSM_BUS_SLAVE_SMI,
2121 .ab = 230307840,
2122 .ib = 368492544,
2123 },
2124 {
2125 .src = MSM_BUS_MASTER_VPE,
2126 .dst = MSM_BUS_SLAVE_EBI_CH0,
2127 .ab = 245113344,
2128 .ib = 392181351,
2129 },
2130 {
2131 .src = MSM_BUS_MASTER_JPEG_ENC,
2132 .dst = MSM_BUS_SLAVE_SMI,
2133 .ab = 106536960,
2134 .ib = 170459136,
2135 },
2136 {
2137 .src = MSM_BUS_MASTER_JPEG_ENC,
2138 .dst = MSM_BUS_SLAVE_EBI_CH0,
2139 .ab = 106536960,
2140 .ib = 170459136,
2141 },
2142};
2143
2144static struct msm_bus_paths cam_bus_client_config[] = {
2145 {
2146 ARRAY_SIZE(cam_init_vectors),
2147 cam_init_vectors,
2148 },
2149 {
2150 ARRAY_SIZE(cam_preview_vectors),
2151 cam_preview_vectors,
2152 },
2153 {
2154 ARRAY_SIZE(cam_video_vectors),
2155 cam_video_vectors,
2156 },
2157 {
2158 ARRAY_SIZE(cam_snapshot_vectors),
2159 cam_snapshot_vectors,
2160 },
2161 {
2162 ARRAY_SIZE(cam_zsl_vectors),
2163 cam_zsl_vectors,
2164 },
2165 {
2166 ARRAY_SIZE(cam_stereo_video_vectors),
2167 cam_stereo_video_vectors,
2168 },
2169 {
2170 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2171 cam_stereo_snapshot_vectors,
2172 },
2173};
2174
2175static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2176 cam_bus_client_config,
2177 ARRAY_SIZE(cam_bus_client_config),
2178 .name = "msm_camera",
2179};
2180#endif
2181
2182struct msm_camera_device_platform_data msm_camera_device_data = {
2183 .camera_gpio_on = config_camera_on_gpios,
2184 .camera_gpio_off = config_camera_off_gpios,
2185 .ioext.csiphy = 0x04800000,
2186 .ioext.csisz = 0x00000400,
2187 .ioext.csiirq = CSI_0_IRQ,
2188 .ioclk.mclk_clk_rate = 24000000,
2189 .ioclk.vfe_clk_rate = 228570000,
2190#ifdef CONFIG_MSM_BUS_SCALING
2191 .cam_bus_scale_table = &cam_bus_client_pdata,
2192#endif
2193};
2194
2195#ifdef CONFIG_QS_S5K4E1
2196struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2197 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2198 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2199 .ioext.csiphy = 0x04800000,
2200 .ioext.csisz = 0x00000400,
2201 .ioext.csiirq = CSI_0_IRQ,
2202 .ioclk.mclk_clk_rate = 24000000,
2203 .ioclk.vfe_clk_rate = 228570000,
2204#ifdef CONFIG_MSM_BUS_SCALING
2205 .cam_bus_scale_table = &cam_bus_client_pdata,
2206#endif
2207};
2208#endif
2209
2210struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2211 .camera_gpio_on = config_camera_on_gpios_web_cam,
2212 .camera_gpio_off = config_camera_off_gpios_web_cam,
2213 .ioext.csiphy = 0x04900000,
2214 .ioext.csisz = 0x00000400,
2215 .ioext.csiirq = CSI_1_IRQ,
2216 .ioclk.mclk_clk_rate = 24000000,
2217 .ioclk.vfe_clk_rate = 228570000,
2218#ifdef CONFIG_MSM_BUS_SCALING
2219 .cam_bus_scale_table = &cam_bus_client_pdata,
2220#endif
2221};
2222
2223struct resource msm_camera_resources[] = {
2224 {
2225 .start = 0x04500000,
2226 .end = 0x04500000 + SZ_1M - 1,
2227 .flags = IORESOURCE_MEM,
2228 },
2229 {
2230 .start = VFE_IRQ,
2231 .end = VFE_IRQ,
2232 .flags = IORESOURCE_IRQ,
2233 },
2234};
2235#ifdef CONFIG_MT9E013
2236static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2237 .mount_angle = 0
2238};
2239
2240static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2241 .flash_type = MSM_CAMERA_FLASH_LED,
2242 .flash_src = &msm_flash_src
2243};
2244
2245static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2246 .sensor_name = "mt9e013",
2247 .sensor_reset = 106,
2248 .sensor_pwd = 85,
2249 .vcm_pwd = 1,
2250 .vcm_enable = 0,
2251 .pdata = &msm_camera_device_data,
2252 .resource = msm_camera_resources,
2253 .num_resources = ARRAY_SIZE(msm_camera_resources),
2254 .flash_data = &flash_mt9e013,
2255 .strobe_flash_data = &strobe_flash_xenon,
2256 .sensor_platform_info = &mt9e013_sensor_8660_info,
2257 .csi_if = 1
2258};
2259struct platform_device msm_camera_sensor_mt9e013 = {
2260 .name = "msm_camera_mt9e013",
2261 .dev = {
2262 .platform_data = &msm_camera_sensor_mt9e013_data,
2263 },
2264};
2265#endif
2266
2267#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302268static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2269 .mount_angle = 180
2270};
2271
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002272static struct msm_camera_sensor_flash_data flash_imx074 = {
2273 .flash_type = MSM_CAMERA_FLASH_LED,
2274 .flash_src = &msm_flash_src
2275};
2276
2277static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2278 .sensor_name = "imx074",
2279 .sensor_reset = 106,
2280 .sensor_pwd = 85,
2281 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2282 .vcm_enable = 1,
2283 .pdata = &msm_camera_device_data,
2284 .resource = msm_camera_resources,
2285 .num_resources = ARRAY_SIZE(msm_camera_resources),
2286 .flash_data = &flash_imx074,
2287 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302288 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002289 .csi_if = 1
2290};
2291struct platform_device msm_camera_sensor_imx074 = {
2292 .name = "msm_camera_imx074",
2293 .dev = {
2294 .platform_data = &msm_camera_sensor_imx074_data,
2295 },
2296};
2297#endif
2298#ifdef CONFIG_WEBCAM_OV9726
2299
2300static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2301 .mount_angle = 0
2302};
2303
2304static struct msm_camera_sensor_flash_data flash_ov9726 = {
2305 .flash_type = MSM_CAMERA_FLASH_LED,
2306 .flash_src = &msm_flash_src
2307};
2308static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2309 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002310 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002311 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2312 .sensor_pwd = 85,
2313 .vcm_pwd = 1,
2314 .vcm_enable = 0,
2315 .pdata = &msm_camera_device_data_web_cam,
2316 .resource = msm_camera_resources,
2317 .num_resources = ARRAY_SIZE(msm_camera_resources),
2318 .flash_data = &flash_ov9726,
2319 .sensor_platform_info = &ov9726_sensor_8660_info,
2320 .csi_if = 1
2321};
2322struct platform_device msm_camera_sensor_webcam_ov9726 = {
2323 .name = "msm_camera_ov9726",
2324 .dev = {
2325 .platform_data = &msm_camera_sensor_ov9726_data,
2326 },
2327};
2328#endif
2329#ifdef CONFIG_WEBCAM_OV7692
2330static struct msm_camera_sensor_flash_data flash_ov7692 = {
2331 .flash_type = MSM_CAMERA_FLASH_LED,
2332 .flash_src = &msm_flash_src
2333};
2334static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2335 .sensor_name = "ov7692",
2336 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2337 .sensor_pwd = 85,
2338 .vcm_pwd = 1,
2339 .vcm_enable = 0,
2340 .pdata = &msm_camera_device_data_web_cam,
2341 .resource = msm_camera_resources,
2342 .num_resources = ARRAY_SIZE(msm_camera_resources),
2343 .flash_data = &flash_ov7692,
2344 .csi_if = 1
2345};
2346
2347static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2348 .name = "msm_camera_ov7692",
2349 .dev = {
2350 .platform_data = &msm_camera_sensor_ov7692_data,
2351 },
2352};
2353#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002354#ifdef CONFIG_VX6953
2355static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2356 .mount_angle = 270
2357};
2358
2359static struct msm_camera_sensor_flash_data flash_vx6953 = {
2360 .flash_type = MSM_CAMERA_FLASH_NONE,
2361 .flash_src = &msm_flash_src
2362};
2363
2364static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2365 .sensor_name = "vx6953",
2366 .sensor_reset = 63,
2367 .sensor_pwd = 63,
2368 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2369 .vcm_enable = 1,
2370 .pdata = &msm_camera_device_data,
2371 .resource = msm_camera_resources,
2372 .num_resources = ARRAY_SIZE(msm_camera_resources),
2373 .flash_data = &flash_vx6953,
2374 .sensor_platform_info = &vx6953_sensor_8660_info,
2375 .csi_if = 1
2376};
2377struct platform_device msm_camera_sensor_vx6953 = {
2378 .name = "msm_camera_vx6953",
2379 .dev = {
2380 .platform_data = &msm_camera_sensor_vx6953_data,
2381 },
2382};
2383#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002384#ifdef CONFIG_QS_S5K4E1
2385
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302386static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2387#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2388 .mount_angle = 90
2389#else
2390 .mount_angle = 0
2391#endif
2392};
2393
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002394static char eeprom_data[864];
2395static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2396 .flash_type = MSM_CAMERA_FLASH_LED,
2397 .flash_src = &msm_flash_src
2398};
2399
2400static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2401 .sensor_name = "qs_s5k4e1",
2402 .sensor_reset = 106,
2403 .sensor_pwd = 85,
2404 .vcm_pwd = 1,
2405 .vcm_enable = 0,
2406 .pdata = &msm_camera_device_data_qs_cam,
2407 .resource = msm_camera_resources,
2408 .num_resources = ARRAY_SIZE(msm_camera_resources),
2409 .flash_data = &flash_qs_s5k4e1,
2410 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302411 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002412 .csi_if = 1,
2413 .eeprom_data = eeprom_data,
2414};
2415struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2416 .name = "msm_camera_qs_s5k4e1",
2417 .dev = {
2418 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2419 },
2420};
2421#endif
2422static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2423 #ifdef CONFIG_MT9E013
2424 {
2425 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2426 },
2427 #endif
2428 #ifdef CONFIG_IMX074
2429 {
2430 I2C_BOARD_INFO("imx074", 0x1A),
2431 },
2432 #endif
2433 #ifdef CONFIG_WEBCAM_OV7692
2434 {
2435 I2C_BOARD_INFO("ov7692", 0x78),
2436 },
2437 #endif
2438 #ifdef CONFIG_WEBCAM_OV9726
2439 {
2440 I2C_BOARD_INFO("ov9726", 0x10),
2441 },
2442 #endif
2443 #ifdef CONFIG_QS_S5K4E1
2444 {
2445 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2446 },
2447 #endif
2448};
Jilai Wang971f97f2011-07-13 14:25:25 -04002449
2450static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002451 #ifdef CONFIG_WEBCAM_OV9726
2452 {
2453 I2C_BOARD_INFO("ov9726", 0x10),
2454 },
2455 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002456 #ifdef CONFIG_VX6953
2457 {
2458 I2C_BOARD_INFO("vx6953", 0x20),
2459 },
2460 #endif
2461};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002462#endif
2463
2464#ifdef CONFIG_MSM_GEMINI
2465static struct resource msm_gemini_resources[] = {
2466 {
2467 .start = 0x04600000,
2468 .end = 0x04600000 + SZ_1M - 1,
2469 .flags = IORESOURCE_MEM,
2470 },
2471 {
2472 .start = INT_JPEG,
2473 .end = INT_JPEG,
2474 .flags = IORESOURCE_IRQ,
2475 },
2476};
2477
2478static struct platform_device msm_gemini_device = {
2479 .name = "msm_gemini",
2480 .resource = msm_gemini_resources,
2481 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2482};
2483#endif
2484
2485#ifdef CONFIG_I2C_QUP
2486static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2487{
2488}
2489
2490static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2491 .clk_freq = 384000,
2492 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002493 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2494};
2495
2496static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2497 .clk_freq = 100000,
2498 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002499 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2500};
2501
2502static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2503 .clk_freq = 100000,
2504 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002505 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2506};
2507
2508static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2509 .clk_freq = 100000,
2510 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002511 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2512};
2513
2514static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2515 .clk_freq = 100000,
2516 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002517 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2518};
2519
2520static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2521 .clk_freq = 100000,
2522 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002523 .use_gsbi_shared_mode = 1,
2524 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2525};
2526#endif
2527
2528#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2529static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2530 .max_clock_speed = 24000000,
2531};
2532
2533static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2534 .max_clock_speed = 24000000,
2535};
2536#endif
2537
2538#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002539/* CODEC/TSSC SSBI */
2540static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2541 .controller_type = MSM_SBI_CTRL_SSBI,
2542};
2543#endif
2544
2545#ifdef CONFIG_BATTERY_MSM
2546/* Use basic value for fake MSM battery */
2547static struct msm_psy_batt_pdata msm_psy_batt_data = {
2548 .avail_chg_sources = AC_CHG,
2549};
2550
2551static struct platform_device msm_batt_device = {
2552 .name = "msm-battery",
2553 .id = -1,
2554 .dev.platform_data = &msm_psy_batt_data,
2555};
2556#endif
2557
2558#ifdef CONFIG_FB_MSM_LCDC_DSUB
2559/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2560 prim = 1024 x 600 x 4(bpp) x 2(pages)
2561 This is the difference. */
2562#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2563#else
2564#define MSM_FB_DSUB_PMEM_ADDER (0)
2565#endif
2566
2567/* Sensors DSPS platform data */
2568#ifdef CONFIG_MSM_DSPS
2569
2570static struct dsps_gpio_info dsps_surf_gpios[] = {
2571 {
2572 .name = "compass_rst_n",
2573 .num = GPIO_COMPASS_RST_N,
2574 .on_val = 1, /* device not in reset */
2575 .off_val = 0, /* device in reset */
2576 },
2577 {
2578 .name = "gpio_r_altimeter_reset_n",
2579 .num = GPIO_R_ALTIMETER_RESET_N,
2580 .on_val = 1, /* device not in reset */
2581 .off_val = 0, /* device in reset */
2582 }
2583};
2584
2585static struct dsps_gpio_info dsps_fluid_gpios[] = {
2586 {
2587 .name = "gpio_n_altimeter_reset_n",
2588 .num = GPIO_N_ALTIMETER_RESET_N,
2589 .on_val = 1, /* device not in reset */
2590 .off_val = 0, /* device in reset */
2591 }
2592};
2593
2594static void __init msm8x60_init_dsps(void)
2595{
2596 struct msm_dsps_platform_data *pdata =
2597 msm_dsps_device.dev.platform_data;
2598 /*
2599 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2600 * to the power supply and not controled via GPIOs. Fluid uses a
2601 * different IO-Expender (north) than used on surf/ffa.
2602 */
2603 if (machine_is_msm8x60_fluid()) {
2604 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002605 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2606 pdata->gpios = dsps_fluid_gpios;
2607 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2608 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002609 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2610 pdata->gpios = dsps_surf_gpios;
2611 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2612 }
2613
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002614 platform_device_register(&msm_dsps_device);
2615}
2616#endif /* CONFIG_MSM_DSPS */
2617
2618#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002619#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002620#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002621#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002622#endif
2623
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002624#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2625#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2626#elif defined(CONFIG_FB_MSM_TVOUT)
2627#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2628#else
2629#define MSM_FB_EXT_BUFT_SIZE 0
2630#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002632#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2633/* 4 bpp x 2 page HDMI case */
2634#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2635#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002636/* Note: must be multiple of 4096 */
2637#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002638 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002639#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002640
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002641#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2642#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2643#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002644#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002645#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002646
Huaibin Yanga5419422011-12-08 23:52:10 -08002647#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2648#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2649#else
2650#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2651#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2652
2653#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2654#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2655#else
2656#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2657#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2658
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002659#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2660#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002661#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002662
2663#define MSM_SMI_BASE 0x38000000
2664#define MSM_SMI_SIZE 0x4000000
2665
2666#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002667#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668
2669#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2670#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2671#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2672
Olav Hauganb5be7992011-11-18 14:29:02 -08002673#define MSM_ION_SF_SIZE 0x1800000 /* 24MB */
2674#define MSM_ION_CAMERA_SIZE MSM_PMEM_ADSP_SIZE
Olav Haugan42ebe712012-01-10 16:30:58 -08002675#define MSM_ION_MM_FW_SIZE 0x200000 /* (2MB) */
2676#define MSM_ION_MM_SIZE 0x3600000 /* (54MB) */
Olav Hauganb5be7992011-11-18 14:29:02 -08002677#define MSM_ION_MFC_SIZE SZ_8K
2678#define MSM_ION_WB_SIZE 0x600000 /* 6MB */
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002679
2680#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
Olav Haugan42ebe712012-01-10 16:30:58 -08002681#define MSM_ION_HEAP_NUM 7
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002682#else
Olav Hauganb5be7992011-11-18 14:29:02 -08002683#define MSM_ION_HEAP_NUM 1
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002684#endif
2685
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002686static unsigned fb_size;
2687static int __init fb_size_setup(char *p)
2688{
2689 fb_size = memparse(p, NULL);
2690 return 0;
2691}
2692early_param("fb_size", fb_size_setup);
2693
2694static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2695static int __init pmem_kernel_ebi1_size_setup(char *p)
2696{
2697 pmem_kernel_ebi1_size = memparse(p, NULL);
2698 return 0;
2699}
2700early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2701
2702#ifdef CONFIG_ANDROID_PMEM
2703static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2704static int __init pmem_sf_size_setup(char *p)
2705{
2706 pmem_sf_size = memparse(p, NULL);
2707 return 0;
2708}
2709early_param("pmem_sf_size", pmem_sf_size_setup);
2710
2711static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2712
2713static int __init pmem_adsp_size_setup(char *p)
2714{
2715 pmem_adsp_size = memparse(p, NULL);
2716 return 0;
2717}
2718early_param("pmem_adsp_size", pmem_adsp_size_setup);
2719
2720static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2721
2722static int __init pmem_audio_size_setup(char *p)
2723{
2724 pmem_audio_size = memparse(p, NULL);
2725 return 0;
2726}
2727early_param("pmem_audio_size", pmem_audio_size_setup);
2728#endif
2729
2730static struct resource msm_fb_resources[] = {
2731 {
2732 .flags = IORESOURCE_DMA,
2733 }
2734};
2735
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002736static int msm_fb_detect_panel(const char *name)
2737{
2738 if (machine_is_msm8x60_fluid()) {
2739 uint32_t soc_platform_version = socinfo_get_platform_version();
2740 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2741#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2742 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002743 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2744 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002745 return 0;
2746#endif
2747 } else { /*P3 and up use AUO panel */
2748#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2749 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002750 strnlen(LCDC_AUO_PANEL_NAME,
2751 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002752 return 0;
2753#endif
2754 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002755#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2756 } else if machine_is_msm8x60_dragon() {
2757 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002758 strnlen(LCDC_NT35582_PANEL_NAME,
2759 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002760 return 0;
2761#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002762 } else {
2763 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002764 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2765 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002766 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002767
2768#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2769 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2770 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2771 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2772 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2773 PANEL_NAME_MAX_LEN)))
2774 return 0;
2775
2776 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2777 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2778 PANEL_NAME_MAX_LEN)))
2779 return 0;
2780
2781 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2782 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2783 PANEL_NAME_MAX_LEN)))
2784 return 0;
2785#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002786 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002787
2788 if (!strncmp(name, HDMI_PANEL_NAME,
2789 strnlen(HDMI_PANEL_NAME,
2790 PANEL_NAME_MAX_LEN)))
2791 return 0;
2792
2793 if (!strncmp(name, TVOUT_PANEL_NAME,
2794 strnlen(TVOUT_PANEL_NAME,
2795 PANEL_NAME_MAX_LEN)))
2796 return 0;
2797
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002798 pr_warning("%s: not supported '%s'", __func__, name);
2799 return -ENODEV;
2800}
2801
2802static struct msm_fb_platform_data msm_fb_pdata = {
2803 .detect_client = msm_fb_detect_panel,
2804};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002805
2806static struct platform_device msm_fb_device = {
2807 .name = "msm_fb",
2808 .id = 0,
2809 .num_resources = ARRAY_SIZE(msm_fb_resources),
2810 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002811 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002812};
2813
2814#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002815#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002816static struct android_pmem_platform_data android_pmem_pdata = {
2817 .name = "pmem",
2818 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2819 .cached = 1,
2820 .memory_type = MEMTYPE_EBI1,
2821};
2822
2823static struct platform_device android_pmem_device = {
2824 .name = "android_pmem",
2825 .id = 0,
2826 .dev = {.platform_data = &android_pmem_pdata},
2827};
2828
2829static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2830 .name = "pmem_adsp",
2831 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2832 .cached = 0,
2833 .memory_type = MEMTYPE_EBI1,
2834};
2835
2836static struct platform_device android_pmem_adsp_device = {
2837 .name = "android_pmem",
2838 .id = 2,
2839 .dev = { .platform_data = &android_pmem_adsp_pdata },
2840};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002841#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002842static struct android_pmem_platform_data android_pmem_audio_pdata = {
2843 .name = "pmem_audio",
2844 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2845 .cached = 0,
2846 .memory_type = MEMTYPE_EBI1,
2847};
2848
2849static struct platform_device android_pmem_audio_device = {
2850 .name = "android_pmem",
2851 .id = 4,
2852 .dev = { .platform_data = &android_pmem_audio_pdata },
2853};
2854
Laura Abbott1e36a022011-06-22 17:08:13 -07002855#define PMEM_BUS_WIDTH(_bw) \
2856 { \
2857 .vectors = &(struct msm_bus_vectors){ \
2858 .src = MSM_BUS_MASTER_AMPSS_M0, \
2859 .dst = MSM_BUS_SLAVE_SMI, \
2860 .ib = (_bw), \
2861 .ab = 0, \
2862 }, \
2863 .num_paths = 1, \
2864 }
Olav Hauganee0f7802011-12-19 13:28:57 -08002865
2866static struct msm_bus_paths mem_smi_table[] = {
Laura Abbott1e36a022011-06-22 17:08:13 -07002867 [0] = PMEM_BUS_WIDTH(0), /* Off */
2868 [1] = PMEM_BUS_WIDTH(1), /* On */
2869};
2870
2871static struct msm_bus_scale_pdata smi_client_pdata = {
Olav Hauganee0f7802011-12-19 13:28:57 -08002872 .usecase = mem_smi_table,
2873 .num_usecases = ARRAY_SIZE(mem_smi_table),
2874 .name = "mem_smi",
Laura Abbott1e36a022011-06-22 17:08:13 -07002875};
2876
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002877int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002878{
2879 int bus_id = (int) data;
2880
2881 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002882 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002883}
2884
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002885int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002886{
2887 int bus_id = (int) data;
2888
2889 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002890 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002891}
2892
Alex Bird199980e2011-10-21 11:29:27 -07002893void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002894{
2895 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2896}
Olav Hauganee0f7802011-12-19 13:28:57 -08002897#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002898static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2899 .name = "pmem_smipool",
2900 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2901 .cached = 0,
2902 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002903 .request_region = request_smi_region,
2904 .release_region = release_smi_region,
2905 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002906 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002907};
2908static struct platform_device android_pmem_smipool_device = {
2909 .name = "android_pmem",
2910 .id = 7,
2911 .dev = { .platform_data = &android_pmem_smipool_pdata },
2912};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002913#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002914#endif
2915
2916#define GPIO_DONGLE_PWR_EN 258
2917static void setup_display_power(void);
2918static int lcdc_vga_enabled;
2919static int vga_enable_request(int enable)
2920{
2921 if (enable)
2922 lcdc_vga_enabled = 1;
2923 else
2924 lcdc_vga_enabled = 0;
2925 setup_display_power();
2926
2927 return 0;
2928}
2929
2930#define GPIO_BACKLIGHT_PWM0 0
2931#define GPIO_BACKLIGHT_PWM1 1
2932
2933static int pmic_backlight_gpio[2]
2934 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2935static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2936 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2937 .vga_switch = vga_enable_request,
2938};
2939
2940static struct platform_device lcdc_samsung_panel_device = {
2941 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2942 .id = 0,
2943 .dev = {
2944 .platform_data = &lcdc_samsung_panel_data,
2945 }
2946};
2947#if (!defined(CONFIG_SPI_QUP)) && \
2948 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2949 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2950
2951static int lcdc_spi_gpio_array_num[] = {
2952 LCDC_SPI_GPIO_CLK,
2953 LCDC_SPI_GPIO_CS,
2954 LCDC_SPI_GPIO_MOSI,
2955};
2956
2957static uint32_t lcdc_spi_gpio_config_data[] = {
2958 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2959 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2960 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2961 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2962 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2963 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2964};
2965
2966static void lcdc_config_spi_gpios(int enable)
2967{
2968 int n;
2969 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2970 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2971}
2972#endif
2973
2974#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2975#ifdef CONFIG_SPI_QUP
2976static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2977 {
2978 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2979 .mode = SPI_MODE_3,
2980 .bus_num = 1,
2981 .chip_select = 0,
2982 .max_speed_hz = 10800000,
2983 }
2984};
2985#endif /* CONFIG_SPI_QUP */
2986
2987static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2988#ifndef CONFIG_SPI_QUP
2989 .panel_config_gpio = lcdc_config_spi_gpios,
2990 .gpio_num = lcdc_spi_gpio_array_num,
2991#endif
2992};
2993
2994static struct platform_device lcdc_samsung_oled_panel_device = {
2995 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2996 .id = 0,
2997 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2998};
2999#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
3000
3001#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
3002#ifdef CONFIG_SPI_QUP
3003static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3004 {
3005 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3006 .mode = SPI_MODE_3,
3007 .bus_num = 1,
3008 .chip_select = 0,
3009 .max_speed_hz = 10800000,
3010 }
3011};
3012#endif
3013
3014static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3015#ifndef CONFIG_SPI_QUP
3016 .panel_config_gpio = lcdc_config_spi_gpios,
3017 .gpio_num = lcdc_spi_gpio_array_num,
3018#endif
3019};
3020
3021static struct platform_device lcdc_auo_wvga_panel_device = {
3022 .name = LCDC_AUO_PANEL_NAME,
3023 .id = 0,
3024 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3025};
3026#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3027
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003028#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3029
3030#define GPIO_NT35582_RESET 94
3031#define GPIO_NT35582_BL_EN_HW_PIN 24
3032#define GPIO_NT35582_BL_EN \
3033 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3034
3035static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3036
3037static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3038 .gpio_num = lcdc_nt35582_pmic_gpio,
3039};
3040
3041static struct platform_device lcdc_nt35582_panel_device = {
3042 .name = LCDC_NT35582_PANEL_NAME,
3043 .id = 0,
3044 .dev = {
3045 .platform_data = &lcdc_nt35582_panel_data,
3046 }
3047};
3048
3049static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3050 {
3051 .modalias = "lcdc_nt35582_spi",
3052 .mode = SPI_MODE_0,
3053 .bus_num = 0,
3054 .chip_select = 0,
3055 .max_speed_hz = 1100000,
3056 }
3057};
3058#endif
3059
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003060#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3061static struct resource hdmi_msm_resources[] = {
3062 {
3063 .name = "hdmi_msm_qfprom_addr",
3064 .start = 0x00700000,
3065 .end = 0x007060FF,
3066 .flags = IORESOURCE_MEM,
3067 },
3068 {
3069 .name = "hdmi_msm_hdmi_addr",
3070 .start = 0x04A00000,
3071 .end = 0x04A00FFF,
3072 .flags = IORESOURCE_MEM,
3073 },
3074 {
3075 .name = "hdmi_msm_irq",
3076 .start = HDMI_IRQ,
3077 .end = HDMI_IRQ,
3078 .flags = IORESOURCE_IRQ,
3079 },
3080};
3081
3082static int hdmi_enable_5v(int on);
3083static int hdmi_core_power(int on, int show);
3084static int hdmi_cec_power(int on);
3085
3086static struct msm_hdmi_platform_data hdmi_msm_data = {
3087 .irq = HDMI_IRQ,
3088 .enable_5v = hdmi_enable_5v,
3089 .core_power = hdmi_core_power,
3090 .cec_power = hdmi_cec_power,
3091};
3092
3093static struct platform_device hdmi_msm_device = {
3094 .name = "hdmi_msm",
3095 .id = 0,
3096 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3097 .resource = hdmi_msm_resources,
3098 .dev.platform_data = &hdmi_msm_data,
3099};
3100#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3101
3102#ifdef CONFIG_FB_MSM_MIPI_DSI
3103static struct platform_device mipi_dsi_toshiba_panel_device = {
3104 .name = "mipi_toshiba",
3105 .id = 0,
3106};
3107
3108#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3109
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003110static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003111 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003112 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003113};
3114
3115static struct platform_device mipi_dsi_novatek_panel_device = {
3116 .name = "mipi_novatek",
3117 .id = 0,
3118 .dev = {
3119 .platform_data = &novatek_pdata,
3120 }
3121};
3122#endif
3123
3124static void __init msm8x60_allocate_memory_regions(void)
3125{
3126 void *addr;
3127 unsigned long size;
3128
3129 size = MSM_FB_SIZE;
3130 addr = alloc_bootmem_align(size, 0x1000);
3131 msm_fb_resources[0].start = __pa(addr);
3132 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3133 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3134 size, addr, __pa(addr));
3135
3136}
3137
3138#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3139 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3140/*virtual key support */
3141static ssize_t tma300_vkeys_show(struct kobject *kobj,
3142 struct kobj_attribute *attr, char *buf)
3143{
3144 return sprintf(buf,
3145 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3146 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3147 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3148 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3149 "\n");
3150}
3151
3152static struct kobj_attribute tma300_vkeys_attr = {
3153 .attr = {
3154 .mode = S_IRUGO,
3155 },
3156 .show = &tma300_vkeys_show,
3157};
3158
3159static struct attribute *tma300_properties_attrs[] = {
3160 &tma300_vkeys_attr.attr,
3161 NULL
3162};
3163
3164static struct attribute_group tma300_properties_attr_group = {
3165 .attrs = tma300_properties_attrs,
3166};
3167
3168static struct kobject *properties_kobj;
3169
3170
3171
3172#define CYTTSP_TS_GPIO_IRQ 61
3173static int cyttsp_platform_init(struct i2c_client *client)
3174{
3175 int rc = -EINVAL;
3176 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3177
3178 if (machine_is_msm8x60_fluid()) {
3179 pm8058_l5 = regulator_get(NULL, "8058_l5");
3180 if (IS_ERR(pm8058_l5)) {
3181 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3182 __func__, PTR_ERR(pm8058_l5));
3183 rc = PTR_ERR(pm8058_l5);
3184 return rc;
3185 }
3186 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3187 if (rc) {
3188 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3189 __func__, rc);
3190 goto reg_l5_put;
3191 }
3192
3193 rc = regulator_enable(pm8058_l5);
3194 if (rc) {
3195 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3196 __func__, rc);
3197 goto reg_l5_put;
3198 }
3199 }
3200 /* vote for s3 to enable i2c communication lines */
3201 pm8058_s3 = regulator_get(NULL, "8058_s3");
3202 if (IS_ERR(pm8058_s3)) {
3203 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3204 __func__, PTR_ERR(pm8058_s3));
3205 rc = PTR_ERR(pm8058_s3);
3206 goto reg_l5_disable;
3207 }
3208
3209 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3210 if (rc) {
3211 pr_err("%s: regulator_set_voltage() = %d\n",
3212 __func__, rc);
3213 goto reg_s3_put;
3214 }
3215
3216 rc = regulator_enable(pm8058_s3);
3217 if (rc) {
3218 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3219 __func__, rc);
3220 goto reg_s3_put;
3221 }
3222
3223 /* wait for vregs to stabilize */
3224 usleep_range(10000, 10000);
3225
3226 /* check this device active by reading first byte/register */
3227 rc = i2c_smbus_read_byte_data(client, 0x01);
3228 if (rc < 0) {
3229 pr_err("%s: i2c sanity check failed\n", __func__);
3230 goto reg_s3_disable;
3231 }
3232
3233 /* virtual keys */
3234 if (machine_is_msm8x60_fluid()) {
3235 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3236 properties_kobj = kobject_create_and_add("board_properties",
3237 NULL);
3238 if (properties_kobj)
3239 rc = sysfs_create_group(properties_kobj,
3240 &tma300_properties_attr_group);
3241 if (!properties_kobj || rc)
3242 pr_err("%s: failed to create board_properties\n",
3243 __func__);
3244 }
3245 return CY_OK;
3246
3247reg_s3_disable:
3248 regulator_disable(pm8058_s3);
3249reg_s3_put:
3250 regulator_put(pm8058_s3);
3251reg_l5_disable:
3252 if (machine_is_msm8x60_fluid())
3253 regulator_disable(pm8058_l5);
3254reg_l5_put:
3255 if (machine_is_msm8x60_fluid())
3256 regulator_put(pm8058_l5);
3257 return rc;
3258}
3259
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303260/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3261static int cyttsp_platform_suspend(struct i2c_client *client)
3262{
3263 msleep(20);
3264
3265 return CY_OK;
3266}
3267
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003268static int cyttsp_platform_resume(struct i2c_client *client)
3269{
3270 /* add any special code to strobe a wakeup pin or chip reset */
3271 msleep(10);
3272
3273 return CY_OK;
3274}
3275
3276static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3277 .flags = 0x04,
3278 .gen = CY_GEN3, /* or */
3279 .use_st = CY_USE_ST,
3280 .use_mt = CY_USE_MT,
3281 .use_hndshk = CY_SEND_HNDSHK,
3282 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303283 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003284 .use_gestures = CY_USE_GESTURES,
3285 /* activate up to 4 groups
3286 * and set active distance
3287 */
3288 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3289 CY_GEST_GRP3 | CY_GEST_GRP4 |
3290 CY_ACT_DIST,
3291 /* change act_intrvl to customize the Active power state
3292 * scanning/processing refresh interval for Operating mode
3293 */
3294 .act_intrvl = CY_ACT_INTRVL_DFLT,
3295 /* change tch_tmout to customize the touch timeout for the
3296 * Active power state for Operating mode
3297 */
3298 .tch_tmout = CY_TCH_TMOUT_DFLT,
3299 /* change lp_intrvl to customize the Low Power power state
3300 * scanning/processing refresh interval for Operating mode
3301 */
3302 .lp_intrvl = CY_LP_INTRVL_DFLT,
3303 .sleep_gpio = -1,
3304 .resout_gpio = -1,
3305 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3306 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303307 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003308 .init = cyttsp_platform_init,
3309};
3310
3311static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3312 .panel_maxx = 1083,
3313 .panel_maxy = 659,
3314 .disp_minx = 30,
3315 .disp_maxx = 1053,
3316 .disp_miny = 30,
3317 .disp_maxy = 629,
3318 .correct_fw_ver = 8,
3319 .fw_fname = "cyttsp_8660_ffa.hex",
3320 .flags = 0x00,
3321 .gen = CY_GEN2, /* or */
3322 .use_st = CY_USE_ST,
3323 .use_mt = CY_USE_MT,
3324 .use_hndshk = CY_SEND_HNDSHK,
3325 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303326 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003327 .use_gestures = CY_USE_GESTURES,
3328 /* activate up to 4 groups
3329 * and set active distance
3330 */
3331 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3332 CY_GEST_GRP3 | CY_GEST_GRP4 |
3333 CY_ACT_DIST,
3334 /* change act_intrvl to customize the Active power state
3335 * scanning/processing refresh interval for Operating mode
3336 */
3337 .act_intrvl = CY_ACT_INTRVL_DFLT,
3338 /* change tch_tmout to customize the touch timeout for the
3339 * Active power state for Operating mode
3340 */
3341 .tch_tmout = CY_TCH_TMOUT_DFLT,
3342 /* change lp_intrvl to customize the Low Power power state
3343 * scanning/processing refresh interval for Operating mode
3344 */
3345 .lp_intrvl = CY_LP_INTRVL_DFLT,
3346 .sleep_gpio = -1,
3347 .resout_gpio = -1,
3348 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3349 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303350 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003351 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303352 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003353};
3354static void cyttsp_set_params(void)
3355{
3356 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3357 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3358 cyttsp_fluid_pdata.panel_maxx = 539;
3359 cyttsp_fluid_pdata.panel_maxy = 994;
3360 cyttsp_fluid_pdata.disp_minx = 30;
3361 cyttsp_fluid_pdata.disp_maxx = 509;
3362 cyttsp_fluid_pdata.disp_miny = 60;
3363 cyttsp_fluid_pdata.disp_maxy = 859;
3364 cyttsp_fluid_pdata.correct_fw_ver = 4;
3365 } else {
3366 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3367 cyttsp_fluid_pdata.panel_maxx = 550;
3368 cyttsp_fluid_pdata.panel_maxy = 1013;
3369 cyttsp_fluid_pdata.disp_minx = 35;
3370 cyttsp_fluid_pdata.disp_maxx = 515;
3371 cyttsp_fluid_pdata.disp_miny = 69;
3372 cyttsp_fluid_pdata.disp_maxy = 869;
3373 cyttsp_fluid_pdata.correct_fw_ver = 5;
3374 }
3375
3376}
3377
3378static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3379 {
3380 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3381 .platform_data = &cyttsp_fluid_pdata,
3382#ifndef CY_USE_TIMER
3383 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3384#endif /* CY_USE_TIMER */
3385 },
3386};
3387
3388static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3389 {
3390 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3391 .platform_data = &cyttsp_tmg240_pdata,
3392#ifndef CY_USE_TIMER
3393 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3394#endif /* CY_USE_TIMER */
3395 },
3396};
3397#endif
3398
3399static struct regulator *vreg_tmg200;
3400
3401#define TS_PEN_IRQ_GPIO 61
3402static int tmg200_power(int vreg_on)
3403{
3404 int rc = -EINVAL;
3405
3406 if (!vreg_tmg200) {
3407 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3408 __func__, rc);
3409 return rc;
3410 }
3411
3412 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3413 regulator_disable(vreg_tmg200);
3414 if (rc < 0)
3415 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3416 __func__, vreg_on ? "enable" : "disable", rc);
3417
3418 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003419 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003420
3421 return rc;
3422}
3423
3424static int tmg200_dev_setup(bool enable)
3425{
3426 int rc;
3427
3428 if (enable) {
3429 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3430 if (IS_ERR(vreg_tmg200)) {
3431 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3432 __func__, PTR_ERR(vreg_tmg200));
3433 rc = PTR_ERR(vreg_tmg200);
3434 return rc;
3435 }
3436
3437 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3438 if (rc) {
3439 pr_err("%s: regulator_set_voltage() = %d\n",
3440 __func__, rc);
3441 goto reg_put;
3442 }
3443 } else {
3444 /* put voltage sources */
3445 regulator_put(vreg_tmg200);
3446 }
3447 return 0;
3448reg_put:
3449 regulator_put(vreg_tmg200);
3450 return rc;
3451}
3452
3453static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3454 .ts_name = "msm_tmg200_ts",
3455 .dis_min_x = 0,
3456 .dis_max_x = 1023,
3457 .dis_min_y = 0,
3458 .dis_max_y = 599,
3459 .min_tid = 0,
3460 .max_tid = 255,
3461 .min_touch = 0,
3462 .max_touch = 255,
3463 .min_width = 0,
3464 .max_width = 255,
3465 .power_on = tmg200_power,
3466 .dev_setup = tmg200_dev_setup,
3467 .nfingers = 2,
3468 .irq_gpio = TS_PEN_IRQ_GPIO,
3469 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3470};
3471
3472static struct i2c_board_info cy8ctmg200_board_info[] = {
3473 {
3474 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3475 .platform_data = &cy8ctmg200_pdata,
3476 }
3477};
3478
Zhang Chang Ken211df572011-07-05 19:16:39 -04003479static struct regulator *vreg_tma340;
3480
3481static int tma340_power(int vreg_on)
3482{
3483 int rc = -EINVAL;
3484
3485 if (!vreg_tma340) {
3486 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3487 __func__, rc);
3488 return rc;
3489 }
3490
3491 rc = vreg_on ? regulator_enable(vreg_tma340) :
3492 regulator_disable(vreg_tma340);
3493 if (rc < 0)
3494 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3495 __func__, vreg_on ? "enable" : "disable", rc);
3496
3497 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003498 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003499
3500 return rc;
3501}
3502
3503static struct kobject *tma340_prop_kobj;
3504
3505static int tma340_dragon_dev_setup(bool enable)
3506{
3507 int rc;
3508
3509 if (enable) {
3510 vreg_tma340 = regulator_get(NULL, "8901_l2");
3511 if (IS_ERR(vreg_tma340)) {
3512 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3513 __func__, PTR_ERR(vreg_tma340));
3514 rc = PTR_ERR(vreg_tma340);
3515 return rc;
3516 }
3517
3518 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3519 if (rc) {
3520 pr_err("%s: regulator_set_voltage() = %d\n",
3521 __func__, rc);
3522 goto reg_put;
3523 }
3524 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3525 tma340_prop_kobj = kobject_create_and_add("board_properties",
3526 NULL);
3527 if (tma340_prop_kobj) {
3528 rc = sysfs_create_group(tma340_prop_kobj,
3529 &tma300_properties_attr_group);
3530 if (rc) {
3531 kobject_put(tma340_prop_kobj);
3532 pr_err("%s: failed to create board_properties\n",
3533 __func__);
3534 goto reg_put;
3535 }
3536 }
3537
3538 } else {
3539 /* put voltage sources */
3540 regulator_put(vreg_tma340);
3541 /* destroy virtual keys */
3542 if (tma340_prop_kobj) {
3543 sysfs_remove_group(tma340_prop_kobj,
3544 &tma300_properties_attr_group);
3545 kobject_put(tma340_prop_kobj);
3546 }
3547 }
3548 return 0;
3549reg_put:
3550 regulator_put(vreg_tma340);
3551 return rc;
3552}
3553
3554
3555static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3556 .ts_name = "cy8ctma340",
3557 .dis_min_x = 0,
3558 .dis_max_x = 479,
3559 .dis_min_y = 0,
3560 .dis_max_y = 799,
3561 .min_tid = 0,
3562 .max_tid = 255,
3563 .min_touch = 0,
3564 .max_touch = 255,
3565 .min_width = 0,
3566 .max_width = 255,
3567 .power_on = tma340_power,
3568 .dev_setup = tma340_dragon_dev_setup,
3569 .nfingers = 2,
3570 .irq_gpio = TS_PEN_IRQ_GPIO,
3571 .resout_gpio = -1,
3572};
3573
3574static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3575 {
3576 I2C_BOARD_INFO("cy8ctma340", 0x24),
3577 .platform_data = &cy8ctma340_dragon_pdata,
3578 }
3579};
3580
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003581#ifdef CONFIG_SERIAL_MSM_HS
3582static int configure_uart_gpios(int on)
3583{
3584 int ret = 0, i;
3585 int uart_gpios[] = {53, 54, 55, 56};
3586 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3587 if (on) {
3588 ret = msm_gpiomux_get(uart_gpios[i]);
3589 if (unlikely(ret))
3590 break;
3591 } else {
3592 ret = msm_gpiomux_put(uart_gpios[i]);
3593 if (unlikely(ret))
3594 return ret;
3595 }
3596 }
3597 if (ret)
3598 for (; i >= 0; i--)
3599 msm_gpiomux_put(uart_gpios[i]);
3600 return ret;
3601}
3602static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3603 .inject_rx_on_wakeup = 1,
3604 .rx_to_inject = 0xFD,
3605 .gpio_config = configure_uart_gpios,
3606};
3607#endif
3608
3609
3610#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3611
3612static struct gpio_led gpio_exp_leds_config[] = {
3613 {
3614 .name = "left_led1:green",
3615 .gpio = GPIO_LEFT_LED_1,
3616 .active_low = 1,
3617 .retain_state_suspended = 0,
3618 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3619 },
3620 {
3621 .name = "left_led2:red",
3622 .gpio = GPIO_LEFT_LED_2,
3623 .active_low = 1,
3624 .retain_state_suspended = 0,
3625 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3626 },
3627 {
3628 .name = "left_led3:green",
3629 .gpio = GPIO_LEFT_LED_3,
3630 .active_low = 1,
3631 .retain_state_suspended = 0,
3632 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3633 },
3634 {
3635 .name = "wlan_led:orange",
3636 .gpio = GPIO_LEFT_LED_WLAN,
3637 .active_low = 1,
3638 .retain_state_suspended = 0,
3639 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3640 },
3641 {
3642 .name = "left_led5:green",
3643 .gpio = GPIO_LEFT_LED_5,
3644 .active_low = 1,
3645 .retain_state_suspended = 0,
3646 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3647 },
3648 {
3649 .name = "right_led1:green",
3650 .gpio = GPIO_RIGHT_LED_1,
3651 .active_low = 1,
3652 .retain_state_suspended = 0,
3653 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3654 },
3655 {
3656 .name = "right_led2:red",
3657 .gpio = GPIO_RIGHT_LED_2,
3658 .active_low = 1,
3659 .retain_state_suspended = 0,
3660 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3661 },
3662 {
3663 .name = "right_led3:green",
3664 .gpio = GPIO_RIGHT_LED_3,
3665 .active_low = 1,
3666 .retain_state_suspended = 0,
3667 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3668 },
3669 {
3670 .name = "bt_led:blue",
3671 .gpio = GPIO_RIGHT_LED_BT,
3672 .active_low = 1,
3673 .retain_state_suspended = 0,
3674 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3675 },
3676 {
3677 .name = "right_led5:green",
3678 .gpio = GPIO_RIGHT_LED_5,
3679 .active_low = 1,
3680 .retain_state_suspended = 0,
3681 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3682 },
3683};
3684
3685static struct gpio_led_platform_data gpio_leds_pdata = {
3686 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3687 .leds = gpio_exp_leds_config,
3688};
3689
3690static struct platform_device gpio_leds = {
3691 .name = "leds-gpio",
3692 .id = -1,
3693 .dev = {
3694 .platform_data = &gpio_leds_pdata,
3695 },
3696};
3697
3698static struct gpio_led fluid_gpio_leds[] = {
3699 {
3700 .name = "dual_led:green",
3701 .gpio = GPIO_LED1_GREEN_N,
3702 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3703 .active_low = 1,
3704 .retain_state_suspended = 0,
3705 },
3706 {
3707 .name = "dual_led:red",
3708 .gpio = GPIO_LED2_RED_N,
3709 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3710 .active_low = 1,
3711 .retain_state_suspended = 0,
3712 },
3713};
3714
3715static struct gpio_led_platform_data gpio_led_pdata = {
3716 .leds = fluid_gpio_leds,
3717 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3718};
3719
3720static struct platform_device fluid_leds_gpio = {
3721 .name = "leds-gpio",
3722 .id = -1,
3723 .dev = {
3724 .platform_data = &gpio_led_pdata,
3725 },
3726};
3727
3728#endif
3729
3730#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3731
3732static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3733 .phys_addr_base = 0x00106000,
3734 .reg_offsets = {
3735 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3736 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3737 },
3738 .phys_size = SZ_8K,
3739 .log_len = 4096, /* log's buffer length in bytes */
3740 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3741};
3742
3743static struct platform_device msm_rpm_log_device = {
3744 .name = "msm_rpm_log",
3745 .id = -1,
3746 .dev = {
3747 .platform_data = &msm_rpm_log_pdata,
3748 },
3749};
3750#endif
3751
3752#ifdef CONFIG_BATTERY_MSM8X60
3753static struct msm_charger_platform_data msm_charger_data = {
3754 .safety_time = 180,
3755 .update_time = 1,
3756 .max_voltage = 4200,
3757 .min_voltage = 3200,
3758};
3759
3760static struct platform_device msm_charger_device = {
3761 .name = "msm-charger",
3762 .id = -1,
3763 .dev = {
3764 .platform_data = &msm_charger_data,
3765 }
3766};
3767#endif
3768
3769/*
3770 * Consumer specific regulator names:
3771 * regulator name consumer dev_name
3772 */
3773static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3774 REGULATOR_SUPPLY("8058_l0", NULL),
3775};
3776static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3777 REGULATOR_SUPPLY("8058_l1", NULL),
3778};
3779static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3780 REGULATOR_SUPPLY("8058_l2", NULL),
3781};
3782static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3783 REGULATOR_SUPPLY("8058_l3", NULL),
3784};
3785static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3786 REGULATOR_SUPPLY("8058_l4", NULL),
3787};
3788static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3789 REGULATOR_SUPPLY("8058_l5", NULL),
3790};
3791static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3792 REGULATOR_SUPPLY("8058_l6", NULL),
3793};
3794static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3795 REGULATOR_SUPPLY("8058_l7", NULL),
3796};
3797static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3798 REGULATOR_SUPPLY("8058_l8", NULL),
3799};
3800static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3801 REGULATOR_SUPPLY("8058_l9", NULL),
3802};
3803static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3804 REGULATOR_SUPPLY("8058_l10", NULL),
3805};
3806static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3807 REGULATOR_SUPPLY("8058_l11", NULL),
3808};
3809static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3810 REGULATOR_SUPPLY("8058_l12", NULL),
3811};
3812static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3813 REGULATOR_SUPPLY("8058_l13", NULL),
3814};
3815static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3816 REGULATOR_SUPPLY("8058_l14", NULL),
3817};
3818static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3819 REGULATOR_SUPPLY("8058_l15", NULL),
3820};
3821static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3822 REGULATOR_SUPPLY("8058_l16", NULL),
3823};
3824static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3825 REGULATOR_SUPPLY("8058_l17", NULL),
3826};
3827static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3828 REGULATOR_SUPPLY("8058_l18", NULL),
3829};
3830static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3831 REGULATOR_SUPPLY("8058_l19", NULL),
3832};
3833static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3834 REGULATOR_SUPPLY("8058_l20", NULL),
3835};
3836static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3837 REGULATOR_SUPPLY("8058_l21", NULL),
3838};
3839static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3840 REGULATOR_SUPPLY("8058_l22", NULL),
3841};
3842static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3843 REGULATOR_SUPPLY("8058_l23", NULL),
3844};
3845static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3846 REGULATOR_SUPPLY("8058_l24", NULL),
3847};
3848static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3849 REGULATOR_SUPPLY("8058_l25", NULL),
3850};
3851static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3852 REGULATOR_SUPPLY("8058_s0", NULL),
3853};
3854static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3855 REGULATOR_SUPPLY("8058_s1", NULL),
3856};
3857static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3858 REGULATOR_SUPPLY("8058_s2", NULL),
3859};
3860static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3861 REGULATOR_SUPPLY("8058_s3", NULL),
3862};
3863static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3864 REGULATOR_SUPPLY("8058_s4", NULL),
3865};
3866static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3867 REGULATOR_SUPPLY("8058_lvs0", NULL),
3868};
3869static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3870 REGULATOR_SUPPLY("8058_lvs1", NULL),
3871};
3872static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3873 REGULATOR_SUPPLY("8058_ncp", NULL),
3874};
3875
3876static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3877 REGULATOR_SUPPLY("8901_l0", NULL),
3878};
3879static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3880 REGULATOR_SUPPLY("8901_l1", NULL),
3881};
3882static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3883 REGULATOR_SUPPLY("8901_l2", NULL),
3884};
3885static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3886 REGULATOR_SUPPLY("8901_l3", NULL),
3887};
3888static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3889 REGULATOR_SUPPLY("8901_l4", NULL),
3890};
3891static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3892 REGULATOR_SUPPLY("8901_l5", NULL),
3893};
3894static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3895 REGULATOR_SUPPLY("8901_l6", NULL),
3896};
3897static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3898 REGULATOR_SUPPLY("8901_s2", NULL),
3899};
3900static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3901 REGULATOR_SUPPLY("8901_s3", NULL),
3902};
3903static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3904 REGULATOR_SUPPLY("8901_s4", NULL),
3905};
3906static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3907 REGULATOR_SUPPLY("8901_lvs0", NULL),
3908};
3909static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3910 REGULATOR_SUPPLY("8901_lvs1", NULL),
3911};
3912static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3913 REGULATOR_SUPPLY("8901_lvs2", NULL),
3914};
3915static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3916 REGULATOR_SUPPLY("8901_lvs3", NULL),
3917};
3918static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3919 REGULATOR_SUPPLY("8901_mvs0", NULL),
3920};
3921
David Collins6f032ba2011-08-31 14:08:15 -07003922/* Pin control regulators */
3923static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3924 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3925};
3926static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3927 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3928};
3929static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3930 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3931};
3932static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3933 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3934};
3935static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3936 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3937};
3938static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3939 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3940};
3941
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003942#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3943 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003944 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003945 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003946 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003947 .init_data = { \
3948 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003949 .valid_modes_mask = _modes, \
3950 .valid_ops_mask = _ops, \
3951 .min_uV = _min_uV, \
3952 .max_uV = _max_uV, \
3953 .input_uV = _min_uV, \
3954 .apply_uV = _apply_uV, \
3955 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003956 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003957 .consumer_supplies = vreg_consumers_##_id, \
3958 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003959 ARRAY_SIZE(vreg_consumers_##_id), \
3960 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003961 .id = RPM_VREG_ID_##_id, \
3962 .default_uV = _default_uV, \
3963 .peak_uA = _peak_uA, \
3964 .avg_uA = _avg_uA, \
3965 .pull_down_enable = _pull_down, \
3966 .pin_ctrl = _pin_ctrl, \
3967 .freq = RPM_VREG_FREQ_##_freq, \
3968 .pin_fn = _pin_fn, \
3969 .force_mode = _force_mode, \
3970 .state = _state, \
3971 .sleep_selectable = _sleep_selectable, \
3972 }
3973
3974/* Pin control initialization */
3975#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3976 { \
3977 .init_data = { \
3978 .constraints = { \
3979 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3980 .always_on = _always_on, \
3981 }, \
3982 .num_consumer_supplies = \
3983 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3984 .consumer_supplies = vreg_consumers_##_id##_PC, \
3985 }, \
3986 .id = RPM_VREG_ID_##_id##_PC, \
3987 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003988 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003989 }
3990
3991/*
3992 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3993 * via the peak_uA value specified in the table below. If the value is less
3994 * than the high power min threshold for the regulator, then the regulator will
3995 * be set to LPM. Otherwise, it will be set to HPM.
3996 *
3997 * This value can be further overridden by specifying an initial mode via
3998 * .init_data.constraints.initial_mode.
3999 */
4000
David Collins6f032ba2011-08-31 14:08:15 -07004001#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4002 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004003 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4004 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4005 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4006 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4007 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004008 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4009 RPM_VREG_PIN_FN_8660_ENABLE, \
4010 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004011 _sleep_selectable, _always_on)
4012
David Collins6f032ba2011-08-31 14:08:15 -07004013#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4014 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004015 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4016 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4017 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4018 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4019 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004020 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4021 RPM_VREG_PIN_FN_8660_ENABLE, \
4022 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4023 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004024
David Collins6f032ba2011-08-31 14:08:15 -07004025#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004026 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4027 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004028 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4029 RPM_VREG_PIN_FN_8660_ENABLE, \
4030 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4031 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004032
David Collins6f032ba2011-08-31 14:08:15 -07004033#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004034 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4035 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004036 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4037 RPM_VREG_PIN_FN_8660_ENABLE, \
4038 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4039 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004040
David Collins6f032ba2011-08-31 14:08:15 -07004041#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4042#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4043#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4044#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4045#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004046
David Collins6f032ba2011-08-31 14:08:15 -07004047/* RPM early regulator constraints */
4048static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4049 /* ID a_on pd ss min_uV max_uV init_ip freq */
4050 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4051 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004052};
4053
David Collins6f032ba2011-08-31 14:08:15 -07004054/* RPM regulator constraints */
4055static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4056 /* ID a_on pd ss min_uV max_uV init_ip */
4057 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4058 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4059 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4060 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4061 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4062 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4063 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4064 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4065 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4066 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4067 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4068 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4069 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4070 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4071 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4072 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4073 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4074 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4075 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4076 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4077 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4078 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4079 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4080 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4081 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4082 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004083
David Collins6f032ba2011-08-31 14:08:15 -07004084 /* ID a_on pd ss min_uV max_uV init_ip freq */
4085 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4086 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4087 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4088
4089 /* ID a_on pd ss */
4090 RPM_VS(PM8058_LVS0, 0, 1, 0),
4091 RPM_VS(PM8058_LVS1, 0, 1, 0),
4092
4093 /* ID a_on pd ss min_uV max_uV */
4094 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4095
4096 /* ID a_on pd ss min_uV max_uV init_ip */
4097 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4098 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4099 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4100 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4101 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4102 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4103 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4104
4105 /* ID a_on pd ss min_uV max_uV init_ip freq */
4106 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4107 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4108 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4109
4110 /* ID a_on pd ss */
4111 RPM_VS(PM8901_LVS0, 1, 1, 0),
4112 RPM_VS(PM8901_LVS1, 0, 1, 0),
4113 RPM_VS(PM8901_LVS2, 0, 1, 0),
4114 RPM_VS(PM8901_LVS3, 0, 1, 0),
4115 RPM_VS(PM8901_MVS0, 0, 1, 0),
4116
4117 /* ID a_on pin_func pin_ctrl */
4118 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4119 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4120 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4121 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4122 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4123 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4124};
4125
4126static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4127 .init_data = rpm_regulator_early_init_data,
4128 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4129 .version = RPM_VREG_VERSION_8660,
4130 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4131 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4132};
4133
4134static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4135 .init_data = rpm_regulator_init_data,
4136 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4137 .version = RPM_VREG_VERSION_8660,
4138};
4139
4140static struct platform_device rpm_regulator_early_device = {
4141 .name = "rpm-regulator",
4142 .id = 0,
4143 .dev = {
4144 .platform_data = &rpm_regulator_early_pdata,
4145 },
4146};
4147
4148static struct platform_device rpm_regulator_device = {
4149 .name = "rpm-regulator",
4150 .id = 1,
4151 .dev = {
4152 .platform_data = &rpm_regulator_pdata,
4153 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004154};
4155
4156static struct platform_device *early_regulators[] __initdata = {
4157 &msm_device_saw_s0,
4158 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004159 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004160};
4161
4162static struct platform_device *early_devices[] __initdata = {
4163#ifdef CONFIG_MSM_BUS_SCALING
4164 &msm_bus_apps_fabric,
4165 &msm_bus_sys_fabric,
4166 &msm_bus_mm_fabric,
4167 &msm_bus_sys_fpb,
4168 &msm_bus_cpss_fpb,
4169#endif
4170 &msm_device_dmov_adm0,
4171 &msm_device_dmov_adm1,
4172};
4173
4174#if (defined(CONFIG_MARIMBA_CORE)) && \
4175 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4176
4177static int bluetooth_power(int);
4178static struct platform_device msm_bt_power_device = {
4179 .name = "bt_power",
4180 .id = -1,
4181 .dev = {
4182 .platform_data = &bluetooth_power,
4183 },
4184};
4185#endif
4186
4187static struct platform_device msm_tsens_device = {
4188 .name = "tsens-tm",
4189 .id = -1,
4190};
4191
4192static struct platform_device *rumi_sim_devices[] __initdata = {
4193 &smc91x_device,
4194 &msm_device_uart_dm12,
4195#ifdef CONFIG_I2C_QUP
4196 &msm_gsbi3_qup_i2c_device,
4197 &msm_gsbi4_qup_i2c_device,
4198 &msm_gsbi7_qup_i2c_device,
4199 &msm_gsbi8_qup_i2c_device,
4200 &msm_gsbi9_qup_i2c_device,
4201 &msm_gsbi12_qup_i2c_device,
4202#endif
4203#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004204 &msm_device_ssbi3,
4205#endif
4206#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004207#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004208 &android_pmem_device,
4209 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004210 &android_pmem_smipool_device,
4211#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004212 &android_pmem_audio_device,
4213#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004214#ifdef CONFIG_MSM_ROTATOR
4215 &msm_rotator_device,
4216#endif
4217 &msm_fb_device,
4218 &msm_kgsl_3d0,
4219 &msm_kgsl_2d0,
4220 &msm_kgsl_2d1,
4221 &lcdc_samsung_panel_device,
4222#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4223 &hdmi_msm_device,
4224#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4225#ifdef CONFIG_MSM_CAMERA
4226#ifdef CONFIG_MT9E013
4227 &msm_camera_sensor_mt9e013,
4228#endif
4229#ifdef CONFIG_IMX074
4230 &msm_camera_sensor_imx074,
4231#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004232#ifdef CONFIG_VX6953
4233 &msm_camera_sensor_vx6953,
4234#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004235#ifdef CONFIG_WEBCAM_OV7692
4236 &msm_camera_sensor_webcam_ov7692,
4237#endif
4238#ifdef CONFIG_WEBCAM_OV9726
4239 &msm_camera_sensor_webcam_ov9726,
4240#endif
4241#ifdef CONFIG_QS_S5K4E1
4242 &msm_camera_sensor_qs_s5k4e1,
4243#endif
4244#endif
4245#ifdef CONFIG_MSM_GEMINI
4246 &msm_gemini_device,
4247#endif
4248#ifdef CONFIG_MSM_VPE
4249 &msm_vpe_device,
4250#endif
4251 &msm_device_vidc,
4252};
4253
4254#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4255enum {
4256 SX150X_CORE,
4257 SX150X_DOCKING,
4258 SX150X_SURF,
4259 SX150X_LEFT_FHA,
4260 SX150X_RIGHT_FHA,
4261 SX150X_SOUTH,
4262 SX150X_NORTH,
4263 SX150X_CORE_FLUID,
4264};
4265
4266static struct sx150x_platform_data sx150x_data[] __initdata = {
4267 [SX150X_CORE] = {
4268 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4269 .oscio_is_gpo = false,
4270 .io_pullup_ena = 0x0c08,
4271 .io_pulldn_ena = 0x4060,
4272 .io_open_drain_ena = 0x000c,
4273 .io_polarity = 0,
4274 .irq_summary = -1, /* see fixup_i2c_configs() */
4275 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4276 },
4277 [SX150X_DOCKING] = {
4278 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4279 .oscio_is_gpo = false,
4280 .io_pullup_ena = 0x5e06,
4281 .io_pulldn_ena = 0x81b8,
4282 .io_open_drain_ena = 0,
4283 .io_polarity = 0,
4284 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4285 UI_INT2_N),
4286 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4287 GPIO_DOCKING_EXPANDER_BASE -
4288 GPIO_EXPANDER_GPIO_BASE,
4289 },
4290 [SX150X_SURF] = {
4291 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4292 .oscio_is_gpo = false,
4293 .io_pullup_ena = 0,
4294 .io_pulldn_ena = 0,
4295 .io_open_drain_ena = 0,
4296 .io_polarity = 0,
4297 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4298 UI_INT1_N),
4299 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4300 GPIO_SURF_EXPANDER_BASE -
4301 GPIO_EXPANDER_GPIO_BASE,
4302 },
4303 [SX150X_LEFT_FHA] = {
4304 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4305 .oscio_is_gpo = false,
4306 .io_pullup_ena = 0,
4307 .io_pulldn_ena = 0x40,
4308 .io_open_drain_ena = 0,
4309 .io_polarity = 0,
4310 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4311 UI_INT3_N),
4312 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4313 GPIO_LEFT_KB_EXPANDER_BASE -
4314 GPIO_EXPANDER_GPIO_BASE,
4315 },
4316 [SX150X_RIGHT_FHA] = {
4317 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4318 .oscio_is_gpo = true,
4319 .io_pullup_ena = 0,
4320 .io_pulldn_ena = 0,
4321 .io_open_drain_ena = 0,
4322 .io_polarity = 0,
4323 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4324 UI_INT3_N),
4325 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4326 GPIO_RIGHT_KB_EXPANDER_BASE -
4327 GPIO_EXPANDER_GPIO_BASE,
4328 },
4329 [SX150X_SOUTH] = {
4330 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4331 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4332 GPIO_SOUTH_EXPANDER_BASE -
4333 GPIO_EXPANDER_GPIO_BASE,
4334 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4335 },
4336 [SX150X_NORTH] = {
4337 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4338 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4339 GPIO_NORTH_EXPANDER_BASE -
4340 GPIO_EXPANDER_GPIO_BASE,
4341 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4342 .oscio_is_gpo = true,
4343 .io_open_drain_ena = 0x30,
4344 },
4345 [SX150X_CORE_FLUID] = {
4346 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4347 .oscio_is_gpo = false,
4348 .io_pullup_ena = 0x0408,
4349 .io_pulldn_ena = 0x4060,
4350 .io_open_drain_ena = 0x0008,
4351 .io_polarity = 0,
4352 .irq_summary = -1, /* see fixup_i2c_configs() */
4353 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4354 },
4355};
4356
4357#ifdef CONFIG_SENSORS_MSM_ADC
4358/* Configuration of EPM expander is done when client
4359 * request an adc read
4360 */
4361static struct sx150x_platform_data sx150x_epmdata = {
4362 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4363 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4364 GPIO_EPM_EXPANDER_BASE -
4365 GPIO_EXPANDER_GPIO_BASE,
4366 .irq_summary = -1,
4367};
4368#endif
4369
4370/* sx150x_low_power_cfg
4371 *
4372 * This data and init function are used to put unused gpio-expander output
4373 * lines into their low-power states at boot. The init
4374 * function must be deferred until a later init stage because the i2c
4375 * gpio expander drivers do not probe until after they are registered
4376 * (see register_i2c_devices) and the work-queues for those registrations
4377 * are processed. Because these lines are unused, there is no risk of
4378 * competing with a device driver for the gpio.
4379 *
4380 * gpio lines whose low-power states are input are naturally in their low-
4381 * power configurations once probed, see the platform data structures above.
4382 */
4383struct sx150x_low_power_cfg {
4384 unsigned gpio;
4385 unsigned val;
4386};
4387
4388static struct sx150x_low_power_cfg
4389common_sx150x_lp_cfgs[] __initdata = {
4390 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4391 {GPIO_EXT_GPS_LNA_EN, 0},
4392 {GPIO_MSM_WAKES_BT, 0},
4393 {GPIO_USB_UICC_EN, 0},
4394 {GPIO_BATT_GAUGE_EN, 0},
4395};
4396
4397static struct sx150x_low_power_cfg
4398surf_ffa_sx150x_lp_cfgs[] __initdata = {
4399 {GPIO_MIPI_DSI_RST_N, 0},
4400 {GPIO_DONGLE_PWR_EN, 0},
4401 {GPIO_CAP_TS_SLEEP, 1},
4402 {GPIO_WEB_CAMIF_RESET_N, 0},
4403};
4404
4405static void __init
4406cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4407{
4408 unsigned n;
4409 int rc;
4410
4411 for (n = 0; n < nelems; ++n) {
4412 rc = gpio_request(cfgs[n].gpio, NULL);
4413 if (!rc) {
4414 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4415 gpio_free(cfgs[n].gpio);
4416 }
4417
4418 if (rc) {
4419 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4420 __func__, cfgs[n].gpio, rc);
4421 }
Steve Muckle9161d302010-02-11 11:50:40 -08004422 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004423}
4424
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004425static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004426{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004427 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4428 ARRAY_SIZE(common_sx150x_lp_cfgs));
4429 if (!machine_is_msm8x60_fluid())
4430 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4431 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4432 return 0;
4433}
4434module_init(cfg_sx150xs_low_power);
4435
4436#ifdef CONFIG_I2C
4437static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4438 {
4439 I2C_BOARD_INFO("sx1509q", 0x3e),
4440 .platform_data = &sx150x_data[SX150X_CORE]
4441 },
4442};
4443
4444static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4445 {
4446 I2C_BOARD_INFO("sx1509q", 0x3f),
4447 .platform_data = &sx150x_data[SX150X_DOCKING]
4448 },
4449};
4450
4451static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4452 {
4453 I2C_BOARD_INFO("sx1509q", 0x70),
4454 .platform_data = &sx150x_data[SX150X_SURF]
4455 }
4456};
4457
4458static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4459 {
4460 I2C_BOARD_INFO("sx1508q", 0x21),
4461 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4462 },
4463 {
4464 I2C_BOARD_INFO("sx1508q", 0x22),
4465 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4466 }
4467};
4468
4469static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4470 {
4471 I2C_BOARD_INFO("sx1508q", 0x23),
4472 .platform_data = &sx150x_data[SX150X_SOUTH]
4473 },
4474 {
4475 I2C_BOARD_INFO("sx1508q", 0x20),
4476 .platform_data = &sx150x_data[SX150X_NORTH]
4477 }
4478};
4479
4480static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4481 {
4482 I2C_BOARD_INFO("sx1509q", 0x3e),
4483 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4484 },
4485};
4486
4487#ifdef CONFIG_SENSORS_MSM_ADC
4488static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4489 {
4490 I2C_BOARD_INFO("sx1509q", 0x3e),
4491 .platform_data = &sx150x_epmdata
4492 },
4493};
4494#endif
4495#endif
4496#endif
4497
4498#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004499
4500static struct adc_access_fn xoadc_fn = {
4501 pm8058_xoadc_select_chan_and_start_conv,
4502 pm8058_xoadc_read_adc_code,
4503 pm8058_xoadc_get_properties,
4504 pm8058_xoadc_slot_request,
4505 pm8058_xoadc_restore_slot,
4506 pm8058_xoadc_calibrate,
4507};
4508
4509#if defined(CONFIG_I2C) && \
4510 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4511static struct regulator *vreg_adc_epm1;
4512
4513static struct i2c_client *epm_expander_i2c_register_board(void)
4514
4515{
4516 struct i2c_adapter *i2c_adap;
4517 struct i2c_client *client = NULL;
4518 i2c_adap = i2c_get_adapter(0x0);
4519
4520 if (i2c_adap == NULL)
4521 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4522
4523 if (i2c_adap != NULL)
4524 client = i2c_new_device(i2c_adap,
4525 &fluid_expanders_i2c_epm_info[0]);
4526 return client;
4527
4528}
4529
4530static unsigned int msm_adc_gpio_configure_expander_enable(void)
4531{
4532 int rc = 0;
4533 static struct i2c_client *epm_i2c_client;
4534
4535 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4536
4537 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4538
4539 if (IS_ERR(vreg_adc_epm1)) {
4540 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4541 return 0;
4542 }
4543
4544 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4545 if (rc)
4546 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4547 "regulator set voltage failed\n");
4548
4549 rc = regulator_enable(vreg_adc_epm1);
4550 if (rc) {
4551 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4552 "Error while enabling regulator for epm s3 %d\n", rc);
4553 return rc;
4554 }
4555
4556 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4557 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4558
4559 msleep(1000);
4560
4561 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4562 if (!rc) {
4563 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4564 "Configure 5v boost\n");
4565 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4566 } else {
4567 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4568 "Error for epm 5v boost en\n");
4569 goto exit_vreg_epm;
4570 }
4571
4572 msleep(500);
4573
4574 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4575 if (!rc) {
4576 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4577 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4578 "Configure epm 3.3v\n");
4579 } else {
4580 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4581 "Error for gpio 3.3ven\n");
4582 goto exit_vreg_epm;
4583 }
4584 msleep(500);
4585
4586 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4587 "Trying to request EPM LVLSFT_EN\n");
4588 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4589 if (!rc) {
4590 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4591 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4592 "Configure the lvlsft\n");
4593 } else {
4594 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4595 "Error for epm lvlsft_en\n");
4596 goto exit_vreg_epm;
4597 }
4598
4599 msleep(500);
4600
4601 if (!epm_i2c_client)
4602 epm_i2c_client = epm_expander_i2c_register_board();
4603
4604 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4605 if (!rc)
4606 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4607 if (rc) {
4608 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4609 ": GPIO PWR MON Enable issue\n");
4610 goto exit_vreg_epm;
4611 }
4612
4613 msleep(1000);
4614
4615 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4616 if (!rc) {
4617 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4618 if (rc) {
4619 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4620 ": ADC1_PWDN error direction out\n");
4621 goto exit_vreg_epm;
4622 }
4623 }
4624
4625 msleep(100);
4626
4627 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4628 if (!rc) {
4629 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4630 if (rc) {
4631 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4632 ": ADC2_PWD error direction out\n");
4633 goto exit_vreg_epm;
4634 }
4635 }
4636
4637 msleep(1000);
4638
4639 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4640 if (!rc) {
4641 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4642 if (rc) {
4643 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4644 "Gpio request problem %d\n", rc);
4645 goto exit_vreg_epm;
4646 }
4647 }
4648
4649 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4650 if (!rc) {
4651 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4652 if (rc) {
4653 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4654 ": EPM_SPI_ADC1_CS_N error\n");
4655 goto exit_vreg_epm;
4656 }
4657 }
4658
4659 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4660 if (!rc) {
4661 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4662 if (rc) {
4663 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4664 ": EPM_SPI_ADC2_Cs_N error\n");
4665 goto exit_vreg_epm;
4666 }
4667 }
4668
4669 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4670 "the power monitor reset for epm\n");
4671
4672 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4673 if (!rc) {
4674 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4675 if (rc) {
4676 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4677 ": Error in the power mon reset\n");
4678 goto exit_vreg_epm;
4679 }
4680 }
4681
4682 msleep(1000);
4683
4684 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4685
4686 msleep(500);
4687
4688 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4689
4690 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4691
4692 return rc;
4693
4694exit_vreg_epm:
4695 regulator_disable(vreg_adc_epm1);
4696
4697 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4698 " rc = %d.\n", rc);
4699 return rc;
4700};
4701
4702static unsigned int msm_adc_gpio_configure_expander_disable(void)
4703{
4704 int rc = 0;
4705
4706 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4707 gpio_free(GPIO_PWR_MON_RESET_N);
4708
4709 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4710 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4711
4712 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4713 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4714
4715 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4716 gpio_free(GPIO_PWR_MON_START);
4717
4718 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4719 gpio_free(GPIO_ADC1_PWDN_N);
4720
4721 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4722 gpio_free(GPIO_ADC2_PWDN_N);
4723
4724 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4725 gpio_free(GPIO_PWR_MON_ENABLE);
4726
4727 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4728 gpio_free(GPIO_EPM_LVLSFT_EN);
4729
4730 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4731 gpio_free(GPIO_EPM_5V_BOOST_EN);
4732
4733 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4734 gpio_free(GPIO_EPM_3_3V_EN);
4735
4736 rc = regulator_disable(vreg_adc_epm1);
4737 if (rc)
4738 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4739 "Error while enabling regulator for epm s3 %d\n", rc);
4740 regulator_put(vreg_adc_epm1);
4741
4742 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4743 return rc;
4744};
4745
4746unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4747{
4748 int rc = 0;
4749
4750 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4751 cs_enable);
4752
4753 if (cs_enable < 16) {
4754 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4755 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4756 } else {
4757 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4758 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4759 }
4760 return rc;
4761};
4762
4763unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4764{
4765 int rc = 0;
4766
4767 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4768
4769 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4770
4771 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4772
4773 return rc;
4774};
4775#endif
4776
4777static struct msm_adc_channels msm_adc_channels_data[] = {
4778 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4779 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4780 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4781 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4782 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4783 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4784 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4785 CHAN_PATH_TYPE4,
4786 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4787 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4788 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4789 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4790 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4791 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4792 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4793 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4794 CHAN_PATH_TYPE12,
4795 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4796 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4797 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4798 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4799 CHAN_PATH_TYPE_NONE,
4800 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4801 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4802 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4803 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4804 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4805 scale_xtern_chgr_cur},
4806 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4807 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4808 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4809 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4810 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4811 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4812 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4813 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4814 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4815 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4816 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4817 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4818};
4819
4820static char *msm_adc_fluid_device_names[] = {
4821 "ADS_ADC1",
4822 "ADS_ADC2",
4823};
4824
4825static struct msm_adc_platform_data msm_adc_pdata = {
4826 .channel = msm_adc_channels_data,
4827 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4828#if defined(CONFIG_I2C) && \
4829 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4830 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4831 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4832 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4833 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4834#endif
4835};
4836
4837static struct platform_device msm_adc_device = {
4838 .name = "msm_adc",
4839 .id = -1,
4840 .dev = {
4841 .platform_data = &msm_adc_pdata,
4842 },
4843};
4844
4845static void pmic8058_xoadc_mpp_config(void)
4846{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304847 int rc, i;
4848 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304849 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304850 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304851 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304852 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304853 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304854 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304855 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304856 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304857 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304858 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304859 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4860 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304861 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004862
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304863 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4864 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4865 &xoadc_mpps[i].config);
4866 if (rc) {
4867 pr_err("%s: Config MPP %d of PM8058 failed\n",
4868 __func__, xoadc_mpps[i].mpp);
4869 }
4870 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004871}
4872
4873static struct regulator *vreg_ldo18_adc;
4874
4875static int pmic8058_xoadc_vreg_config(int on)
4876{
4877 int rc;
4878
4879 if (on) {
4880 rc = regulator_enable(vreg_ldo18_adc);
4881 if (rc)
4882 pr_err("%s: Enable of regulator ldo18_adc "
4883 "failed\n", __func__);
4884 } else {
4885 rc = regulator_disable(vreg_ldo18_adc);
4886 if (rc)
4887 pr_err("%s: Disable of regulator ldo18_adc "
4888 "failed\n", __func__);
4889 }
4890
4891 return rc;
4892}
4893
4894static int pmic8058_xoadc_vreg_setup(void)
4895{
4896 int rc;
4897
4898 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4899 if (IS_ERR(vreg_ldo18_adc)) {
4900 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4901 __func__, PTR_ERR(vreg_ldo18_adc));
4902 rc = PTR_ERR(vreg_ldo18_adc);
4903 goto fail;
4904 }
4905
4906 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4907 if (rc) {
4908 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4909 goto fail;
4910 }
4911
4912 return rc;
4913fail:
4914 regulator_put(vreg_ldo18_adc);
4915 return rc;
4916}
4917
4918static void pmic8058_xoadc_vreg_shutdown(void)
4919{
4920 regulator_put(vreg_ldo18_adc);
4921}
4922
4923/* usec. For this ADC,
4924 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4925 * Each channel has different configuration, thus at the time of starting
4926 * the conversion, xoadc will return actual conversion time
4927 * */
4928static struct adc_properties pm8058_xoadc_data = {
4929 .adc_reference = 2200, /* milli-voltage for this adc */
4930 .bitresolution = 15,
4931 .bipolar = 0,
4932 .conversiontime = 54,
4933};
4934
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304935static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004936 .xoadc_prop = &pm8058_xoadc_data,
4937 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4938 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4939 .xoadc_num = XOADC_PMIC_0,
4940 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4941 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4942};
4943#endif
4944
4945#ifdef CONFIG_MSM_SDIO_AL
4946
4947static unsigned mdm2ap_status = 140;
4948
4949static int configure_mdm2ap_status(int on)
4950{
4951 int ret = 0;
4952 if (on)
4953 ret = msm_gpiomux_get(mdm2ap_status);
4954 else
4955 ret = msm_gpiomux_put(mdm2ap_status);
4956
4957 if (ret)
4958 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4959 on);
4960
4961 return ret;
4962}
4963
4964
4965static int get_mdm2ap_status(void)
4966{
4967 return gpio_get_value(mdm2ap_status);
4968}
4969
4970static struct sdio_al_platform_data sdio_al_pdata = {
4971 .config_mdm2ap_status = configure_mdm2ap_status,
4972 .get_mdm2ap_status = get_mdm2ap_status,
4973 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004974 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004975 .peer_sdioc_version_major = 0x0004,
4976 .peer_sdioc_boot_version_minor = 0x0001,
4977 .peer_sdioc_boot_version_major = 0x0003
4978};
4979
4980struct platform_device msm_device_sdio_al = {
4981 .name = "msm_sdio_al",
4982 .id = -1,
4983 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004984 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004985 .platform_data = &sdio_al_pdata,
4986 },
4987};
4988
4989#endif /* CONFIG_MSM_SDIO_AL */
4990
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304991#define GPIO_VREG_ID_EXT_5V 0
4992
4993static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4994 REGULATOR_SUPPLY("ext_5v", NULL),
4995 REGULATOR_SUPPLY("8901_mpp0", NULL),
4996};
4997
4998#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
4999 [GPIO_VREG_ID_##_id] = { \
5000 .init_data = { \
5001 .constraints = { \
5002 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5003 }, \
5004 .num_consumer_supplies = \
5005 ARRAY_SIZE(vreg_consumers_##_id), \
5006 .consumer_supplies = vreg_consumers_##_id, \
5007 }, \
5008 .regulator_name = _reg_name, \
5009 .active_low = _active_low, \
5010 .gpio_label = _gpio_label, \
5011 .gpio = _gpio, \
5012 }
5013
5014/* GPIO regulator constraints */
5015static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5016 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5017 PM8901_MPP_PM_TO_SYS(0), 0),
5018};
5019
5020/* GPIO regulator */
5021static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5022 .name = GPIO_REGULATOR_DEV_NAME,
5023 .id = PM8901_MPP_PM_TO_SYS(0),
5024 .dev = {
5025 .platform_data =
5026 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5027 },
5028};
5029
5030static void __init pm8901_vreg_mpp0_init(void)
5031{
5032 int rc;
5033
5034 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5035 .mpp = PM8901_MPP_PM_TO_SYS(0),
5036 .config = {
5037 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5038 .level = PM8901_MPP_DIG_LEVEL_VPH,
5039 },
5040 };
5041
5042 /*
5043 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5044 * implies that the regulator connected to MPP0 is enabled when
5045 * MPP0 is low.
5046 */
5047 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5048 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5049 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5050 } else {
5051 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5052 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5053 }
5054
5055 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5056 if (rc)
5057 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5058}
5059
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005060static struct platform_device *charm_devices[] __initdata = {
5061 &msm_charm_modem,
5062#ifdef CONFIG_MSM_SDIO_AL
5063 &msm_device_sdio_al,
5064#endif
5065};
5066
Lei Zhou338cab82011-08-19 13:38:17 -04005067#ifdef CONFIG_SND_SOC_MSM8660_APQ
5068static struct platform_device *dragon_alsa_devices[] __initdata = {
5069 &msm_pcm,
5070 &msm_pcm_routing,
5071 &msm_cpudai0,
5072 &msm_cpudai1,
5073 &msm_cpudai_hdmi_rx,
5074 &msm_cpudai_bt_rx,
5075 &msm_cpudai_bt_tx,
5076 &msm_cpudai_fm_rx,
5077 &msm_cpudai_fm_tx,
5078 &msm_cpu_fe,
5079 &msm_stub_codec,
5080 &msm_lpa_pcm,
5081};
5082#endif
5083
5084static struct platform_device *asoc_devices[] __initdata = {
5085 &asoc_msm_pcm,
5086 &asoc_msm_dai0,
5087 &asoc_msm_dai1,
5088};
5089
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005090static struct platform_device *surf_devices[] __initdata = {
5091 &msm_device_smd,
5092 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005093 &msm_pil_q6v3,
Stephen Boyd4eb885b2011-09-29 01:16:03 -07005094 &msm_pil_modem,
Stephen Boydd89eebe2011-09-28 23:28:11 -07005095 &msm_pil_tzapps,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005096#ifdef CONFIG_I2C_QUP
5097 &msm_gsbi3_qup_i2c_device,
5098 &msm_gsbi4_qup_i2c_device,
5099 &msm_gsbi7_qup_i2c_device,
5100 &msm_gsbi8_qup_i2c_device,
5101 &msm_gsbi9_qup_i2c_device,
5102 &msm_gsbi12_qup_i2c_device,
5103#endif
5104#ifdef CONFIG_SERIAL_MSM_HS
5105 &msm_device_uart_dm1,
5106#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305107#ifdef CONFIG_MSM_SSBI
5108 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305109 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305110#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005111#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005112 &msm_device_ssbi3,
5113#endif
5114#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5115 &isp1763_device,
5116#endif
5117
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005118#if defined (CONFIG_MSM_8x60_VOIP)
5119 &asoc_msm_mvs,
5120 &asoc_mvs_dai0,
5121 &asoc_mvs_dai1,
5122#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005123
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005124#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5125 &msm_device_otg,
5126#endif
5127#ifdef CONFIG_USB_GADGET_MSM_72K
5128 &msm_device_gadget_peripheral,
5129#endif
5130#ifdef CONFIG_USB_G_ANDROID
5131 &android_usb_device,
5132#endif
5133#ifdef CONFIG_BATTERY_MSM
5134 &msm_batt_device,
5135#endif
5136#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005137#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005138 &android_pmem_device,
5139 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005140 &android_pmem_smipool_device,
5141#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005142 &android_pmem_audio_device,
5143#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005144#ifdef CONFIG_MSM_ROTATOR
5145 &msm_rotator_device,
5146#endif
5147 &msm_fb_device,
5148 &msm_kgsl_3d0,
5149 &msm_kgsl_2d0,
5150 &msm_kgsl_2d1,
5151 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005152#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5153 &lcdc_nt35582_panel_device,
5154#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005155#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5156 &lcdc_samsung_oled_panel_device,
5157#endif
5158#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5159 &lcdc_auo_wvga_panel_device,
5160#endif
5161#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5162 &hdmi_msm_device,
5163#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5164#ifdef CONFIG_FB_MSM_MIPI_DSI
5165 &mipi_dsi_toshiba_panel_device,
5166 &mipi_dsi_novatek_panel_device,
5167#endif
5168#ifdef CONFIG_MSM_CAMERA
5169#ifdef CONFIG_MT9E013
5170 &msm_camera_sensor_mt9e013,
5171#endif
5172#ifdef CONFIG_IMX074
5173 &msm_camera_sensor_imx074,
5174#endif
5175#ifdef CONFIG_WEBCAM_OV7692
5176 &msm_camera_sensor_webcam_ov7692,
5177#endif
5178#ifdef CONFIG_WEBCAM_OV9726
5179 &msm_camera_sensor_webcam_ov9726,
5180#endif
5181#ifdef CONFIG_QS_S5K4E1
5182 &msm_camera_sensor_qs_s5k4e1,
5183#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005184#ifdef CONFIG_VX6953
5185 &msm_camera_sensor_vx6953,
5186#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005187#endif
5188#ifdef CONFIG_MSM_GEMINI
5189 &msm_gemini_device,
5190#endif
5191#ifdef CONFIG_MSM_VPE
5192 &msm_vpe_device,
5193#endif
5194
5195#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5196 &msm_rpm_log_device,
5197#endif
5198#if defined(CONFIG_MSM_RPM_STATS_LOG)
5199 &msm_rpm_stat_device,
5200#endif
5201 &msm_device_vidc,
5202#if (defined(CONFIG_MARIMBA_CORE)) && \
5203 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5204 &msm_bt_power_device,
5205#endif
5206#ifdef CONFIG_SENSORS_MSM_ADC
5207 &msm_adc_device,
5208#endif
David Collins6f032ba2011-08-31 14:08:15 -07005209 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005210
5211#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5212 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5213 &qcrypto_device,
5214#endif
5215
5216#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5217 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5218 &qcedev_device,
5219#endif
5220
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005221
5222#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5223#ifdef CONFIG_MSM_USE_TSIF1
5224 &msm_device_tsif[1],
5225#else
5226 &msm_device_tsif[0],
5227#endif /* CONFIG_MSM_USE_TSIF1 */
5228#endif /* CONFIG_TSIF */
5229
5230#ifdef CONFIG_HW_RANDOM_MSM
5231 &msm_device_rng,
5232#endif
5233
5234 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005235 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005236#ifdef CONFIG_ION_MSM
5237 &ion_dev,
5238#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005239 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005240};
5241
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005242#ifdef CONFIG_ION_MSM
Olav Haugan0703dbf2011-12-19 17:53:38 -08005243#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5244static struct ion_cp_heap_pdata cp_mm_ion_pdata = {
5245 .permission_type = IPT_TYPE_MM_CARVEOUT,
Olav Haugan42ebe712012-01-10 16:30:58 -08005246 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005247 .request_region = request_smi_region,
5248 .release_region = release_smi_region,
5249 .setup_region = setup_smi_region,
5250};
5251
5252static struct ion_cp_heap_pdata cp_mfc_ion_pdata = {
5253 .permission_type = IPT_TYPE_MFC_SHAREDMEM,
Olav Haugan42ebe712012-01-10 16:30:58 -08005254 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005255 .request_region = request_smi_region,
5256 .release_region = release_smi_region,
5257 .setup_region = setup_smi_region,
5258};
5259
5260static struct ion_cp_heap_pdata cp_wb_ion_pdata = {
5261 .permission_type = IPT_TYPE_MDP_WRITEBACK,
Olav Haugan42ebe712012-01-10 16:30:58 -08005262 .align = PAGE_SIZE,
5263};
5264
5265static struct ion_co_heap_pdata fw_co_ion_pdata = {
5266 .adjacent_mem_id = ION_CP_MM_HEAP_ID,
5267 .align = SZ_128K,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005268};
5269
5270static struct ion_co_heap_pdata co_ion_pdata = {
Olav Haugan42ebe712012-01-10 16:30:58 -08005271 .adjacent_mem_id = INVALID_HEAP_ID,
5272 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005273};
5274#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005275static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005276 .nr = MSM_ION_HEAP_NUM,
5277 .heaps = {
5278 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005279 .id = ION_SYSTEM_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005280 .type = ION_HEAP_TYPE_SYSTEM,
5281 .name = ION_VMALLOC_HEAP_NAME,
5282 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005283#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5284 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005285 .id = ION_SF_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005286 .type = ION_HEAP_TYPE_CARVEOUT,
Olav Hauganb5be7992011-11-18 14:29:02 -08005287 .name = ION_SF_HEAP_NAME,
5288 .size = MSM_ION_SF_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005289 .memory_type = ION_EBI_TYPE,
Olav Haugan42ebe712012-01-10 16:30:58 -08005290 .extra_data = (void *)&co_ion_pdata,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005291 },
5292 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005293 .id = ION_CP_MM_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005294 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005295 .name = ION_MM_HEAP_NAME,
5296 .size = MSM_ION_MM_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005297 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005298 .extra_data = (void *) &cp_mm_ion_pdata,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005299 },
Olav Hauganb5be7992011-11-18 14:29:02 -08005300 {
Olav Haugan42ebe712012-01-10 16:30:58 -08005301 .id = ION_MM_FIRMWARE_HEAP_ID,
5302 .type = ION_HEAP_TYPE_CARVEOUT,
5303 .name = ION_MM_FIRMWARE_HEAP_NAME,
5304 .size = MSM_ION_MM_FW_SIZE,
5305 .memory_type = ION_SMI_TYPE,
5306 .extra_data = (void *) &fw_co_ion_pdata,
5307 },
5308 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005309 .id = ION_CAMERA_HEAP_ID,
5310 .type = ION_HEAP_TYPE_CARVEOUT,
5311 .name = ION_CAMERA_HEAP_NAME,
5312 .size = MSM_ION_CAMERA_SIZE,
5313 .memory_type = ION_EBI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005314 .extra_data = &co_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005315 },
5316 {
5317 .id = ION_CP_MFC_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005318 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005319 .name = ION_MFC_HEAP_NAME,
5320 .size = MSM_ION_MFC_SIZE,
5321 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005322 .extra_data = (void *) &cp_mfc_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005323 },
5324 {
5325 .id = ION_CP_WB_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005326 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005327 .name = ION_WB_HEAP_NAME,
5328 .size = MSM_ION_WB_SIZE,
5329 .memory_type = ION_EBI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005330 .extra_data = (void *) &cp_wb_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005331 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005332#endif
5333 }
5334};
5335
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005336static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005337 .name = "ion-msm",
5338 .id = 1,
5339 .dev = { .platform_data = &ion_pdata },
5340};
5341#endif
5342
5343
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005344static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5345 /* Kernel SMI memory pool for video core, used for firmware */
5346 /* and encoder, decoder scratch buffers */
5347 /* Kernel SMI memory pool should always precede the user space */
5348 /* SMI memory pool, as the video core will use offset address */
5349 /* from the Firmware base */
5350 [MEMTYPE_SMI_KERNEL] = {
5351 .start = KERNEL_SMI_BASE,
5352 .limit = KERNEL_SMI_SIZE,
5353 .size = KERNEL_SMI_SIZE,
5354 .flags = MEMTYPE_FLAGS_FIXED,
5355 },
5356 /* User space SMI memory pool for video core */
5357 /* used for encoder, decoder input & output buffers */
5358 [MEMTYPE_SMI] = {
5359 .start = USER_SMI_BASE,
5360 .limit = USER_SMI_SIZE,
5361 .flags = MEMTYPE_FLAGS_FIXED,
5362 },
5363 [MEMTYPE_EBI0] = {
5364 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5365 },
5366 [MEMTYPE_EBI1] = {
5367 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5368 },
5369};
5370
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005371static void reserve_ion_memory(void)
5372{
5373#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
Olav Hauganb5be7992011-11-18 14:29:02 -08005374 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_SF_SIZE;
Olav Haugan42ebe712012-01-10 16:30:58 -08005375 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_FW_SIZE;
Olav Hauganb5be7992011-11-18 14:29:02 -08005376 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_SIZE;
5377 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MFC_SIZE;
5378 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_CAMERA_SIZE;
5379 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_WB_SIZE;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005380#endif
5381}
5382
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005383static void __init size_pmem_devices(void)
5384{
5385#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005386#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005387 android_pmem_adsp_pdata.size = pmem_adsp_size;
5388 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005389 android_pmem_pdata.size = pmem_sf_size;
5390#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005391 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5392#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005393}
5394
5395static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5396{
5397 msm8x60_reserve_table[p->memory_type].size += p->size;
5398}
5399
5400static void __init reserve_pmem_memory(void)
5401{
5402#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005403#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005404 reserve_memory_for(&android_pmem_adsp_pdata);
5405 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005406 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005407#endif
5408 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005409 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5410#endif
5411}
5412
Huaibin Yanga5419422011-12-08 23:52:10 -08005413static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005414
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005415static void __init msm8x60_calculate_reserve_sizes(void)
5416{
5417 size_pmem_devices();
5418 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005419 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005420 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005421}
5422
5423static int msm8x60_paddr_to_memtype(unsigned int paddr)
5424{
5425 if (paddr >= 0x40000000 && paddr < 0x60000000)
5426 return MEMTYPE_EBI1;
5427 if (paddr >= 0x38000000 && paddr < 0x40000000)
5428 return MEMTYPE_SMI;
5429 return MEMTYPE_NONE;
5430}
5431
5432static struct reserve_info msm8x60_reserve_info __initdata = {
5433 .memtype_reserve_table = msm8x60_reserve_table,
5434 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5435 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5436};
5437
5438static void __init msm8x60_reserve(void)
5439{
5440 reserve_info = &msm8x60_reserve_info;
5441 msm_reserve();
5442}
5443
5444#define EXT_CHG_VALID_MPP 10
5445#define EXT_CHG_VALID_MPP_2 11
5446
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305447static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305448 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305449 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305450 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305451 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5452};
5453
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005454#ifdef CONFIG_ISL9519_CHARGER
5455static int isl_detection_setup(void)
5456{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305457 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005458
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305459 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5460 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5461 &isl_mpp[i].config);
5462 if (ret) {
5463 pr_err("%s: Config MPP %d of PM8058 failed\n",
5464 __func__, isl_mpp[i].mpp);
5465 return ret;
5466 }
5467 }
5468
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005469 return ret;
5470}
5471
5472static struct isl_platform_data isl_data __initdata = {
5473 .chgcurrent = 700,
5474 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5475 .chg_detection_config = isl_detection_setup,
5476 .max_system_voltage = 4200,
5477 .min_system_voltage = 3200,
5478 .term_current = 120,
5479 .input_current = 2048,
5480};
5481
5482static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5483 {
5484 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305485 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005486 .platform_data = &isl_data,
5487 },
5488};
5489#endif
5490
5491#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5492static int smb137b_detection_setup(void)
5493{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305494 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005495
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305496 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5497 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5498 &isl_mpp[i].config);
5499 if (ret) {
5500 pr_err("%s: Config MPP %d of PM8058 failed\n",
5501 __func__, isl_mpp[i].mpp);
5502 return ret;
5503 }
5504 }
5505
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005506 return ret;
5507}
5508
5509static struct smb137b_platform_data smb137b_data __initdata = {
5510 .chg_detection_config = smb137b_detection_setup,
5511 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5512 .batt_mah_rating = 950,
5513};
5514
5515static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5516 {
5517 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305518 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005519 .platform_data = &smb137b_data,
5520 },
5521};
5522#endif
5523
5524#ifdef CONFIG_PMIC8058
5525#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305526#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005527
5528static int pm8058_gpios_init(void)
5529{
5530 int i;
5531 int rc;
5532 struct pm8058_gpio_cfg {
5533 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305534 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005535 };
5536
5537 struct pm8058_gpio_cfg gpio_cfgs[] = {
5538 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305539 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005540 {
5541 .direction = PM_GPIO_DIR_IN,
5542 .pull = PM_GPIO_PULL_DN,
5543 .vin_sel = 2,
5544 .function = PM_GPIO_FUNC_NORMAL,
5545 .inv_int_pol = 0,
5546 },
5547 },
5548#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5549 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305550 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005551 {
5552 .direction = PM_GPIO_DIR_IN,
5553 .pull = PM_GPIO_PULL_UP_30,
5554 .vin_sel = 2,
5555 .function = PM_GPIO_FUNC_NORMAL,
5556 .inv_int_pol = 0,
5557 },
5558 },
5559#endif
5560 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305561 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005562 {
5563 .direction = PM_GPIO_DIR_IN,
5564 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305565 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005566 .function = PM_GPIO_FUNC_NORMAL,
5567 .inv_int_pol = 0,
5568 },
5569 },
5570 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305571 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005572 {
5573 .direction = PM_GPIO_DIR_IN,
5574 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305575 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005576 .function = PM_GPIO_FUNC_NORMAL,
5577 .inv_int_pol = 0,
5578 },
5579 },
5580 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305581 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005582 {
5583 .direction = PM_GPIO_DIR_IN,
5584 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305585 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005586 .function = PM_GPIO_FUNC_NORMAL,
5587 .inv_int_pol = 0,
5588 },
5589 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005590 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305591 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005592 {
5593 .direction = PM_GPIO_DIR_OUT,
5594 .output_value = 1,
5595 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5596 .pull = PM_GPIO_PULL_DN,
5597 .out_strength = PM_GPIO_STRENGTH_HIGH,
5598 .function = PM_GPIO_FUNC_NORMAL,
5599 .vin_sel = 2,
5600 .inv_int_pol = 0,
5601 }
5602 },
5603 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305604 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005605 {
5606 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305607 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005608 .function = PM_GPIO_FUNC_NORMAL,
5609 .vin_sel = 2,
5610 .inv_int_pol = 0,
5611 }
5612 },
5613 };
5614
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305615#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5616 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305617 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305618 .direction = PM_GPIO_DIR_IN,
5619 .pull = PM_GPIO_PULL_UP_1P5,
5620 .vin_sel = 2,
5621 .function = PM_GPIO_FUNC_NORMAL,
5622 };
5623#endif
5624
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005625#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305626 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305627 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305628 .direction = PM_GPIO_DIR_OUT,
5629 .pull = PM_GPIO_PULL_NO,
5630 .out_strength = PM_GPIO_STRENGTH_HIGH,
5631 .function = PM_GPIO_FUNC_NORMAL,
5632 .inv_int_pol = 0,
5633 .vin_sel = 2,
5634 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5635 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005636 };
5637#endif
5638
5639#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5640 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305641 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005642 {
5643 .direction = PM_GPIO_DIR_IN,
5644 .pull = PM_GPIO_PULL_UP_1P5,
5645 .vin_sel = 2,
5646 .function = PM_GPIO_FUNC_NORMAL,
5647 .inv_int_pol = 0,
5648 }
5649 };
5650#endif
5651
5652#if defined(CONFIG_QS_S5K4E1)
5653 {
5654 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305655 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005656 {
5657 .direction = PM_GPIO_DIR_OUT,
5658 .output_value = 0,
5659 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5660 .pull = PM_GPIO_PULL_DN,
5661 .out_strength = PM_GPIO_STRENGTH_HIGH,
5662 .function = PM_GPIO_FUNC_NORMAL,
5663 .vin_sel = 2,
5664 .inv_int_pol = 0,
5665 }
5666 };
5667#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005668#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5669 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305670 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005671 {
5672 .direction = PM_GPIO_DIR_OUT,
5673 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5674 .output_value = 1,
5675 .pull = PM_GPIO_PULL_UP_30,
5676 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305677 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005678 .out_strength = PM_GPIO_STRENGTH_HIGH,
5679 .function = PM_GPIO_FUNC_NORMAL,
5680 .inv_int_pol = 0,
5681 }
5682 };
5683#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005684#if defined(CONFIG_HAPTIC_ISA1200) || \
5685 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5686 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305687 rc = pm8xxx_gpio_config(
5688 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5689 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005690 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305691 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005692 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305693 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305694 rc = pm8xxx_gpio_config(
5695 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5696 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305697 if (rc < 0) {
5698 pr_err("%s: pmic haptics ldo gpio config failed\n",
5699 __func__);
5700 }
5701
5702 }
5703#endif
5704
5705#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5706 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5707 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5708 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305709 rc = pm8xxx_gpio_config(
5710 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5711 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305712 if (rc < 0) {
5713 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5714 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005715 }
5716 }
5717#endif
5718
5719#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5720 /* Line_in only for 8660 ffa & surf */
5721 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005722 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005723 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305724 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005725 &line_in_gpio_cfg.cfg);
5726 if (rc < 0) {
5727 pr_err("%s pmic line_in gpio config failed\n",
5728 __func__);
5729 return rc;
5730 }
5731 }
5732#endif
5733
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005734#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5735 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305736 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005737 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5738 if (rc < 0) {
5739 pr_err("%s pmic gpio config failed\n", __func__);
5740 return rc;
5741 }
5742 }
5743#endif
5744
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005745#if defined(CONFIG_QS_S5K4E1)
5746 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5747 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305748 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005749 &qs_hc37_cam_pd_gpio_cfg.cfg);
5750 if (rc < 0) {
5751 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5752 __func__);
5753 return rc;
5754 }
5755 }
5756 }
5757#endif
5758
5759 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305760 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005761 &gpio_cfgs[i].cfg);
5762 if (rc < 0) {
5763 pr_err("%s pmic gpio config failed\n",
5764 __func__);
5765 return rc;
5766 }
5767 }
5768
5769 return 0;
5770}
5771
5772static const unsigned int ffa_keymap[] = {
5773 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5774 KEY(0, 1, KEY_UP), /* NAV - UP */
5775 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5776 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5777
5778 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5779 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5780 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5781 KEY(1, 3, KEY_VOLUMEDOWN),
5782
5783 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5784
5785 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5786 KEY(4, 1, KEY_UP), /* USER_UP */
5787 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5788 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5789 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5790
5791 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5792 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5793 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5794 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5795 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5796};
5797
Zhang Chang Ken683be172011-08-10 17:45:34 -04005798static const unsigned int dragon_keymap[] = {
5799 KEY(0, 0, KEY_MENU),
5800 KEY(0, 2, KEY_1),
5801 KEY(0, 3, KEY_4),
5802 KEY(0, 4, KEY_7),
5803
5804 KEY(1, 0, KEY_UP),
5805 KEY(1, 1, KEY_LEFT),
5806 KEY(1, 2, KEY_DOWN),
5807 KEY(1, 3, KEY_5),
5808 KEY(1, 4, KEY_8),
5809
5810 KEY(2, 0, KEY_HOME),
5811 KEY(2, 1, KEY_REPLY),
5812 KEY(2, 2, KEY_2),
5813 KEY(2, 3, KEY_6),
5814 KEY(2, 4, KEY_0),
5815
5816 KEY(3, 0, KEY_VOLUMEUP),
5817 KEY(3, 1, KEY_RIGHT),
5818 KEY(3, 2, KEY_3),
5819 KEY(3, 3, KEY_9),
5820 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5821
5822 KEY(4, 0, KEY_VOLUMEDOWN),
5823 KEY(4, 1, KEY_BACK),
5824 KEY(4, 2, KEY_CAMERA),
5825 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5826};
5827
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005828static struct matrix_keymap_data ffa_keymap_data = {
5829 .keymap_size = ARRAY_SIZE(ffa_keymap),
5830 .keymap = ffa_keymap,
5831};
5832
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305833static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005834 .input_name = "ffa-keypad",
5835 .input_phys_device = "ffa-keypad/input0",
5836 .num_rows = 6,
5837 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305838 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5839 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5840 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005841 .scan_delay_ms = 32,
5842 .row_hold_ns = 91500,
5843 .wakeup = 1,
5844 .keymap_data = &ffa_keymap_data,
5845};
5846
Zhang Chang Ken683be172011-08-10 17:45:34 -04005847static struct matrix_keymap_data dragon_keymap_data = {
5848 .keymap_size = ARRAY_SIZE(dragon_keymap),
5849 .keymap = dragon_keymap,
5850};
5851
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305852static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005853 .input_name = "dragon-keypad",
5854 .input_phys_device = "dragon-keypad/input0",
5855 .num_rows = 6,
5856 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305857 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5858 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5859 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005860 .scan_delay_ms = 32,
5861 .row_hold_ns = 91500,
5862 .wakeup = 1,
5863 .keymap_data = &dragon_keymap_data,
5864};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305865
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005866static const unsigned int fluid_keymap[] = {
5867 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5868 KEY(0, 1, KEY_UP), /* NAV - UP */
5869 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5870 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5871
5872 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5873 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5874 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5875 KEY(1, 3, KEY_VOLUMEUP),
5876
5877 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5878
5879 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5880 KEY(4, 1, KEY_UP), /* USER_UP */
5881 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5882 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5883 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5884
Jilai Wang9a895102011-07-12 14:00:35 -04005885 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005886 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5887 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5888 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5889 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5890};
5891
5892static struct matrix_keymap_data fluid_keymap_data = {
5893 .keymap_size = ARRAY_SIZE(fluid_keymap),
5894 .keymap = fluid_keymap,
5895};
5896
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305897static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005898 .input_name = "fluid-keypad",
5899 .input_phys_device = "fluid-keypad/input0",
5900 .num_rows = 6,
5901 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305902 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5903 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5904 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005905 .scan_delay_ms = 32,
5906 .row_hold_ns = 91500,
5907 .wakeup = 1,
5908 .keymap_data = &fluid_keymap_data,
5909};
5910
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305911static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005912 .initial_vibrate_ms = 500,
5913 .level_mV = 3000,
5914 .max_timeout_ms = 15000,
5915};
5916
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305917static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5918 .rtc_write_enable = false,
5919 .rtc_alarm_powerup = false,
5920};
5921
5922static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5923 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005924 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305925 .wakeup = 1,
5926};
5927
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005928#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5929
5930static struct othc_accessory_info othc_accessories[] = {
5931 {
5932 .accessory = OTHC_SVIDEO_OUT,
5933 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5934 | OTHC_ADC_DETECT,
5935 .key_code = SW_VIDEOOUT_INSERT,
5936 .enabled = false,
5937 .adc_thres = {
5938 .min_threshold = 20,
5939 .max_threshold = 40,
5940 },
5941 },
5942 {
5943 .accessory = OTHC_ANC_HEADPHONE,
5944 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5945 OTHC_SWITCH_DETECT,
5946 .gpio = PM8058_LINE_IN_DET_GPIO,
5947 .active_low = 1,
5948 .key_code = SW_HEADPHONE_INSERT,
5949 .enabled = true,
5950 },
5951 {
5952 .accessory = OTHC_ANC_HEADSET,
5953 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5954 .gpio = PM8058_LINE_IN_DET_GPIO,
5955 .active_low = 1,
5956 .key_code = SW_HEADPHONE_INSERT,
5957 .enabled = true,
5958 },
5959 {
5960 .accessory = OTHC_HEADPHONE,
5961 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5962 .key_code = SW_HEADPHONE_INSERT,
5963 .enabled = true,
5964 },
5965 {
5966 .accessory = OTHC_MICROPHONE,
5967 .detect_flags = OTHC_GPIO_DETECT,
5968 .gpio = PM8058_LINE_IN_DET_GPIO,
5969 .active_low = 1,
5970 .key_code = SW_MICROPHONE_INSERT,
5971 .enabled = true,
5972 },
5973 {
5974 .accessory = OTHC_HEADSET,
5975 .detect_flags = OTHC_MICBIAS_DETECT,
5976 .key_code = SW_HEADPHONE_INSERT,
5977 .enabled = true,
5978 },
5979};
5980
5981static struct othc_switch_info switch_info[] = {
5982 {
5983 .min_adc_threshold = 0,
5984 .max_adc_threshold = 100,
5985 .key_code = KEY_PLAYPAUSE,
5986 },
5987 {
5988 .min_adc_threshold = 100,
5989 .max_adc_threshold = 200,
5990 .key_code = KEY_REWIND,
5991 },
5992 {
5993 .min_adc_threshold = 200,
5994 .max_adc_threshold = 500,
5995 .key_code = KEY_FASTFORWARD,
5996 },
5997};
5998
5999static struct othc_n_switch_config switch_config = {
6000 .voltage_settling_time_ms = 0,
6001 .num_adc_samples = 3,
6002 .adc_channel = CHANNEL_ADC_HDSET,
6003 .switch_info = switch_info,
6004 .num_keys = ARRAY_SIZE(switch_info),
6005 .default_sw_en = true,
6006 .default_sw_idx = 0,
6007};
6008
6009static struct hsed_bias_config hsed_bias_config = {
6010 /* HSED mic bias config info */
6011 .othc_headset = OTHC_HEADSET_NO,
6012 .othc_lowcurr_thresh_uA = 100,
6013 .othc_highcurr_thresh_uA = 600,
6014 .othc_hyst_prediv_us = 7800,
6015 .othc_period_clkdiv_us = 62500,
6016 .othc_hyst_clk_us = 121000,
6017 .othc_period_clk_us = 312500,
6018 .othc_wakeup = 1,
6019};
6020
6021static struct othc_hsed_config hsed_config_1 = {
6022 .hsed_bias_config = &hsed_bias_config,
6023 /*
6024 * The detection delay and switch reporting delay are
6025 * required to encounter a hardware bug (spurious switch
6026 * interrupts on slow insertion/removal of the headset).
6027 * This will introduce a delay in reporting the accessory
6028 * insertion and removal to the userspace.
6029 */
6030 .detection_delay_ms = 1500,
6031 /* Switch info */
6032 .switch_debounce_ms = 1500,
6033 .othc_support_n_switch = false,
6034 .switch_config = &switch_config,
6035 .ir_gpio = -1,
6036 /* Accessory info */
6037 .accessories_support = true,
6038 .accessories = othc_accessories,
6039 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
6040};
6041
6042static struct othc_regulator_config othc_reg = {
6043 .regulator = "8058_l5",
6044 .max_uV = 2850000,
6045 .min_uV = 2850000,
6046};
6047
6048/* MIC_BIAS0 is configured as normal MIC BIAS */
6049static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
6050 .micbias_select = OTHC_MICBIAS_0,
6051 .micbias_capability = OTHC_MICBIAS,
6052 .micbias_enable = OTHC_SIGNAL_OFF,
6053 .micbias_regulator = &othc_reg,
6054};
6055
6056/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
6057static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
6058 .micbias_select = OTHC_MICBIAS_1,
6059 .micbias_capability = OTHC_MICBIAS_HSED,
6060 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
6061 .micbias_regulator = &othc_reg,
6062 .hsed_config = &hsed_config_1,
6063 .hsed_name = "8660_handset",
6064};
6065
6066/* MIC_BIAS2 is configured as normal MIC BIAS */
6067static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6068 .micbias_select = OTHC_MICBIAS_2,
6069 .micbias_capability = OTHC_MICBIAS,
6070 .micbias_enable = OTHC_SIGNAL_OFF,
6071 .micbias_regulator = &othc_reg,
6072};
6073
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006074
6075static void __init msm8x60_init_pm8058_othc(void)
6076{
6077 int i;
6078
6079 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6080 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6081 machine_is_msm8x60_fusn_ffa()) {
6082 /* 3-switch headset supported only by V2 FFA and FLUID */
6083 hsed_config_1.accessories_adc_support = true,
6084 /* ADC based accessory detection works only on V2 and FLUID */
6085 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6086 hsed_config_1.othc_support_n_switch = true;
6087 }
6088
6089 /* IR GPIO is absent on FLUID */
6090 if (machine_is_msm8x60_fluid())
6091 hsed_config_1.ir_gpio = -1;
6092
6093 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6094 if (machine_is_msm8x60_fluid()) {
6095 switch (othc_accessories[i].accessory) {
6096 case OTHC_ANC_HEADPHONE:
6097 case OTHC_ANC_HEADSET:
6098 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6099 break;
6100 case OTHC_MICROPHONE:
6101 othc_accessories[i].enabled = false;
6102 break;
6103 case OTHC_SVIDEO_OUT:
6104 othc_accessories[i].enabled = true;
6105 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6106 break;
6107 }
6108 }
6109 }
6110}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006111
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006112
6113static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6114{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306115 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006116 .direction = PM_GPIO_DIR_OUT,
6117 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6118 .output_value = 0,
6119 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306120 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006121 .out_strength = PM_GPIO_STRENGTH_HIGH,
6122 .function = PM_GPIO_FUNC_2,
6123 };
6124
6125 int rc = -EINVAL;
6126 int id, mode, max_mA;
6127
6128 id = mode = max_mA = 0;
6129 switch (ch) {
6130 case 0:
6131 case 1:
6132 case 2:
6133 if (on) {
6134 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306135 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6136 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006137 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306138 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006139 __func__, id, rc);
6140 }
6141 break;
6142
6143 case 6:
6144 id = PM_PWM_LED_FLASH;
6145 mode = PM_PWM_CONF_PWM1;
6146 max_mA = 300;
6147 break;
6148
6149 case 7:
6150 id = PM_PWM_LED_FLASH1;
6151 mode = PM_PWM_CONF_PWM1;
6152 max_mA = 300;
6153 break;
6154
6155 default:
6156 break;
6157 }
6158
6159 if (ch >= 6 && ch <= 7) {
6160 if (!on) {
6161 mode = PM_PWM_CONF_NONE;
6162 max_mA = 0;
6163 }
6164 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6165 if (rc)
6166 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6167 __func__, ch, rc);
6168 }
6169 return rc;
6170
6171}
6172
6173static struct pm8058_pwm_pdata pm8058_pwm_data = {
6174 .config = pm8058_pwm_config,
6175};
6176
6177#define PM8058_GPIO_INT 88
6178
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006179static struct pmic8058_led pmic8058_flash_leds[] = {
6180 [0] = {
6181 .name = "camera:flash0",
6182 .max_brightness = 15,
6183 .id = PMIC8058_ID_FLASH_LED_0,
6184 },
6185 [1] = {
6186 .name = "camera:flash1",
6187 .max_brightness = 15,
6188 .id = PMIC8058_ID_FLASH_LED_1,
6189 },
6190};
6191
6192static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6193 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6194 .leds = pmic8058_flash_leds,
6195};
6196
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006197static struct pmic8058_led pmic8058_dragon_leds[] = {
6198 [0] = {
6199 /* RED */
6200 .name = "led_drv0",
6201 .max_brightness = 15,
6202 .id = PMIC8058_ID_LED_0,
6203 },/* 300 mA flash led0 drv sink */
6204 [1] = {
6205 /* Yellow */
6206 .name = "led_drv1",
6207 .max_brightness = 15,
6208 .id = PMIC8058_ID_LED_1,
6209 },/* 300 mA flash led0 drv sink */
6210 [2] = {
6211 /* Green */
6212 .name = "led_drv2",
6213 .max_brightness = 15,
6214 .id = PMIC8058_ID_LED_2,
6215 },/* 300 mA flash led0 drv sink */
6216 [3] = {
6217 .name = "led_psensor",
6218 .max_brightness = 15,
6219 .id = PMIC8058_ID_LED_KB_LIGHT,
6220 },/* 300 mA flash led0 drv sink */
6221};
6222
6223static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6224 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6225 .leds = pmic8058_dragon_leds,
6226};
6227
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006228static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6229 [0] = {
6230 .name = "led:drv0",
6231 .max_brightness = 15,
6232 .id = PMIC8058_ID_FLASH_LED_0,
6233 },/* 300 mA flash led0 drv sink */
6234 [1] = {
6235 .name = "led:drv1",
6236 .max_brightness = 15,
6237 .id = PMIC8058_ID_FLASH_LED_1,
6238 },/* 300 mA flash led1 sink */
6239 [2] = {
6240 .name = "led:drv2",
6241 .max_brightness = 20,
6242 .id = PMIC8058_ID_LED_0,
6243 },/* 40 mA led0 sink */
6244 [3] = {
6245 .name = "keypad:drv",
6246 .max_brightness = 15,
6247 .id = PMIC8058_ID_LED_KB_LIGHT,
6248 },/* 300 mA keypad drv sink */
6249};
6250
6251static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6252 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6253 .leds = pmic8058_fluid_flash_leds,
6254};
6255
Terence Hampson90508a92011-08-09 10:40:08 -04006256static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306257 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006258 .max_source_current = 1800,
6259 .charger_type = CHG_TYPE_AC,
6260};
6261
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306262static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6263 .charger_data_valid = false,
6264};
6265
6266static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6267 .priority = 0,
6268};
6269
6270static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6271 .irq_base = PM8058_IRQ_BASE,
6272 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6273 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6274};
6275
6276static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6277 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6278};
6279
6280static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6281 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006282};
6283
6284static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306285 .irq_pdata = &pm8058_irq_pdata,
6286 .gpio_pdata = &pm8058_gpio_pdata,
6287 .mpp_pdata = &pm8058_mpp_pdata,
6288 .rtc_pdata = &pm8058_rtc_pdata,
6289 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6290 .othc0_pdata = &othc_config_pdata_0,
6291 .othc1_pdata = &othc_config_pdata_1,
6292 .othc2_pdata = &othc_config_pdata_2,
6293 .pwm_pdata = &pm8058_pwm_data,
6294 .misc_pdata = &pm8058_misc_pdata,
6295#ifdef CONFIG_SENSORS_MSM_ADC
6296 .xoadc_pdata = &pm8058_xoadc_pdata,
6297#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006298};
6299
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306300#ifdef CONFIG_MSM_SSBI
6301static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6302 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6303 .slave = {
6304 .name = "pm8058-core",
6305 .platform_data = &pm8058_platform_data,
6306 },
6307};
6308#endif
6309#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006310
6311#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6312 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6313#define TDISC_I2C_SLAVE_ADDR 0x67
6314#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6315#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6316
6317static const char *vregs_tdisc_name[] = {
6318 "8058_l5",
6319 "8058_s3",
6320};
6321
6322static const int vregs_tdisc_val[] = {
6323 2850000,/* uV */
6324 1800000,
6325};
6326static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6327
6328static int tdisc_shinetsu_setup(void)
6329{
6330 int rc, i;
6331
6332 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6333 if (rc) {
6334 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6335 __func__);
6336 return rc;
6337 }
6338
6339 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6340 if (rc) {
6341 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6342 __func__);
6343 goto fail_gpio_oe;
6344 }
6345
6346 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6347 if (rc) {
6348 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6349 __func__);
6350 gpio_free(GPIO_JOYSTICK_EN);
6351 goto fail_gpio_oe;
6352 }
6353
6354 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6355 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6356 if (IS_ERR(vregs_tdisc[i])) {
6357 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6358 __func__, vregs_tdisc_name[i],
6359 PTR_ERR(vregs_tdisc[i]));
6360 rc = PTR_ERR(vregs_tdisc[i]);
6361 goto vreg_get_fail;
6362 }
6363
6364 rc = regulator_set_voltage(vregs_tdisc[i],
6365 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6366 if (rc) {
6367 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6368 __func__, rc);
6369 goto vreg_set_voltage_fail;
6370 }
6371 }
6372
6373 return rc;
6374vreg_set_voltage_fail:
6375 i++;
6376vreg_get_fail:
6377 while (i)
6378 regulator_put(vregs_tdisc[--i]);
6379fail_gpio_oe:
6380 gpio_free(PMIC_GPIO_TDISC);
6381 return rc;
6382}
6383
6384static void tdisc_shinetsu_release(void)
6385{
6386 int i;
6387
6388 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6389 regulator_put(vregs_tdisc[i]);
6390
6391 gpio_free(PMIC_GPIO_TDISC);
6392 gpio_free(GPIO_JOYSTICK_EN);
6393}
6394
6395static int tdisc_shinetsu_enable(void)
6396{
6397 int i, rc = -EINVAL;
6398
6399 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6400 rc = regulator_enable(vregs_tdisc[i]);
6401 if (rc < 0) {
6402 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6403 __func__, vregs_tdisc_name[i], rc);
6404 goto vreg_fail;
6405 }
6406 }
6407
6408 /* Enable the OE (output enable) gpio */
6409 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6410 /* voltage and gpio stabilization delay */
6411 msleep(50);
6412
6413 return 0;
6414vreg_fail:
6415 while (i)
6416 regulator_disable(vregs_tdisc[--i]);
6417 return rc;
6418}
6419
6420static int tdisc_shinetsu_disable(void)
6421{
6422 int i, rc;
6423
6424 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6425 rc = regulator_disable(vregs_tdisc[i]);
6426 if (rc < 0) {
6427 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6428 __func__, vregs_tdisc_name[i], rc);
6429 goto tdisc_reg_fail;
6430 }
6431 }
6432
6433 /* Disable the OE (output enable) gpio */
6434 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6435
6436 return 0;
6437
6438tdisc_reg_fail:
6439 while (i)
6440 regulator_enable(vregs_tdisc[--i]);
6441 return rc;
6442}
6443
6444static struct tdisc_abs_values tdisc_abs = {
6445 .x_max = 32,
6446 .y_max = 32,
6447 .x_min = -32,
6448 .y_min = -32,
6449 .pressure_max = 32,
6450 .pressure_min = 0,
6451};
6452
6453static struct tdisc_platform_data tdisc_data = {
6454 .tdisc_setup = tdisc_shinetsu_setup,
6455 .tdisc_release = tdisc_shinetsu_release,
6456 .tdisc_enable = tdisc_shinetsu_enable,
6457 .tdisc_disable = tdisc_shinetsu_disable,
6458 .tdisc_wakeup = 0,
6459 .tdisc_gpio = PMIC_GPIO_TDISC,
6460 .tdisc_report_keys = true,
6461 .tdisc_report_relative = true,
6462 .tdisc_report_absolute = false,
6463 .tdisc_report_wheel = false,
6464 .tdisc_reverse_x = false,
6465 .tdisc_reverse_y = true,
6466 .tdisc_abs = &tdisc_abs,
6467};
6468
6469static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6470 {
6471 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6472 .irq = TDISC_INT,
6473 .platform_data = &tdisc_data,
6474 },
6475};
6476#endif
6477
6478#define PM_GPIO_CDC_RST_N 20
6479#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6480
6481static struct regulator *vreg_timpani_1;
6482static struct regulator *vreg_timpani_2;
6483
6484static unsigned int msm_timpani_setup_power(void)
6485{
6486 int rc;
6487
6488 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6489 if (IS_ERR(vreg_timpani_1)) {
6490 pr_err("%s: Unable to get 8058_l0\n", __func__);
6491 return -ENODEV;
6492 }
6493
6494 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6495 if (IS_ERR(vreg_timpani_2)) {
6496 pr_err("%s: Unable to get 8058_s3\n", __func__);
6497 regulator_put(vreg_timpani_1);
6498 return -ENODEV;
6499 }
6500
6501 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6502 if (rc) {
6503 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6504 goto fail;
6505 }
6506
6507 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6508 if (rc) {
6509 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6510 goto fail;
6511 }
6512
6513 rc = regulator_enable(vreg_timpani_1);
6514 if (rc) {
6515 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6516 goto fail;
6517 }
6518
6519 /* The settings for LDO0 should be set such that
6520 * it doesn't require to reset the timpani. */
6521 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6522 if (rc < 0) {
6523 pr_err("Timpani regulator optimum mode setting failed\n");
6524 goto fail;
6525 }
6526
6527 rc = regulator_enable(vreg_timpani_2);
6528 if (rc) {
6529 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6530 regulator_disable(vreg_timpani_1);
6531 goto fail;
6532 }
6533
6534 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6535 if (rc) {
6536 pr_err("%s: GPIO Request %d failed\n", __func__,
6537 GPIO_CDC_RST_N);
6538 regulator_disable(vreg_timpani_1);
6539 regulator_disable(vreg_timpani_2);
6540 goto fail;
6541 } else {
6542 gpio_direction_output(GPIO_CDC_RST_N, 1);
6543 usleep_range(1000, 1050);
6544 gpio_direction_output(GPIO_CDC_RST_N, 0);
6545 usleep_range(1000, 1050);
6546 gpio_direction_output(GPIO_CDC_RST_N, 1);
6547 gpio_free(GPIO_CDC_RST_N);
6548 }
6549 return rc;
6550
6551fail:
6552 regulator_put(vreg_timpani_1);
6553 regulator_put(vreg_timpani_2);
6554 return rc;
6555}
6556
6557static void msm_timpani_shutdown_power(void)
6558{
6559 int rc;
6560
6561 rc = regulator_disable(vreg_timpani_1);
6562 if (rc)
6563 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6564
6565 regulator_put(vreg_timpani_1);
6566
6567 rc = regulator_disable(vreg_timpani_2);
6568 if (rc)
6569 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6570
6571 regulator_put(vreg_timpani_2);
6572}
6573
6574/* Power analog function of codec */
6575static struct regulator *vreg_timpani_cdc_apwr;
6576static int msm_timpani_codec_power(int vreg_on)
6577{
6578 int rc = 0;
6579
6580 if (!vreg_timpani_cdc_apwr) {
6581
6582 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6583
6584 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6585 pr_err("%s: vreg_get failed (%ld)\n",
6586 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6587 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6588 return rc;
6589 }
6590 }
6591
6592 if (vreg_on) {
6593
6594 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6595 2200000, 2200000);
6596 if (rc) {
6597 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6598 __func__);
6599 goto vreg_fail;
6600 }
6601
6602 rc = regulator_enable(vreg_timpani_cdc_apwr);
6603 if (rc) {
6604 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6605 goto vreg_fail;
6606 }
6607 } else {
6608 rc = regulator_disable(vreg_timpani_cdc_apwr);
6609 if (rc) {
6610 pr_err("%s: vreg_disable failed %d\n",
6611 __func__, rc);
6612 goto vreg_fail;
6613 }
6614 }
6615
6616 return 0;
6617
6618vreg_fail:
6619 regulator_put(vreg_timpani_cdc_apwr);
6620 vreg_timpani_cdc_apwr = NULL;
6621 return rc;
6622}
6623
6624static struct marimba_codec_platform_data timpani_codec_pdata = {
6625 .marimba_codec_power = msm_timpani_codec_power,
6626};
6627
6628#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6629#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6630
6631static struct marimba_platform_data timpani_pdata = {
6632 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6633 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6634 .marimba_setup = msm_timpani_setup_power,
6635 .marimba_shutdown = msm_timpani_shutdown_power,
6636 .codec = &timpani_codec_pdata,
6637 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6638};
6639
6640#define TIMPANI_I2C_SLAVE_ADDR 0xD
6641
6642static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6643 {
6644 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6645 .platform_data = &timpani_pdata,
6646 },
6647};
6648
Lei Zhou338cab82011-08-19 13:38:17 -04006649#ifdef CONFIG_SND_SOC_WM8903
6650static struct wm8903_platform_data wm8903_pdata = {
6651 .gpio_cfg[2] = 0x3A8,
6652};
6653
6654#define WM8903_I2C_SLAVE_ADDR 0x34
6655static struct i2c_board_info wm8903_codec_i2c_info[] = {
6656 {
6657 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6658 .platform_data = &wm8903_pdata,
6659 },
6660};
6661#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006662#ifdef CONFIG_PMIC8901
6663
6664#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006665/*
6666 * Consumer specific regulator names:
6667 * regulator name consumer dev_name
6668 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006669static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6670 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6671};
6672static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6673 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6674};
6675
6676#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306677 _always_on) \
6678 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006679 .init_data = { \
6680 .constraints = { \
6681 .valid_modes_mask = _modes, \
6682 .valid_ops_mask = _ops, \
6683 .min_uV = _min_uV, \
6684 .max_uV = _max_uV, \
6685 .input_uV = _min_uV, \
6686 .apply_uV = _apply_uV, \
6687 .always_on = _always_on, \
6688 }, \
6689 .consumer_supplies = vreg_consumers_8901_##_id, \
6690 .num_consumer_supplies = \
6691 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6692 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306693 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006694 }
6695
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006696#define PM8901_VREG_INIT_VS(_id) \
6697 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306698 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006699
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306700static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006701 PM8901_VREG_INIT_VS(USB_OTG),
6702 PM8901_VREG_INIT_VS(HDMI_MVS),
6703};
6704
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306705static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6706 .priority = 1,
6707};
6708
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306709static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6710 .irq_base = PM8901_IRQ_BASE,
6711 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6712 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6713};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006714
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306715static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6716 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006717};
6718
6719static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306720 .irq_pdata = &pm8901_irq_pdata,
6721 .mpp_pdata = &pm8901_mpp_pdata,
6722 .regulator_pdatas = pm8901_vreg_init,
6723 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306724 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006725};
6726
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306727static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6728 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6729 .slave = {
6730 .name = "pm8901-core",
6731 .platform_data = &pm8901_platform_data,
6732 },
6733};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006734#endif /* CONFIG_PMIC8901 */
6735
6736#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6737 || defined(CONFIG_GPIO_SX150X_MODULE))
6738
6739static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006740static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006741
6742struct bahama_config_register{
6743 u8 reg;
6744 u8 value;
6745 u8 mask;
6746};
6747
6748enum version{
6749 VER_1_0,
6750 VER_2_0,
6751 VER_UNSUPPORTED = 0xFF
6752};
6753
6754static u8 read_bahama_ver(void)
6755{
6756 int rc;
6757 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6758 u8 bahama_version;
6759
6760 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6761 if (rc < 0) {
6762 printk(KERN_ERR
6763 "%s: version read failed: %d\n",
6764 __func__, rc);
6765 return VER_UNSUPPORTED;
6766 } else {
6767 printk(KERN_INFO
6768 "%s: version read got: 0x%x\n",
6769 __func__, bahama_version);
6770 }
6771
6772 switch (bahama_version) {
6773 case 0x08: /* varient of bahama v1 */
6774 case 0x10:
6775 case 0x00:
6776 return VER_1_0;
6777 case 0x09: /* variant of bahama v2 */
6778 return VER_2_0;
6779 default:
6780 return VER_UNSUPPORTED;
6781 }
6782}
6783
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006784static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006785static unsigned int msm_bahama_setup_power(void)
6786{
6787 int rc = 0;
6788 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006789
6790 if (machine_is_msm8x60_dragon())
6791 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6792
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006793 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6794
6795 if (IS_ERR(vreg_bahama)) {
6796 rc = PTR_ERR(vreg_bahama);
6797 pr_err("%s: regulator_get %s = %d\n", __func__,
6798 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006799 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006800 }
6801
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006802 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6803 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006804 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6805 msm_bahama_regulator, rc);
6806 goto unget;
6807 }
6808
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006809 rc = regulator_enable(vreg_bahama);
6810 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006811 pr_err("%s: regulator_enable %s = %d\n", __func__,
6812 msm_bahama_regulator, rc);
6813 goto unget;
6814 }
6815
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006816 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6817 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006818 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006819 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006820 goto unenable;
6821 }
6822
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006823 gpio_direction_output(msm_bahama_sys_rst, 0);
6824 usleep_range(1000, 1050);
6825 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6826 usleep_range(1000, 1050);
6827 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006828 return rc;
6829
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006830unenable:
6831 regulator_disable(vreg_bahama);
6832unget:
6833 regulator_put(vreg_bahama);
6834 return rc;
6835};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006836
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006837static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006838{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006839 if (msm_bahama_setup_power_enable) {
6840 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6841 gpio_free(msm_bahama_sys_rst);
6842 regulator_disable(vreg_bahama);
6843 regulator_put(vreg_bahama);
6844 msm_bahama_setup_power_enable = 0;
6845 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006846
6847 return 0;
6848};
6849
6850static unsigned int msm_bahama_core_config(int type)
6851{
6852 int rc = 0;
6853
6854 if (type == BAHAMA_ID) {
6855
6856 int i;
6857 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6858
6859 const struct bahama_config_register v20_init[] = {
6860 /* reg, value, mask */
6861 { 0xF4, 0x84, 0xFF }, /* AREG */
6862 { 0xF0, 0x04, 0xFF } /* DREG */
6863 };
6864
6865 if (read_bahama_ver() == VER_2_0) {
6866 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6867 u8 value = v20_init[i].value;
6868 rc = marimba_write_bit_mask(&config,
6869 v20_init[i].reg,
6870 &value,
6871 sizeof(v20_init[i].value),
6872 v20_init[i].mask);
6873 if (rc < 0) {
6874 printk(KERN_ERR
6875 "%s: reg %d write failed: %d\n",
6876 __func__, v20_init[i].reg, rc);
6877 return rc;
6878 }
6879 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6880 " mask 0x%02x\n",
6881 __func__, v20_init[i].reg,
6882 v20_init[i].value, v20_init[i].mask);
6883 }
6884 }
6885 }
6886 printk(KERN_INFO "core type: %d\n", type);
6887
6888 return rc;
6889}
6890
6891static struct regulator *fm_regulator_s3;
6892static struct msm_xo_voter *fm_clock;
6893
6894static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6895{
6896 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306897 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006898 .direction = PM_GPIO_DIR_IN,
6899 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306900 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006901 .function = PM_GPIO_FUNC_NORMAL,
6902 .inv_int_pol = 0,
6903 };
6904
6905 if (!fm_regulator_s3) {
6906 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6907 if (IS_ERR(fm_regulator_s3)) {
6908 rc = PTR_ERR(fm_regulator_s3);
6909 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6910 __func__, rc);
6911 goto out;
6912 }
6913 }
6914
6915
6916 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6917 if (rc < 0) {
6918 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6919 __func__, rc);
6920 goto fm_fail_put;
6921 }
6922
6923 rc = regulator_enable(fm_regulator_s3);
6924 if (rc < 0) {
6925 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6926 __func__, rc);
6927 goto fm_fail_put;
6928 }
6929
6930 /*Vote for XO clock*/
6931 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6932
6933 if (IS_ERR(fm_clock)) {
6934 rc = PTR_ERR(fm_clock);
6935 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6936 __func__, rc);
6937 goto fm_fail_switch;
6938 }
6939
6940 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6941 if (rc < 0) {
6942 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6943 __func__, rc);
6944 goto fm_fail_vote;
6945 }
6946
6947 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306948 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006949 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306950 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006951 __func__, rc);
6952 goto fm_fail_clock;
6953 }
6954 goto out;
6955
6956fm_fail_clock:
6957 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6958fm_fail_vote:
6959 msm_xo_put(fm_clock);
6960fm_fail_switch:
6961 regulator_disable(fm_regulator_s3);
6962fm_fail_put:
6963 regulator_put(fm_regulator_s3);
6964out:
6965 return rc;
6966};
6967
6968static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6969{
6970 int rc = 0;
6971 if (fm_regulator_s3 != NULL) {
6972 rc = regulator_disable(fm_regulator_s3);
6973 if (rc < 0) {
6974 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6975 __func__, rc);
6976 }
6977 regulator_put(fm_regulator_s3);
6978 fm_regulator_s3 = NULL;
6979 }
6980 printk(KERN_ERR "%s: Voting off for XO", __func__);
6981
6982 if (fm_clock != NULL) {
6983 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6984 if (rc < 0) {
6985 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6986 __func__, rc);
6987 }
6988 msm_xo_put(fm_clock);
6989 }
6990 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6991}
6992
6993/* Slave id address for FM/CDC/QMEMBIST
6994 * Values can be programmed using Marimba slave id 0
6995 * should there be a conflict with other I2C devices
6996 * */
6997#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6998#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6999
7000static struct marimba_fm_platform_data marimba_fm_pdata = {
7001 .fm_setup = fm_radio_setup,
7002 .fm_shutdown = fm_radio_shutdown,
7003 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
7004 .is_fm_soc_i2s_master = false,
7005 .config_i2s_gpio = NULL,
7006};
7007
7008/*
7009Just initializing the BAHAMA related slave
7010*/
7011static struct marimba_platform_data marimba_pdata = {
7012 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
7013 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
7014 .bahama_setup = msm_bahama_setup_power,
7015 .bahama_shutdown = msm_bahama_shutdown_power,
7016 .bahama_core_config = msm_bahama_core_config,
7017 .fm = &marimba_fm_pdata,
7018 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
7019};
7020
7021
7022static struct i2c_board_info msm_marimba_board_info[] = {
7023 {
7024 I2C_BOARD_INFO("marimba", 0xc),
7025 .platform_data = &marimba_pdata,
7026 }
7027};
7028#endif /* CONFIG_MAIMBA_CORE */
7029
7030#ifdef CONFIG_I2C
7031#define I2C_SURF 1
7032#define I2C_FFA (1 << 1)
7033#define I2C_RUMI (1 << 2)
7034#define I2C_SIM (1 << 3)
7035#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007036#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007037
7038struct i2c_registry {
7039 u8 machs;
7040 int bus;
7041 struct i2c_board_info *info;
7042 int len;
7043};
7044
7045static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007046#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7047 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007048 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007049 MSM_GSBI8_QUP_I2C_BUS_ID,
7050 core_expander_i2c_info,
7051 ARRAY_SIZE(core_expander_i2c_info),
7052 },
7053 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007054 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007055 MSM_GSBI8_QUP_I2C_BUS_ID,
7056 docking_expander_i2c_info,
7057 ARRAY_SIZE(docking_expander_i2c_info),
7058 },
7059 {
7060 I2C_SURF,
7061 MSM_GSBI8_QUP_I2C_BUS_ID,
7062 surf_expanders_i2c_info,
7063 ARRAY_SIZE(surf_expanders_i2c_info),
7064 },
7065 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007066 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007067 MSM_GSBI3_QUP_I2C_BUS_ID,
7068 fha_expanders_i2c_info,
7069 ARRAY_SIZE(fha_expanders_i2c_info),
7070 },
7071 {
7072 I2C_FLUID,
7073 MSM_GSBI3_QUP_I2C_BUS_ID,
7074 fluid_expanders_i2c_info,
7075 ARRAY_SIZE(fluid_expanders_i2c_info),
7076 },
7077 {
7078 I2C_FLUID,
7079 MSM_GSBI8_QUP_I2C_BUS_ID,
7080 fluid_core_expander_i2c_info,
7081 ARRAY_SIZE(fluid_core_expander_i2c_info),
7082 },
7083#endif
7084#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7085 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7086 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007087 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007088 MSM_GSBI3_QUP_I2C_BUS_ID,
7089 msm_i2c_gsbi3_tdisc_info,
7090 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7091 },
7092#endif
7093 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007094 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007095 MSM_GSBI3_QUP_I2C_BUS_ID,
7096 cy8ctmg200_board_info,
7097 ARRAY_SIZE(cy8ctmg200_board_info),
7098 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007099 {
7100 I2C_DRAGON,
7101 MSM_GSBI3_QUP_I2C_BUS_ID,
7102 cy8ctma340_dragon_board_info,
7103 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7104 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007105#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7106 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7107 {
7108 I2C_FLUID,
7109 MSM_GSBI3_QUP_I2C_BUS_ID,
7110 cyttsp_fluid_info,
7111 ARRAY_SIZE(cyttsp_fluid_info),
7112 },
7113 {
7114 I2C_FFA | I2C_SURF,
7115 MSM_GSBI3_QUP_I2C_BUS_ID,
7116 cyttsp_ffa_info,
7117 ARRAY_SIZE(cyttsp_ffa_info),
7118 },
7119#endif
7120#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007121 {
7122 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007123 MSM_GSBI4_QUP_I2C_BUS_ID,
7124 msm_camera_boardinfo,
7125 ARRAY_SIZE(msm_camera_boardinfo),
7126 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007127 {
7128 I2C_DRAGON,
7129 MSM_GSBI4_QUP_I2C_BUS_ID,
7130 msm_camera_dragon_boardinfo,
7131 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7132 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007133#endif
7134 {
7135 I2C_SURF | I2C_FFA | I2C_FLUID,
7136 MSM_GSBI7_QUP_I2C_BUS_ID,
7137 msm_i2c_gsbi7_timpani_info,
7138 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7139 },
7140#if defined(CONFIG_MARIMBA_CORE)
7141 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007142 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007143 MSM_GSBI7_QUP_I2C_BUS_ID,
7144 msm_marimba_board_info,
7145 ARRAY_SIZE(msm_marimba_board_info),
7146 },
7147#endif /* CONFIG_MARIMBA_CORE */
7148#ifdef CONFIG_ISL9519_CHARGER
7149 {
7150 I2C_SURF | I2C_FFA,
7151 MSM_GSBI8_QUP_I2C_BUS_ID,
7152 isl_charger_i2c_info,
7153 ARRAY_SIZE(isl_charger_i2c_info),
7154 },
7155#endif
7156#if defined(CONFIG_HAPTIC_ISA1200) || \
7157 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7158 {
7159 I2C_FLUID,
7160 MSM_GSBI8_QUP_I2C_BUS_ID,
7161 msm_isa1200_board_info,
7162 ARRAY_SIZE(msm_isa1200_board_info),
7163 },
7164#endif
7165#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7166 {
7167 I2C_FLUID,
7168 MSM_GSBI8_QUP_I2C_BUS_ID,
7169 smb137b_charger_i2c_info,
7170 ARRAY_SIZE(smb137b_charger_i2c_info),
7171 },
7172#endif
7173#if defined(CONFIG_BATTERY_BQ27520) || \
7174 defined(CONFIG_BATTERY_BQ27520_MODULE)
7175 {
7176 I2C_FLUID,
7177 MSM_GSBI8_QUP_I2C_BUS_ID,
7178 msm_bq27520_board_info,
7179 ARRAY_SIZE(msm_bq27520_board_info),
7180 },
7181#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007182#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7183 {
7184 I2C_DRAGON,
7185 MSM_GSBI8_QUP_I2C_BUS_ID,
7186 wm8903_codec_i2c_info,
7187 ARRAY_SIZE(wm8903_codec_i2c_info),
7188 },
7189#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007190};
7191#endif /* CONFIG_I2C */
7192
7193static void fixup_i2c_configs(void)
7194{
7195#ifdef CONFIG_I2C
7196#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7197 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7198 sx150x_data[SX150X_CORE].irq_summary =
7199 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007200 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7201 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007202 sx150x_data[SX150X_CORE].irq_summary =
7203 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7204 else if (machine_is_msm8x60_fluid())
7205 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7206 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7207#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007208#endif
7209}
7210
7211static void register_i2c_devices(void)
7212{
7213#ifdef CONFIG_I2C
7214 u8 mach_mask = 0;
7215 int i;
7216
7217 /* Build the matching 'supported_machs' bitmask */
7218 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7219 mach_mask = I2C_SURF;
7220 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7221 mach_mask = I2C_FFA;
7222 else if (machine_is_msm8x60_rumi3())
7223 mach_mask = I2C_RUMI;
7224 else if (machine_is_msm8x60_sim())
7225 mach_mask = I2C_SIM;
7226 else if (machine_is_msm8x60_fluid())
7227 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007228 else if (machine_is_msm8x60_dragon())
7229 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007230 else
7231 pr_err("unmatched machine ID in register_i2c_devices\n");
7232
7233 /* Run the array and install devices as appropriate */
7234 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7235 if (msm8x60_i2c_devices[i].machs & mach_mask)
7236 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7237 msm8x60_i2c_devices[i].info,
7238 msm8x60_i2c_devices[i].len);
7239 }
7240#endif
7241}
7242
7243static void __init msm8x60_init_uart12dm(void)
7244{
7245#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7246 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7247 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7248
7249 if (!fpga_mem)
7250 pr_err("%s(): Error getting memory\n", __func__);
7251
7252 /* Advanced mode */
7253 writew(0xFFFF, fpga_mem + 0x15C);
7254 /* FPGA_UART_SEL */
7255 writew(0, fpga_mem + 0x172);
7256 /* FPGA_GPIO_CONFIG_117 */
7257 writew(1, fpga_mem + 0xEA);
7258 /* FPGA_GPIO_CONFIG_118 */
7259 writew(1, fpga_mem + 0xEC);
7260 mb();
7261 iounmap(fpga_mem);
7262#endif
7263}
7264
7265#define MSM_GSBI9_PHYS 0x19900000
7266#define GSBI_DUAL_MODE_CODE 0x60
7267
7268static void __init msm8x60_init_buses(void)
7269{
7270#ifdef CONFIG_I2C_QUP
7271 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7272 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7273 writel_relaxed(0x6 << 4, gsbi_mem);
7274 /* Ensure protocol code is written before proceeding further */
7275 mb();
7276 iounmap(gsbi_mem);
7277
7278 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7279 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7280 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7281 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7282
7283#ifdef CONFIG_MSM_GSBI9_UART
7284 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7285 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7286 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7287 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7288 iounmap(gsbi_mem);
7289 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7290 }
7291#endif
7292 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7293 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7294#endif
7295#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7296 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7297#endif
7298#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007299 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7300#endif
7301
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307302#ifdef CONFIG_MSM_SSBI
7303 msm_device_ssbi_pmic1.dev.platform_data =
7304 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307305 msm_device_ssbi_pmic2.dev.platform_data =
7306 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307307#endif
7308
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007309 if (machine_is_msm8x60_fluid()) {
7310#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7311 (defined(CONFIG_SMB137B_CHARGER) || \
7312 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7313 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7314#endif
7315#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7316 msm_gsbi10_qup_spi_device.dev.platform_data =
7317 &msm_gsbi10_qup_spi_pdata;
7318#endif
7319 }
7320
7321#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7322 /*
7323 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7324 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7325 * and ID notifications are available only on V2 surf and FFA
7326 * with a hardware workaround.
7327 */
7328 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7329 (machine_is_msm8x60_surf() ||
7330 (machine_is_msm8x60_ffa() &&
7331 pmic_id_notif_supported)))
7332 msm_otg_pdata.phy_can_powercollapse = 1;
7333 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7334#endif
7335
7336#ifdef CONFIG_USB_GADGET_MSM_72K
7337 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7338#endif
7339
7340#ifdef CONFIG_SERIAL_MSM_HS
7341 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7342 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7343#endif
7344#ifdef CONFIG_MSM_GSBI9_UART
7345 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7346 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7347 if (IS_ERR(msm_device_uart_gsbi9))
7348 pr_err("%s(): Failed to create uart gsbi9 device\n",
7349 __func__);
7350 }
7351#endif
7352
7353#ifdef CONFIG_MSM_BUS_SCALING
7354
7355 /* RPM calls are only enabled on V2 */
7356 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7357 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7358 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7359 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7360 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7361 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7362 }
7363
7364 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7365 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7366 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7367 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7368 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7369#endif
7370}
7371
7372static void __init msm8x60_map_io(void)
7373{
7374 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7375 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007376
7377 if (socinfo_init() < 0)
7378 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007379}
7380
7381/*
7382 * Most segments of the EBI2 bus are disabled by default.
7383 */
7384static void __init msm8x60_init_ebi2(void)
7385{
7386 uint32_t ebi2_cfg;
7387 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007388 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7389
7390 if (IS_ERR(mem_clk)) {
7391 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7392 "msm_ebi2", "mem_clk");
7393 return;
7394 }
7395 clk_enable(mem_clk);
7396 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007397
7398 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7399 if (ebi2_cfg_ptr != 0) {
7400 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7401
7402 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007403 machine_is_msm8x60_fluid() ||
7404 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007405 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7406 else if (machine_is_msm8x60_sim())
7407 ebi2_cfg |= (1 << 4); /* CS2 */
7408 else if (machine_is_msm8x60_rumi3())
7409 ebi2_cfg |= (1 << 5); /* CS3 */
7410
7411 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7412 iounmap(ebi2_cfg_ptr);
7413 }
7414
7415 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007416 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007417 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7418 if (ebi2_cfg_ptr != 0) {
7419 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7420 writel_relaxed(0UL, ebi2_cfg_ptr);
7421
7422 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7423 * LAN9221 Ethernet controller reads and writes.
7424 * The lowest 4 bits are the read delay, the next
7425 * 4 are the write delay. */
7426 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7427#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7428 /*
7429 * RECOVERY=5, HOLD_WR=1
7430 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7431 * WAIT_WR=1, WAIT_RD=2
7432 */
7433 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7434 /*
7435 * HOLD_RD=1
7436 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7437 */
7438 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7439#else
7440 /* EBI2 CS3 muxed address/data,
7441 * two cyc addr enable */
7442 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7443
7444#endif
7445 iounmap(ebi2_cfg_ptr);
7446 }
7447 }
7448}
7449
7450static void __init msm8x60_configure_smc91x(void)
7451{
7452 if (machine_is_msm8x60_sim()) {
7453
7454 smc91x_resources[0].start = 0x1b800300;
7455 smc91x_resources[0].end = 0x1b8003ff;
7456
7457 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7458 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7459
7460 } else if (machine_is_msm8x60_rumi3()) {
7461
7462 smc91x_resources[0].start = 0x1d000300;
7463 smc91x_resources[0].end = 0x1d0003ff;
7464
7465 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7466 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7467 }
7468}
7469
7470static void __init msm8x60_init_tlmm(void)
7471{
7472 if (machine_is_msm8x60_rumi3())
7473 msm_gpio_install_direct_irq(0, 0, 1);
7474}
7475
7476#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7477 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7478 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7479 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7480 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7481
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007482/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007483#define MAX_SDCC_CONTROLLER 5
7484
7485struct msm_sdcc_gpio {
7486 /* maximum 10 GPIOs per SDCC controller */
7487 s16 no;
7488 /* name of this GPIO */
7489 const char *name;
7490 bool always_on;
7491 bool is_enabled;
7492};
7493
7494#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7495static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7496 {159, "sdc1_dat_0"},
7497 {160, "sdc1_dat_1"},
7498 {161, "sdc1_dat_2"},
7499 {162, "sdc1_dat_3"},
7500#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7501 {163, "sdc1_dat_4"},
7502 {164, "sdc1_dat_5"},
7503 {165, "sdc1_dat_6"},
7504 {166, "sdc1_dat_7"},
7505#endif
7506 {167, "sdc1_clk"},
7507 {168, "sdc1_cmd"}
7508};
7509#endif
7510
7511#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7512static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7513 {143, "sdc2_dat_0"},
7514 {144, "sdc2_dat_1", 1},
7515 {145, "sdc2_dat_2"},
7516 {146, "sdc2_dat_3"},
7517#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7518 {147, "sdc2_dat_4"},
7519 {148, "sdc2_dat_5"},
7520 {149, "sdc2_dat_6"},
7521 {150, "sdc2_dat_7"},
7522#endif
7523 {151, "sdc2_cmd"},
7524 {152, "sdc2_clk", 1}
7525};
7526#endif
7527
7528#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7529static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7530 {95, "sdc5_cmd"},
7531 {96, "sdc5_dat_3"},
7532 {97, "sdc5_clk", 1},
7533 {98, "sdc5_dat_2"},
7534 {99, "sdc5_dat_1", 1},
7535 {100, "sdc5_dat_0"}
7536};
7537#endif
7538
7539struct msm_sdcc_pad_pull_cfg {
7540 enum msm_tlmm_pull_tgt pull;
7541 u32 pull_val;
7542};
7543
7544struct msm_sdcc_pad_drv_cfg {
7545 enum msm_tlmm_hdrive_tgt drv;
7546 u32 drv_val;
7547};
7548
7549#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7550static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7551 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7552 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7553 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7554};
7555
7556static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7557 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7558 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7559};
7560
7561static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7562 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7563 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7564 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7565};
7566
7567static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7568 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7569 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7570};
7571#endif
7572
7573#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7574static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7575 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7576 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7577 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7578};
7579
7580static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7581 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7582 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7583};
7584
7585static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7586 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7587 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7588 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7589};
7590
7591static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7592 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7593 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7594};
7595#endif
7596
7597struct msm_sdcc_pin_cfg {
7598 /*
7599 * = 1 if controller pins are using gpios
7600 * = 0 if controller has dedicated MSM pins
7601 */
7602 u8 is_gpio;
7603 u8 cfg_sts;
7604 u8 gpio_data_size;
7605 struct msm_sdcc_gpio *gpio_data;
7606 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7607 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7608 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7609 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7610 u8 pad_drv_data_size;
7611 u8 pad_pull_data_size;
7612 u8 sdio_lpm_gpio_cfg;
7613};
7614
7615
7616static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7617#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7618 [0] = {
7619 .is_gpio = 1,
7620 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7621 .gpio_data = sdc1_gpio_cfg
7622 },
7623#endif
7624#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7625 [1] = {
7626 .is_gpio = 1,
7627 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7628 .gpio_data = sdc2_gpio_cfg
7629 },
7630#endif
7631#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7632 [2] = {
7633 .is_gpio = 0,
7634 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7635 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7636 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7637 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7638 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7639 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7640 },
7641#endif
7642#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7643 [3] = {
7644 .is_gpio = 0,
7645 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7646 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7647 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7648 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7649 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7650 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7651 },
7652#endif
7653#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7654 [4] = {
7655 .is_gpio = 1,
7656 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7657 .gpio_data = sdc5_gpio_cfg
7658 }
7659#endif
7660};
7661
7662static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7663{
7664 int rc = 0;
7665 struct msm_sdcc_pin_cfg *curr;
7666 int n;
7667
7668 curr = &sdcc_pin_cfg_data[dev_id - 1];
7669 if (!curr->gpio_data)
7670 goto out;
7671
7672 for (n = 0; n < curr->gpio_data_size; n++) {
7673 if (enable) {
7674
7675 if (curr->gpio_data[n].always_on &&
7676 curr->gpio_data[n].is_enabled)
7677 continue;
7678 pr_debug("%s: enable: %s\n", __func__,
7679 curr->gpio_data[n].name);
7680 rc = gpio_request(curr->gpio_data[n].no,
7681 curr->gpio_data[n].name);
7682 if (rc) {
7683 pr_err("%s: gpio_request(%d, %s)"
7684 "failed", __func__,
7685 curr->gpio_data[n].no,
7686 curr->gpio_data[n].name);
7687 goto free_gpios;
7688 }
7689 /* set direction as output for all GPIOs */
7690 rc = gpio_direction_output(
7691 curr->gpio_data[n].no, 1);
7692 if (rc) {
7693 pr_err("%s: gpio_direction_output"
7694 "(%d, 1) failed\n", __func__,
7695 curr->gpio_data[n].no);
7696 goto free_gpios;
7697 }
7698 curr->gpio_data[n].is_enabled = 1;
7699 } else {
7700 /*
7701 * now free this GPIO which will put GPIO
7702 * in low power mode and will also put GPIO
7703 * in input mode
7704 */
7705 if (curr->gpio_data[n].always_on)
7706 continue;
7707 pr_debug("%s: disable: %s\n", __func__,
7708 curr->gpio_data[n].name);
7709 gpio_free(curr->gpio_data[n].no);
7710 curr->gpio_data[n].is_enabled = 0;
7711 }
7712 }
7713 curr->cfg_sts = enable;
7714 goto out;
7715
7716free_gpios:
7717 for (; n >= 0; n--)
7718 gpio_free(curr->gpio_data[n].no);
7719out:
7720 return rc;
7721}
7722
7723static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7724{
7725 int rc = 0;
7726 struct msm_sdcc_pin_cfg *curr;
7727 int n;
7728
7729 curr = &sdcc_pin_cfg_data[dev_id - 1];
7730 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7731 goto out;
7732
7733 if (enable) {
7734 /*
7735 * set up the normal driver strength and
7736 * pull config for pads
7737 */
7738 for (n = 0; n < curr->pad_drv_data_size; n++) {
7739 if (curr->sdio_lpm_gpio_cfg) {
7740 if (curr->pad_drv_on_data[n].drv ==
7741 TLMM_HDRV_SDC4_DATA)
7742 continue;
7743 }
7744 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7745 curr->pad_drv_on_data[n].drv_val);
7746 }
7747 for (n = 0; n < curr->pad_pull_data_size; n++) {
7748 if (curr->sdio_lpm_gpio_cfg) {
7749 if (curr->pad_pull_on_data[n].pull ==
7750 TLMM_PULL_SDC4_DATA)
7751 continue;
7752 }
7753 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7754 curr->pad_pull_on_data[n].pull_val);
7755 }
7756 } else {
7757 /* set the low power config for pads */
7758 for (n = 0; n < curr->pad_drv_data_size; n++) {
7759 if (curr->sdio_lpm_gpio_cfg) {
7760 if (curr->pad_drv_off_data[n].drv ==
7761 TLMM_HDRV_SDC4_DATA)
7762 continue;
7763 }
7764 msm_tlmm_set_hdrive(
7765 curr->pad_drv_off_data[n].drv,
7766 curr->pad_drv_off_data[n].drv_val);
7767 }
7768 for (n = 0; n < curr->pad_pull_data_size; n++) {
7769 if (curr->sdio_lpm_gpio_cfg) {
7770 if (curr->pad_pull_off_data[n].pull ==
7771 TLMM_PULL_SDC4_DATA)
7772 continue;
7773 }
7774 msm_tlmm_set_pull(
7775 curr->pad_pull_off_data[n].pull,
7776 curr->pad_pull_off_data[n].pull_val);
7777 }
7778 }
7779 curr->cfg_sts = enable;
7780out:
7781 return rc;
7782}
7783
7784struct sdcc_reg {
7785 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7786 const char *reg_name;
7787 /*
7788 * is set voltage supported for this regulator?
7789 * 0 = not supported, 1 = supported
7790 */
7791 unsigned char set_voltage_sup;
7792 /* voltage level to be set */
7793 unsigned int level;
7794 /* VDD/VCC/VCCQ voltage regulator handle */
7795 struct regulator *reg;
7796 /* is this regulator enabled? */
7797 bool enabled;
7798 /* is this regulator needs to be always on? */
7799 bool always_on;
7800 /* is operating power mode setting required for this regulator? */
7801 bool op_pwr_mode_sup;
7802 /* Load values for low power and high power mode */
7803 unsigned int lpm_uA;
7804 unsigned int hpm_uA;
7805};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007806/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007807static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7808/* only SDCC1 requires VCCQ voltage */
7809static struct sdcc_reg sdcc_vccq_reg_data[1];
7810/* all SDCC controllers may require voting for VDD PAD voltage */
7811static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7812
7813struct sdcc_reg_data {
7814 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7815 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7816 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7817 unsigned char sts; /* regulator enable/disable status */
7818};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007819/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007820static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7821
7822static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7823{
7824 int rc = 0;
7825
7826 /* Get the regulator handle */
7827 vreg->reg = regulator_get(NULL, vreg->reg_name);
7828 if (IS_ERR(vreg->reg)) {
7829 rc = PTR_ERR(vreg->reg);
7830 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7831 __func__, vreg->reg_name, rc);
7832 goto out;
7833 }
7834
7835 /* Set the voltage level if required */
7836 if (vreg->set_voltage_sup) {
7837 rc = regulator_set_voltage(vreg->reg, vreg->level,
7838 vreg->level);
7839 if (rc) {
7840 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7841 __func__, vreg->reg_name, rc);
7842 goto vreg_put;
7843 }
7844 }
7845 goto out;
7846
7847vreg_put:
7848 regulator_put(vreg->reg);
7849out:
7850 return rc;
7851}
7852
7853static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7854{
7855 regulator_put(vreg->reg);
7856}
7857
7858/* this init function should be called only once for each SDCC */
7859static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7860{
7861 int rc = 0;
7862 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7863 struct sdcc_reg_data *curr;
7864
7865 curr = &sdcc_vreg_data[dev_id - 1];
7866 curr_vdd_reg = curr->vdd_data;
7867 curr_vccq_reg = curr->vccq_data;
7868 curr_vddp_reg = curr->vddp_data;
7869
7870 if (init) {
7871 /*
7872 * get the regulator handle from voltage regulator framework
7873 * and then try to set the voltage level for the regulator
7874 */
7875 if (curr_vdd_reg) {
7876 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7877 if (rc)
7878 goto out;
7879 }
7880 if (curr_vccq_reg) {
7881 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7882 if (rc)
7883 goto vdd_reg_deinit;
7884 }
7885 if (curr_vddp_reg) {
7886 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7887 if (rc)
7888 goto vccq_reg_deinit;
7889 }
7890 goto out;
7891 } else
7892 /* deregister with all regulators from regulator framework */
7893 goto vddp_reg_deinit;
7894
7895vddp_reg_deinit:
7896 if (curr_vddp_reg)
7897 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7898vccq_reg_deinit:
7899 if (curr_vccq_reg)
7900 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7901vdd_reg_deinit:
7902 if (curr_vdd_reg)
7903 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7904out:
7905 return rc;
7906}
7907
7908static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7909{
7910 int rc;
7911
7912 if (!vreg->enabled) {
7913 rc = regulator_enable(vreg->reg);
7914 if (rc) {
7915 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7916 __func__, vreg->reg_name, rc);
7917 goto out;
7918 }
7919 vreg->enabled = 1;
7920 }
7921
7922 /* Put always_on regulator in HPM (high power mode) */
7923 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7924 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7925 if (rc < 0) {
7926 pr_err("%s: reg=%s: HPM setting failed"
7927 " hpm_uA=%d, rc=%d\n",
7928 __func__, vreg->reg_name,
7929 vreg->hpm_uA, rc);
7930 goto vreg_disable;
7931 }
7932 rc = 0;
7933 }
7934 goto out;
7935
7936vreg_disable:
7937 regulator_disable(vreg->reg);
7938 vreg->enabled = 0;
7939out:
7940 return rc;
7941}
7942
7943static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7944{
7945 int rc;
7946
7947 /* Never disable always_on regulator */
7948 if (!vreg->always_on) {
7949 rc = regulator_disable(vreg->reg);
7950 if (rc) {
7951 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7952 __func__, vreg->reg_name, rc);
7953 goto out;
7954 }
7955 vreg->enabled = 0;
7956 }
7957
7958 /* Put always_on regulator in LPM (low power mode) */
7959 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7960 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7961 if (rc < 0) {
7962 pr_err("%s: reg=%s: LPM setting failed"
7963 " lpm_uA=%d, rc=%d\n",
7964 __func__,
7965 vreg->reg_name,
7966 vreg->lpm_uA, rc);
7967 goto out;
7968 }
7969 rc = 0;
7970 }
7971
7972out:
7973 return rc;
7974}
7975
7976static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7977{
7978 int rc = 0;
7979 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7980 struct sdcc_reg_data *curr;
7981
7982 curr = &sdcc_vreg_data[dev_id - 1];
7983 curr_vdd_reg = curr->vdd_data;
7984 curr_vccq_reg = curr->vccq_data;
7985 curr_vddp_reg = curr->vddp_data;
7986
7987 /* check if regulators are initialized or not? */
7988 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7989 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7990 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7991 /* initialize voltage regulators required for this SDCC */
7992 rc = msm_sdcc_vreg_init(dev_id, 1);
7993 if (rc) {
7994 pr_err("%s: regulator init failed = %d\n",
7995 __func__, rc);
7996 goto out;
7997 }
7998 }
7999
8000 if (curr->sts == enable)
8001 goto out;
8002
8003 if (curr_vdd_reg) {
8004 if (enable)
8005 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
8006 else
8007 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
8008 if (rc)
8009 goto out;
8010 }
8011
8012 if (curr_vccq_reg) {
8013 if (enable)
8014 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
8015 else
8016 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
8017 if (rc)
8018 goto out;
8019 }
8020
8021 if (curr_vddp_reg) {
8022 if (enable)
8023 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
8024 else
8025 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
8026 if (rc)
8027 goto out;
8028 }
8029 curr->sts = enable;
8030
8031out:
8032 return rc;
8033}
8034
8035static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
8036{
8037 u32 rc_pin_cfg = 0;
8038 u32 rc_vreg_cfg = 0;
8039 u32 rc = 0;
8040 struct platform_device *pdev;
8041 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8042
8043 pdev = container_of(dv, struct platform_device, dev);
8044
8045 /* setup gpio/pad */
8046 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8047 if (curr_pin_cfg->cfg_sts == !!vdd)
8048 goto setup_vreg;
8049
8050 if (curr_pin_cfg->is_gpio)
8051 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
8052 else
8053 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
8054
8055setup_vreg:
8056 /* setup voltage regulators */
8057 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
8058
8059 if (rc_pin_cfg || rc_vreg_cfg)
8060 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
8061
8062 return rc;
8063}
8064
8065static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8066{
8067 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8068 struct platform_device *pdev;
8069
8070 pdev = container_of(dv, struct platform_device, dev);
8071 /* setup gpio/pad */
8072 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8073
8074 if (curr_pin_cfg->cfg_sts == active)
8075 return;
8076
8077 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8078 if (curr_pin_cfg->is_gpio)
8079 msm_sdcc_setup_gpio(pdev->id, active);
8080 else
8081 msm_sdcc_setup_pad(pdev->id, active);
8082 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8083}
8084
8085static int msm_sdc3_get_wpswitch(struct device *dev)
8086{
8087 struct platform_device *pdev;
8088 int status;
8089 pdev = container_of(dev, struct platform_device, dev);
8090
8091 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8092 if (status) {
8093 pr_err("%s:Failed to request GPIO %d\n",
8094 __func__, GPIO_SDC_WP);
8095 } else {
8096 status = gpio_direction_input(GPIO_SDC_WP);
8097 if (!status) {
8098 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8099 pr_info("%s: WP Status for Slot %d = %d\n",
8100 __func__, pdev->id, status);
8101 }
8102 gpio_free(GPIO_SDC_WP);
8103 }
8104 return status;
8105}
8106
8107#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8108int sdc5_register_status_notify(void (*callback)(int, void *),
8109 void *dev_id)
8110{
8111 sdc5_status_notify_cb = callback;
8112 sdc5_status_notify_cb_devid = dev_id;
8113 return 0;
8114}
8115#endif
8116
8117#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8118int sdc2_register_status_notify(void (*callback)(int, void *),
8119 void *dev_id)
8120{
8121 sdc2_status_notify_cb = callback;
8122 sdc2_status_notify_cb_devid = dev_id;
8123 return 0;
8124}
8125#endif
8126
8127/* Interrupt handler for SDC2 and SDC5 detection
8128 * This function uses dual-edge interrputs settings in order
8129 * to get SDIO detection when the GPIO is rising and SDIO removal
8130 * when the GPIO is falling */
8131static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8132{
8133 int status;
8134
8135 if (!machine_is_msm8x60_fusion() &&
8136 !machine_is_msm8x60_fusn_ffa())
8137 return IRQ_NONE;
8138
8139 status = gpio_get_value(MDM2AP_SYNC);
8140 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8141 __func__, status);
8142
8143#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8144 if (sdc2_status_notify_cb) {
8145 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8146 sdc2_status_notify_cb(status,
8147 sdc2_status_notify_cb_devid);
8148 }
8149#endif
8150
8151#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8152 if (sdc5_status_notify_cb) {
8153 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8154 sdc5_status_notify_cb(status,
8155 sdc5_status_notify_cb_devid);
8156 }
8157#endif
8158 return IRQ_HANDLED;
8159}
8160
8161static int msm8x60_multi_sdio_init(void)
8162{
8163 int ret, irq_num;
8164
8165 if (!machine_is_msm8x60_fusion() &&
8166 !machine_is_msm8x60_fusn_ffa())
8167 return 0;
8168
8169 ret = msm_gpiomux_get(MDM2AP_SYNC);
8170 if (ret) {
8171 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8172 __func__, MDM2AP_SYNC, ret);
8173 return ret;
8174 }
8175
8176 irq_num = gpio_to_irq(MDM2AP_SYNC);
8177
8178 ret = request_irq(irq_num,
8179 msm8x60_multi_sdio_slot_status_irq,
8180 IRQ_TYPE_EDGE_BOTH,
8181 "sdio_multidetection", NULL);
8182
8183 if (ret) {
8184 pr_err("%s:Failed to request irq, ret=%d\n",
8185 __func__, ret);
8186 return ret;
8187 }
8188
8189 return ret;
8190}
8191
8192#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8193#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8194static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8195{
8196 int status;
8197
8198 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8199 , "SD_HW_Detect");
8200 if (status) {
8201 pr_err("%s:Failed to request GPIO %d\n", __func__,
8202 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8203 } else {
8204 status = gpio_direction_input(
8205 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8206 if (!status)
8207 status = !(gpio_get_value_cansleep(
8208 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8209 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8210 }
8211 return (unsigned int) status;
8212}
8213#endif
8214#endif
8215
8216#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8217static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8218{
8219 struct platform_device *pdev;
8220 enum msm_mpm_pin pin;
8221 int ret = 0;
8222
8223 pdev = container_of(dev, struct platform_device, dev);
8224
8225 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8226 if (pdev->id == 4)
8227 pin = MSM_MPM_PIN_SDC4_DAT1;
8228 else
8229 return -EINVAL;
8230
8231 switch (mode) {
8232 case SDC_DAT1_DISABLE:
8233 ret = msm_mpm_enable_pin(pin, 0);
8234 break;
8235 case SDC_DAT1_ENABLE:
8236 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8237 ret = msm_mpm_enable_pin(pin, 1);
8238 break;
8239 case SDC_DAT1_ENWAKE:
8240 ret = msm_mpm_set_pin_wake(pin, 1);
8241 break;
8242 case SDC_DAT1_DISWAKE:
8243 ret = msm_mpm_set_pin_wake(pin, 0);
8244 break;
8245 default:
8246 ret = -EINVAL;
8247 break;
8248 }
8249 return ret;
8250}
8251#endif
8252#endif
8253
8254#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8255static struct mmc_platform_data msm8x60_sdc1_data = {
8256 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8257 .translate_vdd = msm_sdcc_setup_power,
8258#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8259 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8260#else
8261 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8262#endif
8263 .msmsdcc_fmin = 400000,
8264 .msmsdcc_fmid = 24000000,
8265 .msmsdcc_fmax = 48000000,
8266 .nonremovable = 1,
8267 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008268};
8269#endif
8270
8271#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8272static struct mmc_platform_data msm8x60_sdc2_data = {
8273 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8274 .translate_vdd = msm_sdcc_setup_power,
8275 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8276 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8277 .msmsdcc_fmin = 400000,
8278 .msmsdcc_fmid = 24000000,
8279 .msmsdcc_fmax = 48000000,
8280 .nonremovable = 0,
8281 .pclk_src_dfab = 1,
8282 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008283#ifdef CONFIG_MSM_SDIO_AL
8284 .is_sdio_al_client = 1,
8285#endif
8286};
8287#endif
8288
8289#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8290static struct mmc_platform_data msm8x60_sdc3_data = {
8291 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8292 .translate_vdd = msm_sdcc_setup_power,
8293 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8294 .wpswitch = msm_sdc3_get_wpswitch,
8295#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8296 .status = msm8x60_sdcc_slot_status,
8297 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8298 PMIC_GPIO_SDC3_DET - 1),
8299 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8300#endif
8301 .msmsdcc_fmin = 400000,
8302 .msmsdcc_fmid = 24000000,
8303 .msmsdcc_fmax = 48000000,
8304 .nonremovable = 0,
8305 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008306};
8307#endif
8308
8309#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8310static struct mmc_platform_data msm8x60_sdc4_data = {
8311 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8312 .translate_vdd = msm_sdcc_setup_power,
8313 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8314 .msmsdcc_fmin = 400000,
8315 .msmsdcc_fmid = 24000000,
8316 .msmsdcc_fmax = 48000000,
8317 .nonremovable = 0,
8318 .pclk_src_dfab = 1,
8319 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008320};
8321#endif
8322
8323#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8324static struct mmc_platform_data msm8x60_sdc5_data = {
8325 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8326 .translate_vdd = msm_sdcc_setup_power,
8327 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8328 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8329 .msmsdcc_fmin = 400000,
8330 .msmsdcc_fmid = 24000000,
8331 .msmsdcc_fmax = 48000000,
8332 .nonremovable = 0,
8333 .pclk_src_dfab = 1,
8334 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008335#ifdef CONFIG_MSM_SDIO_AL
8336 .is_sdio_al_client = 1,
8337#endif
8338};
8339#endif
8340
8341static void __init msm8x60_init_mmc(void)
8342{
8343#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8344 /* SDCC1 : eMMC card connected */
8345 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8346 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8347 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8348 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308349 sdcc_vreg_data[0].vdd_data->always_on = 1;
8350 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8351 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8352 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008353
8354 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8355 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8356 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8357 sdcc_vreg_data[0].vccq_data->always_on = 1;
8358
8359 msm_add_sdcc(1, &msm8x60_sdc1_data);
8360#endif
8361#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8362 /*
8363 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8364 * and no card is connected on 8660 SURF/FFA/FLUID.
8365 */
8366 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8367 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8368 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8369 sdcc_vreg_data[1].vdd_data->level = 1800000;
8370
8371 sdcc_vreg_data[1].vccq_data = NULL;
8372
8373 if (machine_is_msm8x60_fusion())
8374 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8375 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8376#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8377 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8378 msm_sdcc_setup_gpio(2, 1);
8379#endif
8380 msm_add_sdcc(2, &msm8x60_sdc2_data);
8381 }
8382#endif
8383#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8384 /* SDCC3 : External card slot connected */
8385 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8386 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8387 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8388 sdcc_vreg_data[2].vdd_data->level = 2850000;
8389 sdcc_vreg_data[2].vdd_data->always_on = 1;
8390 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8391 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8392 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8393
8394 sdcc_vreg_data[2].vccq_data = NULL;
8395
8396 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8397 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8398 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8399 sdcc_vreg_data[2].vddp_data->level = 2850000;
8400 sdcc_vreg_data[2].vddp_data->always_on = 1;
8401 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8402 /* Sleep current required is ~300 uA. But min. RPM
8403 * vote can be in terms of mA (min. 1 mA).
8404 * So let's vote for 2 mA during sleep.
8405 */
8406 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8407 /* Max. Active current required is 16 mA */
8408 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8409
8410 if (machine_is_msm8x60_fluid())
8411 msm8x60_sdc3_data.wpswitch = NULL;
8412 msm_add_sdcc(3, &msm8x60_sdc3_data);
8413#endif
8414#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8415 /* SDCC4 : WLAN WCN1314 chip is connected */
8416 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8417 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8418 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8419 sdcc_vreg_data[3].vdd_data->level = 1800000;
8420
8421 sdcc_vreg_data[3].vccq_data = NULL;
8422
8423 msm_add_sdcc(4, &msm8x60_sdc4_data);
8424#endif
8425#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8426 /*
8427 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8428 * and no card is connected on 8660 SURF/FFA/FLUID.
8429 */
8430 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8431 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8432 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8433 sdcc_vreg_data[4].vdd_data->level = 1800000;
8434
8435 sdcc_vreg_data[4].vccq_data = NULL;
8436
8437 if (machine_is_msm8x60_fusion())
8438 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8439 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8440#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8441 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8442 msm_sdcc_setup_gpio(5, 1);
8443#endif
8444 msm_add_sdcc(5, &msm8x60_sdc5_data);
8445 }
8446#endif
8447}
8448
8449#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8450static inline void display_common_power(int on) {}
8451#else
8452
8453#define _GET_REGULATOR(var, name) do { \
8454 if (var == NULL) { \
8455 var = regulator_get(NULL, name); \
8456 if (IS_ERR(var)) { \
8457 pr_err("'%s' regulator not found, rc=%ld\n", \
8458 name, PTR_ERR(var)); \
8459 var = NULL; \
8460 } \
8461 } \
8462} while (0)
8463
8464static int dsub_regulator(int on)
8465{
8466 static struct regulator *dsub_reg;
8467 static struct regulator *mpp0_reg;
8468 static int dsub_reg_enabled;
8469 int rc = 0;
8470
8471 _GET_REGULATOR(dsub_reg, "8901_l3");
8472 if (IS_ERR(dsub_reg)) {
8473 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8474 __func__, PTR_ERR(dsub_reg));
8475 return PTR_ERR(dsub_reg);
8476 }
8477
8478 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8479 if (IS_ERR(mpp0_reg)) {
8480 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8481 __func__, PTR_ERR(mpp0_reg));
8482 return PTR_ERR(mpp0_reg);
8483 }
8484
8485 if (on && !dsub_reg_enabled) {
8486 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8487 if (rc) {
8488 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8489 " err=%d", __func__, rc);
8490 goto dsub_regulator_err;
8491 }
8492 rc = regulator_enable(dsub_reg);
8493 if (rc) {
8494 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8495 " err=%d", __func__, rc);
8496 goto dsub_regulator_err;
8497 }
8498 rc = regulator_enable(mpp0_reg);
8499 if (rc) {
8500 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8501 " err=%d", __func__, rc);
8502 goto dsub_regulator_err;
8503 }
8504 dsub_reg_enabled = 1;
8505 } else if (!on && dsub_reg_enabled) {
8506 rc = regulator_disable(dsub_reg);
8507 if (rc)
8508 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8509 " err=%d", __func__, rc);
8510 rc = regulator_disable(mpp0_reg);
8511 if (rc)
8512 printk(KERN_WARNING "%s: failed to disable reg "
8513 "8901_mpp0 err=%d", __func__, rc);
8514 dsub_reg_enabled = 0;
8515 }
8516
8517 return rc;
8518
8519dsub_regulator_err:
8520 regulator_put(mpp0_reg);
8521 regulator_put(dsub_reg);
8522 return rc;
8523}
8524
8525static int display_power_on;
8526static void setup_display_power(void)
8527{
8528 if (display_power_on)
8529 if (lcdc_vga_enabled) {
8530 dsub_regulator(1);
8531 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8532 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8533 if (machine_is_msm8x60_ffa() ||
8534 machine_is_msm8x60_fusn_ffa())
8535 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8536 } else {
8537 dsub_regulator(0);
8538 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8539 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8540 if (machine_is_msm8x60_ffa() ||
8541 machine_is_msm8x60_fusn_ffa())
8542 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8543 }
8544 else {
8545 dsub_regulator(0);
8546 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8547 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8548 /* BACKLIGHT */
8549 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8550 /* LVDS */
8551 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8552 }
8553}
8554
8555#define _GET_REGULATOR(var, name) do { \
8556 if (var == NULL) { \
8557 var = regulator_get(NULL, name); \
8558 if (IS_ERR(var)) { \
8559 pr_err("'%s' regulator not found, rc=%ld\n", \
8560 name, PTR_ERR(var)); \
8561 var = NULL; \
8562 } \
8563 } \
8564} while (0)
8565
8566#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8567
8568static void display_common_power(int on)
8569{
8570 int rc;
8571 static struct regulator *display_reg;
8572
8573 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8574 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8575 if (on) {
8576 /* LVDS */
8577 _GET_REGULATOR(display_reg, "8901_l2");
8578 if (!display_reg)
8579 return;
8580 rc = regulator_set_voltage(display_reg,
8581 3300000, 3300000);
8582 if (rc)
8583 goto out;
8584 rc = regulator_enable(display_reg);
8585 if (rc)
8586 goto out;
8587 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8588 "LVDS_STDN_OUT_N");
8589 if (rc) {
8590 printk(KERN_ERR "%s: LVDS gpio %d request"
8591 "failed\n", __func__,
8592 GPIO_LVDS_SHUTDOWN_N);
8593 goto out2;
8594 }
8595
8596 /* BACKLIGHT */
8597 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8598 if (rc) {
8599 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8600 "failed\n", __func__,
8601 GPIO_BACKLIGHT_EN);
8602 goto out3;
8603 }
8604
8605 if (machine_is_msm8x60_ffa() ||
8606 machine_is_msm8x60_fusn_ffa()) {
8607 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8608 "DONGLE_PWR_EN");
8609 if (rc) {
8610 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8611 " %d request failed\n", __func__,
8612 GPIO_DONGLE_PWR_EN);
8613 goto out4;
8614 }
8615 }
8616
8617 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8618 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8619 if (machine_is_msm8x60_ffa() ||
8620 machine_is_msm8x60_fusn_ffa())
8621 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8622 mdelay(20);
8623 display_power_on = 1;
8624 setup_display_power();
8625 } else {
8626 if (display_power_on) {
8627 display_power_on = 0;
8628 setup_display_power();
8629 mdelay(20);
8630 if (machine_is_msm8x60_ffa() ||
8631 machine_is_msm8x60_fusn_ffa())
8632 gpio_free(GPIO_DONGLE_PWR_EN);
8633 goto out4;
8634 }
8635 }
8636 }
8637#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8638 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8639 else if (machine_is_msm8x60_fluid()) {
8640 static struct regulator *fluid_reg;
8641 static struct regulator *fluid_reg2;
8642
8643 if (on) {
8644 _GET_REGULATOR(fluid_reg, "8901_l2");
8645 if (!fluid_reg)
8646 return;
8647 _GET_REGULATOR(fluid_reg2, "8058_s3");
8648 if (!fluid_reg2) {
8649 regulator_put(fluid_reg);
8650 return;
8651 }
8652 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8653 if (rc) {
8654 regulator_put(fluid_reg2);
8655 regulator_put(fluid_reg);
8656 return;
8657 }
8658 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8659 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8660 regulator_enable(fluid_reg);
8661 regulator_enable(fluid_reg2);
8662 msleep(20);
8663 gpio_direction_output(GPIO_RESX_N, 0);
8664 udelay(10);
8665 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8666 display_power_on = 1;
8667 setup_display_power();
8668 } else {
8669 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8670 gpio_free(GPIO_RESX_N);
8671 msleep(20);
8672 regulator_disable(fluid_reg2);
8673 regulator_disable(fluid_reg);
8674 regulator_put(fluid_reg2);
8675 regulator_put(fluid_reg);
8676 display_power_on = 0;
8677 setup_display_power();
8678 fluid_reg = NULL;
8679 fluid_reg2 = NULL;
8680 }
8681 }
8682#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008683#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8684 else if (machine_is_msm8x60_dragon()) {
8685 static struct regulator *dragon_reg;
8686 static struct regulator *dragon_reg2;
8687
8688 if (on) {
8689 _GET_REGULATOR(dragon_reg, "8901_l2");
8690 if (!dragon_reg)
8691 return;
8692 _GET_REGULATOR(dragon_reg2, "8058_l16");
8693 if (!dragon_reg2) {
8694 regulator_put(dragon_reg);
8695 dragon_reg = NULL;
8696 return;
8697 }
8698
8699 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8700 if (rc) {
8701 pr_err("%s: gpio %d request failed with rc=%d\n",
8702 __func__, GPIO_NT35582_BL_EN, rc);
8703 regulator_put(dragon_reg);
8704 regulator_put(dragon_reg2);
8705 dragon_reg = NULL;
8706 dragon_reg2 = NULL;
8707 return;
8708 }
8709
8710 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8711 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8712 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8713 pr_err("%s: config gpio '%d' failed!\n",
8714 __func__, GPIO_NT35582_RESET);
8715 gpio_free(GPIO_NT35582_BL_EN);
8716 regulator_put(dragon_reg);
8717 regulator_put(dragon_reg2);
8718 dragon_reg = NULL;
8719 dragon_reg2 = NULL;
8720 return;
8721 }
8722
8723 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8724 if (rc) {
8725 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8726 __func__, GPIO_NT35582_RESET, rc);
8727 gpio_free(GPIO_NT35582_BL_EN);
8728 regulator_put(dragon_reg);
8729 regulator_put(dragon_reg2);
8730 dragon_reg = NULL;
8731 dragon_reg2 = NULL;
8732 return;
8733 }
8734
8735 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8736 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8737 regulator_enable(dragon_reg);
8738 regulator_enable(dragon_reg2);
8739 msleep(20);
8740
8741 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8742 msleep(20);
8743 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8744 msleep(20);
8745 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8746 msleep(50);
8747
8748 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8749
8750 display_power_on = 1;
8751 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8752 gpio_free(GPIO_NT35582_RESET);
8753 gpio_free(GPIO_NT35582_BL_EN);
8754 regulator_disable(dragon_reg2);
8755 regulator_disable(dragon_reg);
8756 regulator_put(dragon_reg2);
8757 regulator_put(dragon_reg);
8758 display_power_on = 0;
8759 dragon_reg = NULL;
8760 dragon_reg2 = NULL;
8761 }
8762 }
8763#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008764 return;
8765
8766out4:
8767 gpio_free(GPIO_BACKLIGHT_EN);
8768out3:
8769 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8770out2:
8771 regulator_disable(display_reg);
8772out:
8773 regulator_put(display_reg);
8774 display_reg = NULL;
8775}
8776#undef _GET_REGULATOR
8777#endif
8778
8779static int mipi_dsi_panel_power(int on);
8780
8781#define LCDC_NUM_GPIO 28
8782#define LCDC_GPIO_START 0
8783
8784static void lcdc_samsung_panel_power(int on)
8785{
8786 int n, ret = 0;
8787
8788 display_common_power(on);
8789
8790 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8791 if (on) {
8792 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8793 if (unlikely(ret)) {
8794 pr_err("%s not able to get gpio\n", __func__);
8795 break;
8796 }
8797 } else
8798 gpio_free(LCDC_GPIO_START + n);
8799 }
8800
8801 if (ret) {
8802 for (n--; n >= 0; n--)
8803 gpio_free(LCDC_GPIO_START + n);
8804 }
8805
8806 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8807}
8808
8809#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8810#define _GET_REGULATOR(var, name) do { \
8811 var = regulator_get(NULL, name); \
8812 if (IS_ERR(var)) { \
8813 pr_err("'%s' regulator not found, rc=%ld\n", \
8814 name, IS_ERR(var)); \
8815 var = NULL; \
8816 return -ENODEV; \
8817 } \
8818} while (0)
8819
8820static int hdmi_enable_5v(int on)
8821{
8822 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8823 static struct regulator *reg_8901_mpp0; /* External 5V */
8824 static int prev_on;
8825 int rc;
8826
8827 if (on == prev_on)
8828 return 0;
8829
8830 if (!reg_8901_hdmi_mvs)
8831 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8832 if (!reg_8901_mpp0)
8833 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8834
8835 if (on) {
8836 rc = regulator_enable(reg_8901_mpp0);
8837 if (rc) {
8838 pr_err("'%s' regulator enable failed, rc=%d\n",
8839 "reg_8901_mpp0", rc);
8840 return rc;
8841 }
8842 rc = regulator_enable(reg_8901_hdmi_mvs);
8843 if (rc) {
8844 pr_err("'%s' regulator enable failed, rc=%d\n",
8845 "8901_hdmi_mvs", rc);
8846 return rc;
8847 }
8848 pr_info("%s(on): success\n", __func__);
8849 } else {
8850 rc = regulator_disable(reg_8901_hdmi_mvs);
8851 if (rc)
8852 pr_warning("'%s' regulator disable failed, rc=%d\n",
8853 "8901_hdmi_mvs", rc);
8854 rc = regulator_disable(reg_8901_mpp0);
8855 if (rc)
8856 pr_warning("'%s' regulator disable failed, rc=%d\n",
8857 "reg_8901_mpp0", rc);
8858 pr_info("%s(off): success\n", __func__);
8859 }
8860
8861 prev_on = on;
8862
8863 return 0;
8864}
8865
8866static int hdmi_core_power(int on, int show)
8867{
8868 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8869 static int prev_on;
8870 int rc;
8871
8872 if (on == prev_on)
8873 return 0;
8874
8875 if (!reg_8058_l16)
8876 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8877
8878 if (on) {
8879 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8880 if (!rc)
8881 rc = regulator_enable(reg_8058_l16);
8882 if (rc) {
8883 pr_err("'%s' regulator enable failed, rc=%d\n",
8884 "8058_l16", rc);
8885 return rc;
8886 }
8887 rc = gpio_request(170, "HDMI_DDC_CLK");
8888 if (rc) {
8889 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8890 "HDMI_DDC_CLK", 170, rc);
8891 goto error1;
8892 }
8893 rc = gpio_request(171, "HDMI_DDC_DATA");
8894 if (rc) {
8895 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8896 "HDMI_DDC_DATA", 171, rc);
8897 goto error2;
8898 }
8899 rc = gpio_request(172, "HDMI_HPD");
8900 if (rc) {
8901 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8902 "HDMI_HPD", 172, rc);
8903 goto error3;
8904 }
8905 pr_info("%s(on): success\n", __func__);
8906 } else {
8907 gpio_free(170);
8908 gpio_free(171);
8909 gpio_free(172);
8910 rc = regulator_disable(reg_8058_l16);
8911 if (rc)
8912 pr_warning("'%s' regulator disable failed, rc=%d\n",
8913 "8058_l16", rc);
8914 pr_info("%s(off): success\n", __func__);
8915 }
8916
8917 prev_on = on;
8918
8919 return 0;
8920
8921error3:
8922 gpio_free(171);
8923error2:
8924 gpio_free(170);
8925error1:
8926 regulator_disable(reg_8058_l16);
8927 return rc;
8928}
8929
8930static int hdmi_cec_power(int on)
8931{
8932 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8933 static int prev_on;
8934 int rc;
8935
8936 if (on == prev_on)
8937 return 0;
8938
8939 if (!reg_8901_l3)
8940 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8941
8942 if (on) {
8943 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8944 if (!rc)
8945 rc = regulator_enable(reg_8901_l3);
8946 if (rc) {
8947 pr_err("'%s' regulator enable failed, rc=%d\n",
8948 "8901_l3", rc);
8949 return rc;
8950 }
8951 rc = gpio_request(169, "HDMI_CEC_VAR");
8952 if (rc) {
8953 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8954 "HDMI_CEC_VAR", 169, rc);
8955 goto error;
8956 }
8957 pr_info("%s(on): success\n", __func__);
8958 } else {
8959 gpio_free(169);
8960 rc = regulator_disable(reg_8901_l3);
8961 if (rc)
8962 pr_warning("'%s' regulator disable failed, rc=%d\n",
8963 "8901_l3", rc);
8964 pr_info("%s(off): success\n", __func__);
8965 }
8966
8967 prev_on = on;
8968
8969 return 0;
8970error:
8971 regulator_disable(reg_8901_l3);
8972 return rc;
8973}
8974
8975#undef _GET_REGULATOR
8976
8977#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8978
8979static int lcdc_panel_power(int on)
8980{
8981 int flag_on = !!on;
8982 static int lcdc_power_save_on;
8983
8984 if (lcdc_power_save_on == flag_on)
8985 return 0;
8986
8987 lcdc_power_save_on = flag_on;
8988
8989 lcdc_samsung_panel_power(on);
8990
8991 return 0;
8992}
8993
8994#ifdef CONFIG_MSM_BUS_SCALING
Nagamalleswararao Ganji5fabbd62011-11-06 23:10:43 -08008995
8996static struct msm_bus_vectors rotator_init_vectors[] = {
8997 {
8998 .src = MSM_BUS_MASTER_ROTATOR,
8999 .dst = MSM_BUS_SLAVE_SMI,
9000 .ab = 0,
9001 .ib = 0,
9002 },
9003 {
9004 .src = MSM_BUS_MASTER_ROTATOR,
9005 .dst = MSM_BUS_SLAVE_EBI_CH0,
9006 .ab = 0,
9007 .ib = 0,
9008 },
9009};
9010
9011static struct msm_bus_vectors rotator_ui_vectors[] = {
9012 {
9013 .src = MSM_BUS_MASTER_ROTATOR,
9014 .dst = MSM_BUS_SLAVE_SMI,
9015 .ab = 0,
9016 .ib = 0,
9017 },
9018 {
9019 .src = MSM_BUS_MASTER_ROTATOR,
9020 .dst = MSM_BUS_SLAVE_EBI_CH0,
9021 .ab = (1024 * 600 * 4 * 2 * 60),
9022 .ib = (1024 * 600 * 4 * 2 * 60 * 1.5),
9023 },
9024};
9025
9026static struct msm_bus_vectors rotator_vga_vectors[] = {
9027 {
9028 .src = MSM_BUS_MASTER_ROTATOR,
9029 .dst = MSM_BUS_SLAVE_SMI,
9030 .ab = (640 * 480 * 2 * 2 * 30),
9031 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9032 },
9033 {
9034 .src = MSM_BUS_MASTER_ROTATOR,
9035 .dst = MSM_BUS_SLAVE_EBI_CH0,
9036 .ab = (640 * 480 * 2 * 2 * 30),
9037 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9038 },
9039};
9040
9041static struct msm_bus_vectors rotator_720p_vectors[] = {
9042 {
9043 .src = MSM_BUS_MASTER_ROTATOR,
9044 .dst = MSM_BUS_SLAVE_SMI,
9045 .ab = (1280 * 736 * 2 * 2 * 30),
9046 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9047 },
9048 {
9049 .src = MSM_BUS_MASTER_ROTATOR,
9050 .dst = MSM_BUS_SLAVE_EBI_CH0,
9051 .ab = (1280 * 736 * 2 * 2 * 30),
9052 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9053 },
9054};
9055
9056static struct msm_bus_vectors rotator_1080p_vectors[] = {
9057 {
9058 .src = MSM_BUS_MASTER_ROTATOR,
9059 .dst = MSM_BUS_SLAVE_SMI,
9060 .ab = (1920 * 1088 * 2 * 2 * 30),
9061 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9062 },
9063 {
9064 .src = MSM_BUS_MASTER_ROTATOR,
9065 .dst = MSM_BUS_SLAVE_EBI_CH0,
9066 .ab = (1920 * 1088 * 2 * 2 * 30),
9067 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9068 },
9069};
9070
9071static struct msm_bus_paths rotator_bus_scale_usecases[] = {
9072 {
9073 ARRAY_SIZE(rotator_init_vectors),
9074 rotator_init_vectors,
9075 },
9076 {
9077 ARRAY_SIZE(rotator_ui_vectors),
9078 rotator_ui_vectors,
9079 },
9080 {
9081 ARRAY_SIZE(rotator_vga_vectors),
9082 rotator_vga_vectors,
9083 },
9084 {
9085 ARRAY_SIZE(rotator_720p_vectors),
9086 rotator_720p_vectors,
9087 },
9088 {
9089 ARRAY_SIZE(rotator_1080p_vectors),
9090 rotator_1080p_vectors,
9091 },
9092};
9093
9094struct msm_bus_scale_pdata rotator_bus_scale_pdata = {
9095 rotator_bus_scale_usecases,
9096 ARRAY_SIZE(rotator_bus_scale_usecases),
9097 .name = "rotator",
9098};
9099
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009100static struct msm_bus_vectors mdp_init_vectors[] = {
9101 /* For now, 0th array entry is reserved.
9102 * Please leave 0 as is and don't use it
9103 */
9104 {
9105 .src = MSM_BUS_MASTER_MDP_PORT0,
9106 .dst = MSM_BUS_SLAVE_SMI,
9107 .ab = 0,
9108 .ib = 0,
9109 },
9110 /* Master and slaves can be from different fabrics */
9111 {
9112 .src = MSM_BUS_MASTER_MDP_PORT0,
9113 .dst = MSM_BUS_SLAVE_EBI_CH0,
9114 .ab = 0,
9115 .ib = 0,
9116 },
9117};
9118
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009119#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9120static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
9121 /* If HDMI is used as primary */
9122 {
9123 .src = MSM_BUS_MASTER_MDP_PORT0,
9124 .dst = MSM_BUS_SLAVE_SMI,
9125 .ab = 2000000000,
9126 .ib = 2000000000,
9127 },
9128 /* Master and slaves can be from different fabrics */
9129 {
9130 .src = MSM_BUS_MASTER_MDP_PORT0,
9131 .dst = MSM_BUS_SLAVE_EBI_CH0,
9132 .ab = 2000000000,
9133 .ib = 2000000000,
9134 },
9135};
9136
9137static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9138 {
9139 ARRAY_SIZE(mdp_init_vectors),
9140 mdp_init_vectors,
9141 },
9142 {
9143 ARRAY_SIZE(hdmi_as_primary_vectors),
9144 hdmi_as_primary_vectors,
9145 },
9146 {
9147 ARRAY_SIZE(hdmi_as_primary_vectors),
9148 hdmi_as_primary_vectors,
9149 },
9150 {
9151 ARRAY_SIZE(hdmi_as_primary_vectors),
9152 hdmi_as_primary_vectors,
9153 },
9154 {
9155 ARRAY_SIZE(hdmi_as_primary_vectors),
9156 hdmi_as_primary_vectors,
9157 },
9158 {
9159 ARRAY_SIZE(hdmi_as_primary_vectors),
9160 hdmi_as_primary_vectors,
9161 },
9162};
9163#else
9164#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009165static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9166 /* Default case static display/UI/2d/3d if FB SMI */
9167 {
9168 .src = MSM_BUS_MASTER_MDP_PORT0,
9169 .dst = MSM_BUS_SLAVE_SMI,
9170 .ab = 388800000,
9171 .ib = 486000000,
9172 },
9173 /* Master and slaves can be from different fabrics */
9174 {
9175 .src = MSM_BUS_MASTER_MDP_PORT0,
9176 .dst = MSM_BUS_SLAVE_EBI_CH0,
9177 .ab = 0,
9178 .ib = 0,
9179 },
9180};
9181
9182static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9183 /* Default case static display/UI/2d/3d if FB SMI */
9184 {
9185 .src = MSM_BUS_MASTER_MDP_PORT0,
9186 .dst = MSM_BUS_SLAVE_SMI,
9187 .ab = 0,
9188 .ib = 0,
9189 },
9190 /* Master and slaves can be from different fabrics */
9191 {
9192 .src = MSM_BUS_MASTER_MDP_PORT0,
9193 .dst = MSM_BUS_SLAVE_EBI_CH0,
9194 .ab = 388800000,
9195 .ib = 486000000 * 2,
9196 },
9197};
9198static struct msm_bus_vectors mdp_vga_vectors[] = {
9199 /* VGA and less video */
9200 {
9201 .src = MSM_BUS_MASTER_MDP_PORT0,
9202 .dst = MSM_BUS_SLAVE_SMI,
9203 .ab = 458092800,
9204 .ib = 572616000,
9205 },
9206 {
9207 .src = MSM_BUS_MASTER_MDP_PORT0,
9208 .dst = MSM_BUS_SLAVE_EBI_CH0,
9209 .ab = 458092800,
9210 .ib = 572616000 * 2,
9211 },
9212};
9213static struct msm_bus_vectors mdp_720p_vectors[] = {
9214 /* 720p and less video */
9215 {
9216 .src = MSM_BUS_MASTER_MDP_PORT0,
9217 .dst = MSM_BUS_SLAVE_SMI,
9218 .ab = 471744000,
9219 .ib = 589680000,
9220 },
9221 /* Master and slaves can be from different fabrics */
9222 {
9223 .src = MSM_BUS_MASTER_MDP_PORT0,
9224 .dst = MSM_BUS_SLAVE_EBI_CH0,
9225 .ab = 471744000,
9226 .ib = 589680000 * 2,
9227 },
9228};
9229
9230static struct msm_bus_vectors mdp_1080p_vectors[] = {
9231 /* 1080p and less video */
9232 {
9233 .src = MSM_BUS_MASTER_MDP_PORT0,
9234 .dst = MSM_BUS_SLAVE_SMI,
9235 .ab = 575424000,
9236 .ib = 719280000,
9237 },
9238 /* Master and slaves can be from different fabrics */
9239 {
9240 .src = MSM_BUS_MASTER_MDP_PORT0,
9241 .dst = MSM_BUS_SLAVE_EBI_CH0,
9242 .ab = 575424000,
9243 .ib = 719280000 * 2,
9244 },
9245};
9246
9247#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009248static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9249 /* Default case static display/UI/2d/3d if FB SMI */
9250 {
9251 .src = MSM_BUS_MASTER_MDP_PORT0,
9252 .dst = MSM_BUS_SLAVE_SMI,
9253 .ab = 175110000,
9254 .ib = 218887500,
9255 },
9256 /* Master and slaves can be from different fabrics */
9257 {
9258 .src = MSM_BUS_MASTER_MDP_PORT0,
9259 .dst = MSM_BUS_SLAVE_EBI_CH0,
9260 .ab = 0,
9261 .ib = 0,
9262 },
9263};
9264
9265static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9266 /* Default case static display/UI/2d/3d if FB SMI */
9267 {
9268 .src = MSM_BUS_MASTER_MDP_PORT0,
9269 .dst = MSM_BUS_SLAVE_SMI,
9270 .ab = 0,
9271 .ib = 0,
9272 },
9273 /* Master and slaves can be from different fabrics */
9274 {
9275 .src = MSM_BUS_MASTER_MDP_PORT0,
9276 .dst = MSM_BUS_SLAVE_EBI_CH0,
9277 .ab = 216000000,
9278 .ib = 270000000 * 2,
9279 },
9280};
9281static struct msm_bus_vectors mdp_vga_vectors[] = {
9282 /* VGA and less video */
9283 {
9284 .src = MSM_BUS_MASTER_MDP_PORT0,
9285 .dst = MSM_BUS_SLAVE_SMI,
9286 .ab = 216000000,
9287 .ib = 270000000,
9288 },
9289 {
9290 .src = MSM_BUS_MASTER_MDP_PORT0,
9291 .dst = MSM_BUS_SLAVE_EBI_CH0,
9292 .ab = 216000000,
9293 .ib = 270000000 * 2,
9294 },
9295};
9296
9297static struct msm_bus_vectors mdp_720p_vectors[] = {
9298 /* 720p and less video */
9299 {
9300 .src = MSM_BUS_MASTER_MDP_PORT0,
9301 .dst = MSM_BUS_SLAVE_SMI,
9302 .ab = 230400000,
9303 .ib = 288000000,
9304 },
9305 /* Master and slaves can be from different fabrics */
9306 {
9307 .src = MSM_BUS_MASTER_MDP_PORT0,
9308 .dst = MSM_BUS_SLAVE_EBI_CH0,
9309 .ab = 230400000,
9310 .ib = 288000000 * 2,
9311 },
9312};
9313
9314static struct msm_bus_vectors mdp_1080p_vectors[] = {
9315 /* 1080p and less video */
9316 {
9317 .src = MSM_BUS_MASTER_MDP_PORT0,
9318 .dst = MSM_BUS_SLAVE_SMI,
9319 .ab = 334080000,
9320 .ib = 417600000,
9321 },
9322 /* Master and slaves can be from different fabrics */
9323 {
9324 .src = MSM_BUS_MASTER_MDP_PORT0,
9325 .dst = MSM_BUS_SLAVE_EBI_CH0,
9326 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009327 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009328 },
9329};
9330
9331#endif
9332static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9333 {
9334 ARRAY_SIZE(mdp_init_vectors),
9335 mdp_init_vectors,
9336 },
9337 {
9338 ARRAY_SIZE(mdp_sd_smi_vectors),
9339 mdp_sd_smi_vectors,
9340 },
9341 {
9342 ARRAY_SIZE(mdp_sd_ebi_vectors),
9343 mdp_sd_ebi_vectors,
9344 },
9345 {
9346 ARRAY_SIZE(mdp_vga_vectors),
9347 mdp_vga_vectors,
9348 },
9349 {
9350 ARRAY_SIZE(mdp_720p_vectors),
9351 mdp_720p_vectors,
9352 },
9353 {
9354 ARRAY_SIZE(mdp_1080p_vectors),
9355 mdp_1080p_vectors,
9356 },
9357};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009358#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009359static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9360 mdp_bus_scale_usecases,
9361 ARRAY_SIZE(mdp_bus_scale_usecases),
9362 .name = "mdp",
9363};
9364
9365#endif
9366#ifdef CONFIG_MSM_BUS_SCALING
9367static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9368 /* For now, 0th array entry is reserved.
9369 * Please leave 0 as is and don't use it
9370 */
9371 {
9372 .src = MSM_BUS_MASTER_MDP_PORT0,
9373 .dst = MSM_BUS_SLAVE_SMI,
9374 .ab = 0,
9375 .ib = 0,
9376 },
9377 /* Master and slaves can be from different fabrics */
9378 {
9379 .src = MSM_BUS_MASTER_MDP_PORT0,
9380 .dst = MSM_BUS_SLAVE_EBI_CH0,
9381 .ab = 0,
9382 .ib = 0,
9383 },
9384};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009385#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9386static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9387 /* For now, 0th array entry is reserved.
9388 * Please leave 0 as is and don't use it
9389 */
9390 {
9391 .src = MSM_BUS_MASTER_MDP_PORT0,
9392 .dst = MSM_BUS_SLAVE_SMI,
9393 .ab = 2000000000,
9394 .ib = 2000000000,
9395 },
9396 /* Master and slaves can be from different fabrics */
9397 {
9398 .src = MSM_BUS_MASTER_MDP_PORT0,
9399 .dst = MSM_BUS_SLAVE_EBI_CH0,
9400 .ab = 2000000000,
9401 .ib = 2000000000,
9402 },
9403};
9404#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009405static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9406 /* For now, 0th array entry is reserved.
9407 * Please leave 0 as is and don't use it
9408 */
9409 {
9410 .src = MSM_BUS_MASTER_MDP_PORT0,
9411 .dst = MSM_BUS_SLAVE_SMI,
9412 .ab = 566092800,
9413 .ib = 707616000,
9414 },
9415 /* Master and slaves can be from different fabrics */
9416 {
9417 .src = MSM_BUS_MASTER_MDP_PORT0,
9418 .dst = MSM_BUS_SLAVE_EBI_CH0,
9419 .ab = 566092800,
9420 .ib = 707616000,
9421 },
9422};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009423#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009424static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9425 {
9426 ARRAY_SIZE(dtv_bus_init_vectors),
9427 dtv_bus_init_vectors,
9428 },
9429 {
9430 ARRAY_SIZE(dtv_bus_def_vectors),
9431 dtv_bus_def_vectors,
9432 },
9433};
9434static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9435 dtv_bus_scale_usecases,
9436 ARRAY_SIZE(dtv_bus_scale_usecases),
9437 .name = "dtv",
9438};
9439
9440static struct lcdc_platform_data dtv_pdata = {
9441 .bus_scale_table = &dtv_bus_scale_pdata,
9442};
9443#endif
9444
9445
9446static struct lcdc_platform_data lcdc_pdata = {
9447 .lcdc_power_save = lcdc_panel_power,
9448};
9449
9450
9451#define MDP_VSYNC_GPIO 28
9452
9453/*
9454 * MIPI_DSI only use 8058_LDO0 which need always on
9455 * therefore it need to be put at low power mode if
9456 * it was not used instead of turn it off.
9457 */
9458static int mipi_dsi_panel_power(int on)
9459{
9460 int flag_on = !!on;
9461 static int mipi_dsi_power_save_on;
9462 static struct regulator *ldo0;
9463 int rc = 0;
9464
9465 if (mipi_dsi_power_save_on == flag_on)
9466 return 0;
9467
9468 mipi_dsi_power_save_on = flag_on;
9469
9470 if (ldo0 == NULL) { /* init */
9471 ldo0 = regulator_get(NULL, "8058_l0");
9472 if (IS_ERR(ldo0)) {
9473 pr_debug("%s: LDO0 failed\n", __func__);
9474 rc = PTR_ERR(ldo0);
9475 return rc;
9476 }
9477
9478 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9479 if (rc)
9480 goto out;
9481
9482 rc = regulator_enable(ldo0);
9483 if (rc)
9484 goto out;
9485 }
9486
9487 if (on) {
9488 /* set ldo0 to HPM */
9489 rc = regulator_set_optimum_mode(ldo0, 100000);
9490 if (rc < 0)
9491 goto out;
9492 } else {
9493 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309494 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009495 if (rc < 0)
9496 goto out;
9497 }
9498
9499 return 0;
9500out:
9501 regulator_disable(ldo0);
9502 regulator_put(ldo0);
9503 ldo0 = NULL;
9504 return rc;
9505}
9506
9507static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9508 .vsync_gpio = MDP_VSYNC_GPIO,
9509 .dsi_power_save = mipi_dsi_panel_power,
9510};
9511
9512#ifdef CONFIG_FB_MSM_TVOUT
9513static struct regulator *reg_8058_l13;
9514
9515static int atv_dac_power(int on)
9516{
9517 int rc = 0;
9518 #define _GET_REGULATOR(var, name) do { \
9519 var = regulator_get(NULL, name); \
9520 if (IS_ERR(var)) { \
9521 pr_info("'%s' regulator not found, rc=%ld\n", \
9522 name, IS_ERR(var)); \
9523 var = NULL; \
9524 return -ENODEV; \
9525 } \
9526 } while (0)
9527
9528 if (!reg_8058_l13)
9529 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9530 #undef _GET_REGULATOR
9531
9532 if (on) {
9533 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9534 if (rc) {
9535 pr_info("%s: '%s' regulator set voltage failed,\
9536 rc=%d\n", __func__, "8058_l13", rc);
9537 return rc;
9538 }
9539
9540 rc = regulator_enable(reg_8058_l13);
9541 if (rc) {
9542 pr_err("%s: '%s' regulator enable failed,\
9543 rc=%d\n", __func__, "8058_l13", rc);
9544 return rc;
9545 }
9546 } else {
9547 rc = regulator_force_disable(reg_8058_l13);
9548 if (rc)
9549 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9550 __func__, "8058_l13", rc);
9551 }
9552 return rc;
9553
9554}
9555#endif
9556
9557#ifdef CONFIG_FB_MSM_MIPI_DSI
9558int mdp_core_clk_rate_table[] = {
9559 85330000,
9560 85330000,
9561 160000000,
9562 200000000,
9563};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009564#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9565int mdp_core_clk_rate_table[] = {
9566 200000000,
9567 200000000,
9568 200000000,
9569 200000000,
9570};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009571#else
9572int mdp_core_clk_rate_table[] = {
9573 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009574 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009575 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009576 200000000,
9577};
9578#endif
9579
9580static struct msm_panel_common_pdata mdp_pdata = {
9581 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009582#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9583 .mdp_core_clk_rate = 200000000,
9584#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009585 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009586#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009587 .mdp_core_clk_table = mdp_core_clk_rate_table,
9588 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9589#ifdef CONFIG_MSM_BUS_SCALING
9590 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9591#endif
9592 .mdp_rev = MDP_REV_41,
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009593#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
9594 .mem_hid = ION_CP_WB_HEAP_ID,
9595#else
9596 .mem_hid = MEMTYPE_EBI1,
9597#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009598};
9599
Huaibin Yanga5419422011-12-08 23:52:10 -08009600static void __init reserve_mdp_memory(void)
9601{
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009602 mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9603 mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9604#if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
9605 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9606 mdp_pdata.ov0_wb_size;
9607 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9608 mdp_pdata.ov1_wb_size;
9609#endif
Huaibin Yanga5419422011-12-08 23:52:10 -08009610}
9611
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009612#ifdef CONFIG_FB_MSM_TVOUT
9613
9614#ifdef CONFIG_MSM_BUS_SCALING
9615static struct msm_bus_vectors atv_bus_init_vectors[] = {
9616 /* For now, 0th array entry is reserved.
9617 * Please leave 0 as is and don't use it
9618 */
9619 {
9620 .src = MSM_BUS_MASTER_MDP_PORT0,
9621 .dst = MSM_BUS_SLAVE_SMI,
9622 .ab = 0,
9623 .ib = 0,
9624 },
9625 /* Master and slaves can be from different fabrics */
9626 {
9627 .src = MSM_BUS_MASTER_MDP_PORT0,
9628 .dst = MSM_BUS_SLAVE_EBI_CH0,
9629 .ab = 0,
9630 .ib = 0,
9631 },
9632};
9633static struct msm_bus_vectors atv_bus_def_vectors[] = {
9634 /* For now, 0th array entry is reserved.
9635 * Please leave 0 as is and don't use it
9636 */
9637 {
9638 .src = MSM_BUS_MASTER_MDP_PORT0,
9639 .dst = MSM_BUS_SLAVE_SMI,
9640 .ab = 236390400,
9641 .ib = 265939200,
9642 },
9643 /* Master and slaves can be from different fabrics */
9644 {
9645 .src = MSM_BUS_MASTER_MDP_PORT0,
9646 .dst = MSM_BUS_SLAVE_EBI_CH0,
9647 .ab = 236390400,
9648 .ib = 265939200,
9649 },
9650};
9651static struct msm_bus_paths atv_bus_scale_usecases[] = {
9652 {
9653 ARRAY_SIZE(atv_bus_init_vectors),
9654 atv_bus_init_vectors,
9655 },
9656 {
9657 ARRAY_SIZE(atv_bus_def_vectors),
9658 atv_bus_def_vectors,
9659 },
9660};
9661static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9662 atv_bus_scale_usecases,
9663 ARRAY_SIZE(atv_bus_scale_usecases),
9664 .name = "atv",
9665};
9666#endif
9667
9668static struct tvenc_platform_data atv_pdata = {
9669 .poll = 0,
9670 .pm_vid_en = atv_dac_power,
9671#ifdef CONFIG_MSM_BUS_SCALING
9672 .bus_scale_table = &atv_bus_scale_pdata,
9673#endif
9674};
9675#endif
9676
9677static void __init msm_fb_add_devices(void)
9678{
9679#ifdef CONFIG_FB_MSM_LCDC_DSUB
9680 mdp_pdata.mdp_core_clk_table = NULL;
9681 mdp_pdata.num_mdp_clk = 0;
9682 mdp_pdata.mdp_core_clk_rate = 200000000;
9683#endif
9684 if (machine_is_msm8x60_rumi3())
9685 msm_fb_register_device("mdp", NULL);
9686 else
9687 msm_fb_register_device("mdp", &mdp_pdata);
9688
9689 msm_fb_register_device("lcdc", &lcdc_pdata);
9690 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9691#ifdef CONFIG_MSM_BUS_SCALING
9692 msm_fb_register_device("dtv", &dtv_pdata);
9693#endif
9694#ifdef CONFIG_FB_MSM_TVOUT
9695 msm_fb_register_device("tvenc", &atv_pdata);
9696 msm_fb_register_device("tvout_device", NULL);
9697#endif
9698}
9699
9700#if (defined(CONFIG_MARIMBA_CORE)) && \
9701 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9702
9703static const struct {
9704 char *name;
9705 int vmin;
9706 int vmax;
9707} bt_regs_info[] = {
9708 { "8058_s3", 1800000, 1800000 },
9709 { "8058_s2", 1300000, 1300000 },
9710 { "8058_l8", 2900000, 3050000 },
9711};
9712
9713static struct {
9714 bool enabled;
9715} bt_regs_status[] = {
9716 { false },
9717 { false },
9718 { false },
9719};
9720static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9721
9722static int bahama_bt(int on)
9723{
9724 int rc;
9725 int i;
9726 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9727
9728 struct bahama_variant_register {
9729 const size_t size;
9730 const struct bahama_config_register *set;
9731 };
9732
9733 const struct bahama_config_register *p;
9734
9735 u8 version;
9736
9737 const struct bahama_config_register v10_bt_on[] = {
9738 { 0xE9, 0x00, 0xFF },
9739 { 0xF4, 0x80, 0xFF },
9740 { 0xE4, 0x00, 0xFF },
9741 { 0xE5, 0x00, 0x0F },
9742#ifdef CONFIG_WLAN
9743 { 0xE6, 0x38, 0x7F },
9744 { 0xE7, 0x06, 0xFF },
9745#endif
9746 { 0xE9, 0x21, 0xFF },
9747 { 0x01, 0x0C, 0x1F },
9748 { 0x01, 0x08, 0x1F },
9749 };
9750
9751 const struct bahama_config_register v20_bt_on_fm_off[] = {
9752 { 0x11, 0x0C, 0xFF },
9753 { 0x13, 0x01, 0xFF },
9754 { 0xF4, 0x80, 0xFF },
9755 { 0xF0, 0x00, 0xFF },
9756 { 0xE9, 0x00, 0xFF },
9757#ifdef CONFIG_WLAN
9758 { 0x81, 0x00, 0x7F },
9759 { 0x82, 0x00, 0xFF },
9760 { 0xE6, 0x38, 0x7F },
9761 { 0xE7, 0x06, 0xFF },
9762#endif
9763 { 0xE9, 0x21, 0xFF },
9764 };
9765
9766 const struct bahama_config_register v20_bt_on_fm_on[] = {
9767 { 0x11, 0x0C, 0xFF },
9768 { 0x13, 0x01, 0xFF },
9769 { 0xF4, 0x86, 0xFF },
9770 { 0xF0, 0x06, 0xFF },
9771 { 0xE9, 0x00, 0xFF },
9772#ifdef CONFIG_WLAN
9773 { 0x81, 0x00, 0x7F },
9774 { 0x82, 0x00, 0xFF },
9775 { 0xE6, 0x38, 0x7F },
9776 { 0xE7, 0x06, 0xFF },
9777#endif
9778 { 0xE9, 0x21, 0xFF },
9779 };
9780
9781 const struct bahama_config_register v10_bt_off[] = {
9782 { 0xE9, 0x00, 0xFF },
9783 };
9784
9785 const struct bahama_config_register v20_bt_off_fm_off[] = {
9786 { 0xF4, 0x84, 0xFF },
9787 { 0xF0, 0x04, 0xFF },
9788 { 0xE9, 0x00, 0xFF }
9789 };
9790
9791 const struct bahama_config_register v20_bt_off_fm_on[] = {
9792 { 0xF4, 0x86, 0xFF },
9793 { 0xF0, 0x06, 0xFF },
9794 { 0xE9, 0x00, 0xFF }
9795 };
9796 const struct bahama_variant_register bt_bahama[2][3] = {
9797 {
9798 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9799 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9800 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9801 },
9802 {
9803 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9804 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9805 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9806 }
9807 };
9808
9809 u8 offset = 0; /* index into bahama configs */
9810
9811 on = on ? 1 : 0;
9812 version = read_bahama_ver();
9813
9814 if (version == VER_UNSUPPORTED) {
9815 dev_err(&msm_bt_power_device.dev,
9816 "%s: unsupported version\n",
9817 __func__);
9818 return -EIO;
9819 }
9820
9821 if (version == VER_2_0) {
9822 if (marimba_get_fm_status(&config))
9823 offset = 0x01;
9824 }
9825
9826 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9827 if (on && (version == VER_2_0)) {
9828 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9829 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9830 && (bt_regs_status[i].enabled == true)) {
9831 if (regulator_disable(bt_regs[i])) {
9832 dev_err(&msm_bt_power_device.dev,
9833 "%s: regulator disable failed",
9834 __func__);
9835 }
9836 bt_regs_status[i].enabled = false;
9837 break;
9838 }
9839 }
9840 }
9841
9842 p = bt_bahama[on][version + offset].set;
9843
9844 dev_info(&msm_bt_power_device.dev,
9845 "%s: found version %d\n", __func__, version);
9846
9847 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9848 u8 value = (p+i)->value;
9849 rc = marimba_write_bit_mask(&config,
9850 (p+i)->reg,
9851 &value,
9852 sizeof((p+i)->value),
9853 (p+i)->mask);
9854 if (rc < 0) {
9855 dev_err(&msm_bt_power_device.dev,
9856 "%s: reg %d write failed: %d\n",
9857 __func__, (p+i)->reg, rc);
9858 return rc;
9859 }
9860 dev_dbg(&msm_bt_power_device.dev,
9861 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9862 __func__, (p+i)->reg,
9863 value, (p+i)->mask);
9864 }
9865 /* Update BT Status */
9866 if (on)
9867 marimba_set_bt_status(&config, true);
9868 else
9869 marimba_set_bt_status(&config, false);
9870
9871 return 0;
9872}
9873
9874static int bluetooth_use_regulators(int on)
9875{
9876 int i, recover = -1, rc = 0;
9877
9878 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9879 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9880 bt_regs_info[i].name) :
9881 (regulator_put(bt_regs[i]), NULL);
9882 if (IS_ERR(bt_regs[i])) {
9883 rc = PTR_ERR(bt_regs[i]);
9884 dev_err(&msm_bt_power_device.dev,
9885 "regulator %s get failed (%d)\n",
9886 bt_regs_info[i].name, rc);
9887 recover = i - 1;
9888 bt_regs[i] = NULL;
9889 break;
9890 }
9891
9892 if (!on)
9893 continue;
9894
9895 rc = regulator_set_voltage(bt_regs[i],
9896 bt_regs_info[i].vmin,
9897 bt_regs_info[i].vmax);
9898 if (rc < 0) {
9899 dev_err(&msm_bt_power_device.dev,
9900 "regulator %s voltage set (%d)\n",
9901 bt_regs_info[i].name, rc);
9902 recover = i;
9903 break;
9904 }
9905 }
9906
9907 if (on && (recover > -1))
9908 for (i = recover; i >= 0; i--) {
9909 regulator_put(bt_regs[i]);
9910 bt_regs[i] = NULL;
9911 }
9912
9913 return rc;
9914}
9915
9916static int bluetooth_switch_regulators(int on)
9917{
9918 int i, rc = 0;
9919
9920 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9921 if (on && (bt_regs_status[i].enabled == false)) {
9922 rc = regulator_enable(bt_regs[i]);
9923 if (rc < 0) {
9924 dev_err(&msm_bt_power_device.dev,
9925 "regulator %s %s failed (%d)\n",
9926 bt_regs_info[i].name,
9927 "enable", rc);
9928 if (i > 0) {
9929 while (--i) {
9930 regulator_disable(bt_regs[i]);
9931 bt_regs_status[i].enabled
9932 = false;
9933 }
9934 break;
9935 }
9936 }
9937 bt_regs_status[i].enabled = true;
9938 } else if (!on && (bt_regs_status[i].enabled == true)) {
9939 rc = regulator_disable(bt_regs[i]);
9940 if (rc < 0) {
9941 dev_err(&msm_bt_power_device.dev,
9942 "regulator %s %s failed (%d)\n",
9943 bt_regs_info[i].name,
9944 "disable", rc);
9945 break;
9946 }
9947 bt_regs_status[i].enabled = false;
9948 }
9949 }
9950 return rc;
9951}
9952
9953static struct msm_xo_voter *bt_clock;
9954
9955static int bluetooth_power(int on)
9956{
9957 int rc = 0;
9958 int id;
9959
9960 /* In case probe function fails, cur_connv_type would be -1 */
9961 id = adie_get_detected_connectivity_type();
9962 if (id != BAHAMA_ID) {
9963 pr_err("%s: unexpected adie connectivity type: %d\n",
9964 __func__, id);
9965 return -ENODEV;
9966 }
9967
9968 if (on) {
9969
9970 rc = bluetooth_use_regulators(1);
9971 if (rc < 0)
9972 goto out;
9973
9974 rc = bluetooth_switch_regulators(1);
9975
9976 if (rc < 0)
9977 goto fail_put;
9978
9979 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9980
9981 if (IS_ERR(bt_clock)) {
9982 pr_err("Couldn't get TCXO_D0 voter\n");
9983 goto fail_switch;
9984 }
9985
9986 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9987
9988 if (rc < 0) {
9989 pr_err("Failed to vote for TCXO_DO ON\n");
9990 goto fail_vote;
9991 }
9992
9993 rc = bahama_bt(1);
9994
9995 if (rc < 0)
9996 goto fail_clock;
9997
9998 msleep(10);
9999
10000 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
10001
10002 if (rc < 0) {
10003 pr_err("Failed to vote for TCXO_DO pin control\n");
10004 goto fail_vote;
10005 }
10006 } else {
10007 /* check for initial RFKILL block (power off) */
10008 /* some RFKILL versions/configurations rfkill_register */
10009 /* calls here for an initial set_block */
10010 /* avoid calling i2c and regulator before unblock (on) */
10011 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
10012 dev_info(&msm_bt_power_device.dev,
10013 "%s: initialized OFF/blocked\n", __func__);
10014 goto out;
10015 }
10016
10017 bahama_bt(0);
10018
10019fail_clock:
10020 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
10021fail_vote:
10022 msm_xo_put(bt_clock);
10023fail_switch:
10024 bluetooth_switch_regulators(0);
10025fail_put:
10026 bluetooth_use_regulators(0);
10027 }
10028
10029out:
10030 if (rc < 0)
10031 on = 0;
10032 dev_info(&msm_bt_power_device.dev,
10033 "Bluetooth power switch: state %d result %d\n", on, rc);
10034
10035 return rc;
10036}
10037
10038#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
10039
10040static void __init msm8x60_cfg_smsc911x(void)
10041{
10042 smsc911x_resources[1].start =
10043 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10044 smsc911x_resources[1].end =
10045 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10046}
10047
10048#ifdef CONFIG_MSM_RPM
10049static struct msm_rpm_platform_data msm_rpm_data = {
10050 .reg_base_addrs = {
10051 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
10052 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
10053 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
10054 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
10055 },
10056
10057 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
10058 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
10059 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
10060 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
10061 .msm_apps_ipc_rpm_val = 4,
10062};
10063#endif
10064
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010065void msm_fusion_setup_pinctrl(void)
10066{
10067 struct msm_xo_voter *a1;
10068
10069 if (socinfo_get_platform_subtype() == 0x3) {
10070 /*
10071 * Vote for the A1 clock to be in pin control mode before
10072 * the external images are loaded.
10073 */
10074 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
10075 BUG_ON(!a1);
10076 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
10077 }
10078}
10079
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010080struct msm_board_data {
10081 struct msm_gpiomux_configs *gpiomux_cfgs;
10082};
10083
10084static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
10085 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10086};
10087
10088static struct msm_board_data msm8x60_sim_board_data __initdata = {
10089 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10090};
10091
10092static struct msm_board_data msm8x60_surf_board_data __initdata = {
10093 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10094};
10095
10096static struct msm_board_data msm8x60_ffa_board_data __initdata = {
10097 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10098};
10099
10100static struct msm_board_data msm8x60_fluid_board_data __initdata = {
10101 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
10102};
10103
10104static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
10105 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10106};
10107
10108static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
10109 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10110};
10111
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010112static struct msm_board_data msm8x60_dragon_board_data __initdata = {
10113 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
10114};
10115
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010116static void __init msm8x60_init(struct msm_board_data *board_data)
10117{
10118 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010119#ifdef CONFIG_USB_EHCI_MSM_72K
10120 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
10121 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
10122 .level = PM8901_MPP_DIG_LEVEL_L5,
10123 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
10124 };
10125#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010126 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070010127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010128 /*
10129 * Initialize RPM first as other drivers and devices may need
10130 * it for their initialization.
10131 */
10132#ifdef CONFIG_MSM_RPM
10133 BUG_ON(msm_rpm_init(&msm_rpm_data));
10134#endif
10135 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
10136 ARRAY_SIZE(msm_rpmrs_levels)));
10137 if (msm_xo_init())
10138 pr_err("Failed to initialize XO votes\n");
10139
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010140 msm8x60_check_2d_hardware();
10141
10142 /* Change SPM handling of core 1 if PMM 8160 is present. */
10143 soc_platform_version = socinfo_get_platform_version();
10144 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
10145 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
10146 struct msm_spm_platform_data *spm_data;
10147
10148 spm_data = &msm_spm_data_v1[1];
10149 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10150 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10151
10152 spm_data = &msm_spm_data[1];
10153 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10154 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10155 }
10156
10157 /*
10158 * Initialize SPM before acpuclock as the latter calls into SPM
10159 * driver to set ACPU voltages.
10160 */
10161 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10162 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
10163 else
10164 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
10165
10166 /*
10167 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
10168 * devices so that the RPM doesn't drop into a low power mode that an
10169 * un-reworked SURF cannot resume from.
10170 */
10171 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010172 int i;
10173
10174 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10175 if (rpm_regulator_init_data[i].id
10176 == RPM_VREG_ID_PM8901_L4
10177 || rpm_regulator_init_data[i].id
10178 == RPM_VREG_ID_PM8901_L6)
10179 rpm_regulator_init_data[i]
10180 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010181 }
10182
10183 /*
10184 * Disable regulator info printing so that regulator registration
10185 * messages do not enter the kmsg log.
10186 */
10187 regulator_suppress_info_printing();
10188
10189 /* Initialize regulators needed for clock_init. */
10190 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10191
Stephen Boydbb600ae2011-08-02 20:11:40 -070010192 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010193
10194 /* Buses need to be initialized before early-device registration
10195 * to get the platform data for fabrics.
10196 */
10197 msm8x60_init_buses();
10198 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10199 /* CPU frequency control is not supported on simulated targets. */
10200 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010201 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010202
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010203 /*
10204 * Enable EBI2 only for boards which make use of it. Leave
10205 * it disabled for all others for additional power savings.
10206 */
10207 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10208 machine_is_msm8x60_rumi3() ||
10209 machine_is_msm8x60_sim() ||
10210 machine_is_msm8x60_fluid() ||
10211 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010212 msm8x60_init_ebi2();
10213 msm8x60_init_tlmm();
10214 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10215 msm8x60_init_uart12dm();
10216 msm8x60_init_mmc();
10217
10218#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10219 msm8x60_init_pm8058_othc();
10220#endif
10221
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010222 if (machine_is_msm8x60_fluid())
10223 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10224 else if (machine_is_msm8x60_dragon())
10225 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10226 else
10227 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010228
Jilai Wang53d27a82011-07-13 14:32:58 -040010229 /* Specify reset pin for OV9726 */
10230 if (machine_is_msm8x60_dragon()) {
10231 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10232 ov9726_sensor_8660_info.mount_angle = 270;
10233 }
10234
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010235#ifdef CONFIG_BATTERY_MSM8X60
10236 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10237 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10238 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10239 platform_device_register(&msm_charger_device);
10240#endif
10241
10242 if (machine_is_msm8x60_dragon())
10243 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10244 if (!machine_is_msm8x60_fluid())
10245 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10246
10247 /* configure pmic leds */
10248 if (machine_is_msm8x60_fluid())
10249 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10250 else if (machine_is_msm8x60_dragon())
10251 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10252 else
10253 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10254
10255 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10256 machine_is_msm8x60_dragon()) {
10257 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10258 }
10259
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010260 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10261 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010262 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010263 msm8x60_cfg_smsc911x();
10264 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10265 platform_add_devices(msm_footswitch_devices,
10266 msm_num_footswitch_devices);
10267 platform_add_devices(surf_devices,
10268 ARRAY_SIZE(surf_devices));
10269
10270#ifdef CONFIG_MSM_DSPS
10271 if (machine_is_msm8x60_fluid()) {
10272 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10273 msm8x60_init_dsps();
10274 }
10275#endif
10276
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010277 pm8901_vreg_mpp0_init();
10278
10279 platform_device_register(&msm8x60_8901_mpp_vreg);
10280
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010281#ifdef CONFIG_USB_EHCI_MSM_72K
10282 /*
10283 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10284 * fluid
10285 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010286 if (machine_is_msm8x60_fluid())
10287 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10288 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010289#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010290
10291#ifdef CONFIG_SND_SOC_MSM8660_APQ
10292 if (machine_is_msm8x60_dragon())
10293 platform_add_devices(dragon_alsa_devices,
10294 ARRAY_SIZE(dragon_alsa_devices));
10295 else
10296#endif
10297 platform_add_devices(asoc_devices,
10298 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010299 } else {
10300 msm8x60_configure_smc91x();
10301 platform_add_devices(rumi_sim_devices,
10302 ARRAY_SIZE(rumi_sim_devices));
10303 }
10304#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010305 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10306 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010307 msm8x60_cfg_isp1763();
10308#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010309
10310 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10311 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10312
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010313
10314#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10315 if (machine_is_msm8x60_fluid())
10316 platform_device_register(&msm_gsbi10_qup_spi_device);
10317 else
10318 platform_device_register(&msm_gsbi1_qup_spi_device);
10319#endif
10320
10321#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10322 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10323 if (machine_is_msm8x60_fluid())
10324 cyttsp_set_params();
10325#endif
10326 if (!machine_is_msm8x60_sim())
10327 msm_fb_add_devices();
10328 fixup_i2c_configs();
10329 register_i2c_devices();
10330
Terence Hampson1c73fef2011-07-19 17:10:49 -040010331 if (machine_is_msm8x60_dragon())
10332 smsc911x_config.reset_gpio
10333 = GPIO_ETHERNET_RESET_N_DRAGON;
10334
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010335 platform_device_register(&smsc911x_device);
10336
10337#if (defined(CONFIG_SPI_QUP)) && \
10338 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010339 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10340 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010341
10342 if (machine_is_msm8x60_fluid()) {
10343#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10344 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10345 spi_register_board_info(lcdc_samsung_spi_board_info,
10346 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10347 } else
10348#endif
10349 {
10350#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10351 spi_register_board_info(lcdc_auo_spi_board_info,
10352 ARRAY_SIZE(lcdc_auo_spi_board_info));
10353#endif
10354 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010355#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10356 } else if (machine_is_msm8x60_dragon()) {
10357 spi_register_board_info(lcdc_nt35582_spi_board_info,
10358 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10359#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010360 }
10361#endif
10362
10363 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10364 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10365 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10366 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010367 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010368
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010369 pm8058_gpios_init();
10370
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010371#ifdef CONFIG_SENSORS_MSM_ADC
10372 if (machine_is_msm8x60_fluid()) {
10373 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10374 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10375 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10376 msm_adc_pdata.gpio_config = APROC_CONFIG;
10377 else
10378 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10379 }
10380 msm_adc_pdata.target_hw = MSM_8x60;
10381#endif
10382#ifdef CONFIG_MSM8X60_AUDIO
10383 msm_snddev_init();
10384#endif
10385#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10386 if (machine_is_msm8x60_fluid())
10387 platform_device_register(&fluid_leds_gpio);
10388 else
10389 platform_device_register(&gpio_leds);
10390#endif
10391
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010392 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010393
10394 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10395 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010396}
10397
10398static void __init msm8x60_rumi3_init(void)
10399{
10400 msm8x60_init(&msm8x60_rumi3_board_data);
10401}
10402
10403static void __init msm8x60_sim_init(void)
10404{
10405 msm8x60_init(&msm8x60_sim_board_data);
10406}
10407
10408static void __init msm8x60_surf_init(void)
10409{
10410 msm8x60_init(&msm8x60_surf_board_data);
10411}
10412
10413static void __init msm8x60_ffa_init(void)
10414{
10415 msm8x60_init(&msm8x60_ffa_board_data);
10416}
10417
10418static void __init msm8x60_fluid_init(void)
10419{
10420 msm8x60_init(&msm8x60_fluid_board_data);
10421}
10422
10423static void __init msm8x60_charm_surf_init(void)
10424{
10425 msm8x60_init(&msm8x60_charm_surf_board_data);
10426}
10427
10428static void __init msm8x60_charm_ffa_init(void)
10429{
10430 msm8x60_init(&msm8x60_charm_ffa_board_data);
10431}
10432
10433static void __init msm8x60_charm_init_early(void)
10434{
10435 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010436}
10437
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010438static void __init msm8x60_dragon_init(void)
10439{
10440 msm8x60_init(&msm8x60_dragon_board_data);
10441}
10442
Steve Mucklea55df6e2010-01-07 12:43:24 -080010443MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10444 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010445 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010446 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010447 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010448 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010449 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010450 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010451MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010452
10453MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10454 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010455 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010456 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010457 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010458 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010459 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010460 .init_early = msm8x60_charm_init_early,
10461MACHINE_END
10462
10463MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10464 .map_io = msm8x60_map_io,
10465 .reserve = msm8x60_reserve,
10466 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010467 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010468 .init_machine = msm8x60_surf_init,
10469 .timer = &msm_timer,
10470 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010471MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010472
10473MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10474 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010475 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010476 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010477 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010478 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010479 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010480 .init_early = msm8x60_charm_init_early,
10481MACHINE_END
10482
10483MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10484 .map_io = msm8x60_map_io,
10485 .reserve = msm8x60_reserve,
10486 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010487 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010488 .init_machine = msm8x60_fluid_init,
10489 .timer = &msm_timer,
10490 .init_early = msm8x60_charm_init_early,
10491MACHINE_END
10492
10493MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10494 .map_io = msm8x60_map_io,
10495 .reserve = msm8x60_reserve,
10496 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010497 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010498 .init_machine = msm8x60_charm_surf_init,
10499 .timer = &msm_timer,
10500 .init_early = msm8x60_charm_init_early,
10501MACHINE_END
10502
10503MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10504 .map_io = msm8x60_map_io,
10505 .reserve = msm8x60_reserve,
10506 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010507 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010508 .init_machine = msm8x60_charm_ffa_init,
10509 .timer = &msm_timer,
10510 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010511MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010512
10513MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10514 .map_io = msm8x60_map_io,
10515 .reserve = msm8x60_reserve,
10516 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010517 .handle_irq = gic_handle_irq,
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010518 .init_machine = msm8x60_dragon_init,
10519 .timer = &msm_timer,
10520 .init_early = msm8x60_charm_init_early,
10521MACHINE_END