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Paolo 'Blaisorblade' Giarrusso85977372005-11-13 16:07:06 -08001menu "Host processor type and features"
2
Al Viro7a78a172007-10-29 04:34:31 +00003source "arch/x86/Kconfig.cpu"
Paolo 'Blaisorblade' Giarrusso85977372005-11-13 16:07:06 -08004
5endmenu
6
Paolo 'Blaisorblade' Giarrussoc45166b2005-05-01 08:58:54 -07007config UML_X86
8 bool
9 default y
10
Jeff Dike54d67ee2007-12-01 12:16:28 -080011config X86_32
David Woodhousee17c6d52008-06-17 12:19:34 +010012 bool
13 default y
14 select HAVE_AOUT
Jeff Dike54d67ee2007-12-01 12:16:28 -080015
16config RWSEM_XCHGADD_ALGORITHM
17 def_bool y
18
Paolo 'Blaisorblade' Giarrussoc45166b2005-05-01 08:58:54 -070019config 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -070020 bool
21 default n
22
Linus Torvalds1da177e2005-04-16 15:20:36 -070023config 3_LEVEL_PGTABLES
Paolo 'Blaisorblade' Giarrussoce2d2ae2006-01-18 17:42:59 -080024 bool "Three-level pagetables (EXPERIMENTAL)"
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 default n
Paolo 'Blaisorblade' Giarrussoce2d2ae2006-01-18 17:42:59 -080026 depends on EXPERIMENTAL
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 help
28 Three-level pagetables will let UML have more than 4G of physical
29 memory. All the memory that can't be mapped directly will be treated
30 as high memory.
31
Paolo 'Blaisorblade' Giarrussoce2d2ae2006-01-18 17:42:59 -080032 However, this it experimental on 32-bit architectures, so if unsure say
33 N (on x86-64 it's automatically enabled, instead, as it's safe there).
34
Linus Torvalds1da177e2005-04-16 15:20:36 -070035config ARCH_HAS_SC_SIGNALS
36 bool
37 default y
38
39config ARCH_REUSE_HOST_VSYSCALL_AREA
40 bool
41 default y
Akinobu Mitaf214ef32006-03-26 01:38:59 -080042
43config GENERIC_HWEIGHT
44 bool
45 default y