blob: 2ee35c09e0ba033925844b4535b632bfed7f86f8 [file] [log] [blame]
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
16#include <linux/irq.h>
17#include <linux/io.h>
18#include <asm/hardware/gic.h>
19#include <mach/board.h>
20#include <mach/msm_iomap.h>
21#include <mach/irqs.h>
22#include <mach/socinfo.h>
23#include "devices.h"
24
25void __init msm9615_device_init(void)
26{
27 if (socinfo_init() < 0)
28 pr_err("socinfo_init() failed!\n");
29
Vikram Mulukutla489e39e2011-08-31 18:04:05 -070030 msm_clock_init(&msm9615_clock_init_data);
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070031}
32
33void __init msm9615_map_io(void)
34{
35 msm_map_msm9615_io();
36}
37
38void __init msm9615_init_irq(void)
39{
40 unsigned int i;
41 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
42 (void *)MSM_QGIC_CPU_BASE);
43
44 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
45 writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
46
47 writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
48 mb();
49
50 /*
51 * FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
52 * as they are configured as level, which does not play nice with
53 * handle_percpu_irq.
54 */
55 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
56 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
57 irq_set_handler(i, handle_percpu_irq);
58 }
59}