blob: cb414908671d1d77e0f729a925c94a3ffa86a560 [file] [log] [blame]
Mark Maule48b1dcc2005-11-17 15:50:01 -06001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved.
7 */
Mark Maulec9221da2005-08-03 14:07:00 -07008
9#ifndef _ASM_IA64_SN_CE_PROVIDER_H
10#define _ASM_IA64_SN_CE_PROVIDER_H
11
12#include <asm/sn/pcibus_provider_defs.h>
13#include <asm/sn/tioce.h>
14
15/*
16 * Common TIOCE structure shared between the prom and kernel
17 *
18 * DO NOT CHANGE THIS STRUCT WITHOUT MAKING CORRESPONDING CHANGES TO THE
19 * PROM VERSION.
20 */
21struct tioce_common {
22 struct pcibus_bussoft ce_pcibus; /* common pciio header */
23
24 uint32_t ce_rev;
25 uint64_t ce_kernel_private;
26 uint64_t ce_prom_private;
27};
28
29struct tioce_kernel {
30 struct tioce_common *ce_common;
31 spinlock_t ce_lock;
32 struct list_head ce_dmamap_list;
33
34 uint64_t ce_ate40_shadow[TIOCE_NUM_M40_ATES];
35 uint64_t ce_ate3240_shadow[TIOCE_NUM_M3240_ATES];
36 uint32_t ce_ate3240_pagesize;
37
38 uint8_t ce_port1_secondary;
39
40 /* per-port resources */
41 struct {
42 int dirmap_refcnt;
43 uint64_t dirmap_shadow;
44 } ce_port[TIOCE_NUM_PORTS];
45};
46
47struct tioce_dmamap {
48 struct list_head ce_dmamap_list; /* headed by tioce_kernel */
49 uint32_t refcnt;
50
51 uint64_t nbytes; /* # bytes mapped */
52
53 uint64_t ct_start; /* coretalk start address */
54 uint64_t pci_start; /* bus start address */
55
56 uint64_t *ate_hw; /* hw ptr of first ate in map */
57 uint64_t *ate_shadow; /* shadow ptr of firat ate */
58 uint16_t ate_count; /* # ate's in the map */
59};
60
61extern int tioce_init_provider(void);
62
63#endif /* __ASM_IA64_SN_CE_PROVIDER_H */