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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080058#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070059#include <mach/irqs.h>
60#include <mach/msm_spi.h>
61#include <mach/msm_serial_hs.h>
62#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080063#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070064#include <mach/msm_memtypes.h>
65#include <asm/mach/mmc.h>
66#include <mach/msm_battery.h>
67#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070068#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070069#ifdef CONFIG_MSM_DSPS
70#include <mach/msm_dsps.h>
71#endif
72#include <mach/msm_xo.h>
73#include <mach/msm_bus_board.h>
74#include <mach/socinfo.h>
75#include <linux/i2c/isl9519.h>
76#ifdef CONFIG_USB_G_ANDROID
77#include <linux/usb/android.h>
78#include <mach/usbdiag.h>
79#endif
80#include <linux/regulator/consumer.h>
81#include <linux/regulator/machine.h>
82#include <mach/sdio_al.h>
83#include <mach/rpm.h>
84#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070085#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053086#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070088#include "devices.h"
89#include "devices-msm8x60.h"
90#include "cpuidle.h"
91#include "pm.h"
92#include "mpm.h"
93#include "spm.h"
94#include "rpm_log.h"
95#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070096#include "gpiomux-8x60.h"
97#include "rpm_stats.h"
98#include "peripheral-loader.h"
99#include <linux/platform_data/qcom_crypto_device.h>
100#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700101#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600102#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700103
104#include <linux/ion.h>
105#include <mach/ion.h>
106
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700107#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MDM2AP_SYNC 129
109
Terence Hampson1c73fef2011-07-19 17:10:49 -0400110#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700111#define LCDC_SPI_GPIO_CLK 73
112#define LCDC_SPI_GPIO_CS 72
113#define LCDC_SPI_GPIO_MOSI 70
114#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
115#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
116#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
117#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
118#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400119#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700120
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700121#define PANEL_NAME_MAX_LEN 30
122#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
123#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
124#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
125#define HDMI_PANEL_NAME "hdmi_msm"
126#define TVOUT_PANEL_NAME "tvout_msm"
127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128#define DSPS_PIL_GENERIC_NAME "dsps"
129#define DSPS_PIL_FLUID_NAME "dsps_fluid"
130
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800131#ifdef CONFIG_ION_MSM
132static struct platform_device ion_dev;
133#endif
134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135enum {
136 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530137 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700138 /* CORE expander */
139 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
140 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
141 GPIO_WLAN_DEEP_SLEEP_N,
142 GPIO_LVDS_SHUTDOWN_N,
143 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
144 GPIO_MS_SYS_RESET_N,
145 GPIO_CAP_TS_RESOUT_N,
146 GPIO_CAP_GAUGE_BI_TOUT,
147 GPIO_ETHERNET_PME,
148 GPIO_EXT_GPS_LNA_EN,
149 GPIO_MSM_WAKES_BT,
150 GPIO_ETHERNET_RESET_N,
151 GPIO_HEADSET_DET_N,
152 GPIO_USB_UICC_EN,
153 GPIO_BACKLIGHT_EN,
154 GPIO_EXT_CAMIF_PWR_EN,
155 GPIO_BATT_GAUGE_INT_N,
156 GPIO_BATT_GAUGE_EN,
157 /* DOCKING expander */
158 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
159 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
160 GPIO_AUX_JTAG_DET_N,
161 GPIO_DONGLE_DET_N,
162 GPIO_SVIDEO_LOAD_DET,
163 GPIO_SVID_AMP_SHUTDOWN1_N,
164 GPIO_SVID_AMP_SHUTDOWN0_N,
165 GPIO_SDC_WP,
166 GPIO_IRDA_PWDN,
167 GPIO_IRDA_RESET_N,
168 GPIO_DONGLE_GPIO0,
169 GPIO_DONGLE_GPIO1,
170 GPIO_DONGLE_GPIO2,
171 GPIO_DONGLE_GPIO3,
172 GPIO_DONGLE_PWR_EN,
173 GPIO_EMMC_RESET_N,
174 GPIO_TP_EXP2_IO15,
175 /* SURF expander */
176 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
177 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
178 GPIO_SD_CARD_DET_2,
179 GPIO_SD_CARD_DET_4,
180 GPIO_SD_CARD_DET_5,
181 GPIO_UIM3_RST,
182 GPIO_SURF_EXPANDER_IO5,
183 GPIO_SURF_EXPANDER_IO6,
184 GPIO_ADC_I2C_EN,
185 GPIO_SURF_EXPANDER_IO8,
186 GPIO_SURF_EXPANDER_IO9,
187 GPIO_SURF_EXPANDER_IO10,
188 GPIO_SURF_EXPANDER_IO11,
189 GPIO_SURF_EXPANDER_IO12,
190 GPIO_SURF_EXPANDER_IO13,
191 GPIO_SURF_EXPANDER_IO14,
192 GPIO_SURF_EXPANDER_IO15,
193 /* LEFT KB IO expander */
194 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
195 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
196 GPIO_LEFT_LED_2,
197 GPIO_LEFT_LED_3,
198 GPIO_LEFT_LED_WLAN,
199 GPIO_JOYSTICK_EN,
200 GPIO_CAP_TS_SLEEP,
201 GPIO_LEFT_KB_IO6,
202 GPIO_LEFT_LED_5,
203 /* RIGHT KB IO expander */
204 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
205 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
206 GPIO_RIGHT_LED_2,
207 GPIO_RIGHT_LED_3,
208 GPIO_RIGHT_LED_BT,
209 GPIO_WEB_CAMIF_STANDBY,
210 GPIO_COMPASS_RST_N,
211 GPIO_WEB_CAMIF_RESET_N,
212 GPIO_RIGHT_LED_5,
213 GPIO_R_ALTIMETER_RESET_N,
214 /* FLUID S IO expander */
215 GPIO_SOUTH_EXPANDER_BASE,
216 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC1_ANCL_SEL,
218 GPIO_HS_MIC4_SEL,
219 GPIO_FML_MIC3_SEL,
220 GPIO_FMR_MIC5_SEL,
221 GPIO_TS_SLEEP,
222 GPIO_HAP_SHIFT_LVL_OE,
223 GPIO_HS_SW_DIR,
224 /* FLUID N IO expander */
225 GPIO_NORTH_EXPANDER_BASE,
226 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_5V_BOOST_EN,
228 GPIO_AUX_CAM_2P7_EN,
229 GPIO_LED_FLASH_EN,
230 GPIO_LED1_GREEN_N,
231 GPIO_LED2_RED_N,
232 GPIO_FRONT_CAM_RESET_N,
233 GPIO_EPM_LVLSFT_EN,
234 GPIO_N_ALTIMETER_RESET_N,
235 /* EPM expander */
236 GPIO_EPM_EXPANDER_BASE,
237 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_RESET_N,
239 GPIO_ADC1_PWDN_N,
240 GPIO_ADC2_PWDN_N,
241 GPIO_EPM_EXPANDER_IO4,
242 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
243 GPIO_ADC2_MUX_SPI_INT_N,
244 GPIO_EPM_EXPANDER_IO7,
245 GPIO_PWR_MON_ENABLE,
246 GPIO_EPM_SPI_ADC1_CS_N,
247 GPIO_EPM_SPI_ADC2_CS_N,
248 GPIO_EPM_EXPANDER_IO11,
249 GPIO_EPM_EXPANDER_IO12,
250 GPIO_EPM_EXPANDER_IO13,
251 GPIO_EPM_EXPANDER_IO14,
252 GPIO_EPM_EXPANDER_IO15,
253};
254
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530255struct pm8xxx_mpp_init_info {
256 unsigned mpp;
257 struct pm8xxx_mpp_config_data config;
258};
259
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530260#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530261{ \
262 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
263 .config = { \
264 .type = PM8XXX_MPP_TYPE_##_type, \
265 .level = _level, \
266 .control = PM8XXX_MPP_##_control, \
267 } \
268}
269
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530270#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
271{ \
272 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
273 .config = { \
274 .type = PM8XXX_MPP_TYPE_##_type, \
275 .level = _level, \
276 .control = PM8XXX_MPP_##_control, \
277 } \
278}
279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280/*
281 * The UI_INTx_N lines are pmic gpio lines which connect i2c
282 * gpio expanders to the pm8058.
283 */
284#define UI_INT1_N 25
285#define UI_INT2_N 34
286#define UI_INT3_N 14
287/*
288FM GPIO is GPIO 18 on PMIC 8058.
289As the index starts from 0 in the PMIC driver, and hence 17
290corresponds to GPIO 18 on PMIC 8058.
291*/
292#define FM_GPIO 17
293
294#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
295static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
296static void *sdc2_status_notify_cb_devid;
297#endif
298
299#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
300static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
301static void *sdc5_status_notify_cb_devid;
302#endif
303
304static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
305 [0] = {
306 .reg_base_addr = MSM_SAW0_BASE,
307
308#ifdef CONFIG_MSM_AVS_HW
309 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
310#endif
311 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
312 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
315
316 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
319
320 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
322 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
323
324 .awake_vlevel = 0x94,
325 .retention_vlevel = 0x81,
326 .collapse_vlevel = 0x20,
327 .retention_mid_vlevel = 0x94,
328 .collapse_mid_vlevel = 0x8C,
329
330 .vctl_timeout_us = 50,
331 },
332
333 [1] = {
334 .reg_base_addr = MSM_SAW1_BASE,
335
336#ifdef CONFIG_MSM_AVS_HW
337 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
338#endif
339 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
340 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
343
344 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
347
348 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
350 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
351
352 .awake_vlevel = 0x94,
353 .retention_vlevel = 0x81,
354 .collapse_vlevel = 0x20,
355 .retention_mid_vlevel = 0x94,
356 .collapse_mid_vlevel = 0x8C,
357
358 .vctl_timeout_us = 50,
359 },
360};
361
362static struct msm_spm_platform_data msm_spm_data[] __initdata = {
363 [0] = {
364 .reg_base_addr = MSM_SAW0_BASE,
365
366#ifdef CONFIG_MSM_AVS_HW
367 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
368#endif
369 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
370 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
373
374 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
377
378 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
380 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
381
382 .awake_vlevel = 0xA0,
383 .retention_vlevel = 0x89,
384 .collapse_vlevel = 0x20,
385 .retention_mid_vlevel = 0x89,
386 .collapse_mid_vlevel = 0x89,
387
388 .vctl_timeout_us = 50,
389 },
390
391 [1] = {
392 .reg_base_addr = MSM_SAW1_BASE,
393
394#ifdef CONFIG_MSM_AVS_HW
395 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
396#endif
397 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
398 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
401
402 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
405
406 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
408 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
409
410 .awake_vlevel = 0xA0,
411 .retention_vlevel = 0x89,
412 .collapse_vlevel = 0x20,
413 .retention_mid_vlevel = 0x89,
414 .collapse_mid_vlevel = 0x89,
415
416 .vctl_timeout_us = 50,
417 },
418};
419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700420/*
421 * Consumer specific regulator names:
422 * regulator name consumer dev_name
423 */
424static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
425 REGULATOR_SUPPLY("8901_s0", NULL),
426};
427static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
428 REGULATOR_SUPPLY("8901_s1", NULL),
429};
430
431static struct regulator_init_data saw_s0_init_data = {
432 .constraints = {
433 .name = "8901_s0",
434 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700435 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700436 .max_uV = 1250000,
437 },
438 .consumer_supplies = vreg_consumers_8901_S0,
439 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
440};
441
442static struct regulator_init_data saw_s1_init_data = {
443 .constraints = {
444 .name = "8901_s1",
445 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700446 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447 .max_uV = 1250000,
448 },
449 .consumer_supplies = vreg_consumers_8901_S1,
450 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
451};
452
453static struct platform_device msm_device_saw_s0 = {
454 .name = "saw-regulator",
455 .id = 0,
456 .dev = {
457 .platform_data = &saw_s0_init_data,
458 },
459};
460
461static struct platform_device msm_device_saw_s1 = {
462 .name = "saw-regulator",
463 .id = 1,
464 .dev = {
465 .platform_data = &saw_s1_init_data,
466 },
467};
468
469/*
470 * The smc91x configuration varies depending on platform.
471 * The resources data structure is filled in at runtime.
472 */
473static struct resource smc91x_resources[] = {
474 [0] = {
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device smc91x_device = {
483 .name = "smc91x",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(smc91x_resources),
486 .resource = smc91x_resources,
487};
488
489static struct resource smsc911x_resources[] = {
490 [0] = {
491 .flags = IORESOURCE_MEM,
492 .start = 0x1b800000,
493 .end = 0x1b8000ff
494 },
495 [1] = {
496 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
497 },
498};
499
500static struct smsc911x_platform_config smsc911x_config = {
501 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
502 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
503 .flags = SMSC911X_USE_16BIT,
504 .has_reset_gpio = 1,
505 .reset_gpio = GPIO_ETHERNET_RESET_N
506};
507
508static struct platform_device smsc911x_device = {
509 .name = "smsc911x",
510 .id = 0,
511 .num_resources = ARRAY_SIZE(smsc911x_resources),
512 .resource = smsc911x_resources,
513 .dev = {
514 .platform_data = &smsc911x_config
515 }
516};
517
518#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
519 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
520 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
522
523#define QCE_SIZE 0x10000
524#define QCE_0_BASE 0x18500000
525
526#define QCE_HW_KEY_SUPPORT 0
527#define QCE_SHA_HMAC_SUPPORT 0
528#define QCE_SHARE_CE_RESOURCE 2
529#define QCE_CE_SHARED 1
530
531static struct resource qcrypto_resources[] = {
532 [0] = {
533 .start = QCE_0_BASE,
534 .end = QCE_0_BASE + QCE_SIZE - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .name = "crypto_channels",
539 .start = DMOV_CE_IN_CHAN,
540 .end = DMOV_CE_OUT_CHAN,
541 .flags = IORESOURCE_DMA,
542 },
543 [2] = {
544 .name = "crypto_crci_in",
545 .start = DMOV_CE_IN_CRCI,
546 .end = DMOV_CE_IN_CRCI,
547 .flags = IORESOURCE_DMA,
548 },
549 [3] = {
550 .name = "crypto_crci_out",
551 .start = DMOV_CE_OUT_CRCI,
552 .end = DMOV_CE_OUT_CRCI,
553 .flags = IORESOURCE_DMA,
554 },
555 [4] = {
556 .name = "crypto_crci_hash",
557 .start = DMOV_CE_HASH_CRCI,
558 .end = DMOV_CE_HASH_CRCI,
559 .flags = IORESOURCE_DMA,
560 },
561};
562
563static struct resource qcedev_resources[] = {
564 [0] = {
565 .start = QCE_0_BASE,
566 .end = QCE_0_BASE + QCE_SIZE - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .name = "crypto_channels",
571 .start = DMOV_CE_IN_CHAN,
572 .end = DMOV_CE_OUT_CHAN,
573 .flags = IORESOURCE_DMA,
574 },
575 [2] = {
576 .name = "crypto_crci_in",
577 .start = DMOV_CE_IN_CRCI,
578 .end = DMOV_CE_IN_CRCI,
579 .flags = IORESOURCE_DMA,
580 },
581 [3] = {
582 .name = "crypto_crci_out",
583 .start = DMOV_CE_OUT_CRCI,
584 .end = DMOV_CE_OUT_CRCI,
585 .flags = IORESOURCE_DMA,
586 },
587 [4] = {
588 .name = "crypto_crci_hash",
589 .start = DMOV_CE_HASH_CRCI,
590 .end = DMOV_CE_HASH_CRCI,
591 .flags = IORESOURCE_DMA,
592 },
593};
594
595#endif
596
597#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
598 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
599
600static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
601 .ce_shared = QCE_CE_SHARED,
602 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
603 .hw_key_support = QCE_HW_KEY_SUPPORT,
604 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800605 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700606};
607
608static struct platform_device qcrypto_device = {
609 .name = "qcrypto",
610 .id = 0,
611 .num_resources = ARRAY_SIZE(qcrypto_resources),
612 .resource = qcrypto_resources,
613 .dev = {
614 .coherent_dma_mask = DMA_BIT_MASK(32),
615 .platform_data = &qcrypto_ce_hw_suppport,
616 },
617};
618#endif
619
620#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
621 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
622
623static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
624 .ce_shared = QCE_CE_SHARED,
625 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
626 .hw_key_support = QCE_HW_KEY_SUPPORT,
627 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800628 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700629};
630
631static struct platform_device qcedev_device = {
632 .name = "qce",
633 .id = 0,
634 .num_resources = ARRAY_SIZE(qcedev_resources),
635 .resource = qcedev_resources,
636 .dev = {
637 .coherent_dma_mask = DMA_BIT_MASK(32),
638 .platform_data = &qcedev_ce_hw_suppport,
639 },
640};
641#endif
642
643#if defined(CONFIG_HAPTIC_ISA1200) || \
644 defined(CONFIG_HAPTIC_ISA1200_MODULE)
645
646static const char *vregs_isa1200_name[] = {
647 "8058_s3",
648 "8901_l4",
649};
650
651static const int vregs_isa1200_val[] = {
652 1800000,/* uV */
653 2600000,
654};
655static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
656static struct msm_xo_voter *xo_handle_a1;
657
658static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800659{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700660 int i, rc = 0;
661
662 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
663 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
664 regulator_disable(vregs_isa1200[i]);
665 if (rc < 0) {
666 pr_err("%s: vreg %s %s failed (%d)\n",
667 __func__, vregs_isa1200_name[i],
668 vreg_on ? "enable" : "disable", rc);
669 goto vreg_fail;
670 }
671 }
672
673 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
674 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
675 if (rc < 0) {
676 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
677 __func__, vreg_on ? "" : "de-", rc);
678 goto vreg_fail;
679 }
680 return 0;
681
682vreg_fail:
683 while (i--)
684 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
685 regulator_disable(vregs_isa1200[i]);
686 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800687}
688
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800690{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800692
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700693 if (enable == true) {
694 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
695 vregs_isa1200[i] = regulator_get(NULL,
696 vregs_isa1200_name[i]);
697 if (IS_ERR(vregs_isa1200[i])) {
698 pr_err("%s: regulator get of %s failed (%ld)\n",
699 __func__, vregs_isa1200_name[i],
700 PTR_ERR(vregs_isa1200[i]));
701 rc = PTR_ERR(vregs_isa1200[i]);
702 goto vreg_get_fail;
703 }
704 rc = regulator_set_voltage(vregs_isa1200[i],
705 vregs_isa1200_val[i], vregs_isa1200_val[i]);
706 if (rc) {
707 pr_err("%s: regulator_set_voltage(%s) failed\n",
708 __func__, vregs_isa1200_name[i]);
709 goto vreg_get_fail;
710 }
711 }
Steve Muckle9161d302010-02-11 11:50:40 -0800712
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700713 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
714 if (rc) {
715 pr_err("%s: unable to request gpio %d (%d)\n",
716 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
717 goto vreg_get_fail;
718 }
Steve Muckle9161d302010-02-11 11:50:40 -0800719
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700720 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
721 if (rc) {
722 pr_err("%s: Unable to set direction\n", __func__);;
723 goto free_gpio;
724 }
725
726 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
727 if (IS_ERR(xo_handle_a1)) {
728 rc = PTR_ERR(xo_handle_a1);
729 pr_err("%s: failed to get the handle for A1(%d)\n",
730 __func__, rc);
731 goto gpio_set_dir;
732 }
733 } else {
734 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
735 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
736
737 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
738 regulator_put(vregs_isa1200[i]);
739
740 msm_xo_put(xo_handle_a1);
741 }
742
743 return 0;
744gpio_set_dir:
745 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
746free_gpio:
747 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
748vreg_get_fail:
749 while (i)
750 regulator_put(vregs_isa1200[--i]);
751 return rc;
752}
753
754#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530755#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700756static struct isa1200_platform_data isa1200_1_pdata = {
757 .name = "vibrator",
758 .power_on = isa1200_power,
759 .dev_setup = isa1200_dev_setup,
760 /*gpio to enable haptic*/
761 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530762 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700763 .max_timeout = 15000,
764 .mode_ctrl = PWM_GEN_MODE,
765 .pwm_fd = {
766 .pwm_div = 256,
767 },
768 .is_erm = false,
769 .smart_en = true,
770 .ext_clk_en = true,
771 .chip_en = 1,
772};
773
774static struct i2c_board_info msm_isa1200_board_info[] = {
775 {
776 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
777 .platform_data = &isa1200_1_pdata,
778 },
779};
780#endif
781
782#if defined(CONFIG_BATTERY_BQ27520) || \
783 defined(CONFIG_BATTERY_BQ27520_MODULE)
784static struct bq27520_platform_data bq27520_pdata = {
785 .name = "fuel-gauge",
786 .vreg_name = "8058_s3",
787 .vreg_value = 1800000,
788 .soc_int = GPIO_BATT_GAUGE_INT_N,
789 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
790 .chip_en = GPIO_BATT_GAUGE_EN,
791 .enable_dlog = 0, /* if enable coulomb counter logger */
792};
793
794static struct i2c_board_info msm_bq27520_board_info[] = {
795 {
796 I2C_BOARD_INFO("bq27520", 0xaa>>1),
797 .platform_data = &bq27520_pdata,
798 },
799};
800#endif
801
802static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
803 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
804 .idle_supported = 1,
805 .suspend_supported = 1,
806 .idle_enabled = 0,
807 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700808 },
809
810 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
811 .idle_supported = 1,
812 .suspend_supported = 1,
813 .idle_enabled = 0,
814 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700815 },
816
817 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
818 .idle_supported = 1,
819 .suspend_supported = 1,
820 .idle_enabled = 1,
821 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700822 },
823
824 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
825 .idle_supported = 1,
826 .suspend_supported = 1,
827 .idle_enabled = 0,
828 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700829 },
830
831 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
832 .idle_supported = 1,
833 .suspend_supported = 1,
834 .idle_enabled = 0,
835 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700836 },
837
838 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
839 .idle_supported = 1,
840 .suspend_supported = 1,
841 .idle_enabled = 1,
842 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700843 },
844};
845
846static struct msm_cpuidle_state msm_cstates[] __initdata = {
847 {0, 0, "C0", "WFI",
848 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
849
850 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
851 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
852
853 {0, 2, "C2", "POWER_COLLAPSE",
854 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
855
856 {1, 0, "C0", "WFI",
857 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
858
859 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
860 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
861};
862
863static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
864 {
865 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
866 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
867 true,
868 1, 8000, 100000, 1,
869 },
870
871 {
872 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
873 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
874 true,
875 1500, 5000, 60100000, 3000,
876 },
877
878 {
879 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
880 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
881 false,
882 1800, 5000, 60350000, 3500,
883 },
884 {
885 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
886 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
887 false,
888 3800, 4500, 65350000, 5500,
889 },
890
891 {
892 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
893 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
894 false,
895 2800, 2500, 66850000, 4800,
896 },
897
898 {
899 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
900 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
901 false,
902 4800, 2000, 71850000, 6800,
903 },
904
905 {
906 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
907 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
908 false,
909 6800, 500, 75850000, 8800,
910 },
911
912 {
913 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
914 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
915 false,
916 7800, 0, 76350000, 9800,
917 },
918};
919
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600920static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
921 .mode = MSM_PM_BOOT_CONFIG_TZ,
922};
923
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700924#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
925
926#define ISP1763_INT_GPIO 117
927#define ISP1763_RST_GPIO 152
928static struct resource isp1763_resources[] = {
929 [0] = {
930 .flags = IORESOURCE_MEM,
931 .start = 0x1D000000,
932 .end = 0x1D005FFF, /* 24KB */
933 },
934 [1] = {
935 .flags = IORESOURCE_IRQ,
936 },
937};
938static void __init msm8x60_cfg_isp1763(void)
939{
940 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
941 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
942}
943
944static int isp1763_setup_gpio(int enable)
945{
946 int status = 0;
947
948 if (enable) {
949 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
950 if (status) {
951 pr_err("%s:Failed to request GPIO %d\n",
952 __func__, ISP1763_INT_GPIO);
953 return status;
954 }
955 status = gpio_direction_input(ISP1763_INT_GPIO);
956 if (status) {
957 pr_err("%s:Failed to configure GPIO %d\n",
958 __func__, ISP1763_INT_GPIO);
959 goto gpio_free_int;
960 }
961 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
962 if (status) {
963 pr_err("%s:Failed to request GPIO %d\n",
964 __func__, ISP1763_RST_GPIO);
965 goto gpio_free_int;
966 }
967 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
968 if (status) {
969 pr_err("%s:Failed to configure GPIO %d\n",
970 __func__, ISP1763_RST_GPIO);
971 goto gpio_free_rst;
972 }
973 pr_debug("\nISP GPIO configuration done\n");
974 return status;
975 }
976
977gpio_free_rst:
978 gpio_free(ISP1763_RST_GPIO);
979gpio_free_int:
980 gpio_free(ISP1763_INT_GPIO);
981
982 return status;
983}
984static struct isp1763_platform_data isp1763_pdata = {
985 .reset_gpio = ISP1763_RST_GPIO,
986 .setup_gpio = isp1763_setup_gpio
987};
988
989static struct platform_device isp1763_device = {
990 .name = "isp1763_usb",
991 .num_resources = ARRAY_SIZE(isp1763_resources),
992 .resource = isp1763_resources,
993 .dev = {
994 .platform_data = &isp1763_pdata
995 }
996};
997#endif
998
999#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301000static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001001static struct regulator *ldo6_3p3;
1002static struct regulator *ldo7_1p8;
1003static struct regulator *vdd_cx;
1004#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301005#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001006notify_vbus_state notify_vbus_state_func_ptr;
1007static int usb_phy_susp_dig_vol = 750000;
1008static int pmic_id_notif_supported;
1009
1010#ifdef CONFIG_USB_EHCI_MSM_72K
1011#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1012struct delayed_work pmic_id_det;
1013
1014static int __init usb_id_pin_rework_setup(char *support)
1015{
1016 if (strncmp(support, "true", 4) == 0)
1017 pmic_id_notif_supported = 1;
1018
1019 return 1;
1020}
1021__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1022
1023static void pmic_id_detect(struct work_struct *w)
1024{
1025 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1026 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1027
1028 if (notify_vbus_state_func_ptr)
1029 (*notify_vbus_state_func_ptr) (val);
1030}
1031
1032static irqreturn_t pmic_id_on_irq(int irq, void *data)
1033{
1034 /*
1035 * Spurious interrupts are observed on pmic gpio line
1036 * even though there is no state change on USB ID. Schedule the
1037 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001038 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001039 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001040
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001041 return IRQ_HANDLED;
1042}
1043
Anji jonnalaae745e92011-11-14 18:34:31 +05301044static int msm_hsusb_phy_id_setup_init(int init)
1045{
1046 unsigned ret;
1047
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301048 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1049 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1050 .level = PM8901_MPP_DIG_LEVEL_L5,
1051 };
1052
Anji jonnalaae745e92011-11-14 18:34:31 +05301053 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301054 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1055 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1056 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301057 if (ret < 0)
1058 pr_err("%s:MPP2 configuration failed\n", __func__);
1059 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301060 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1061 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1062 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301063 if (ret < 0)
1064 pr_err("%s:MPP2 un config failed\n", __func__);
1065 }
1066 return ret;
1067}
1068
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001069static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1070{
1071 unsigned ret = -ENODEV;
1072
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301073 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301074 .direction = PM_GPIO_DIR_IN,
1075 .pull = PM_GPIO_PULL_UP_1P5,
1076 .function = PM_GPIO_FUNC_NORMAL,
1077 .vin_sel = 2,
1078 .inv_int_pol = 0,
1079 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301080 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301081 .direction = PM_GPIO_DIR_IN,
1082 .pull = PM_GPIO_PULL_NO,
1083 .function = PM_GPIO_FUNC_NORMAL,
1084 .vin_sel = 2,
1085 .inv_int_pol = 0,
1086 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001087 if (!callback)
1088 return -EINVAL;
1089
1090 if (machine_is_msm8x60_fluid())
1091 return -ENOTSUPP;
1092
1093 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1094 pr_debug("%s: USB_ID pin is not routed to PMIC"
1095 "on V1 surf/ffa\n", __func__);
1096 return -ENOTSUPP;
1097 }
1098
Manu Gautam62158eb2011-11-24 16:20:46 +05301099 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1100 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001101 pr_debug("%s: USB_ID is not routed to PMIC"
1102 "on V2 ffa\n", __func__);
1103 return -ENOTSUPP;
1104 }
1105
1106 usb_phy_susp_dig_vol = 500000;
1107
1108 if (init) {
1109 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301110 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301111 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1112 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301113 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301114 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301115 __func__, ret);
1116 return ret;
1117 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001118 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1119 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1120 "msm_otg_id", NULL);
1121 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001122 pr_err("%s:pmic_usb_id interrupt registration failed",
1123 __func__);
1124 return ret;
1125 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301126 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001127 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301128 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001129 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301130 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1131 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301132 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301133 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301134 __func__, ret);
1135 return ret;
1136 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301137 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001138 cancel_delayed_work_sync(&pmic_id_det);
1139 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001140 }
1141 return 0;
1142}
1143#endif
1144
1145#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1146#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1147static int msm_hsusb_init_vddcx(int init)
1148{
1149 int ret = 0;
1150
1151 if (init) {
1152 vdd_cx = regulator_get(NULL, "8058_s1");
1153 if (IS_ERR(vdd_cx)) {
1154 return PTR_ERR(vdd_cx);
1155 }
1156
1157 ret = regulator_set_voltage(vdd_cx,
1158 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1159 USB_PHY_MAX_VDD_DIG_VOL);
1160 if (ret) {
1161 pr_err("%s: unable to set the voltage for regulator"
1162 "vdd_cx\n", __func__);
1163 regulator_put(vdd_cx);
1164 return ret;
1165 }
1166
1167 ret = regulator_enable(vdd_cx);
1168 if (ret) {
1169 pr_err("%s: unable to enable regulator"
1170 "vdd_cx\n", __func__);
1171 regulator_put(vdd_cx);
1172 }
1173 } else {
1174 ret = regulator_disable(vdd_cx);
1175 if (ret) {
1176 pr_err("%s: Unable to disable the regulator:"
1177 "vdd_cx\n", __func__);
1178 return ret;
1179 }
1180
1181 regulator_put(vdd_cx);
1182 }
1183
1184 return ret;
1185}
1186
1187static int msm_hsusb_config_vddcx(int high)
1188{
1189 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1190 int min_vol;
1191 int ret;
1192
1193 if (high)
1194 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1195 else
1196 min_vol = usb_phy_susp_dig_vol;
1197
1198 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1199 if (ret) {
1200 pr_err("%s: unable to set the voltage for regulator"
1201 "vdd_cx\n", __func__);
1202 return ret;
1203 }
1204
1205 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1206
1207 return ret;
1208}
1209
1210#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1211#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1212#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1213#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1214
1215#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1216#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1217#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1218#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1219static int msm_hsusb_ldo_init(int init)
1220{
1221 int rc = 0;
1222
1223 if (init) {
1224 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1225 if (IS_ERR(ldo6_3p3))
1226 return PTR_ERR(ldo6_3p3);
1227
1228 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1229 if (IS_ERR(ldo7_1p8)) {
1230 rc = PTR_ERR(ldo7_1p8);
1231 goto put_3p3;
1232 }
1233
1234 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1235 USB_PHY_3P3_VOL_MAX);
1236 if (rc) {
1237 pr_err("%s: Unable to set voltage level for"
1238 "ldo6_3p3 regulator\n", __func__);
1239 goto put_1p8;
1240 }
1241 rc = regulator_enable(ldo6_3p3);
1242 if (rc) {
1243 pr_err("%s: Unable to enable the regulator:"
1244 "ldo6_3p3\n", __func__);
1245 goto put_1p8;
1246 }
1247 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1248 USB_PHY_1P8_VOL_MAX);
1249 if (rc) {
1250 pr_err("%s: Unable to set voltage level for"
1251 "ldo7_1p8 regulator\n", __func__);
1252 goto disable_3p3;
1253 }
1254 rc = regulator_enable(ldo7_1p8);
1255 if (rc) {
1256 pr_err("%s: Unable to enable the regulator:"
1257 "ldo7_1p8\n", __func__);
1258 goto disable_3p3;
1259 }
1260
1261 return 0;
1262 }
1263
1264 regulator_disable(ldo7_1p8);
1265disable_3p3:
1266 regulator_disable(ldo6_3p3);
1267put_1p8:
1268 regulator_put(ldo7_1p8);
1269put_3p3:
1270 regulator_put(ldo6_3p3);
1271 return rc;
1272}
1273
1274static int msm_hsusb_ldo_enable(int on)
1275{
1276 int ret = 0;
1277
1278 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1279 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1280 return -ENODEV;
1281 }
1282
1283 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1284 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1285 return -ENODEV;
1286 }
1287
1288 if (on) {
1289 ret = regulator_set_optimum_mode(ldo7_1p8,
1290 USB_PHY_1P8_HPM_LOAD);
1291 if (ret < 0) {
1292 pr_err("%s: Unable to set HPM of the regulator:"
1293 "ldo7_1p8\n", __func__);
1294 return ret;
1295 }
1296 ret = regulator_set_optimum_mode(ldo6_3p3,
1297 USB_PHY_3P3_HPM_LOAD);
1298 if (ret < 0) {
1299 pr_err("%s: Unable to set HPM of the regulator:"
1300 "ldo6_3p3\n", __func__);
1301 regulator_set_optimum_mode(ldo7_1p8,
1302 USB_PHY_1P8_LPM_LOAD);
1303 return ret;
1304 }
1305 } else {
1306 ret = regulator_set_optimum_mode(ldo7_1p8,
1307 USB_PHY_1P8_LPM_LOAD);
1308 if (ret < 0)
1309 pr_err("%s: Unable to set LPM of the regulator:"
1310 "ldo7_1p8\n", __func__);
1311 ret = regulator_set_optimum_mode(ldo6_3p3,
1312 USB_PHY_3P3_LPM_LOAD);
1313 if (ret < 0)
1314 pr_err("%s: Unable to set LPM of the regulator:"
1315 "ldo6_3p3\n", __func__);
1316 }
1317
1318 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1319 return ret < 0 ? ret : 0;
1320 }
1321#endif
1322#ifdef CONFIG_USB_EHCI_MSM_72K
1323#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1324static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1325{
1326 static int vbus_is_on;
1327
1328 /* If VBUS is already on (or off), do nothing. */
1329 if (on == vbus_is_on)
1330 return;
1331 smb137b_otg_power(on);
1332 vbus_is_on = on;
1333}
1334#endif
1335static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1336{
1337 static struct regulator *votg_5v_switch;
1338 static struct regulator *ext_5v_reg;
1339 static int vbus_is_on;
1340
1341 /* If VBUS is already on (or off), do nothing. */
1342 if (on == vbus_is_on)
1343 return;
1344
1345 if (!votg_5v_switch) {
1346 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1347 if (IS_ERR(votg_5v_switch)) {
1348 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1349 return;
1350 }
1351 }
1352 if (!ext_5v_reg) {
1353 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1354 if (IS_ERR(ext_5v_reg)) {
1355 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1356 return;
1357 }
1358 }
1359 if (on) {
1360 if (regulator_enable(ext_5v_reg)) {
1361 pr_err("%s: Unable to enable the regulator:"
1362 " ext_5v_reg\n", __func__);
1363 return;
1364 }
1365 if (regulator_enable(votg_5v_switch)) {
1366 pr_err("%s: Unable to enable the regulator:"
1367 " votg_5v_switch\n", __func__);
1368 return;
1369 }
1370 } else {
1371 if (regulator_disable(votg_5v_switch))
1372 pr_err("%s: Unable to enable the regulator:"
1373 " votg_5v_switch\n", __func__);
1374 if (regulator_disable(ext_5v_reg))
1375 pr_err("%s: Unable to enable the regulator:"
1376 " ext_5v_reg\n", __func__);
1377 }
1378
1379 vbus_is_on = on;
1380}
1381
1382static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1383 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1384 .power_budget = 390,
1385};
1386#endif
1387
1388#ifdef CONFIG_BATTERY_MSM8X60
1389static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1390 int init)
1391{
1392 int ret = -ENOTSUPP;
1393
1394#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1395 if (machine_is_msm8x60_fluid()) {
1396 if (init)
1397 msm_charger_register_vbus_sn(callback);
1398 else
1399 msm_charger_unregister_vbus_sn(callback);
1400 return 0;
1401 }
1402#endif
1403 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1404 * hence, irrespective of either peripheral only mode or
1405 * OTG (host and peripheral) modes, can depend on pmic for
1406 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001407 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001408 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1409 && (machine_is_msm8x60_surf() ||
1410 pmic_id_notif_supported)) {
1411 if (init)
1412 ret = msm_charger_register_vbus_sn(callback);
1413 else {
1414 msm_charger_unregister_vbus_sn(callback);
1415 ret = 0;
1416 }
1417 } else {
1418#if !defined(CONFIG_USB_EHCI_MSM_72K)
1419 if (init)
1420 ret = msm_charger_register_vbus_sn(callback);
1421 else {
1422 msm_charger_unregister_vbus_sn(callback);
1423 ret = 0;
1424 }
1425#endif
1426 }
1427 return ret;
1428}
1429#endif
1430
1431#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1432static struct msm_otg_platform_data msm_otg_pdata = {
1433 /* if usb link is in sps there is no need for
1434 * usb pclk as dayatona fabric clock will be
1435 * used instead
1436 */
1437 .pclk_src_name = "dfab_usb_hs_clk",
1438 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1439 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1440 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301441 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001442#ifdef CONFIG_USB_EHCI_MSM_72K
1443 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301444 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001445#endif
1446#ifdef CONFIG_USB_EHCI_MSM_72K
1447 .vbus_power = msm_hsusb_vbus_power,
1448#endif
1449#ifdef CONFIG_BATTERY_MSM8X60
1450 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1451#endif
1452 .ldo_init = msm_hsusb_ldo_init,
1453 .ldo_enable = msm_hsusb_ldo_enable,
1454 .config_vddcx = msm_hsusb_config_vddcx,
1455 .init_vddcx = msm_hsusb_init_vddcx,
1456#ifdef CONFIG_BATTERY_MSM8X60
1457 .chg_vbus_draw = msm_charger_vbus_draw,
1458#endif
1459};
1460#endif
1461
1462#ifdef CONFIG_USB_GADGET_MSM_72K
1463static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1464 .is_phy_status_timer_on = 1,
1465};
1466#endif
1467
1468#ifdef CONFIG_USB_G_ANDROID
1469
1470#define PID_MAGIC_ID 0x71432909
1471#define SERIAL_NUM_MAGIC_ID 0x61945374
1472#define SERIAL_NUMBER_LENGTH 127
1473#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1474
1475struct magic_num_struct {
1476 uint32_t pid;
1477 uint32_t serial_num;
1478};
1479
1480struct dload_struct {
1481 uint32_t reserved1;
1482 uint32_t reserved2;
1483 uint32_t reserved3;
1484 uint16_t reserved4;
1485 uint16_t pid;
1486 char serial_number[SERIAL_NUMBER_LENGTH];
1487 uint16_t reserved5;
1488 struct magic_num_struct
1489 magic_struct;
1490};
1491
1492static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1493{
1494 struct dload_struct __iomem *dload = 0;
1495
1496 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1497 if (!dload) {
1498 pr_err("%s: cannot remap I/O memory region: %08x\n",
1499 __func__, DLOAD_USB_BASE_ADD);
1500 return -ENXIO;
1501 }
1502
1503 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1504 __func__, dload, pid, snum);
1505 /* update pid */
1506 dload->magic_struct.pid = PID_MAGIC_ID;
1507 dload->pid = pid;
1508
1509 /* update serial number */
1510 dload->magic_struct.serial_num = 0;
1511 if (!snum)
1512 return 0;
1513
1514 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1515 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1516 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1517
1518 iounmap(dload);
1519
1520 return 0;
1521}
1522
1523static struct android_usb_platform_data android_usb_pdata = {
1524 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1525};
1526
1527static struct platform_device android_usb_device = {
1528 .name = "android_usb",
1529 .id = -1,
1530 .dev = {
1531 .platform_data = &android_usb_pdata,
1532 },
1533};
1534
1535
1536#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001537
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001538#ifdef CONFIG_MSM_VPE
1539static struct resource msm_vpe_resources[] = {
1540 {
1541 .start = 0x05300000,
1542 .end = 0x05300000 + SZ_1M - 1,
1543 .flags = IORESOURCE_MEM,
1544 },
1545 {
1546 .start = INT_VPE,
1547 .end = INT_VPE,
1548 .flags = IORESOURCE_IRQ,
1549 },
1550};
1551
1552static struct platform_device msm_vpe_device = {
1553 .name = "msm_vpe",
1554 .id = 0,
1555 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1556 .resource = msm_vpe_resources,
1557};
1558#endif
1559
1560#ifdef CONFIG_MSM_CAMERA
1561#ifdef CONFIG_MSM_CAMERA_FLASH
1562#define VFE_CAMIF_TIMER1_GPIO 29
1563#define VFE_CAMIF_TIMER2_GPIO 30
1564#define VFE_CAMIF_TIMER3_GPIO_INT 31
1565#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1566static struct msm_camera_sensor_flash_src msm_flash_src = {
1567 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1568 ._fsrc.pmic_src.num_of_src = 2,
1569 ._fsrc.pmic_src.low_current = 100,
1570 ._fsrc.pmic_src.high_current = 300,
1571 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1572 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1573 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1574};
1575#ifdef CONFIG_IMX074
1576static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1577 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1578 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1579 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1580 .flash_recharge_duration = 50000,
1581 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1582};
1583#endif
1584#endif
1585
1586int msm_cam_gpio_tbl[] = {
1587 32,/*CAMIF_MCLK*/
1588 47,/*CAMIF_I2C_DATA*/
1589 48,/*CAMIF_I2C_CLK*/
1590 105,/*STANDBY*/
1591};
1592
1593enum msm_cam_stat{
1594 MSM_CAM_OFF,
1595 MSM_CAM_ON,
1596};
1597
1598static int config_gpio_table(enum msm_cam_stat stat)
1599{
1600 int rc = 0, i = 0;
1601 if (stat == MSM_CAM_ON) {
1602 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1603 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1604 if (unlikely(rc < 0)) {
1605 pr_err("%s not able to get gpio\n", __func__);
1606 for (i--; i >= 0; i--)
1607 gpio_free(msm_cam_gpio_tbl[i]);
1608 break;
1609 }
1610 }
1611 } else {
1612 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1613 gpio_free(msm_cam_gpio_tbl[i]);
1614 }
1615 return rc;
1616}
1617
1618static struct msm_camera_sensor_platform_info sensor_board_info = {
1619 .mount_angle = 0
1620};
1621
1622/*external regulator VREG_5V*/
1623static struct regulator *reg_flash_5V;
1624
1625static int config_camera_on_gpios_fluid(void)
1626{
1627 int rc = 0;
1628
1629 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1630 if (IS_ERR(reg_flash_5V)) {
1631 pr_err("'%s' regulator not found, rc=%ld\n",
1632 "8901_mpp0", IS_ERR(reg_flash_5V));
1633 return -ENODEV;
1634 }
1635
1636 rc = regulator_enable(reg_flash_5V);
1637 if (rc) {
1638 pr_err("'%s' regulator enable failed, rc=%d\n",
1639 "8901_mpp0", rc);
1640 regulator_put(reg_flash_5V);
1641 return rc;
1642 }
1643
1644#ifdef CONFIG_IMX074
1645 sensor_board_info.mount_angle = 90;
1646#endif
1647 rc = config_gpio_table(MSM_CAM_ON);
1648 if (rc < 0) {
1649 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1650 "failed\n", __func__);
1651 return rc;
1652 }
1653
1654 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1655 if (rc < 0) {
1656 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1657 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1658 regulator_disable(reg_flash_5V);
1659 regulator_put(reg_flash_5V);
1660 return rc;
1661 }
1662 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1663 msleep(20);
1664 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1665
1666
1667 /*Enable LED_FLASH_EN*/
1668 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1669 if (rc < 0) {
1670 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1671 "failed\n", __func__, GPIO_LED_FLASH_EN);
1672
1673 regulator_disable(reg_flash_5V);
1674 regulator_put(reg_flash_5V);
1675 config_gpio_table(MSM_CAM_OFF);
1676 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1677 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1678 return rc;
1679 }
1680 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1681 msleep(20);
1682 return rc;
1683}
1684
1685
1686static void config_camera_off_gpios_fluid(void)
1687{
1688 regulator_disable(reg_flash_5V);
1689 regulator_put(reg_flash_5V);
1690
1691 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1692 gpio_free(GPIO_LED_FLASH_EN);
1693
1694 config_gpio_table(MSM_CAM_OFF);
1695
1696 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1697 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1698}
1699static int config_camera_on_gpios(void)
1700{
1701 int rc = 0;
1702
1703 if (machine_is_msm8x60_fluid())
1704 return config_camera_on_gpios_fluid();
1705
1706 rc = config_gpio_table(MSM_CAM_ON);
1707 if (rc < 0) {
1708 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1709 "failed\n", __func__);
1710 return rc;
1711 }
1712
Jilai Wang971f97f2011-07-13 14:25:25 -04001713 if (!machine_is_msm8x60_dragon()) {
1714 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1715 if (rc < 0) {
1716 config_gpio_table(MSM_CAM_OFF);
1717 pr_err("%s: CAMSENSOR gpio %d request"
1718 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1719 return rc;
1720 }
1721 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1722 msleep(20);
1723 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001724 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001725
1726#ifdef CONFIG_MSM_CAMERA_FLASH
1727#ifdef CONFIG_IMX074
1728 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1729 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1730#endif
1731#endif
1732 return rc;
1733}
1734
1735static void config_camera_off_gpios(void)
1736{
1737 if (machine_is_msm8x60_fluid())
1738 return config_camera_off_gpios_fluid();
1739
1740
1741 config_gpio_table(MSM_CAM_OFF);
1742
Jilai Wang971f97f2011-07-13 14:25:25 -04001743 if (!machine_is_msm8x60_dragon()) {
1744 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1745 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1746 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001747}
1748
1749#ifdef CONFIG_QS_S5K4E1
1750
1751#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1752
1753static int config_camera_on_gpios_qs_cam_fluid(void)
1754{
1755 int rc = 0;
1756
1757 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1758 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1759 if (rc < 0) {
1760 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1761 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1762 return rc;
1763 }
1764 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1765 msleep(20);
1766 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1767 msleep(20);
1768
1769 /*
1770 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1771 * to enable 2.7V power to Camera
1772 */
1773 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1774 if (rc < 0) {
1775 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1776 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1777 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1778 gpio_free(QS_CAM_HC37_CAM_PD);
1779 return rc;
1780 }
1781 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1782 msleep(20);
1783 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1784 msleep(20);
1785
1786 rc = config_camera_on_gpios_fluid();
1787 if (rc < 0) {
1788 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1789 " failed\n", __func__);
1790 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1791 gpio_free(QS_CAM_HC37_CAM_PD);
1792 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1793 gpio_free(GPIO_AUX_CAM_2P7_EN);
1794 return rc;
1795 }
1796 return rc;
1797}
1798
1799static void config_camera_off_gpios_qs_cam_fluid(void)
1800{
1801 /*
1802 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1803 * to disable 2.7V power to Camera
1804 */
1805 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1806 gpio_free(GPIO_AUX_CAM_2P7_EN);
1807
1808 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1809 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1810 gpio_free(QS_CAM_HC37_CAM_PD);
1811
1812 config_camera_off_gpios_fluid();
1813 return;
1814}
1815
1816static int config_camera_on_gpios_qs_cam(void)
1817{
1818 int rc = 0;
1819
1820 if (machine_is_msm8x60_fluid())
1821 return config_camera_on_gpios_qs_cam_fluid();
1822
1823 rc = config_camera_on_gpios();
1824 return rc;
1825}
1826
1827static void config_camera_off_gpios_qs_cam(void)
1828{
1829 if (machine_is_msm8x60_fluid())
1830 return config_camera_off_gpios_qs_cam_fluid();
1831
1832 config_camera_off_gpios();
1833 return;
1834}
1835#endif
1836
1837static int config_camera_on_gpios_web_cam(void)
1838{
1839 int rc = 0;
1840 rc = config_gpio_table(MSM_CAM_ON);
1841 if (rc < 0) {
1842 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1843 "failed\n", __func__);
1844 return rc;
1845 }
1846
Jilai Wang53d27a82011-07-13 14:32:58 -04001847 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001848 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1849 if (rc < 0) {
1850 config_gpio_table(MSM_CAM_OFF);
1851 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1852 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1853 return rc;
1854 }
1855 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1856 }
1857 return rc;
1858}
1859
1860static void config_camera_off_gpios_web_cam(void)
1861{
1862 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001863 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001864 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1865 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1866 }
1867 return;
1868}
1869
1870#ifdef CONFIG_MSM_BUS_SCALING
1871static struct msm_bus_vectors cam_init_vectors[] = {
1872 {
1873 .src = MSM_BUS_MASTER_VFE,
1874 .dst = MSM_BUS_SLAVE_SMI,
1875 .ab = 0,
1876 .ib = 0,
1877 },
1878 {
1879 .src = MSM_BUS_MASTER_VFE,
1880 .dst = MSM_BUS_SLAVE_EBI_CH0,
1881 .ab = 0,
1882 .ib = 0,
1883 },
1884 {
1885 .src = MSM_BUS_MASTER_VPE,
1886 .dst = MSM_BUS_SLAVE_SMI,
1887 .ab = 0,
1888 .ib = 0,
1889 },
1890 {
1891 .src = MSM_BUS_MASTER_VPE,
1892 .dst = MSM_BUS_SLAVE_EBI_CH0,
1893 .ab = 0,
1894 .ib = 0,
1895 },
1896 {
1897 .src = MSM_BUS_MASTER_JPEG_ENC,
1898 .dst = MSM_BUS_SLAVE_SMI,
1899 .ab = 0,
1900 .ib = 0,
1901 },
1902 {
1903 .src = MSM_BUS_MASTER_JPEG_ENC,
1904 .dst = MSM_BUS_SLAVE_EBI_CH0,
1905 .ab = 0,
1906 .ib = 0,
1907 },
1908};
1909
1910static struct msm_bus_vectors cam_preview_vectors[] = {
1911 {
1912 .src = MSM_BUS_MASTER_VFE,
1913 .dst = MSM_BUS_SLAVE_SMI,
1914 .ab = 0,
1915 .ib = 0,
1916 },
1917 {
1918 .src = MSM_BUS_MASTER_VFE,
1919 .dst = MSM_BUS_SLAVE_EBI_CH0,
1920 .ab = 283115520,
1921 .ib = 452984832,
1922 },
1923 {
1924 .src = MSM_BUS_MASTER_VPE,
1925 .dst = MSM_BUS_SLAVE_SMI,
1926 .ab = 0,
1927 .ib = 0,
1928 },
1929 {
1930 .src = MSM_BUS_MASTER_VPE,
1931 .dst = MSM_BUS_SLAVE_EBI_CH0,
1932 .ab = 0,
1933 .ib = 0,
1934 },
1935 {
1936 .src = MSM_BUS_MASTER_JPEG_ENC,
1937 .dst = MSM_BUS_SLAVE_SMI,
1938 .ab = 0,
1939 .ib = 0,
1940 },
1941 {
1942 .src = MSM_BUS_MASTER_JPEG_ENC,
1943 .dst = MSM_BUS_SLAVE_EBI_CH0,
1944 .ab = 0,
1945 .ib = 0,
1946 },
1947};
1948
1949static struct msm_bus_vectors cam_video_vectors[] = {
1950 {
1951 .src = MSM_BUS_MASTER_VFE,
1952 .dst = MSM_BUS_SLAVE_SMI,
1953 .ab = 283115520,
1954 .ib = 452984832,
1955 },
1956 {
1957 .src = MSM_BUS_MASTER_VFE,
1958 .dst = MSM_BUS_SLAVE_EBI_CH0,
1959 .ab = 283115520,
1960 .ib = 452984832,
1961 },
1962 {
1963 .src = MSM_BUS_MASTER_VPE,
1964 .dst = MSM_BUS_SLAVE_SMI,
1965 .ab = 319610880,
1966 .ib = 511377408,
1967 },
1968 {
1969 .src = MSM_BUS_MASTER_VPE,
1970 .dst = MSM_BUS_SLAVE_EBI_CH0,
1971 .ab = 0,
1972 .ib = 0,
1973 },
1974 {
1975 .src = MSM_BUS_MASTER_JPEG_ENC,
1976 .dst = MSM_BUS_SLAVE_SMI,
1977 .ab = 0,
1978 .ib = 0,
1979 },
1980 {
1981 .src = MSM_BUS_MASTER_JPEG_ENC,
1982 .dst = MSM_BUS_SLAVE_EBI_CH0,
1983 .ab = 0,
1984 .ib = 0,
1985 },
1986};
1987
1988static struct msm_bus_vectors cam_snapshot_vectors[] = {
1989 {
1990 .src = MSM_BUS_MASTER_VFE,
1991 .dst = MSM_BUS_SLAVE_SMI,
1992 .ab = 566231040,
1993 .ib = 905969664,
1994 },
1995 {
1996 .src = MSM_BUS_MASTER_VFE,
1997 .dst = MSM_BUS_SLAVE_EBI_CH0,
1998 .ab = 69984000,
1999 .ib = 111974400,
2000 },
2001 {
2002 .src = MSM_BUS_MASTER_VPE,
2003 .dst = MSM_BUS_SLAVE_SMI,
2004 .ab = 0,
2005 .ib = 0,
2006 },
2007 {
2008 .src = MSM_BUS_MASTER_VPE,
2009 .dst = MSM_BUS_SLAVE_EBI_CH0,
2010 .ab = 0,
2011 .ib = 0,
2012 },
2013 {
2014 .src = MSM_BUS_MASTER_JPEG_ENC,
2015 .dst = MSM_BUS_SLAVE_SMI,
2016 .ab = 320864256,
2017 .ib = 513382810,
2018 },
2019 {
2020 .src = MSM_BUS_MASTER_JPEG_ENC,
2021 .dst = MSM_BUS_SLAVE_EBI_CH0,
2022 .ab = 320864256,
2023 .ib = 513382810,
2024 },
2025};
2026
2027static struct msm_bus_vectors cam_zsl_vectors[] = {
2028 {
2029 .src = MSM_BUS_MASTER_VFE,
2030 .dst = MSM_BUS_SLAVE_SMI,
2031 .ab = 566231040,
2032 .ib = 905969664,
2033 },
2034 {
2035 .src = MSM_BUS_MASTER_VFE,
2036 .dst = MSM_BUS_SLAVE_EBI_CH0,
2037 .ab = 706199040,
2038 .ib = 1129918464,
2039 },
2040 {
2041 .src = MSM_BUS_MASTER_VPE,
2042 .dst = MSM_BUS_SLAVE_SMI,
2043 .ab = 0,
2044 .ib = 0,
2045 },
2046 {
2047 .src = MSM_BUS_MASTER_VPE,
2048 .dst = MSM_BUS_SLAVE_EBI_CH0,
2049 .ab = 0,
2050 .ib = 0,
2051 },
2052 {
2053 .src = MSM_BUS_MASTER_JPEG_ENC,
2054 .dst = MSM_BUS_SLAVE_SMI,
2055 .ab = 320864256,
2056 .ib = 513382810,
2057 },
2058 {
2059 .src = MSM_BUS_MASTER_JPEG_ENC,
2060 .dst = MSM_BUS_SLAVE_EBI_CH0,
2061 .ab = 320864256,
2062 .ib = 513382810,
2063 },
2064};
2065
2066static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2067 {
2068 .src = MSM_BUS_MASTER_VFE,
2069 .dst = MSM_BUS_SLAVE_SMI,
2070 .ab = 212336640,
2071 .ib = 339738624,
2072 },
2073 {
2074 .src = MSM_BUS_MASTER_VFE,
2075 .dst = MSM_BUS_SLAVE_EBI_CH0,
2076 .ab = 25090560,
2077 .ib = 40144896,
2078 },
2079 {
2080 .src = MSM_BUS_MASTER_VPE,
2081 .dst = MSM_BUS_SLAVE_SMI,
2082 .ab = 239708160,
2083 .ib = 383533056,
2084 },
2085 {
2086 .src = MSM_BUS_MASTER_VPE,
2087 .dst = MSM_BUS_SLAVE_EBI_CH0,
2088 .ab = 79902720,
2089 .ib = 127844352,
2090 },
2091 {
2092 .src = MSM_BUS_MASTER_JPEG_ENC,
2093 .dst = MSM_BUS_SLAVE_SMI,
2094 .ab = 0,
2095 .ib = 0,
2096 },
2097 {
2098 .src = MSM_BUS_MASTER_JPEG_ENC,
2099 .dst = MSM_BUS_SLAVE_EBI_CH0,
2100 .ab = 0,
2101 .ib = 0,
2102 },
2103};
2104
2105static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2106 {
2107 .src = MSM_BUS_MASTER_VFE,
2108 .dst = MSM_BUS_SLAVE_SMI,
2109 .ab = 0,
2110 .ib = 0,
2111 },
2112 {
2113 .src = MSM_BUS_MASTER_VFE,
2114 .dst = MSM_BUS_SLAVE_EBI_CH0,
2115 .ab = 300902400,
2116 .ib = 481443840,
2117 },
2118 {
2119 .src = MSM_BUS_MASTER_VPE,
2120 .dst = MSM_BUS_SLAVE_SMI,
2121 .ab = 230307840,
2122 .ib = 368492544,
2123 },
2124 {
2125 .src = MSM_BUS_MASTER_VPE,
2126 .dst = MSM_BUS_SLAVE_EBI_CH0,
2127 .ab = 245113344,
2128 .ib = 392181351,
2129 },
2130 {
2131 .src = MSM_BUS_MASTER_JPEG_ENC,
2132 .dst = MSM_BUS_SLAVE_SMI,
2133 .ab = 106536960,
2134 .ib = 170459136,
2135 },
2136 {
2137 .src = MSM_BUS_MASTER_JPEG_ENC,
2138 .dst = MSM_BUS_SLAVE_EBI_CH0,
2139 .ab = 106536960,
2140 .ib = 170459136,
2141 },
2142};
2143
2144static struct msm_bus_paths cam_bus_client_config[] = {
2145 {
2146 ARRAY_SIZE(cam_init_vectors),
2147 cam_init_vectors,
2148 },
2149 {
2150 ARRAY_SIZE(cam_preview_vectors),
2151 cam_preview_vectors,
2152 },
2153 {
2154 ARRAY_SIZE(cam_video_vectors),
2155 cam_video_vectors,
2156 },
2157 {
2158 ARRAY_SIZE(cam_snapshot_vectors),
2159 cam_snapshot_vectors,
2160 },
2161 {
2162 ARRAY_SIZE(cam_zsl_vectors),
2163 cam_zsl_vectors,
2164 },
2165 {
2166 ARRAY_SIZE(cam_stereo_video_vectors),
2167 cam_stereo_video_vectors,
2168 },
2169 {
2170 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2171 cam_stereo_snapshot_vectors,
2172 },
2173};
2174
2175static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2176 cam_bus_client_config,
2177 ARRAY_SIZE(cam_bus_client_config),
2178 .name = "msm_camera",
2179};
2180#endif
2181
2182struct msm_camera_device_platform_data msm_camera_device_data = {
2183 .camera_gpio_on = config_camera_on_gpios,
2184 .camera_gpio_off = config_camera_off_gpios,
2185 .ioext.csiphy = 0x04800000,
2186 .ioext.csisz = 0x00000400,
2187 .ioext.csiirq = CSI_0_IRQ,
2188 .ioclk.mclk_clk_rate = 24000000,
2189 .ioclk.vfe_clk_rate = 228570000,
2190#ifdef CONFIG_MSM_BUS_SCALING
2191 .cam_bus_scale_table = &cam_bus_client_pdata,
2192#endif
2193};
2194
2195#ifdef CONFIG_QS_S5K4E1
2196struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2197 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2198 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2199 .ioext.csiphy = 0x04800000,
2200 .ioext.csisz = 0x00000400,
2201 .ioext.csiirq = CSI_0_IRQ,
2202 .ioclk.mclk_clk_rate = 24000000,
2203 .ioclk.vfe_clk_rate = 228570000,
2204#ifdef CONFIG_MSM_BUS_SCALING
2205 .cam_bus_scale_table = &cam_bus_client_pdata,
2206#endif
2207};
2208#endif
2209
2210struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2211 .camera_gpio_on = config_camera_on_gpios_web_cam,
2212 .camera_gpio_off = config_camera_off_gpios_web_cam,
2213 .ioext.csiphy = 0x04900000,
2214 .ioext.csisz = 0x00000400,
2215 .ioext.csiirq = CSI_1_IRQ,
2216 .ioclk.mclk_clk_rate = 24000000,
2217 .ioclk.vfe_clk_rate = 228570000,
2218#ifdef CONFIG_MSM_BUS_SCALING
2219 .cam_bus_scale_table = &cam_bus_client_pdata,
2220#endif
2221};
2222
2223struct resource msm_camera_resources[] = {
2224 {
2225 .start = 0x04500000,
2226 .end = 0x04500000 + SZ_1M - 1,
2227 .flags = IORESOURCE_MEM,
2228 },
2229 {
2230 .start = VFE_IRQ,
2231 .end = VFE_IRQ,
2232 .flags = IORESOURCE_IRQ,
2233 },
2234};
2235#ifdef CONFIG_MT9E013
2236static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2237 .mount_angle = 0
2238};
2239
2240static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2241 .flash_type = MSM_CAMERA_FLASH_LED,
2242 .flash_src = &msm_flash_src
2243};
2244
2245static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2246 .sensor_name = "mt9e013",
2247 .sensor_reset = 106,
2248 .sensor_pwd = 85,
2249 .vcm_pwd = 1,
2250 .vcm_enable = 0,
2251 .pdata = &msm_camera_device_data,
2252 .resource = msm_camera_resources,
2253 .num_resources = ARRAY_SIZE(msm_camera_resources),
2254 .flash_data = &flash_mt9e013,
2255 .strobe_flash_data = &strobe_flash_xenon,
2256 .sensor_platform_info = &mt9e013_sensor_8660_info,
2257 .csi_if = 1
2258};
2259struct platform_device msm_camera_sensor_mt9e013 = {
2260 .name = "msm_camera_mt9e013",
2261 .dev = {
2262 .platform_data = &msm_camera_sensor_mt9e013_data,
2263 },
2264};
2265#endif
2266
2267#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302268static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2269 .mount_angle = 180
2270};
2271
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002272static struct msm_camera_sensor_flash_data flash_imx074 = {
2273 .flash_type = MSM_CAMERA_FLASH_LED,
2274 .flash_src = &msm_flash_src
2275};
2276
2277static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2278 .sensor_name = "imx074",
2279 .sensor_reset = 106,
2280 .sensor_pwd = 85,
2281 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2282 .vcm_enable = 1,
2283 .pdata = &msm_camera_device_data,
2284 .resource = msm_camera_resources,
2285 .num_resources = ARRAY_SIZE(msm_camera_resources),
2286 .flash_data = &flash_imx074,
2287 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302288 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002289 .csi_if = 1
2290};
2291struct platform_device msm_camera_sensor_imx074 = {
2292 .name = "msm_camera_imx074",
2293 .dev = {
2294 .platform_data = &msm_camera_sensor_imx074_data,
2295 },
2296};
2297#endif
2298#ifdef CONFIG_WEBCAM_OV9726
2299
2300static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2301 .mount_angle = 0
2302};
2303
2304static struct msm_camera_sensor_flash_data flash_ov9726 = {
2305 .flash_type = MSM_CAMERA_FLASH_LED,
2306 .flash_src = &msm_flash_src
2307};
2308static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2309 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002310 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002311 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2312 .sensor_pwd = 85,
2313 .vcm_pwd = 1,
2314 .vcm_enable = 0,
2315 .pdata = &msm_camera_device_data_web_cam,
2316 .resource = msm_camera_resources,
2317 .num_resources = ARRAY_SIZE(msm_camera_resources),
2318 .flash_data = &flash_ov9726,
2319 .sensor_platform_info = &ov9726_sensor_8660_info,
2320 .csi_if = 1
2321};
2322struct platform_device msm_camera_sensor_webcam_ov9726 = {
2323 .name = "msm_camera_ov9726",
2324 .dev = {
2325 .platform_data = &msm_camera_sensor_ov9726_data,
2326 },
2327};
2328#endif
2329#ifdef CONFIG_WEBCAM_OV7692
2330static struct msm_camera_sensor_flash_data flash_ov7692 = {
2331 .flash_type = MSM_CAMERA_FLASH_LED,
2332 .flash_src = &msm_flash_src
2333};
2334static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2335 .sensor_name = "ov7692",
2336 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2337 .sensor_pwd = 85,
2338 .vcm_pwd = 1,
2339 .vcm_enable = 0,
2340 .pdata = &msm_camera_device_data_web_cam,
2341 .resource = msm_camera_resources,
2342 .num_resources = ARRAY_SIZE(msm_camera_resources),
2343 .flash_data = &flash_ov7692,
2344 .csi_if = 1
2345};
2346
2347static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2348 .name = "msm_camera_ov7692",
2349 .dev = {
2350 .platform_data = &msm_camera_sensor_ov7692_data,
2351 },
2352};
2353#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002354#ifdef CONFIG_VX6953
2355static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2356 .mount_angle = 270
2357};
2358
2359static struct msm_camera_sensor_flash_data flash_vx6953 = {
2360 .flash_type = MSM_CAMERA_FLASH_NONE,
2361 .flash_src = &msm_flash_src
2362};
2363
2364static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2365 .sensor_name = "vx6953",
2366 .sensor_reset = 63,
2367 .sensor_pwd = 63,
2368 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2369 .vcm_enable = 1,
2370 .pdata = &msm_camera_device_data,
2371 .resource = msm_camera_resources,
2372 .num_resources = ARRAY_SIZE(msm_camera_resources),
2373 .flash_data = &flash_vx6953,
2374 .sensor_platform_info = &vx6953_sensor_8660_info,
2375 .csi_if = 1
2376};
2377struct platform_device msm_camera_sensor_vx6953 = {
2378 .name = "msm_camera_vx6953",
2379 .dev = {
2380 .platform_data = &msm_camera_sensor_vx6953_data,
2381 },
2382};
2383#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002384#ifdef CONFIG_QS_S5K4E1
2385
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302386static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2387#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2388 .mount_angle = 90
2389#else
2390 .mount_angle = 0
2391#endif
2392};
2393
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002394static char eeprom_data[864];
2395static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2396 .flash_type = MSM_CAMERA_FLASH_LED,
2397 .flash_src = &msm_flash_src
2398};
2399
2400static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2401 .sensor_name = "qs_s5k4e1",
2402 .sensor_reset = 106,
2403 .sensor_pwd = 85,
2404 .vcm_pwd = 1,
2405 .vcm_enable = 0,
2406 .pdata = &msm_camera_device_data_qs_cam,
2407 .resource = msm_camera_resources,
2408 .num_resources = ARRAY_SIZE(msm_camera_resources),
2409 .flash_data = &flash_qs_s5k4e1,
2410 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302411 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002412 .csi_if = 1,
2413 .eeprom_data = eeprom_data,
2414};
2415struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2416 .name = "msm_camera_qs_s5k4e1",
2417 .dev = {
2418 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2419 },
2420};
2421#endif
2422static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2423 #ifdef CONFIG_MT9E013
2424 {
2425 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2426 },
2427 #endif
2428 #ifdef CONFIG_IMX074
2429 {
2430 I2C_BOARD_INFO("imx074", 0x1A),
2431 },
2432 #endif
2433 #ifdef CONFIG_WEBCAM_OV7692
2434 {
2435 I2C_BOARD_INFO("ov7692", 0x78),
2436 },
2437 #endif
2438 #ifdef CONFIG_WEBCAM_OV9726
2439 {
2440 I2C_BOARD_INFO("ov9726", 0x10),
2441 },
2442 #endif
2443 #ifdef CONFIG_QS_S5K4E1
2444 {
2445 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2446 },
2447 #endif
2448};
Jilai Wang971f97f2011-07-13 14:25:25 -04002449
2450static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002451 #ifdef CONFIG_WEBCAM_OV9726
2452 {
2453 I2C_BOARD_INFO("ov9726", 0x10),
2454 },
2455 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002456 #ifdef CONFIG_VX6953
2457 {
2458 I2C_BOARD_INFO("vx6953", 0x20),
2459 },
2460 #endif
2461};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002462#endif
2463
2464#ifdef CONFIG_MSM_GEMINI
2465static struct resource msm_gemini_resources[] = {
2466 {
2467 .start = 0x04600000,
2468 .end = 0x04600000 + SZ_1M - 1,
2469 .flags = IORESOURCE_MEM,
2470 },
2471 {
2472 .start = INT_JPEG,
2473 .end = INT_JPEG,
2474 .flags = IORESOURCE_IRQ,
2475 },
2476};
2477
2478static struct platform_device msm_gemini_device = {
2479 .name = "msm_gemini",
2480 .resource = msm_gemini_resources,
2481 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2482};
2483#endif
2484
2485#ifdef CONFIG_I2C_QUP
2486static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2487{
2488}
2489
2490static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2491 .clk_freq = 384000,
2492 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002493 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2494};
2495
2496static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2497 .clk_freq = 100000,
2498 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002499 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2500};
2501
2502static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2503 .clk_freq = 100000,
2504 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002505 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2506};
2507
2508static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2509 .clk_freq = 100000,
2510 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002511 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2512};
2513
2514static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2515 .clk_freq = 100000,
2516 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002517 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2518};
2519
2520static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2521 .clk_freq = 100000,
2522 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002523 .use_gsbi_shared_mode = 1,
2524 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2525};
2526#endif
2527
2528#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2529static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2530 .max_clock_speed = 24000000,
2531};
2532
2533static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2534 .max_clock_speed = 24000000,
2535};
2536#endif
2537
2538#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002539/* CODEC/TSSC SSBI */
2540static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2541 .controller_type = MSM_SBI_CTRL_SSBI,
2542};
2543#endif
2544
2545#ifdef CONFIG_BATTERY_MSM
2546/* Use basic value for fake MSM battery */
2547static struct msm_psy_batt_pdata msm_psy_batt_data = {
2548 .avail_chg_sources = AC_CHG,
2549};
2550
2551static struct platform_device msm_batt_device = {
2552 .name = "msm-battery",
2553 .id = -1,
2554 .dev.platform_data = &msm_psy_batt_data,
2555};
2556#endif
2557
2558#ifdef CONFIG_FB_MSM_LCDC_DSUB
2559/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2560 prim = 1024 x 600 x 4(bpp) x 2(pages)
2561 This is the difference. */
2562#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2563#else
2564#define MSM_FB_DSUB_PMEM_ADDER (0)
2565#endif
2566
2567/* Sensors DSPS platform data */
2568#ifdef CONFIG_MSM_DSPS
2569
2570static struct dsps_gpio_info dsps_surf_gpios[] = {
2571 {
2572 .name = "compass_rst_n",
2573 .num = GPIO_COMPASS_RST_N,
2574 .on_val = 1, /* device not in reset */
2575 .off_val = 0, /* device in reset */
2576 },
2577 {
2578 .name = "gpio_r_altimeter_reset_n",
2579 .num = GPIO_R_ALTIMETER_RESET_N,
2580 .on_val = 1, /* device not in reset */
2581 .off_val = 0, /* device in reset */
2582 }
2583};
2584
2585static struct dsps_gpio_info dsps_fluid_gpios[] = {
2586 {
2587 .name = "gpio_n_altimeter_reset_n",
2588 .num = GPIO_N_ALTIMETER_RESET_N,
2589 .on_val = 1, /* device not in reset */
2590 .off_val = 0, /* device in reset */
2591 }
2592};
2593
2594static void __init msm8x60_init_dsps(void)
2595{
2596 struct msm_dsps_platform_data *pdata =
2597 msm_dsps_device.dev.platform_data;
2598 /*
2599 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2600 * to the power supply and not controled via GPIOs. Fluid uses a
2601 * different IO-Expender (north) than used on surf/ffa.
2602 */
2603 if (machine_is_msm8x60_fluid()) {
2604 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002605 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2606 pdata->gpios = dsps_fluid_gpios;
2607 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2608 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002609 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2610 pdata->gpios = dsps_surf_gpios;
2611 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2612 }
2613
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002614 platform_device_register(&msm_dsps_device);
2615}
2616#endif /* CONFIG_MSM_DSPS */
2617
2618#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002619#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002620#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002621#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002622#endif
2623
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002624#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2625#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2626#elif defined(CONFIG_FB_MSM_TVOUT)
2627#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2628#else
2629#define MSM_FB_EXT_BUFT_SIZE 0
2630#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002632#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2633/* 4 bpp x 2 page HDMI case */
2634#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2635#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002636/* Note: must be multiple of 4096 */
2637#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002638 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002639#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002640
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002641#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2642#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2643#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002644#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002645#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002646
Huaibin Yanga5419422011-12-08 23:52:10 -08002647#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2648#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2649#else
2650#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2651#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2652
2653#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2654#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2655#else
2656#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2657#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2658
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002659#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2660#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002661#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002662
2663#define MSM_SMI_BASE 0x38000000
2664#define MSM_SMI_SIZE 0x4000000
2665
2666#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002667#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668
2669#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2670#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2671#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2672
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002673#define MSM_ION_EBI_SIZE MSM_PMEM_SF_SIZE
2674#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
Laura Abbottdf8b8a82011-11-02 23:13:45 -07002675#define MSM_ION_SMI_SIZE MSM_PMEM_SMIPOOL_SIZE
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002676
2677#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
2678#define MSM_ION_HEAP_NUM 5
2679#else
2680#define MSM_ION_HEAP_NUM 2
2681#endif
2682
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002683static unsigned fb_size;
2684static int __init fb_size_setup(char *p)
2685{
2686 fb_size = memparse(p, NULL);
2687 return 0;
2688}
2689early_param("fb_size", fb_size_setup);
2690
2691static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2692static int __init pmem_kernel_ebi1_size_setup(char *p)
2693{
2694 pmem_kernel_ebi1_size = memparse(p, NULL);
2695 return 0;
2696}
2697early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2698
2699#ifdef CONFIG_ANDROID_PMEM
2700static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2701static int __init pmem_sf_size_setup(char *p)
2702{
2703 pmem_sf_size = memparse(p, NULL);
2704 return 0;
2705}
2706early_param("pmem_sf_size", pmem_sf_size_setup);
2707
2708static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2709
2710static int __init pmem_adsp_size_setup(char *p)
2711{
2712 pmem_adsp_size = memparse(p, NULL);
2713 return 0;
2714}
2715early_param("pmem_adsp_size", pmem_adsp_size_setup);
2716
2717static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2718
2719static int __init pmem_audio_size_setup(char *p)
2720{
2721 pmem_audio_size = memparse(p, NULL);
2722 return 0;
2723}
2724early_param("pmem_audio_size", pmem_audio_size_setup);
2725#endif
2726
2727static struct resource msm_fb_resources[] = {
2728 {
2729 .flags = IORESOURCE_DMA,
2730 }
2731};
2732
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002733static int msm_fb_detect_panel(const char *name)
2734{
2735 if (machine_is_msm8x60_fluid()) {
2736 uint32_t soc_platform_version = socinfo_get_platform_version();
2737 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2738#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2739 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002740 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2741 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002742 return 0;
2743#endif
2744 } else { /*P3 and up use AUO panel */
2745#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2746 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002747 strnlen(LCDC_AUO_PANEL_NAME,
2748 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002749 return 0;
2750#endif
2751 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002752#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2753 } else if machine_is_msm8x60_dragon() {
2754 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002755 strnlen(LCDC_NT35582_PANEL_NAME,
2756 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002757 return 0;
2758#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002759 } else {
2760 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002761 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2762 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002763 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002764
2765#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2766 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2767 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2768 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2769 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2770 PANEL_NAME_MAX_LEN)))
2771 return 0;
2772
2773 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2774 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2775 PANEL_NAME_MAX_LEN)))
2776 return 0;
2777
2778 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2779 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2780 PANEL_NAME_MAX_LEN)))
2781 return 0;
2782#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002783 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002784
2785 if (!strncmp(name, HDMI_PANEL_NAME,
2786 strnlen(HDMI_PANEL_NAME,
2787 PANEL_NAME_MAX_LEN)))
2788 return 0;
2789
2790 if (!strncmp(name, TVOUT_PANEL_NAME,
2791 strnlen(TVOUT_PANEL_NAME,
2792 PANEL_NAME_MAX_LEN)))
2793 return 0;
2794
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002795 pr_warning("%s: not supported '%s'", __func__, name);
2796 return -ENODEV;
2797}
2798
2799static struct msm_fb_platform_data msm_fb_pdata = {
2800 .detect_client = msm_fb_detect_panel,
2801};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002802
2803static struct platform_device msm_fb_device = {
2804 .name = "msm_fb",
2805 .id = 0,
2806 .num_resources = ARRAY_SIZE(msm_fb_resources),
2807 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002808 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002809};
2810
2811#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002812#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002813static struct android_pmem_platform_data android_pmem_pdata = {
2814 .name = "pmem",
2815 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2816 .cached = 1,
2817 .memory_type = MEMTYPE_EBI1,
2818};
2819
2820static struct platform_device android_pmem_device = {
2821 .name = "android_pmem",
2822 .id = 0,
2823 .dev = {.platform_data = &android_pmem_pdata},
2824};
2825
2826static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2827 .name = "pmem_adsp",
2828 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2829 .cached = 0,
2830 .memory_type = MEMTYPE_EBI1,
2831};
2832
2833static struct platform_device android_pmem_adsp_device = {
2834 .name = "android_pmem",
2835 .id = 2,
2836 .dev = { .platform_data = &android_pmem_adsp_pdata },
2837};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002838#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002839static struct android_pmem_platform_data android_pmem_audio_pdata = {
2840 .name = "pmem_audio",
2841 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2842 .cached = 0,
2843 .memory_type = MEMTYPE_EBI1,
2844};
2845
2846static struct platform_device android_pmem_audio_device = {
2847 .name = "android_pmem",
2848 .id = 4,
2849 .dev = { .platform_data = &android_pmem_audio_pdata },
2850};
2851
Laura Abbott1e36a022011-06-22 17:08:13 -07002852#define PMEM_BUS_WIDTH(_bw) \
2853 { \
2854 .vectors = &(struct msm_bus_vectors){ \
2855 .src = MSM_BUS_MASTER_AMPSS_M0, \
2856 .dst = MSM_BUS_SLAVE_SMI, \
2857 .ib = (_bw), \
2858 .ab = 0, \
2859 }, \
2860 .num_paths = 1, \
2861 }
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002862#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Laura Abbott1e36a022011-06-22 17:08:13 -07002863static struct msm_bus_paths pmem_smi_table[] = {
2864 [0] = PMEM_BUS_WIDTH(0), /* Off */
2865 [1] = PMEM_BUS_WIDTH(1), /* On */
2866};
2867
2868static struct msm_bus_scale_pdata smi_client_pdata = {
2869 .usecase = pmem_smi_table,
2870 .num_usecases = ARRAY_SIZE(pmem_smi_table),
2871 .name = "pmem_smi",
2872};
2873
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002874int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002875{
2876 int bus_id = (int) data;
2877
2878 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002879 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002880}
2881
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002882int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002883{
2884 int bus_id = (int) data;
2885
2886 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002887 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002888}
2889
Alex Bird199980e2011-10-21 11:29:27 -07002890void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002891{
2892 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2893}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002894static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2895 .name = "pmem_smipool",
2896 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2897 .cached = 0,
2898 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002899 .request_region = request_smi_region,
2900 .release_region = release_smi_region,
2901 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002902 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002903};
2904static struct platform_device android_pmem_smipool_device = {
2905 .name = "android_pmem",
2906 .id = 7,
2907 .dev = { .platform_data = &android_pmem_smipool_pdata },
2908};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002909#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002910#endif
2911
2912#define GPIO_DONGLE_PWR_EN 258
2913static void setup_display_power(void);
2914static int lcdc_vga_enabled;
2915static int vga_enable_request(int enable)
2916{
2917 if (enable)
2918 lcdc_vga_enabled = 1;
2919 else
2920 lcdc_vga_enabled = 0;
2921 setup_display_power();
2922
2923 return 0;
2924}
2925
2926#define GPIO_BACKLIGHT_PWM0 0
2927#define GPIO_BACKLIGHT_PWM1 1
2928
2929static int pmic_backlight_gpio[2]
2930 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2931static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2932 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2933 .vga_switch = vga_enable_request,
2934};
2935
2936static struct platform_device lcdc_samsung_panel_device = {
2937 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2938 .id = 0,
2939 .dev = {
2940 .platform_data = &lcdc_samsung_panel_data,
2941 }
2942};
2943#if (!defined(CONFIG_SPI_QUP)) && \
2944 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2945 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2946
2947static int lcdc_spi_gpio_array_num[] = {
2948 LCDC_SPI_GPIO_CLK,
2949 LCDC_SPI_GPIO_CS,
2950 LCDC_SPI_GPIO_MOSI,
2951};
2952
2953static uint32_t lcdc_spi_gpio_config_data[] = {
2954 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2955 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2956 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2957 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2958 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2959 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2960};
2961
2962static void lcdc_config_spi_gpios(int enable)
2963{
2964 int n;
2965 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2966 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2967}
2968#endif
2969
2970#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2971#ifdef CONFIG_SPI_QUP
2972static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2973 {
2974 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2975 .mode = SPI_MODE_3,
2976 .bus_num = 1,
2977 .chip_select = 0,
2978 .max_speed_hz = 10800000,
2979 }
2980};
2981#endif /* CONFIG_SPI_QUP */
2982
2983static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2984#ifndef CONFIG_SPI_QUP
2985 .panel_config_gpio = lcdc_config_spi_gpios,
2986 .gpio_num = lcdc_spi_gpio_array_num,
2987#endif
2988};
2989
2990static struct platform_device lcdc_samsung_oled_panel_device = {
2991 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2992 .id = 0,
2993 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2994};
2995#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2996
2997#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2998#ifdef CONFIG_SPI_QUP
2999static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3000 {
3001 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3002 .mode = SPI_MODE_3,
3003 .bus_num = 1,
3004 .chip_select = 0,
3005 .max_speed_hz = 10800000,
3006 }
3007};
3008#endif
3009
3010static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3011#ifndef CONFIG_SPI_QUP
3012 .panel_config_gpio = lcdc_config_spi_gpios,
3013 .gpio_num = lcdc_spi_gpio_array_num,
3014#endif
3015};
3016
3017static struct platform_device lcdc_auo_wvga_panel_device = {
3018 .name = LCDC_AUO_PANEL_NAME,
3019 .id = 0,
3020 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3021};
3022#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3023
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003024#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3025
3026#define GPIO_NT35582_RESET 94
3027#define GPIO_NT35582_BL_EN_HW_PIN 24
3028#define GPIO_NT35582_BL_EN \
3029 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3030
3031static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3032
3033static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3034 .gpio_num = lcdc_nt35582_pmic_gpio,
3035};
3036
3037static struct platform_device lcdc_nt35582_panel_device = {
3038 .name = LCDC_NT35582_PANEL_NAME,
3039 .id = 0,
3040 .dev = {
3041 .platform_data = &lcdc_nt35582_panel_data,
3042 }
3043};
3044
3045static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3046 {
3047 .modalias = "lcdc_nt35582_spi",
3048 .mode = SPI_MODE_0,
3049 .bus_num = 0,
3050 .chip_select = 0,
3051 .max_speed_hz = 1100000,
3052 }
3053};
3054#endif
3055
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003056#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3057static struct resource hdmi_msm_resources[] = {
3058 {
3059 .name = "hdmi_msm_qfprom_addr",
3060 .start = 0x00700000,
3061 .end = 0x007060FF,
3062 .flags = IORESOURCE_MEM,
3063 },
3064 {
3065 .name = "hdmi_msm_hdmi_addr",
3066 .start = 0x04A00000,
3067 .end = 0x04A00FFF,
3068 .flags = IORESOURCE_MEM,
3069 },
3070 {
3071 .name = "hdmi_msm_irq",
3072 .start = HDMI_IRQ,
3073 .end = HDMI_IRQ,
3074 .flags = IORESOURCE_IRQ,
3075 },
3076};
3077
3078static int hdmi_enable_5v(int on);
3079static int hdmi_core_power(int on, int show);
3080static int hdmi_cec_power(int on);
3081
3082static struct msm_hdmi_platform_data hdmi_msm_data = {
3083 .irq = HDMI_IRQ,
3084 .enable_5v = hdmi_enable_5v,
3085 .core_power = hdmi_core_power,
3086 .cec_power = hdmi_cec_power,
3087};
3088
3089static struct platform_device hdmi_msm_device = {
3090 .name = "hdmi_msm",
3091 .id = 0,
3092 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3093 .resource = hdmi_msm_resources,
3094 .dev.platform_data = &hdmi_msm_data,
3095};
3096#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3097
3098#ifdef CONFIG_FB_MSM_MIPI_DSI
3099static struct platform_device mipi_dsi_toshiba_panel_device = {
3100 .name = "mipi_toshiba",
3101 .id = 0,
3102};
3103
3104#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3105
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003106static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003107 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003108 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003109};
3110
3111static struct platform_device mipi_dsi_novatek_panel_device = {
3112 .name = "mipi_novatek",
3113 .id = 0,
3114 .dev = {
3115 .platform_data = &novatek_pdata,
3116 }
3117};
3118#endif
3119
3120static void __init msm8x60_allocate_memory_regions(void)
3121{
3122 void *addr;
3123 unsigned long size;
3124
3125 size = MSM_FB_SIZE;
3126 addr = alloc_bootmem_align(size, 0x1000);
3127 msm_fb_resources[0].start = __pa(addr);
3128 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3129 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3130 size, addr, __pa(addr));
3131
3132}
3133
3134#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3135 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3136/*virtual key support */
3137static ssize_t tma300_vkeys_show(struct kobject *kobj,
3138 struct kobj_attribute *attr, char *buf)
3139{
3140 return sprintf(buf,
3141 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3142 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3143 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3144 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3145 "\n");
3146}
3147
3148static struct kobj_attribute tma300_vkeys_attr = {
3149 .attr = {
3150 .mode = S_IRUGO,
3151 },
3152 .show = &tma300_vkeys_show,
3153};
3154
3155static struct attribute *tma300_properties_attrs[] = {
3156 &tma300_vkeys_attr.attr,
3157 NULL
3158};
3159
3160static struct attribute_group tma300_properties_attr_group = {
3161 .attrs = tma300_properties_attrs,
3162};
3163
3164static struct kobject *properties_kobj;
3165
3166
3167
3168#define CYTTSP_TS_GPIO_IRQ 61
3169static int cyttsp_platform_init(struct i2c_client *client)
3170{
3171 int rc = -EINVAL;
3172 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3173
3174 if (machine_is_msm8x60_fluid()) {
3175 pm8058_l5 = regulator_get(NULL, "8058_l5");
3176 if (IS_ERR(pm8058_l5)) {
3177 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3178 __func__, PTR_ERR(pm8058_l5));
3179 rc = PTR_ERR(pm8058_l5);
3180 return rc;
3181 }
3182 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3183 if (rc) {
3184 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3185 __func__, rc);
3186 goto reg_l5_put;
3187 }
3188
3189 rc = regulator_enable(pm8058_l5);
3190 if (rc) {
3191 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3192 __func__, rc);
3193 goto reg_l5_put;
3194 }
3195 }
3196 /* vote for s3 to enable i2c communication lines */
3197 pm8058_s3 = regulator_get(NULL, "8058_s3");
3198 if (IS_ERR(pm8058_s3)) {
3199 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3200 __func__, PTR_ERR(pm8058_s3));
3201 rc = PTR_ERR(pm8058_s3);
3202 goto reg_l5_disable;
3203 }
3204
3205 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3206 if (rc) {
3207 pr_err("%s: regulator_set_voltage() = %d\n",
3208 __func__, rc);
3209 goto reg_s3_put;
3210 }
3211
3212 rc = regulator_enable(pm8058_s3);
3213 if (rc) {
3214 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3215 __func__, rc);
3216 goto reg_s3_put;
3217 }
3218
3219 /* wait for vregs to stabilize */
3220 usleep_range(10000, 10000);
3221
3222 /* check this device active by reading first byte/register */
3223 rc = i2c_smbus_read_byte_data(client, 0x01);
3224 if (rc < 0) {
3225 pr_err("%s: i2c sanity check failed\n", __func__);
3226 goto reg_s3_disable;
3227 }
3228
3229 /* virtual keys */
3230 if (machine_is_msm8x60_fluid()) {
3231 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3232 properties_kobj = kobject_create_and_add("board_properties",
3233 NULL);
3234 if (properties_kobj)
3235 rc = sysfs_create_group(properties_kobj,
3236 &tma300_properties_attr_group);
3237 if (!properties_kobj || rc)
3238 pr_err("%s: failed to create board_properties\n",
3239 __func__);
3240 }
3241 return CY_OK;
3242
3243reg_s3_disable:
3244 regulator_disable(pm8058_s3);
3245reg_s3_put:
3246 regulator_put(pm8058_s3);
3247reg_l5_disable:
3248 if (machine_is_msm8x60_fluid())
3249 regulator_disable(pm8058_l5);
3250reg_l5_put:
3251 if (machine_is_msm8x60_fluid())
3252 regulator_put(pm8058_l5);
3253 return rc;
3254}
3255
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303256/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3257static int cyttsp_platform_suspend(struct i2c_client *client)
3258{
3259 msleep(20);
3260
3261 return CY_OK;
3262}
3263
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003264static int cyttsp_platform_resume(struct i2c_client *client)
3265{
3266 /* add any special code to strobe a wakeup pin or chip reset */
3267 msleep(10);
3268
3269 return CY_OK;
3270}
3271
3272static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3273 .flags = 0x04,
3274 .gen = CY_GEN3, /* or */
3275 .use_st = CY_USE_ST,
3276 .use_mt = CY_USE_MT,
3277 .use_hndshk = CY_SEND_HNDSHK,
3278 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303279 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003280 .use_gestures = CY_USE_GESTURES,
3281 /* activate up to 4 groups
3282 * and set active distance
3283 */
3284 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3285 CY_GEST_GRP3 | CY_GEST_GRP4 |
3286 CY_ACT_DIST,
3287 /* change act_intrvl to customize the Active power state
3288 * scanning/processing refresh interval for Operating mode
3289 */
3290 .act_intrvl = CY_ACT_INTRVL_DFLT,
3291 /* change tch_tmout to customize the touch timeout for the
3292 * Active power state for Operating mode
3293 */
3294 .tch_tmout = CY_TCH_TMOUT_DFLT,
3295 /* change lp_intrvl to customize the Low Power power state
3296 * scanning/processing refresh interval for Operating mode
3297 */
3298 .lp_intrvl = CY_LP_INTRVL_DFLT,
3299 .sleep_gpio = -1,
3300 .resout_gpio = -1,
3301 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3302 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303303 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003304 .init = cyttsp_platform_init,
3305};
3306
3307static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3308 .panel_maxx = 1083,
3309 .panel_maxy = 659,
3310 .disp_minx = 30,
3311 .disp_maxx = 1053,
3312 .disp_miny = 30,
3313 .disp_maxy = 629,
3314 .correct_fw_ver = 8,
3315 .fw_fname = "cyttsp_8660_ffa.hex",
3316 .flags = 0x00,
3317 .gen = CY_GEN2, /* or */
3318 .use_st = CY_USE_ST,
3319 .use_mt = CY_USE_MT,
3320 .use_hndshk = CY_SEND_HNDSHK,
3321 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303322 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003323 .use_gestures = CY_USE_GESTURES,
3324 /* activate up to 4 groups
3325 * and set active distance
3326 */
3327 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3328 CY_GEST_GRP3 | CY_GEST_GRP4 |
3329 CY_ACT_DIST,
3330 /* change act_intrvl to customize the Active power state
3331 * scanning/processing refresh interval for Operating mode
3332 */
3333 .act_intrvl = CY_ACT_INTRVL_DFLT,
3334 /* change tch_tmout to customize the touch timeout for the
3335 * Active power state for Operating mode
3336 */
3337 .tch_tmout = CY_TCH_TMOUT_DFLT,
3338 /* change lp_intrvl to customize the Low Power power state
3339 * scanning/processing refresh interval for Operating mode
3340 */
3341 .lp_intrvl = CY_LP_INTRVL_DFLT,
3342 .sleep_gpio = -1,
3343 .resout_gpio = -1,
3344 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3345 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303346 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003347 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303348 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003349};
3350static void cyttsp_set_params(void)
3351{
3352 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3353 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3354 cyttsp_fluid_pdata.panel_maxx = 539;
3355 cyttsp_fluid_pdata.panel_maxy = 994;
3356 cyttsp_fluid_pdata.disp_minx = 30;
3357 cyttsp_fluid_pdata.disp_maxx = 509;
3358 cyttsp_fluid_pdata.disp_miny = 60;
3359 cyttsp_fluid_pdata.disp_maxy = 859;
3360 cyttsp_fluid_pdata.correct_fw_ver = 4;
3361 } else {
3362 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3363 cyttsp_fluid_pdata.panel_maxx = 550;
3364 cyttsp_fluid_pdata.panel_maxy = 1013;
3365 cyttsp_fluid_pdata.disp_minx = 35;
3366 cyttsp_fluid_pdata.disp_maxx = 515;
3367 cyttsp_fluid_pdata.disp_miny = 69;
3368 cyttsp_fluid_pdata.disp_maxy = 869;
3369 cyttsp_fluid_pdata.correct_fw_ver = 5;
3370 }
3371
3372}
3373
3374static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3375 {
3376 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3377 .platform_data = &cyttsp_fluid_pdata,
3378#ifndef CY_USE_TIMER
3379 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3380#endif /* CY_USE_TIMER */
3381 },
3382};
3383
3384static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3385 {
3386 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3387 .platform_data = &cyttsp_tmg240_pdata,
3388#ifndef CY_USE_TIMER
3389 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3390#endif /* CY_USE_TIMER */
3391 },
3392};
3393#endif
3394
3395static struct regulator *vreg_tmg200;
3396
3397#define TS_PEN_IRQ_GPIO 61
3398static int tmg200_power(int vreg_on)
3399{
3400 int rc = -EINVAL;
3401
3402 if (!vreg_tmg200) {
3403 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3404 __func__, rc);
3405 return rc;
3406 }
3407
3408 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3409 regulator_disable(vreg_tmg200);
3410 if (rc < 0)
3411 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3412 __func__, vreg_on ? "enable" : "disable", rc);
3413
3414 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003415 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003416
3417 return rc;
3418}
3419
3420static int tmg200_dev_setup(bool enable)
3421{
3422 int rc;
3423
3424 if (enable) {
3425 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3426 if (IS_ERR(vreg_tmg200)) {
3427 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3428 __func__, PTR_ERR(vreg_tmg200));
3429 rc = PTR_ERR(vreg_tmg200);
3430 return rc;
3431 }
3432
3433 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3434 if (rc) {
3435 pr_err("%s: regulator_set_voltage() = %d\n",
3436 __func__, rc);
3437 goto reg_put;
3438 }
3439 } else {
3440 /* put voltage sources */
3441 regulator_put(vreg_tmg200);
3442 }
3443 return 0;
3444reg_put:
3445 regulator_put(vreg_tmg200);
3446 return rc;
3447}
3448
3449static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3450 .ts_name = "msm_tmg200_ts",
3451 .dis_min_x = 0,
3452 .dis_max_x = 1023,
3453 .dis_min_y = 0,
3454 .dis_max_y = 599,
3455 .min_tid = 0,
3456 .max_tid = 255,
3457 .min_touch = 0,
3458 .max_touch = 255,
3459 .min_width = 0,
3460 .max_width = 255,
3461 .power_on = tmg200_power,
3462 .dev_setup = tmg200_dev_setup,
3463 .nfingers = 2,
3464 .irq_gpio = TS_PEN_IRQ_GPIO,
3465 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3466};
3467
3468static struct i2c_board_info cy8ctmg200_board_info[] = {
3469 {
3470 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3471 .platform_data = &cy8ctmg200_pdata,
3472 }
3473};
3474
Zhang Chang Ken211df572011-07-05 19:16:39 -04003475static struct regulator *vreg_tma340;
3476
3477static int tma340_power(int vreg_on)
3478{
3479 int rc = -EINVAL;
3480
3481 if (!vreg_tma340) {
3482 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3483 __func__, rc);
3484 return rc;
3485 }
3486
3487 rc = vreg_on ? regulator_enable(vreg_tma340) :
3488 regulator_disable(vreg_tma340);
3489 if (rc < 0)
3490 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3491 __func__, vreg_on ? "enable" : "disable", rc);
3492
3493 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003494 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003495
3496 return rc;
3497}
3498
3499static struct kobject *tma340_prop_kobj;
3500
3501static int tma340_dragon_dev_setup(bool enable)
3502{
3503 int rc;
3504
3505 if (enable) {
3506 vreg_tma340 = regulator_get(NULL, "8901_l2");
3507 if (IS_ERR(vreg_tma340)) {
3508 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3509 __func__, PTR_ERR(vreg_tma340));
3510 rc = PTR_ERR(vreg_tma340);
3511 return rc;
3512 }
3513
3514 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3515 if (rc) {
3516 pr_err("%s: regulator_set_voltage() = %d\n",
3517 __func__, rc);
3518 goto reg_put;
3519 }
3520 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3521 tma340_prop_kobj = kobject_create_and_add("board_properties",
3522 NULL);
3523 if (tma340_prop_kobj) {
3524 rc = sysfs_create_group(tma340_prop_kobj,
3525 &tma300_properties_attr_group);
3526 if (rc) {
3527 kobject_put(tma340_prop_kobj);
3528 pr_err("%s: failed to create board_properties\n",
3529 __func__);
3530 goto reg_put;
3531 }
3532 }
3533
3534 } else {
3535 /* put voltage sources */
3536 regulator_put(vreg_tma340);
3537 /* destroy virtual keys */
3538 if (tma340_prop_kobj) {
3539 sysfs_remove_group(tma340_prop_kobj,
3540 &tma300_properties_attr_group);
3541 kobject_put(tma340_prop_kobj);
3542 }
3543 }
3544 return 0;
3545reg_put:
3546 regulator_put(vreg_tma340);
3547 return rc;
3548}
3549
3550
3551static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3552 .ts_name = "cy8ctma340",
3553 .dis_min_x = 0,
3554 .dis_max_x = 479,
3555 .dis_min_y = 0,
3556 .dis_max_y = 799,
3557 .min_tid = 0,
3558 .max_tid = 255,
3559 .min_touch = 0,
3560 .max_touch = 255,
3561 .min_width = 0,
3562 .max_width = 255,
3563 .power_on = tma340_power,
3564 .dev_setup = tma340_dragon_dev_setup,
3565 .nfingers = 2,
3566 .irq_gpio = TS_PEN_IRQ_GPIO,
3567 .resout_gpio = -1,
3568};
3569
3570static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3571 {
3572 I2C_BOARD_INFO("cy8ctma340", 0x24),
3573 .platform_data = &cy8ctma340_dragon_pdata,
3574 }
3575};
3576
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003577#ifdef CONFIG_SERIAL_MSM_HS
3578static int configure_uart_gpios(int on)
3579{
3580 int ret = 0, i;
3581 int uart_gpios[] = {53, 54, 55, 56};
3582 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3583 if (on) {
3584 ret = msm_gpiomux_get(uart_gpios[i]);
3585 if (unlikely(ret))
3586 break;
3587 } else {
3588 ret = msm_gpiomux_put(uart_gpios[i]);
3589 if (unlikely(ret))
3590 return ret;
3591 }
3592 }
3593 if (ret)
3594 for (; i >= 0; i--)
3595 msm_gpiomux_put(uart_gpios[i]);
3596 return ret;
3597}
3598static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3599 .inject_rx_on_wakeup = 1,
3600 .rx_to_inject = 0xFD,
3601 .gpio_config = configure_uart_gpios,
3602};
3603#endif
3604
3605
3606#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3607
3608static struct gpio_led gpio_exp_leds_config[] = {
3609 {
3610 .name = "left_led1:green",
3611 .gpio = GPIO_LEFT_LED_1,
3612 .active_low = 1,
3613 .retain_state_suspended = 0,
3614 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3615 },
3616 {
3617 .name = "left_led2:red",
3618 .gpio = GPIO_LEFT_LED_2,
3619 .active_low = 1,
3620 .retain_state_suspended = 0,
3621 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3622 },
3623 {
3624 .name = "left_led3:green",
3625 .gpio = GPIO_LEFT_LED_3,
3626 .active_low = 1,
3627 .retain_state_suspended = 0,
3628 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3629 },
3630 {
3631 .name = "wlan_led:orange",
3632 .gpio = GPIO_LEFT_LED_WLAN,
3633 .active_low = 1,
3634 .retain_state_suspended = 0,
3635 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3636 },
3637 {
3638 .name = "left_led5:green",
3639 .gpio = GPIO_LEFT_LED_5,
3640 .active_low = 1,
3641 .retain_state_suspended = 0,
3642 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3643 },
3644 {
3645 .name = "right_led1:green",
3646 .gpio = GPIO_RIGHT_LED_1,
3647 .active_low = 1,
3648 .retain_state_suspended = 0,
3649 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3650 },
3651 {
3652 .name = "right_led2:red",
3653 .gpio = GPIO_RIGHT_LED_2,
3654 .active_low = 1,
3655 .retain_state_suspended = 0,
3656 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3657 },
3658 {
3659 .name = "right_led3:green",
3660 .gpio = GPIO_RIGHT_LED_3,
3661 .active_low = 1,
3662 .retain_state_suspended = 0,
3663 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3664 },
3665 {
3666 .name = "bt_led:blue",
3667 .gpio = GPIO_RIGHT_LED_BT,
3668 .active_low = 1,
3669 .retain_state_suspended = 0,
3670 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3671 },
3672 {
3673 .name = "right_led5:green",
3674 .gpio = GPIO_RIGHT_LED_5,
3675 .active_low = 1,
3676 .retain_state_suspended = 0,
3677 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3678 },
3679};
3680
3681static struct gpio_led_platform_data gpio_leds_pdata = {
3682 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3683 .leds = gpio_exp_leds_config,
3684};
3685
3686static struct platform_device gpio_leds = {
3687 .name = "leds-gpio",
3688 .id = -1,
3689 .dev = {
3690 .platform_data = &gpio_leds_pdata,
3691 },
3692};
3693
3694static struct gpio_led fluid_gpio_leds[] = {
3695 {
3696 .name = "dual_led:green",
3697 .gpio = GPIO_LED1_GREEN_N,
3698 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3699 .active_low = 1,
3700 .retain_state_suspended = 0,
3701 },
3702 {
3703 .name = "dual_led:red",
3704 .gpio = GPIO_LED2_RED_N,
3705 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3706 .active_low = 1,
3707 .retain_state_suspended = 0,
3708 },
3709};
3710
3711static struct gpio_led_platform_data gpio_led_pdata = {
3712 .leds = fluid_gpio_leds,
3713 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3714};
3715
3716static struct platform_device fluid_leds_gpio = {
3717 .name = "leds-gpio",
3718 .id = -1,
3719 .dev = {
3720 .platform_data = &gpio_led_pdata,
3721 },
3722};
3723
3724#endif
3725
3726#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3727
3728static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3729 .phys_addr_base = 0x00106000,
3730 .reg_offsets = {
3731 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3732 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3733 },
3734 .phys_size = SZ_8K,
3735 .log_len = 4096, /* log's buffer length in bytes */
3736 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3737};
3738
3739static struct platform_device msm_rpm_log_device = {
3740 .name = "msm_rpm_log",
3741 .id = -1,
3742 .dev = {
3743 .platform_data = &msm_rpm_log_pdata,
3744 },
3745};
3746#endif
3747
3748#ifdef CONFIG_BATTERY_MSM8X60
3749static struct msm_charger_platform_data msm_charger_data = {
3750 .safety_time = 180,
3751 .update_time = 1,
3752 .max_voltage = 4200,
3753 .min_voltage = 3200,
3754};
3755
3756static struct platform_device msm_charger_device = {
3757 .name = "msm-charger",
3758 .id = -1,
3759 .dev = {
3760 .platform_data = &msm_charger_data,
3761 }
3762};
3763#endif
3764
3765/*
3766 * Consumer specific regulator names:
3767 * regulator name consumer dev_name
3768 */
3769static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3770 REGULATOR_SUPPLY("8058_l0", NULL),
3771};
3772static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3773 REGULATOR_SUPPLY("8058_l1", NULL),
3774};
3775static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3776 REGULATOR_SUPPLY("8058_l2", NULL),
3777};
3778static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3779 REGULATOR_SUPPLY("8058_l3", NULL),
3780};
3781static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3782 REGULATOR_SUPPLY("8058_l4", NULL),
3783};
3784static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3785 REGULATOR_SUPPLY("8058_l5", NULL),
3786};
3787static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3788 REGULATOR_SUPPLY("8058_l6", NULL),
3789};
3790static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3791 REGULATOR_SUPPLY("8058_l7", NULL),
3792};
3793static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3794 REGULATOR_SUPPLY("8058_l8", NULL),
3795};
3796static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3797 REGULATOR_SUPPLY("8058_l9", NULL),
3798};
3799static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3800 REGULATOR_SUPPLY("8058_l10", NULL),
3801};
3802static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3803 REGULATOR_SUPPLY("8058_l11", NULL),
3804};
3805static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3806 REGULATOR_SUPPLY("8058_l12", NULL),
3807};
3808static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3809 REGULATOR_SUPPLY("8058_l13", NULL),
3810};
3811static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3812 REGULATOR_SUPPLY("8058_l14", NULL),
3813};
3814static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3815 REGULATOR_SUPPLY("8058_l15", NULL),
3816};
3817static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3818 REGULATOR_SUPPLY("8058_l16", NULL),
3819};
3820static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3821 REGULATOR_SUPPLY("8058_l17", NULL),
3822};
3823static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3824 REGULATOR_SUPPLY("8058_l18", NULL),
3825};
3826static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3827 REGULATOR_SUPPLY("8058_l19", NULL),
3828};
3829static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3830 REGULATOR_SUPPLY("8058_l20", NULL),
3831};
3832static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3833 REGULATOR_SUPPLY("8058_l21", NULL),
3834};
3835static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3836 REGULATOR_SUPPLY("8058_l22", NULL),
3837};
3838static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3839 REGULATOR_SUPPLY("8058_l23", NULL),
3840};
3841static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3842 REGULATOR_SUPPLY("8058_l24", NULL),
3843};
3844static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3845 REGULATOR_SUPPLY("8058_l25", NULL),
3846};
3847static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3848 REGULATOR_SUPPLY("8058_s0", NULL),
3849};
3850static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3851 REGULATOR_SUPPLY("8058_s1", NULL),
3852};
3853static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3854 REGULATOR_SUPPLY("8058_s2", NULL),
3855};
3856static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3857 REGULATOR_SUPPLY("8058_s3", NULL),
3858};
3859static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3860 REGULATOR_SUPPLY("8058_s4", NULL),
3861};
3862static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3863 REGULATOR_SUPPLY("8058_lvs0", NULL),
3864};
3865static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3866 REGULATOR_SUPPLY("8058_lvs1", NULL),
3867};
3868static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3869 REGULATOR_SUPPLY("8058_ncp", NULL),
3870};
3871
3872static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3873 REGULATOR_SUPPLY("8901_l0", NULL),
3874};
3875static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3876 REGULATOR_SUPPLY("8901_l1", NULL),
3877};
3878static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3879 REGULATOR_SUPPLY("8901_l2", NULL),
3880};
3881static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3882 REGULATOR_SUPPLY("8901_l3", NULL),
3883};
3884static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3885 REGULATOR_SUPPLY("8901_l4", NULL),
3886};
3887static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3888 REGULATOR_SUPPLY("8901_l5", NULL),
3889};
3890static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3891 REGULATOR_SUPPLY("8901_l6", NULL),
3892};
3893static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3894 REGULATOR_SUPPLY("8901_s2", NULL),
3895};
3896static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3897 REGULATOR_SUPPLY("8901_s3", NULL),
3898};
3899static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3900 REGULATOR_SUPPLY("8901_s4", NULL),
3901};
3902static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3903 REGULATOR_SUPPLY("8901_lvs0", NULL),
3904};
3905static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3906 REGULATOR_SUPPLY("8901_lvs1", NULL),
3907};
3908static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3909 REGULATOR_SUPPLY("8901_lvs2", NULL),
3910};
3911static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3912 REGULATOR_SUPPLY("8901_lvs3", NULL),
3913};
3914static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3915 REGULATOR_SUPPLY("8901_mvs0", NULL),
3916};
3917
David Collins6f032ba2011-08-31 14:08:15 -07003918/* Pin control regulators */
3919static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3920 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3921};
3922static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3923 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3924};
3925static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3926 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3927};
3928static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3929 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3930};
3931static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3932 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3933};
3934static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3935 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3936};
3937
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003938#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3939 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003940 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003941 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003942 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003943 .init_data = { \
3944 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003945 .valid_modes_mask = _modes, \
3946 .valid_ops_mask = _ops, \
3947 .min_uV = _min_uV, \
3948 .max_uV = _max_uV, \
3949 .input_uV = _min_uV, \
3950 .apply_uV = _apply_uV, \
3951 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003952 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003953 .consumer_supplies = vreg_consumers_##_id, \
3954 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003955 ARRAY_SIZE(vreg_consumers_##_id), \
3956 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003957 .id = RPM_VREG_ID_##_id, \
3958 .default_uV = _default_uV, \
3959 .peak_uA = _peak_uA, \
3960 .avg_uA = _avg_uA, \
3961 .pull_down_enable = _pull_down, \
3962 .pin_ctrl = _pin_ctrl, \
3963 .freq = RPM_VREG_FREQ_##_freq, \
3964 .pin_fn = _pin_fn, \
3965 .force_mode = _force_mode, \
3966 .state = _state, \
3967 .sleep_selectable = _sleep_selectable, \
3968 }
3969
3970/* Pin control initialization */
3971#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3972 { \
3973 .init_data = { \
3974 .constraints = { \
3975 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3976 .always_on = _always_on, \
3977 }, \
3978 .num_consumer_supplies = \
3979 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3980 .consumer_supplies = vreg_consumers_##_id##_PC, \
3981 }, \
3982 .id = RPM_VREG_ID_##_id##_PC, \
3983 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003984 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003985 }
3986
3987/*
3988 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3989 * via the peak_uA value specified in the table below. If the value is less
3990 * than the high power min threshold for the regulator, then the regulator will
3991 * be set to LPM. Otherwise, it will be set to HPM.
3992 *
3993 * This value can be further overridden by specifying an initial mode via
3994 * .init_data.constraints.initial_mode.
3995 */
3996
David Collins6f032ba2011-08-31 14:08:15 -07003997#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
3998 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003999 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4000 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4001 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4002 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4003 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004004 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4005 RPM_VREG_PIN_FN_8660_ENABLE, \
4006 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004007 _sleep_selectable, _always_on)
4008
David Collins6f032ba2011-08-31 14:08:15 -07004009#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4010 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004011 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4012 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4013 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4014 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4015 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004016 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4017 RPM_VREG_PIN_FN_8660_ENABLE, \
4018 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4019 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004020
David Collins6f032ba2011-08-31 14:08:15 -07004021#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004022 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4023 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004024 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4025 RPM_VREG_PIN_FN_8660_ENABLE, \
4026 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4027 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004028
David Collins6f032ba2011-08-31 14:08:15 -07004029#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004030 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4031 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004032 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4033 RPM_VREG_PIN_FN_8660_ENABLE, \
4034 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4035 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004036
David Collins6f032ba2011-08-31 14:08:15 -07004037#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4038#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4039#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4040#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4041#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004042
David Collins6f032ba2011-08-31 14:08:15 -07004043/* RPM early regulator constraints */
4044static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4045 /* ID a_on pd ss min_uV max_uV init_ip freq */
4046 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4047 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004048};
4049
David Collins6f032ba2011-08-31 14:08:15 -07004050/* RPM regulator constraints */
4051static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4052 /* ID a_on pd ss min_uV max_uV init_ip */
4053 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4054 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4055 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4056 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4057 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4058 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4059 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4060 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4061 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4062 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4063 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4064 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4065 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4066 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4067 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4068 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4069 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4070 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4071 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4072 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4073 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4074 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4075 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4076 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4077 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4078 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004079
David Collins6f032ba2011-08-31 14:08:15 -07004080 /* ID a_on pd ss min_uV max_uV init_ip freq */
4081 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4082 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4083 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4084
4085 /* ID a_on pd ss */
4086 RPM_VS(PM8058_LVS0, 0, 1, 0),
4087 RPM_VS(PM8058_LVS1, 0, 1, 0),
4088
4089 /* ID a_on pd ss min_uV max_uV */
4090 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4091
4092 /* ID a_on pd ss min_uV max_uV init_ip */
4093 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4094 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4095 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4096 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4097 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4098 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4099 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4100
4101 /* ID a_on pd ss min_uV max_uV init_ip freq */
4102 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4103 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4104 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4105
4106 /* ID a_on pd ss */
4107 RPM_VS(PM8901_LVS0, 1, 1, 0),
4108 RPM_VS(PM8901_LVS1, 0, 1, 0),
4109 RPM_VS(PM8901_LVS2, 0, 1, 0),
4110 RPM_VS(PM8901_LVS3, 0, 1, 0),
4111 RPM_VS(PM8901_MVS0, 0, 1, 0),
4112
4113 /* ID a_on pin_func pin_ctrl */
4114 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4115 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4116 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4117 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4118 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4119 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4120};
4121
4122static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4123 .init_data = rpm_regulator_early_init_data,
4124 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4125 .version = RPM_VREG_VERSION_8660,
4126 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4127 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4128};
4129
4130static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4131 .init_data = rpm_regulator_init_data,
4132 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4133 .version = RPM_VREG_VERSION_8660,
4134};
4135
4136static struct platform_device rpm_regulator_early_device = {
4137 .name = "rpm-regulator",
4138 .id = 0,
4139 .dev = {
4140 .platform_data = &rpm_regulator_early_pdata,
4141 },
4142};
4143
4144static struct platform_device rpm_regulator_device = {
4145 .name = "rpm-regulator",
4146 .id = 1,
4147 .dev = {
4148 .platform_data = &rpm_regulator_pdata,
4149 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004150};
4151
4152static struct platform_device *early_regulators[] __initdata = {
4153 &msm_device_saw_s0,
4154 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004155 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004156};
4157
4158static struct platform_device *early_devices[] __initdata = {
4159#ifdef CONFIG_MSM_BUS_SCALING
4160 &msm_bus_apps_fabric,
4161 &msm_bus_sys_fabric,
4162 &msm_bus_mm_fabric,
4163 &msm_bus_sys_fpb,
4164 &msm_bus_cpss_fpb,
4165#endif
4166 &msm_device_dmov_adm0,
4167 &msm_device_dmov_adm1,
4168};
4169
4170#if (defined(CONFIG_MARIMBA_CORE)) && \
4171 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4172
4173static int bluetooth_power(int);
4174static struct platform_device msm_bt_power_device = {
4175 .name = "bt_power",
4176 .id = -1,
4177 .dev = {
4178 .platform_data = &bluetooth_power,
4179 },
4180};
4181#endif
4182
4183static struct platform_device msm_tsens_device = {
4184 .name = "tsens-tm",
4185 .id = -1,
4186};
4187
4188static struct platform_device *rumi_sim_devices[] __initdata = {
4189 &smc91x_device,
4190 &msm_device_uart_dm12,
4191#ifdef CONFIG_I2C_QUP
4192 &msm_gsbi3_qup_i2c_device,
4193 &msm_gsbi4_qup_i2c_device,
4194 &msm_gsbi7_qup_i2c_device,
4195 &msm_gsbi8_qup_i2c_device,
4196 &msm_gsbi9_qup_i2c_device,
4197 &msm_gsbi12_qup_i2c_device,
4198#endif
4199#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004200 &msm_device_ssbi3,
4201#endif
4202#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004203#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004204 &android_pmem_device,
4205 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004206 &android_pmem_smipool_device,
4207#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004208 &android_pmem_audio_device,
4209#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004210#ifdef CONFIG_MSM_ROTATOR
4211 &msm_rotator_device,
4212#endif
4213 &msm_fb_device,
4214 &msm_kgsl_3d0,
4215 &msm_kgsl_2d0,
4216 &msm_kgsl_2d1,
4217 &lcdc_samsung_panel_device,
4218#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4219 &hdmi_msm_device,
4220#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4221#ifdef CONFIG_MSM_CAMERA
4222#ifdef CONFIG_MT9E013
4223 &msm_camera_sensor_mt9e013,
4224#endif
4225#ifdef CONFIG_IMX074
4226 &msm_camera_sensor_imx074,
4227#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004228#ifdef CONFIG_VX6953
4229 &msm_camera_sensor_vx6953,
4230#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004231#ifdef CONFIG_WEBCAM_OV7692
4232 &msm_camera_sensor_webcam_ov7692,
4233#endif
4234#ifdef CONFIG_WEBCAM_OV9726
4235 &msm_camera_sensor_webcam_ov9726,
4236#endif
4237#ifdef CONFIG_QS_S5K4E1
4238 &msm_camera_sensor_qs_s5k4e1,
4239#endif
4240#endif
4241#ifdef CONFIG_MSM_GEMINI
4242 &msm_gemini_device,
4243#endif
4244#ifdef CONFIG_MSM_VPE
4245 &msm_vpe_device,
4246#endif
4247 &msm_device_vidc,
4248};
4249
4250#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4251enum {
4252 SX150X_CORE,
4253 SX150X_DOCKING,
4254 SX150X_SURF,
4255 SX150X_LEFT_FHA,
4256 SX150X_RIGHT_FHA,
4257 SX150X_SOUTH,
4258 SX150X_NORTH,
4259 SX150X_CORE_FLUID,
4260};
4261
4262static struct sx150x_platform_data sx150x_data[] __initdata = {
4263 [SX150X_CORE] = {
4264 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4265 .oscio_is_gpo = false,
4266 .io_pullup_ena = 0x0c08,
4267 .io_pulldn_ena = 0x4060,
4268 .io_open_drain_ena = 0x000c,
4269 .io_polarity = 0,
4270 .irq_summary = -1, /* see fixup_i2c_configs() */
4271 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4272 },
4273 [SX150X_DOCKING] = {
4274 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4275 .oscio_is_gpo = false,
4276 .io_pullup_ena = 0x5e06,
4277 .io_pulldn_ena = 0x81b8,
4278 .io_open_drain_ena = 0,
4279 .io_polarity = 0,
4280 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4281 UI_INT2_N),
4282 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4283 GPIO_DOCKING_EXPANDER_BASE -
4284 GPIO_EXPANDER_GPIO_BASE,
4285 },
4286 [SX150X_SURF] = {
4287 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4288 .oscio_is_gpo = false,
4289 .io_pullup_ena = 0,
4290 .io_pulldn_ena = 0,
4291 .io_open_drain_ena = 0,
4292 .io_polarity = 0,
4293 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4294 UI_INT1_N),
4295 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4296 GPIO_SURF_EXPANDER_BASE -
4297 GPIO_EXPANDER_GPIO_BASE,
4298 },
4299 [SX150X_LEFT_FHA] = {
4300 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4301 .oscio_is_gpo = false,
4302 .io_pullup_ena = 0,
4303 .io_pulldn_ena = 0x40,
4304 .io_open_drain_ena = 0,
4305 .io_polarity = 0,
4306 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4307 UI_INT3_N),
4308 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4309 GPIO_LEFT_KB_EXPANDER_BASE -
4310 GPIO_EXPANDER_GPIO_BASE,
4311 },
4312 [SX150X_RIGHT_FHA] = {
4313 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4314 .oscio_is_gpo = true,
4315 .io_pullup_ena = 0,
4316 .io_pulldn_ena = 0,
4317 .io_open_drain_ena = 0,
4318 .io_polarity = 0,
4319 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4320 UI_INT3_N),
4321 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4322 GPIO_RIGHT_KB_EXPANDER_BASE -
4323 GPIO_EXPANDER_GPIO_BASE,
4324 },
4325 [SX150X_SOUTH] = {
4326 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4327 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4328 GPIO_SOUTH_EXPANDER_BASE -
4329 GPIO_EXPANDER_GPIO_BASE,
4330 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4331 },
4332 [SX150X_NORTH] = {
4333 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4334 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4335 GPIO_NORTH_EXPANDER_BASE -
4336 GPIO_EXPANDER_GPIO_BASE,
4337 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4338 .oscio_is_gpo = true,
4339 .io_open_drain_ena = 0x30,
4340 },
4341 [SX150X_CORE_FLUID] = {
4342 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4343 .oscio_is_gpo = false,
4344 .io_pullup_ena = 0x0408,
4345 .io_pulldn_ena = 0x4060,
4346 .io_open_drain_ena = 0x0008,
4347 .io_polarity = 0,
4348 .irq_summary = -1, /* see fixup_i2c_configs() */
4349 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4350 },
4351};
4352
4353#ifdef CONFIG_SENSORS_MSM_ADC
4354/* Configuration of EPM expander is done when client
4355 * request an adc read
4356 */
4357static struct sx150x_platform_data sx150x_epmdata = {
4358 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4359 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4360 GPIO_EPM_EXPANDER_BASE -
4361 GPIO_EXPANDER_GPIO_BASE,
4362 .irq_summary = -1,
4363};
4364#endif
4365
4366/* sx150x_low_power_cfg
4367 *
4368 * This data and init function are used to put unused gpio-expander output
4369 * lines into their low-power states at boot. The init
4370 * function must be deferred until a later init stage because the i2c
4371 * gpio expander drivers do not probe until after they are registered
4372 * (see register_i2c_devices) and the work-queues for those registrations
4373 * are processed. Because these lines are unused, there is no risk of
4374 * competing with a device driver for the gpio.
4375 *
4376 * gpio lines whose low-power states are input are naturally in their low-
4377 * power configurations once probed, see the platform data structures above.
4378 */
4379struct sx150x_low_power_cfg {
4380 unsigned gpio;
4381 unsigned val;
4382};
4383
4384static struct sx150x_low_power_cfg
4385common_sx150x_lp_cfgs[] __initdata = {
4386 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4387 {GPIO_EXT_GPS_LNA_EN, 0},
4388 {GPIO_MSM_WAKES_BT, 0},
4389 {GPIO_USB_UICC_EN, 0},
4390 {GPIO_BATT_GAUGE_EN, 0},
4391};
4392
4393static struct sx150x_low_power_cfg
4394surf_ffa_sx150x_lp_cfgs[] __initdata = {
4395 {GPIO_MIPI_DSI_RST_N, 0},
4396 {GPIO_DONGLE_PWR_EN, 0},
4397 {GPIO_CAP_TS_SLEEP, 1},
4398 {GPIO_WEB_CAMIF_RESET_N, 0},
4399};
4400
4401static void __init
4402cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4403{
4404 unsigned n;
4405 int rc;
4406
4407 for (n = 0; n < nelems; ++n) {
4408 rc = gpio_request(cfgs[n].gpio, NULL);
4409 if (!rc) {
4410 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4411 gpio_free(cfgs[n].gpio);
4412 }
4413
4414 if (rc) {
4415 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4416 __func__, cfgs[n].gpio, rc);
4417 }
Steve Muckle9161d302010-02-11 11:50:40 -08004418 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004419}
4420
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004421static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004422{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004423 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4424 ARRAY_SIZE(common_sx150x_lp_cfgs));
4425 if (!machine_is_msm8x60_fluid())
4426 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4427 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4428 return 0;
4429}
4430module_init(cfg_sx150xs_low_power);
4431
4432#ifdef CONFIG_I2C
4433static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4434 {
4435 I2C_BOARD_INFO("sx1509q", 0x3e),
4436 .platform_data = &sx150x_data[SX150X_CORE]
4437 },
4438};
4439
4440static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4441 {
4442 I2C_BOARD_INFO("sx1509q", 0x3f),
4443 .platform_data = &sx150x_data[SX150X_DOCKING]
4444 },
4445};
4446
4447static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4448 {
4449 I2C_BOARD_INFO("sx1509q", 0x70),
4450 .platform_data = &sx150x_data[SX150X_SURF]
4451 }
4452};
4453
4454static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4455 {
4456 I2C_BOARD_INFO("sx1508q", 0x21),
4457 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4458 },
4459 {
4460 I2C_BOARD_INFO("sx1508q", 0x22),
4461 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4462 }
4463};
4464
4465static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4466 {
4467 I2C_BOARD_INFO("sx1508q", 0x23),
4468 .platform_data = &sx150x_data[SX150X_SOUTH]
4469 },
4470 {
4471 I2C_BOARD_INFO("sx1508q", 0x20),
4472 .platform_data = &sx150x_data[SX150X_NORTH]
4473 }
4474};
4475
4476static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4477 {
4478 I2C_BOARD_INFO("sx1509q", 0x3e),
4479 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4480 },
4481};
4482
4483#ifdef CONFIG_SENSORS_MSM_ADC
4484static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4485 {
4486 I2C_BOARD_INFO("sx1509q", 0x3e),
4487 .platform_data = &sx150x_epmdata
4488 },
4489};
4490#endif
4491#endif
4492#endif
4493
4494#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004495
4496static struct adc_access_fn xoadc_fn = {
4497 pm8058_xoadc_select_chan_and_start_conv,
4498 pm8058_xoadc_read_adc_code,
4499 pm8058_xoadc_get_properties,
4500 pm8058_xoadc_slot_request,
4501 pm8058_xoadc_restore_slot,
4502 pm8058_xoadc_calibrate,
4503};
4504
4505#if defined(CONFIG_I2C) && \
4506 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4507static struct regulator *vreg_adc_epm1;
4508
4509static struct i2c_client *epm_expander_i2c_register_board(void)
4510
4511{
4512 struct i2c_adapter *i2c_adap;
4513 struct i2c_client *client = NULL;
4514 i2c_adap = i2c_get_adapter(0x0);
4515
4516 if (i2c_adap == NULL)
4517 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4518
4519 if (i2c_adap != NULL)
4520 client = i2c_new_device(i2c_adap,
4521 &fluid_expanders_i2c_epm_info[0]);
4522 return client;
4523
4524}
4525
4526static unsigned int msm_adc_gpio_configure_expander_enable(void)
4527{
4528 int rc = 0;
4529 static struct i2c_client *epm_i2c_client;
4530
4531 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4532
4533 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4534
4535 if (IS_ERR(vreg_adc_epm1)) {
4536 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4537 return 0;
4538 }
4539
4540 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4541 if (rc)
4542 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4543 "regulator set voltage failed\n");
4544
4545 rc = regulator_enable(vreg_adc_epm1);
4546 if (rc) {
4547 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4548 "Error while enabling regulator for epm s3 %d\n", rc);
4549 return rc;
4550 }
4551
4552 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4553 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4554
4555 msleep(1000);
4556
4557 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4558 if (!rc) {
4559 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4560 "Configure 5v boost\n");
4561 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4562 } else {
4563 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4564 "Error for epm 5v boost en\n");
4565 goto exit_vreg_epm;
4566 }
4567
4568 msleep(500);
4569
4570 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4571 if (!rc) {
4572 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4573 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4574 "Configure epm 3.3v\n");
4575 } else {
4576 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4577 "Error for gpio 3.3ven\n");
4578 goto exit_vreg_epm;
4579 }
4580 msleep(500);
4581
4582 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4583 "Trying to request EPM LVLSFT_EN\n");
4584 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4585 if (!rc) {
4586 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4587 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4588 "Configure the lvlsft\n");
4589 } else {
4590 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4591 "Error for epm lvlsft_en\n");
4592 goto exit_vreg_epm;
4593 }
4594
4595 msleep(500);
4596
4597 if (!epm_i2c_client)
4598 epm_i2c_client = epm_expander_i2c_register_board();
4599
4600 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4601 if (!rc)
4602 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4603 if (rc) {
4604 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4605 ": GPIO PWR MON Enable issue\n");
4606 goto exit_vreg_epm;
4607 }
4608
4609 msleep(1000);
4610
4611 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4612 if (!rc) {
4613 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4614 if (rc) {
4615 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4616 ": ADC1_PWDN error direction out\n");
4617 goto exit_vreg_epm;
4618 }
4619 }
4620
4621 msleep(100);
4622
4623 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4624 if (!rc) {
4625 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4626 if (rc) {
4627 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4628 ": ADC2_PWD error direction out\n");
4629 goto exit_vreg_epm;
4630 }
4631 }
4632
4633 msleep(1000);
4634
4635 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4636 if (!rc) {
4637 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4638 if (rc) {
4639 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4640 "Gpio request problem %d\n", rc);
4641 goto exit_vreg_epm;
4642 }
4643 }
4644
4645 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4646 if (!rc) {
4647 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4648 if (rc) {
4649 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4650 ": EPM_SPI_ADC1_CS_N error\n");
4651 goto exit_vreg_epm;
4652 }
4653 }
4654
4655 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4656 if (!rc) {
4657 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4658 if (rc) {
4659 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4660 ": EPM_SPI_ADC2_Cs_N error\n");
4661 goto exit_vreg_epm;
4662 }
4663 }
4664
4665 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4666 "the power monitor reset for epm\n");
4667
4668 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4669 if (!rc) {
4670 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4671 if (rc) {
4672 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4673 ": Error in the power mon reset\n");
4674 goto exit_vreg_epm;
4675 }
4676 }
4677
4678 msleep(1000);
4679
4680 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4681
4682 msleep(500);
4683
4684 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4685
4686 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4687
4688 return rc;
4689
4690exit_vreg_epm:
4691 regulator_disable(vreg_adc_epm1);
4692
4693 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4694 " rc = %d.\n", rc);
4695 return rc;
4696};
4697
4698static unsigned int msm_adc_gpio_configure_expander_disable(void)
4699{
4700 int rc = 0;
4701
4702 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4703 gpio_free(GPIO_PWR_MON_RESET_N);
4704
4705 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4706 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4707
4708 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4709 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4710
4711 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4712 gpio_free(GPIO_PWR_MON_START);
4713
4714 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4715 gpio_free(GPIO_ADC1_PWDN_N);
4716
4717 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4718 gpio_free(GPIO_ADC2_PWDN_N);
4719
4720 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4721 gpio_free(GPIO_PWR_MON_ENABLE);
4722
4723 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4724 gpio_free(GPIO_EPM_LVLSFT_EN);
4725
4726 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4727 gpio_free(GPIO_EPM_5V_BOOST_EN);
4728
4729 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4730 gpio_free(GPIO_EPM_3_3V_EN);
4731
4732 rc = regulator_disable(vreg_adc_epm1);
4733 if (rc)
4734 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4735 "Error while enabling regulator for epm s3 %d\n", rc);
4736 regulator_put(vreg_adc_epm1);
4737
4738 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4739 return rc;
4740};
4741
4742unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4743{
4744 int rc = 0;
4745
4746 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4747 cs_enable);
4748
4749 if (cs_enable < 16) {
4750 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4751 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4752 } else {
4753 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4754 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4755 }
4756 return rc;
4757};
4758
4759unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4760{
4761 int rc = 0;
4762
4763 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4764
4765 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4766
4767 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4768
4769 return rc;
4770};
4771#endif
4772
4773static struct msm_adc_channels msm_adc_channels_data[] = {
4774 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4775 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4776 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4777 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4778 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4779 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4780 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4781 CHAN_PATH_TYPE4,
4782 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4783 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4784 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4785 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4786 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4787 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4788 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4789 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4790 CHAN_PATH_TYPE12,
4791 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4792 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4793 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4794 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4795 CHAN_PATH_TYPE_NONE,
4796 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4797 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4798 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4799 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4800 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4801 scale_xtern_chgr_cur},
4802 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4803 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4804 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4805 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4806 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4807 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4808 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4809 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4810 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4811 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4812 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4813 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4814};
4815
4816static char *msm_adc_fluid_device_names[] = {
4817 "ADS_ADC1",
4818 "ADS_ADC2",
4819};
4820
4821static struct msm_adc_platform_data msm_adc_pdata = {
4822 .channel = msm_adc_channels_data,
4823 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4824#if defined(CONFIG_I2C) && \
4825 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4826 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4827 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4828 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4829 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4830#endif
4831};
4832
4833static struct platform_device msm_adc_device = {
4834 .name = "msm_adc",
4835 .id = -1,
4836 .dev = {
4837 .platform_data = &msm_adc_pdata,
4838 },
4839};
4840
4841static void pmic8058_xoadc_mpp_config(void)
4842{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304843 int rc, i;
4844 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304845 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304846 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304847 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304848 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304849 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304850 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304851 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304852 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304853 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304854 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304855 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4856 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304857 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004858
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304859 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4860 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4861 &xoadc_mpps[i].config);
4862 if (rc) {
4863 pr_err("%s: Config MPP %d of PM8058 failed\n",
4864 __func__, xoadc_mpps[i].mpp);
4865 }
4866 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004867}
4868
4869static struct regulator *vreg_ldo18_adc;
4870
4871static int pmic8058_xoadc_vreg_config(int on)
4872{
4873 int rc;
4874
4875 if (on) {
4876 rc = regulator_enable(vreg_ldo18_adc);
4877 if (rc)
4878 pr_err("%s: Enable of regulator ldo18_adc "
4879 "failed\n", __func__);
4880 } else {
4881 rc = regulator_disable(vreg_ldo18_adc);
4882 if (rc)
4883 pr_err("%s: Disable of regulator ldo18_adc "
4884 "failed\n", __func__);
4885 }
4886
4887 return rc;
4888}
4889
4890static int pmic8058_xoadc_vreg_setup(void)
4891{
4892 int rc;
4893
4894 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4895 if (IS_ERR(vreg_ldo18_adc)) {
4896 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4897 __func__, PTR_ERR(vreg_ldo18_adc));
4898 rc = PTR_ERR(vreg_ldo18_adc);
4899 goto fail;
4900 }
4901
4902 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4903 if (rc) {
4904 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4905 goto fail;
4906 }
4907
4908 return rc;
4909fail:
4910 regulator_put(vreg_ldo18_adc);
4911 return rc;
4912}
4913
4914static void pmic8058_xoadc_vreg_shutdown(void)
4915{
4916 regulator_put(vreg_ldo18_adc);
4917}
4918
4919/* usec. For this ADC,
4920 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4921 * Each channel has different configuration, thus at the time of starting
4922 * the conversion, xoadc will return actual conversion time
4923 * */
4924static struct adc_properties pm8058_xoadc_data = {
4925 .adc_reference = 2200, /* milli-voltage for this adc */
4926 .bitresolution = 15,
4927 .bipolar = 0,
4928 .conversiontime = 54,
4929};
4930
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304931static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004932 .xoadc_prop = &pm8058_xoadc_data,
4933 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4934 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4935 .xoadc_num = XOADC_PMIC_0,
4936 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4937 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4938};
4939#endif
4940
4941#ifdef CONFIG_MSM_SDIO_AL
4942
4943static unsigned mdm2ap_status = 140;
4944
4945static int configure_mdm2ap_status(int on)
4946{
4947 int ret = 0;
4948 if (on)
4949 ret = msm_gpiomux_get(mdm2ap_status);
4950 else
4951 ret = msm_gpiomux_put(mdm2ap_status);
4952
4953 if (ret)
4954 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4955 on);
4956
4957 return ret;
4958}
4959
4960
4961static int get_mdm2ap_status(void)
4962{
4963 return gpio_get_value(mdm2ap_status);
4964}
4965
4966static struct sdio_al_platform_data sdio_al_pdata = {
4967 .config_mdm2ap_status = configure_mdm2ap_status,
4968 .get_mdm2ap_status = get_mdm2ap_status,
4969 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004970 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004971 .peer_sdioc_version_major = 0x0004,
4972 .peer_sdioc_boot_version_minor = 0x0001,
4973 .peer_sdioc_boot_version_major = 0x0003
4974};
4975
4976struct platform_device msm_device_sdio_al = {
4977 .name = "msm_sdio_al",
4978 .id = -1,
4979 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004980 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004981 .platform_data = &sdio_al_pdata,
4982 },
4983};
4984
4985#endif /* CONFIG_MSM_SDIO_AL */
4986
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304987#define GPIO_VREG_ID_EXT_5V 0
4988
4989static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4990 REGULATOR_SUPPLY("ext_5v", NULL),
4991 REGULATOR_SUPPLY("8901_mpp0", NULL),
4992};
4993
4994#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
4995 [GPIO_VREG_ID_##_id] = { \
4996 .init_data = { \
4997 .constraints = { \
4998 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
4999 }, \
5000 .num_consumer_supplies = \
5001 ARRAY_SIZE(vreg_consumers_##_id), \
5002 .consumer_supplies = vreg_consumers_##_id, \
5003 }, \
5004 .regulator_name = _reg_name, \
5005 .active_low = _active_low, \
5006 .gpio_label = _gpio_label, \
5007 .gpio = _gpio, \
5008 }
5009
5010/* GPIO regulator constraints */
5011static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5012 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5013 PM8901_MPP_PM_TO_SYS(0), 0),
5014};
5015
5016/* GPIO regulator */
5017static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5018 .name = GPIO_REGULATOR_DEV_NAME,
5019 .id = PM8901_MPP_PM_TO_SYS(0),
5020 .dev = {
5021 .platform_data =
5022 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5023 },
5024};
5025
5026static void __init pm8901_vreg_mpp0_init(void)
5027{
5028 int rc;
5029
5030 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5031 .mpp = PM8901_MPP_PM_TO_SYS(0),
5032 .config = {
5033 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5034 .level = PM8901_MPP_DIG_LEVEL_VPH,
5035 },
5036 };
5037
5038 /*
5039 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5040 * implies that the regulator connected to MPP0 is enabled when
5041 * MPP0 is low.
5042 */
5043 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5044 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5045 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5046 } else {
5047 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5048 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5049 }
5050
5051 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5052 if (rc)
5053 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5054}
5055
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005056static struct platform_device *charm_devices[] __initdata = {
5057 &msm_charm_modem,
5058#ifdef CONFIG_MSM_SDIO_AL
5059 &msm_device_sdio_al,
5060#endif
5061};
5062
Lei Zhou338cab82011-08-19 13:38:17 -04005063#ifdef CONFIG_SND_SOC_MSM8660_APQ
5064static struct platform_device *dragon_alsa_devices[] __initdata = {
5065 &msm_pcm,
5066 &msm_pcm_routing,
5067 &msm_cpudai0,
5068 &msm_cpudai1,
5069 &msm_cpudai_hdmi_rx,
5070 &msm_cpudai_bt_rx,
5071 &msm_cpudai_bt_tx,
5072 &msm_cpudai_fm_rx,
5073 &msm_cpudai_fm_tx,
5074 &msm_cpu_fe,
5075 &msm_stub_codec,
5076 &msm_lpa_pcm,
5077};
5078#endif
5079
5080static struct platform_device *asoc_devices[] __initdata = {
5081 &asoc_msm_pcm,
5082 &asoc_msm_dai0,
5083 &asoc_msm_dai1,
5084};
5085
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005086static struct platform_device *surf_devices[] __initdata = {
5087 &msm_device_smd,
5088 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005089 &msm_pil_q6v3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005090#ifdef CONFIG_I2C_QUP
5091 &msm_gsbi3_qup_i2c_device,
5092 &msm_gsbi4_qup_i2c_device,
5093 &msm_gsbi7_qup_i2c_device,
5094 &msm_gsbi8_qup_i2c_device,
5095 &msm_gsbi9_qup_i2c_device,
5096 &msm_gsbi12_qup_i2c_device,
5097#endif
5098#ifdef CONFIG_SERIAL_MSM_HS
5099 &msm_device_uart_dm1,
5100#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305101#ifdef CONFIG_MSM_SSBI
5102 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305103 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305104#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005105#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005106 &msm_device_ssbi3,
5107#endif
5108#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5109 &isp1763_device,
5110#endif
5111
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005112#if defined (CONFIG_MSM_8x60_VOIP)
5113 &asoc_msm_mvs,
5114 &asoc_mvs_dai0,
5115 &asoc_mvs_dai1,
5116#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005117
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005118#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5119 &msm_device_otg,
5120#endif
5121#ifdef CONFIG_USB_GADGET_MSM_72K
5122 &msm_device_gadget_peripheral,
5123#endif
5124#ifdef CONFIG_USB_G_ANDROID
5125 &android_usb_device,
5126#endif
5127#ifdef CONFIG_BATTERY_MSM
5128 &msm_batt_device,
5129#endif
5130#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005131#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005132 &android_pmem_device,
5133 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005134 &android_pmem_smipool_device,
5135#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005136 &android_pmem_audio_device,
5137#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005138#ifdef CONFIG_MSM_ROTATOR
5139 &msm_rotator_device,
5140#endif
5141 &msm_fb_device,
5142 &msm_kgsl_3d0,
5143 &msm_kgsl_2d0,
5144 &msm_kgsl_2d1,
5145 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005146#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5147 &lcdc_nt35582_panel_device,
5148#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005149#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5150 &lcdc_samsung_oled_panel_device,
5151#endif
5152#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5153 &lcdc_auo_wvga_panel_device,
5154#endif
5155#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5156 &hdmi_msm_device,
5157#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5158#ifdef CONFIG_FB_MSM_MIPI_DSI
5159 &mipi_dsi_toshiba_panel_device,
5160 &mipi_dsi_novatek_panel_device,
5161#endif
5162#ifdef CONFIG_MSM_CAMERA
5163#ifdef CONFIG_MT9E013
5164 &msm_camera_sensor_mt9e013,
5165#endif
5166#ifdef CONFIG_IMX074
5167 &msm_camera_sensor_imx074,
5168#endif
5169#ifdef CONFIG_WEBCAM_OV7692
5170 &msm_camera_sensor_webcam_ov7692,
5171#endif
5172#ifdef CONFIG_WEBCAM_OV9726
5173 &msm_camera_sensor_webcam_ov9726,
5174#endif
5175#ifdef CONFIG_QS_S5K4E1
5176 &msm_camera_sensor_qs_s5k4e1,
5177#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005178#ifdef CONFIG_VX6953
5179 &msm_camera_sensor_vx6953,
5180#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005181#endif
5182#ifdef CONFIG_MSM_GEMINI
5183 &msm_gemini_device,
5184#endif
5185#ifdef CONFIG_MSM_VPE
5186 &msm_vpe_device,
5187#endif
5188
5189#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5190 &msm_rpm_log_device,
5191#endif
5192#if defined(CONFIG_MSM_RPM_STATS_LOG)
5193 &msm_rpm_stat_device,
5194#endif
5195 &msm_device_vidc,
5196#if (defined(CONFIG_MARIMBA_CORE)) && \
5197 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5198 &msm_bt_power_device,
5199#endif
5200#ifdef CONFIG_SENSORS_MSM_ADC
5201 &msm_adc_device,
5202#endif
David Collins6f032ba2011-08-31 14:08:15 -07005203 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005204
5205#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5206 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5207 &qcrypto_device,
5208#endif
5209
5210#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5211 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5212 &qcedev_device,
5213#endif
5214
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005215
5216#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5217#ifdef CONFIG_MSM_USE_TSIF1
5218 &msm_device_tsif[1],
5219#else
5220 &msm_device_tsif[0],
5221#endif /* CONFIG_MSM_USE_TSIF1 */
5222#endif /* CONFIG_TSIF */
5223
5224#ifdef CONFIG_HW_RANDOM_MSM
5225 &msm_device_rng,
5226#endif
5227
5228 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005229 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005230#ifdef CONFIG_ION_MSM
5231 &ion_dev,
5232#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005233 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005234};
5235
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005236#ifdef CONFIG_ION_MSM
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005237static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005238 .nr = MSM_ION_HEAP_NUM,
5239 .heaps = {
5240 {
5241 .id = ION_HEAP_SYSTEM_ID,
5242 .type = ION_HEAP_TYPE_SYSTEM,
5243 .name = ION_VMALLOC_HEAP_NAME,
5244 },
5245 {
5246 .id = ION_HEAP_SYSTEM_CONTIG_ID,
5247 .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
5248 .name = ION_KMALLOC_HEAP_NAME,
5249 },
5250#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5251 {
5252 .id = ION_HEAP_EBI_ID,
5253 .type = ION_HEAP_TYPE_CARVEOUT,
5254 .name = ION_EBI1_HEAP_NAME,
5255 .size = MSM_ION_EBI_SIZE,
5256 .memory_type = ION_EBI_TYPE,
5257 },
5258 {
5259 .id = ION_HEAP_ADSP_ID,
5260 .type = ION_HEAP_TYPE_CARVEOUT,
5261 .name = ION_ADSP_HEAP_NAME,
5262 .size = MSM_ION_ADSP_SIZE,
5263 .memory_type = ION_EBI_TYPE,
5264 },
5265 {
5266 .id = ION_HEAP_SMI_ID,
5267 .type = ION_HEAP_TYPE_CARVEOUT,
5268 .name = ION_SMI_HEAP_NAME,
5269 .size = MSM_ION_SMI_SIZE,
5270 .memory_type = ION_SMI_TYPE,
5271 },
5272#endif
5273 }
5274};
5275
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005276static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005277 .name = "ion-msm",
5278 .id = 1,
5279 .dev = { .platform_data = &ion_pdata },
5280};
5281#endif
5282
5283
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005284static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5285 /* Kernel SMI memory pool for video core, used for firmware */
5286 /* and encoder, decoder scratch buffers */
5287 /* Kernel SMI memory pool should always precede the user space */
5288 /* SMI memory pool, as the video core will use offset address */
5289 /* from the Firmware base */
5290 [MEMTYPE_SMI_KERNEL] = {
5291 .start = KERNEL_SMI_BASE,
5292 .limit = KERNEL_SMI_SIZE,
5293 .size = KERNEL_SMI_SIZE,
5294 .flags = MEMTYPE_FLAGS_FIXED,
5295 },
5296 /* User space SMI memory pool for video core */
5297 /* used for encoder, decoder input & output buffers */
5298 [MEMTYPE_SMI] = {
5299 .start = USER_SMI_BASE,
5300 .limit = USER_SMI_SIZE,
5301 .flags = MEMTYPE_FLAGS_FIXED,
5302 },
5303 [MEMTYPE_EBI0] = {
5304 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5305 },
5306 [MEMTYPE_EBI1] = {
5307 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5308 },
5309};
5310
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005311static void reserve_ion_memory(void)
5312{
5313#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
5314 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
5315 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
5316 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_SMI_SIZE;
5317#endif
5318}
5319
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005320static void __init size_pmem_devices(void)
5321{
5322#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005323#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005324 android_pmem_adsp_pdata.size = pmem_adsp_size;
5325 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005326 android_pmem_pdata.size = pmem_sf_size;
5327#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005328 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5329#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005330}
5331
5332static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5333{
5334 msm8x60_reserve_table[p->memory_type].size += p->size;
5335}
5336
5337static void __init reserve_pmem_memory(void)
5338{
5339#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005340#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005341 reserve_memory_for(&android_pmem_adsp_pdata);
5342 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005343 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005344#endif
5345 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005346 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5347#endif
5348}
5349
Huaibin Yanga5419422011-12-08 23:52:10 -08005350static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005351
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005352static void __init msm8x60_calculate_reserve_sizes(void)
5353{
5354 size_pmem_devices();
5355 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005356 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005357 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005358}
5359
5360static int msm8x60_paddr_to_memtype(unsigned int paddr)
5361{
5362 if (paddr >= 0x40000000 && paddr < 0x60000000)
5363 return MEMTYPE_EBI1;
5364 if (paddr >= 0x38000000 && paddr < 0x40000000)
5365 return MEMTYPE_SMI;
5366 return MEMTYPE_NONE;
5367}
5368
5369static struct reserve_info msm8x60_reserve_info __initdata = {
5370 .memtype_reserve_table = msm8x60_reserve_table,
5371 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5372 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5373};
5374
5375static void __init msm8x60_reserve(void)
5376{
5377 reserve_info = &msm8x60_reserve_info;
5378 msm_reserve();
5379}
5380
5381#define EXT_CHG_VALID_MPP 10
5382#define EXT_CHG_VALID_MPP_2 11
5383
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305384static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305385 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305386 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305387 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305388 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5389};
5390
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005391#ifdef CONFIG_ISL9519_CHARGER
5392static int isl_detection_setup(void)
5393{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305394 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005395
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305396 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5397 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5398 &isl_mpp[i].config);
5399 if (ret) {
5400 pr_err("%s: Config MPP %d of PM8058 failed\n",
5401 __func__, isl_mpp[i].mpp);
5402 return ret;
5403 }
5404 }
5405
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005406 return ret;
5407}
5408
5409static struct isl_platform_data isl_data __initdata = {
5410 .chgcurrent = 700,
5411 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5412 .chg_detection_config = isl_detection_setup,
5413 .max_system_voltage = 4200,
5414 .min_system_voltage = 3200,
5415 .term_current = 120,
5416 .input_current = 2048,
5417};
5418
5419static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5420 {
5421 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305422 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005423 .platform_data = &isl_data,
5424 },
5425};
5426#endif
5427
5428#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5429static int smb137b_detection_setup(void)
5430{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305431 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005432
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305433 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5434 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5435 &isl_mpp[i].config);
5436 if (ret) {
5437 pr_err("%s: Config MPP %d of PM8058 failed\n",
5438 __func__, isl_mpp[i].mpp);
5439 return ret;
5440 }
5441 }
5442
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005443 return ret;
5444}
5445
5446static struct smb137b_platform_data smb137b_data __initdata = {
5447 .chg_detection_config = smb137b_detection_setup,
5448 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5449 .batt_mah_rating = 950,
5450};
5451
5452static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5453 {
5454 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305455 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005456 .platform_data = &smb137b_data,
5457 },
5458};
5459#endif
5460
5461#ifdef CONFIG_PMIC8058
5462#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305463#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005464
5465static int pm8058_gpios_init(void)
5466{
5467 int i;
5468 int rc;
5469 struct pm8058_gpio_cfg {
5470 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305471 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005472 };
5473
5474 struct pm8058_gpio_cfg gpio_cfgs[] = {
5475 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305476 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005477 {
5478 .direction = PM_GPIO_DIR_IN,
5479 .pull = PM_GPIO_PULL_DN,
5480 .vin_sel = 2,
5481 .function = PM_GPIO_FUNC_NORMAL,
5482 .inv_int_pol = 0,
5483 },
5484 },
5485#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5486 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305487 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005488 {
5489 .direction = PM_GPIO_DIR_IN,
5490 .pull = PM_GPIO_PULL_UP_30,
5491 .vin_sel = 2,
5492 .function = PM_GPIO_FUNC_NORMAL,
5493 .inv_int_pol = 0,
5494 },
5495 },
5496#endif
5497 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305498 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005499 {
5500 .direction = PM_GPIO_DIR_IN,
5501 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305502 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005503 .function = PM_GPIO_FUNC_NORMAL,
5504 .inv_int_pol = 0,
5505 },
5506 },
5507 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305508 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005509 {
5510 .direction = PM_GPIO_DIR_IN,
5511 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305512 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005513 .function = PM_GPIO_FUNC_NORMAL,
5514 .inv_int_pol = 0,
5515 },
5516 },
5517 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305518 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005519 {
5520 .direction = PM_GPIO_DIR_IN,
5521 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305522 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005523 .function = PM_GPIO_FUNC_NORMAL,
5524 .inv_int_pol = 0,
5525 },
5526 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005527 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305528 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005529 {
5530 .direction = PM_GPIO_DIR_OUT,
5531 .output_value = 1,
5532 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5533 .pull = PM_GPIO_PULL_DN,
5534 .out_strength = PM_GPIO_STRENGTH_HIGH,
5535 .function = PM_GPIO_FUNC_NORMAL,
5536 .vin_sel = 2,
5537 .inv_int_pol = 0,
5538 }
5539 },
5540 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305541 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005542 {
5543 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305544 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005545 .function = PM_GPIO_FUNC_NORMAL,
5546 .vin_sel = 2,
5547 .inv_int_pol = 0,
5548 }
5549 },
5550 };
5551
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305552#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5553 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305554 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305555 .direction = PM_GPIO_DIR_IN,
5556 .pull = PM_GPIO_PULL_UP_1P5,
5557 .vin_sel = 2,
5558 .function = PM_GPIO_FUNC_NORMAL,
5559 };
5560#endif
5561
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005562#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305563 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305564 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305565 .direction = PM_GPIO_DIR_OUT,
5566 .pull = PM_GPIO_PULL_NO,
5567 .out_strength = PM_GPIO_STRENGTH_HIGH,
5568 .function = PM_GPIO_FUNC_NORMAL,
5569 .inv_int_pol = 0,
5570 .vin_sel = 2,
5571 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5572 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005573 };
5574#endif
5575
5576#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5577 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305578 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005579 {
5580 .direction = PM_GPIO_DIR_IN,
5581 .pull = PM_GPIO_PULL_UP_1P5,
5582 .vin_sel = 2,
5583 .function = PM_GPIO_FUNC_NORMAL,
5584 .inv_int_pol = 0,
5585 }
5586 };
5587#endif
5588
5589#if defined(CONFIG_QS_S5K4E1)
5590 {
5591 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305592 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005593 {
5594 .direction = PM_GPIO_DIR_OUT,
5595 .output_value = 0,
5596 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5597 .pull = PM_GPIO_PULL_DN,
5598 .out_strength = PM_GPIO_STRENGTH_HIGH,
5599 .function = PM_GPIO_FUNC_NORMAL,
5600 .vin_sel = 2,
5601 .inv_int_pol = 0,
5602 }
5603 };
5604#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005605#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5606 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305607 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005608 {
5609 .direction = PM_GPIO_DIR_OUT,
5610 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5611 .output_value = 1,
5612 .pull = PM_GPIO_PULL_UP_30,
5613 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305614 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005615 .out_strength = PM_GPIO_STRENGTH_HIGH,
5616 .function = PM_GPIO_FUNC_NORMAL,
5617 .inv_int_pol = 0,
5618 }
5619 };
5620#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005621#if defined(CONFIG_HAPTIC_ISA1200) || \
5622 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5623 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305624 rc = pm8xxx_gpio_config(
5625 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5626 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005627 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305628 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005629 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305630 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305631 rc = pm8xxx_gpio_config(
5632 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5633 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305634 if (rc < 0) {
5635 pr_err("%s: pmic haptics ldo gpio config failed\n",
5636 __func__);
5637 }
5638
5639 }
5640#endif
5641
5642#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5643 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5644 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5645 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305646 rc = pm8xxx_gpio_config(
5647 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5648 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305649 if (rc < 0) {
5650 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5651 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005652 }
5653 }
5654#endif
5655
5656#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5657 /* Line_in only for 8660 ffa & surf */
5658 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005659 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005660 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305661 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005662 &line_in_gpio_cfg.cfg);
5663 if (rc < 0) {
5664 pr_err("%s pmic line_in gpio config failed\n",
5665 __func__);
5666 return rc;
5667 }
5668 }
5669#endif
5670
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005671#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5672 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305673 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005674 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5675 if (rc < 0) {
5676 pr_err("%s pmic gpio config failed\n", __func__);
5677 return rc;
5678 }
5679 }
5680#endif
5681
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005682#if defined(CONFIG_QS_S5K4E1)
5683 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5684 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305685 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005686 &qs_hc37_cam_pd_gpio_cfg.cfg);
5687 if (rc < 0) {
5688 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5689 __func__);
5690 return rc;
5691 }
5692 }
5693 }
5694#endif
5695
5696 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305697 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005698 &gpio_cfgs[i].cfg);
5699 if (rc < 0) {
5700 pr_err("%s pmic gpio config failed\n",
5701 __func__);
5702 return rc;
5703 }
5704 }
5705
5706 return 0;
5707}
5708
5709static const unsigned int ffa_keymap[] = {
5710 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5711 KEY(0, 1, KEY_UP), /* NAV - UP */
5712 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5713 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5714
5715 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5716 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5717 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5718 KEY(1, 3, KEY_VOLUMEDOWN),
5719
5720 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5721
5722 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5723 KEY(4, 1, KEY_UP), /* USER_UP */
5724 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5725 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5726 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5727
5728 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5729 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5730 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5731 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5732 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5733};
5734
Zhang Chang Ken683be172011-08-10 17:45:34 -04005735static const unsigned int dragon_keymap[] = {
5736 KEY(0, 0, KEY_MENU),
5737 KEY(0, 2, KEY_1),
5738 KEY(0, 3, KEY_4),
5739 KEY(0, 4, KEY_7),
5740
5741 KEY(1, 0, KEY_UP),
5742 KEY(1, 1, KEY_LEFT),
5743 KEY(1, 2, KEY_DOWN),
5744 KEY(1, 3, KEY_5),
5745 KEY(1, 4, KEY_8),
5746
5747 KEY(2, 0, KEY_HOME),
5748 KEY(2, 1, KEY_REPLY),
5749 KEY(2, 2, KEY_2),
5750 KEY(2, 3, KEY_6),
5751 KEY(2, 4, KEY_0),
5752
5753 KEY(3, 0, KEY_VOLUMEUP),
5754 KEY(3, 1, KEY_RIGHT),
5755 KEY(3, 2, KEY_3),
5756 KEY(3, 3, KEY_9),
5757 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5758
5759 KEY(4, 0, KEY_VOLUMEDOWN),
5760 KEY(4, 1, KEY_BACK),
5761 KEY(4, 2, KEY_CAMERA),
5762 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5763};
5764
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005765static struct matrix_keymap_data ffa_keymap_data = {
5766 .keymap_size = ARRAY_SIZE(ffa_keymap),
5767 .keymap = ffa_keymap,
5768};
5769
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305770static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005771 .input_name = "ffa-keypad",
5772 .input_phys_device = "ffa-keypad/input0",
5773 .num_rows = 6,
5774 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305775 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5776 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5777 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005778 .scan_delay_ms = 32,
5779 .row_hold_ns = 91500,
5780 .wakeup = 1,
5781 .keymap_data = &ffa_keymap_data,
5782};
5783
Zhang Chang Ken683be172011-08-10 17:45:34 -04005784static struct matrix_keymap_data dragon_keymap_data = {
5785 .keymap_size = ARRAY_SIZE(dragon_keymap),
5786 .keymap = dragon_keymap,
5787};
5788
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305789static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005790 .input_name = "dragon-keypad",
5791 .input_phys_device = "dragon-keypad/input0",
5792 .num_rows = 6,
5793 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305794 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5795 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5796 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005797 .scan_delay_ms = 32,
5798 .row_hold_ns = 91500,
5799 .wakeup = 1,
5800 .keymap_data = &dragon_keymap_data,
5801};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305802
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005803static const unsigned int fluid_keymap[] = {
5804 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5805 KEY(0, 1, KEY_UP), /* NAV - UP */
5806 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5807 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5808
5809 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5810 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5811 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5812 KEY(1, 3, KEY_VOLUMEUP),
5813
5814 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5815
5816 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5817 KEY(4, 1, KEY_UP), /* USER_UP */
5818 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5819 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5820 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5821
Jilai Wang9a895102011-07-12 14:00:35 -04005822 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005823 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5824 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5825 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5826 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5827};
5828
5829static struct matrix_keymap_data fluid_keymap_data = {
5830 .keymap_size = ARRAY_SIZE(fluid_keymap),
5831 .keymap = fluid_keymap,
5832};
5833
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305834static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005835 .input_name = "fluid-keypad",
5836 .input_phys_device = "fluid-keypad/input0",
5837 .num_rows = 6,
5838 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305839 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5840 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5841 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005842 .scan_delay_ms = 32,
5843 .row_hold_ns = 91500,
5844 .wakeup = 1,
5845 .keymap_data = &fluid_keymap_data,
5846};
5847
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305848static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005849 .initial_vibrate_ms = 500,
5850 .level_mV = 3000,
5851 .max_timeout_ms = 15000,
5852};
5853
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305854static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5855 .rtc_write_enable = false,
5856 .rtc_alarm_powerup = false,
5857};
5858
5859static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5860 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005861 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305862 .wakeup = 1,
5863};
5864
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005865#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5866
5867static struct othc_accessory_info othc_accessories[] = {
5868 {
5869 .accessory = OTHC_SVIDEO_OUT,
5870 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5871 | OTHC_ADC_DETECT,
5872 .key_code = SW_VIDEOOUT_INSERT,
5873 .enabled = false,
5874 .adc_thres = {
5875 .min_threshold = 20,
5876 .max_threshold = 40,
5877 },
5878 },
5879 {
5880 .accessory = OTHC_ANC_HEADPHONE,
5881 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5882 OTHC_SWITCH_DETECT,
5883 .gpio = PM8058_LINE_IN_DET_GPIO,
5884 .active_low = 1,
5885 .key_code = SW_HEADPHONE_INSERT,
5886 .enabled = true,
5887 },
5888 {
5889 .accessory = OTHC_ANC_HEADSET,
5890 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5891 .gpio = PM8058_LINE_IN_DET_GPIO,
5892 .active_low = 1,
5893 .key_code = SW_HEADPHONE_INSERT,
5894 .enabled = true,
5895 },
5896 {
5897 .accessory = OTHC_HEADPHONE,
5898 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5899 .key_code = SW_HEADPHONE_INSERT,
5900 .enabled = true,
5901 },
5902 {
5903 .accessory = OTHC_MICROPHONE,
5904 .detect_flags = OTHC_GPIO_DETECT,
5905 .gpio = PM8058_LINE_IN_DET_GPIO,
5906 .active_low = 1,
5907 .key_code = SW_MICROPHONE_INSERT,
5908 .enabled = true,
5909 },
5910 {
5911 .accessory = OTHC_HEADSET,
5912 .detect_flags = OTHC_MICBIAS_DETECT,
5913 .key_code = SW_HEADPHONE_INSERT,
5914 .enabled = true,
5915 },
5916};
5917
5918static struct othc_switch_info switch_info[] = {
5919 {
5920 .min_adc_threshold = 0,
5921 .max_adc_threshold = 100,
5922 .key_code = KEY_PLAYPAUSE,
5923 },
5924 {
5925 .min_adc_threshold = 100,
5926 .max_adc_threshold = 200,
5927 .key_code = KEY_REWIND,
5928 },
5929 {
5930 .min_adc_threshold = 200,
5931 .max_adc_threshold = 500,
5932 .key_code = KEY_FASTFORWARD,
5933 },
5934};
5935
5936static struct othc_n_switch_config switch_config = {
5937 .voltage_settling_time_ms = 0,
5938 .num_adc_samples = 3,
5939 .adc_channel = CHANNEL_ADC_HDSET,
5940 .switch_info = switch_info,
5941 .num_keys = ARRAY_SIZE(switch_info),
5942 .default_sw_en = true,
5943 .default_sw_idx = 0,
5944};
5945
5946static struct hsed_bias_config hsed_bias_config = {
5947 /* HSED mic bias config info */
5948 .othc_headset = OTHC_HEADSET_NO,
5949 .othc_lowcurr_thresh_uA = 100,
5950 .othc_highcurr_thresh_uA = 600,
5951 .othc_hyst_prediv_us = 7800,
5952 .othc_period_clkdiv_us = 62500,
5953 .othc_hyst_clk_us = 121000,
5954 .othc_period_clk_us = 312500,
5955 .othc_wakeup = 1,
5956};
5957
5958static struct othc_hsed_config hsed_config_1 = {
5959 .hsed_bias_config = &hsed_bias_config,
5960 /*
5961 * The detection delay and switch reporting delay are
5962 * required to encounter a hardware bug (spurious switch
5963 * interrupts on slow insertion/removal of the headset).
5964 * This will introduce a delay in reporting the accessory
5965 * insertion and removal to the userspace.
5966 */
5967 .detection_delay_ms = 1500,
5968 /* Switch info */
5969 .switch_debounce_ms = 1500,
5970 .othc_support_n_switch = false,
5971 .switch_config = &switch_config,
5972 .ir_gpio = -1,
5973 /* Accessory info */
5974 .accessories_support = true,
5975 .accessories = othc_accessories,
5976 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
5977};
5978
5979static struct othc_regulator_config othc_reg = {
5980 .regulator = "8058_l5",
5981 .max_uV = 2850000,
5982 .min_uV = 2850000,
5983};
5984
5985/* MIC_BIAS0 is configured as normal MIC BIAS */
5986static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
5987 .micbias_select = OTHC_MICBIAS_0,
5988 .micbias_capability = OTHC_MICBIAS,
5989 .micbias_enable = OTHC_SIGNAL_OFF,
5990 .micbias_regulator = &othc_reg,
5991};
5992
5993/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
5994static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
5995 .micbias_select = OTHC_MICBIAS_1,
5996 .micbias_capability = OTHC_MICBIAS_HSED,
5997 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
5998 .micbias_regulator = &othc_reg,
5999 .hsed_config = &hsed_config_1,
6000 .hsed_name = "8660_handset",
6001};
6002
6003/* MIC_BIAS2 is configured as normal MIC BIAS */
6004static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6005 .micbias_select = OTHC_MICBIAS_2,
6006 .micbias_capability = OTHC_MICBIAS,
6007 .micbias_enable = OTHC_SIGNAL_OFF,
6008 .micbias_regulator = &othc_reg,
6009};
6010
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006011
6012static void __init msm8x60_init_pm8058_othc(void)
6013{
6014 int i;
6015
6016 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6017 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6018 machine_is_msm8x60_fusn_ffa()) {
6019 /* 3-switch headset supported only by V2 FFA and FLUID */
6020 hsed_config_1.accessories_adc_support = true,
6021 /* ADC based accessory detection works only on V2 and FLUID */
6022 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6023 hsed_config_1.othc_support_n_switch = true;
6024 }
6025
6026 /* IR GPIO is absent on FLUID */
6027 if (machine_is_msm8x60_fluid())
6028 hsed_config_1.ir_gpio = -1;
6029
6030 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6031 if (machine_is_msm8x60_fluid()) {
6032 switch (othc_accessories[i].accessory) {
6033 case OTHC_ANC_HEADPHONE:
6034 case OTHC_ANC_HEADSET:
6035 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6036 break;
6037 case OTHC_MICROPHONE:
6038 othc_accessories[i].enabled = false;
6039 break;
6040 case OTHC_SVIDEO_OUT:
6041 othc_accessories[i].enabled = true;
6042 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6043 break;
6044 }
6045 }
6046 }
6047}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006048
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006049
6050static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6051{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306052 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006053 .direction = PM_GPIO_DIR_OUT,
6054 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6055 .output_value = 0,
6056 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306057 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006058 .out_strength = PM_GPIO_STRENGTH_HIGH,
6059 .function = PM_GPIO_FUNC_2,
6060 };
6061
6062 int rc = -EINVAL;
6063 int id, mode, max_mA;
6064
6065 id = mode = max_mA = 0;
6066 switch (ch) {
6067 case 0:
6068 case 1:
6069 case 2:
6070 if (on) {
6071 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306072 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6073 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006074 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306075 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006076 __func__, id, rc);
6077 }
6078 break;
6079
6080 case 6:
6081 id = PM_PWM_LED_FLASH;
6082 mode = PM_PWM_CONF_PWM1;
6083 max_mA = 300;
6084 break;
6085
6086 case 7:
6087 id = PM_PWM_LED_FLASH1;
6088 mode = PM_PWM_CONF_PWM1;
6089 max_mA = 300;
6090 break;
6091
6092 default:
6093 break;
6094 }
6095
6096 if (ch >= 6 && ch <= 7) {
6097 if (!on) {
6098 mode = PM_PWM_CONF_NONE;
6099 max_mA = 0;
6100 }
6101 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6102 if (rc)
6103 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6104 __func__, ch, rc);
6105 }
6106 return rc;
6107
6108}
6109
6110static struct pm8058_pwm_pdata pm8058_pwm_data = {
6111 .config = pm8058_pwm_config,
6112};
6113
6114#define PM8058_GPIO_INT 88
6115
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006116static struct pmic8058_led pmic8058_flash_leds[] = {
6117 [0] = {
6118 .name = "camera:flash0",
6119 .max_brightness = 15,
6120 .id = PMIC8058_ID_FLASH_LED_0,
6121 },
6122 [1] = {
6123 .name = "camera:flash1",
6124 .max_brightness = 15,
6125 .id = PMIC8058_ID_FLASH_LED_1,
6126 },
6127};
6128
6129static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6130 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6131 .leds = pmic8058_flash_leds,
6132};
6133
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006134static struct pmic8058_led pmic8058_dragon_leds[] = {
6135 [0] = {
6136 /* RED */
6137 .name = "led_drv0",
6138 .max_brightness = 15,
6139 .id = PMIC8058_ID_LED_0,
6140 },/* 300 mA flash led0 drv sink */
6141 [1] = {
6142 /* Yellow */
6143 .name = "led_drv1",
6144 .max_brightness = 15,
6145 .id = PMIC8058_ID_LED_1,
6146 },/* 300 mA flash led0 drv sink */
6147 [2] = {
6148 /* Green */
6149 .name = "led_drv2",
6150 .max_brightness = 15,
6151 .id = PMIC8058_ID_LED_2,
6152 },/* 300 mA flash led0 drv sink */
6153 [3] = {
6154 .name = "led_psensor",
6155 .max_brightness = 15,
6156 .id = PMIC8058_ID_LED_KB_LIGHT,
6157 },/* 300 mA flash led0 drv sink */
6158};
6159
6160static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6161 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6162 .leds = pmic8058_dragon_leds,
6163};
6164
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006165static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6166 [0] = {
6167 .name = "led:drv0",
6168 .max_brightness = 15,
6169 .id = PMIC8058_ID_FLASH_LED_0,
6170 },/* 300 mA flash led0 drv sink */
6171 [1] = {
6172 .name = "led:drv1",
6173 .max_brightness = 15,
6174 .id = PMIC8058_ID_FLASH_LED_1,
6175 },/* 300 mA flash led1 sink */
6176 [2] = {
6177 .name = "led:drv2",
6178 .max_brightness = 20,
6179 .id = PMIC8058_ID_LED_0,
6180 },/* 40 mA led0 sink */
6181 [3] = {
6182 .name = "keypad:drv",
6183 .max_brightness = 15,
6184 .id = PMIC8058_ID_LED_KB_LIGHT,
6185 },/* 300 mA keypad drv sink */
6186};
6187
6188static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6189 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6190 .leds = pmic8058_fluid_flash_leds,
6191};
6192
Terence Hampson90508a92011-08-09 10:40:08 -04006193static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306194 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006195 .max_source_current = 1800,
6196 .charger_type = CHG_TYPE_AC,
6197};
6198
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306199static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6200 .charger_data_valid = false,
6201};
6202
6203static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6204 .priority = 0,
6205};
6206
6207static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6208 .irq_base = PM8058_IRQ_BASE,
6209 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6210 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6211};
6212
6213static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6214 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6215};
6216
6217static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6218 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006219};
6220
6221static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306222 .irq_pdata = &pm8058_irq_pdata,
6223 .gpio_pdata = &pm8058_gpio_pdata,
6224 .mpp_pdata = &pm8058_mpp_pdata,
6225 .rtc_pdata = &pm8058_rtc_pdata,
6226 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6227 .othc0_pdata = &othc_config_pdata_0,
6228 .othc1_pdata = &othc_config_pdata_1,
6229 .othc2_pdata = &othc_config_pdata_2,
6230 .pwm_pdata = &pm8058_pwm_data,
6231 .misc_pdata = &pm8058_misc_pdata,
6232#ifdef CONFIG_SENSORS_MSM_ADC
6233 .xoadc_pdata = &pm8058_xoadc_pdata,
6234#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006235};
6236
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306237#ifdef CONFIG_MSM_SSBI
6238static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6239 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6240 .slave = {
6241 .name = "pm8058-core",
6242 .platform_data = &pm8058_platform_data,
6243 },
6244};
6245#endif
6246#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006247
6248#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6249 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6250#define TDISC_I2C_SLAVE_ADDR 0x67
6251#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6252#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6253
6254static const char *vregs_tdisc_name[] = {
6255 "8058_l5",
6256 "8058_s3",
6257};
6258
6259static const int vregs_tdisc_val[] = {
6260 2850000,/* uV */
6261 1800000,
6262};
6263static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6264
6265static int tdisc_shinetsu_setup(void)
6266{
6267 int rc, i;
6268
6269 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6270 if (rc) {
6271 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6272 __func__);
6273 return rc;
6274 }
6275
6276 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6277 if (rc) {
6278 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6279 __func__);
6280 goto fail_gpio_oe;
6281 }
6282
6283 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6284 if (rc) {
6285 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6286 __func__);
6287 gpio_free(GPIO_JOYSTICK_EN);
6288 goto fail_gpio_oe;
6289 }
6290
6291 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6292 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6293 if (IS_ERR(vregs_tdisc[i])) {
6294 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6295 __func__, vregs_tdisc_name[i],
6296 PTR_ERR(vregs_tdisc[i]));
6297 rc = PTR_ERR(vregs_tdisc[i]);
6298 goto vreg_get_fail;
6299 }
6300
6301 rc = regulator_set_voltage(vregs_tdisc[i],
6302 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6303 if (rc) {
6304 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6305 __func__, rc);
6306 goto vreg_set_voltage_fail;
6307 }
6308 }
6309
6310 return rc;
6311vreg_set_voltage_fail:
6312 i++;
6313vreg_get_fail:
6314 while (i)
6315 regulator_put(vregs_tdisc[--i]);
6316fail_gpio_oe:
6317 gpio_free(PMIC_GPIO_TDISC);
6318 return rc;
6319}
6320
6321static void tdisc_shinetsu_release(void)
6322{
6323 int i;
6324
6325 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6326 regulator_put(vregs_tdisc[i]);
6327
6328 gpio_free(PMIC_GPIO_TDISC);
6329 gpio_free(GPIO_JOYSTICK_EN);
6330}
6331
6332static int tdisc_shinetsu_enable(void)
6333{
6334 int i, rc = -EINVAL;
6335
6336 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6337 rc = regulator_enable(vregs_tdisc[i]);
6338 if (rc < 0) {
6339 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6340 __func__, vregs_tdisc_name[i], rc);
6341 goto vreg_fail;
6342 }
6343 }
6344
6345 /* Enable the OE (output enable) gpio */
6346 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6347 /* voltage and gpio stabilization delay */
6348 msleep(50);
6349
6350 return 0;
6351vreg_fail:
6352 while (i)
6353 regulator_disable(vregs_tdisc[--i]);
6354 return rc;
6355}
6356
6357static int tdisc_shinetsu_disable(void)
6358{
6359 int i, rc;
6360
6361 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6362 rc = regulator_disable(vregs_tdisc[i]);
6363 if (rc < 0) {
6364 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6365 __func__, vregs_tdisc_name[i], rc);
6366 goto tdisc_reg_fail;
6367 }
6368 }
6369
6370 /* Disable the OE (output enable) gpio */
6371 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6372
6373 return 0;
6374
6375tdisc_reg_fail:
6376 while (i)
6377 regulator_enable(vregs_tdisc[--i]);
6378 return rc;
6379}
6380
6381static struct tdisc_abs_values tdisc_abs = {
6382 .x_max = 32,
6383 .y_max = 32,
6384 .x_min = -32,
6385 .y_min = -32,
6386 .pressure_max = 32,
6387 .pressure_min = 0,
6388};
6389
6390static struct tdisc_platform_data tdisc_data = {
6391 .tdisc_setup = tdisc_shinetsu_setup,
6392 .tdisc_release = tdisc_shinetsu_release,
6393 .tdisc_enable = tdisc_shinetsu_enable,
6394 .tdisc_disable = tdisc_shinetsu_disable,
6395 .tdisc_wakeup = 0,
6396 .tdisc_gpio = PMIC_GPIO_TDISC,
6397 .tdisc_report_keys = true,
6398 .tdisc_report_relative = true,
6399 .tdisc_report_absolute = false,
6400 .tdisc_report_wheel = false,
6401 .tdisc_reverse_x = false,
6402 .tdisc_reverse_y = true,
6403 .tdisc_abs = &tdisc_abs,
6404};
6405
6406static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6407 {
6408 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6409 .irq = TDISC_INT,
6410 .platform_data = &tdisc_data,
6411 },
6412};
6413#endif
6414
6415#define PM_GPIO_CDC_RST_N 20
6416#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6417
6418static struct regulator *vreg_timpani_1;
6419static struct regulator *vreg_timpani_2;
6420
6421static unsigned int msm_timpani_setup_power(void)
6422{
6423 int rc;
6424
6425 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6426 if (IS_ERR(vreg_timpani_1)) {
6427 pr_err("%s: Unable to get 8058_l0\n", __func__);
6428 return -ENODEV;
6429 }
6430
6431 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6432 if (IS_ERR(vreg_timpani_2)) {
6433 pr_err("%s: Unable to get 8058_s3\n", __func__);
6434 regulator_put(vreg_timpani_1);
6435 return -ENODEV;
6436 }
6437
6438 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6439 if (rc) {
6440 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6441 goto fail;
6442 }
6443
6444 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6445 if (rc) {
6446 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6447 goto fail;
6448 }
6449
6450 rc = regulator_enable(vreg_timpani_1);
6451 if (rc) {
6452 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6453 goto fail;
6454 }
6455
6456 /* The settings for LDO0 should be set such that
6457 * it doesn't require to reset the timpani. */
6458 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6459 if (rc < 0) {
6460 pr_err("Timpani regulator optimum mode setting failed\n");
6461 goto fail;
6462 }
6463
6464 rc = regulator_enable(vreg_timpani_2);
6465 if (rc) {
6466 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6467 regulator_disable(vreg_timpani_1);
6468 goto fail;
6469 }
6470
6471 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6472 if (rc) {
6473 pr_err("%s: GPIO Request %d failed\n", __func__,
6474 GPIO_CDC_RST_N);
6475 regulator_disable(vreg_timpani_1);
6476 regulator_disable(vreg_timpani_2);
6477 goto fail;
6478 } else {
6479 gpio_direction_output(GPIO_CDC_RST_N, 1);
6480 usleep_range(1000, 1050);
6481 gpio_direction_output(GPIO_CDC_RST_N, 0);
6482 usleep_range(1000, 1050);
6483 gpio_direction_output(GPIO_CDC_RST_N, 1);
6484 gpio_free(GPIO_CDC_RST_N);
6485 }
6486 return rc;
6487
6488fail:
6489 regulator_put(vreg_timpani_1);
6490 regulator_put(vreg_timpani_2);
6491 return rc;
6492}
6493
6494static void msm_timpani_shutdown_power(void)
6495{
6496 int rc;
6497
6498 rc = regulator_disable(vreg_timpani_1);
6499 if (rc)
6500 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6501
6502 regulator_put(vreg_timpani_1);
6503
6504 rc = regulator_disable(vreg_timpani_2);
6505 if (rc)
6506 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6507
6508 regulator_put(vreg_timpani_2);
6509}
6510
6511/* Power analog function of codec */
6512static struct regulator *vreg_timpani_cdc_apwr;
6513static int msm_timpani_codec_power(int vreg_on)
6514{
6515 int rc = 0;
6516
6517 if (!vreg_timpani_cdc_apwr) {
6518
6519 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6520
6521 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6522 pr_err("%s: vreg_get failed (%ld)\n",
6523 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6524 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6525 return rc;
6526 }
6527 }
6528
6529 if (vreg_on) {
6530
6531 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6532 2200000, 2200000);
6533 if (rc) {
6534 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6535 __func__);
6536 goto vreg_fail;
6537 }
6538
6539 rc = regulator_enable(vreg_timpani_cdc_apwr);
6540 if (rc) {
6541 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6542 goto vreg_fail;
6543 }
6544 } else {
6545 rc = regulator_disable(vreg_timpani_cdc_apwr);
6546 if (rc) {
6547 pr_err("%s: vreg_disable failed %d\n",
6548 __func__, rc);
6549 goto vreg_fail;
6550 }
6551 }
6552
6553 return 0;
6554
6555vreg_fail:
6556 regulator_put(vreg_timpani_cdc_apwr);
6557 vreg_timpani_cdc_apwr = NULL;
6558 return rc;
6559}
6560
6561static struct marimba_codec_platform_data timpani_codec_pdata = {
6562 .marimba_codec_power = msm_timpani_codec_power,
6563};
6564
6565#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6566#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6567
6568static struct marimba_platform_data timpani_pdata = {
6569 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6570 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6571 .marimba_setup = msm_timpani_setup_power,
6572 .marimba_shutdown = msm_timpani_shutdown_power,
6573 .codec = &timpani_codec_pdata,
6574 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6575};
6576
6577#define TIMPANI_I2C_SLAVE_ADDR 0xD
6578
6579static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6580 {
6581 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6582 .platform_data = &timpani_pdata,
6583 },
6584};
6585
Lei Zhou338cab82011-08-19 13:38:17 -04006586#ifdef CONFIG_SND_SOC_WM8903
6587static struct wm8903_platform_data wm8903_pdata = {
6588 .gpio_cfg[2] = 0x3A8,
6589};
6590
6591#define WM8903_I2C_SLAVE_ADDR 0x34
6592static struct i2c_board_info wm8903_codec_i2c_info[] = {
6593 {
6594 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6595 .platform_data = &wm8903_pdata,
6596 },
6597};
6598#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006599#ifdef CONFIG_PMIC8901
6600
6601#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006602/*
6603 * Consumer specific regulator names:
6604 * regulator name consumer dev_name
6605 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006606static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6607 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6608};
6609static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6610 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6611};
6612
6613#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306614 _always_on) \
6615 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006616 .init_data = { \
6617 .constraints = { \
6618 .valid_modes_mask = _modes, \
6619 .valid_ops_mask = _ops, \
6620 .min_uV = _min_uV, \
6621 .max_uV = _max_uV, \
6622 .input_uV = _min_uV, \
6623 .apply_uV = _apply_uV, \
6624 .always_on = _always_on, \
6625 }, \
6626 .consumer_supplies = vreg_consumers_8901_##_id, \
6627 .num_consumer_supplies = \
6628 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6629 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306630 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006631 }
6632
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006633#define PM8901_VREG_INIT_VS(_id) \
6634 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306635 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006636
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306637static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006638 PM8901_VREG_INIT_VS(USB_OTG),
6639 PM8901_VREG_INIT_VS(HDMI_MVS),
6640};
6641
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306642static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6643 .priority = 1,
6644};
6645
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306646static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6647 .irq_base = PM8901_IRQ_BASE,
6648 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6649 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6650};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006651
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306652static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6653 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006654};
6655
6656static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306657 .irq_pdata = &pm8901_irq_pdata,
6658 .mpp_pdata = &pm8901_mpp_pdata,
6659 .regulator_pdatas = pm8901_vreg_init,
6660 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306661 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006662};
6663
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306664static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6665 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6666 .slave = {
6667 .name = "pm8901-core",
6668 .platform_data = &pm8901_platform_data,
6669 },
6670};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006671#endif /* CONFIG_PMIC8901 */
6672
6673#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6674 || defined(CONFIG_GPIO_SX150X_MODULE))
6675
6676static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006677static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006678
6679struct bahama_config_register{
6680 u8 reg;
6681 u8 value;
6682 u8 mask;
6683};
6684
6685enum version{
6686 VER_1_0,
6687 VER_2_0,
6688 VER_UNSUPPORTED = 0xFF
6689};
6690
6691static u8 read_bahama_ver(void)
6692{
6693 int rc;
6694 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6695 u8 bahama_version;
6696
6697 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6698 if (rc < 0) {
6699 printk(KERN_ERR
6700 "%s: version read failed: %d\n",
6701 __func__, rc);
6702 return VER_UNSUPPORTED;
6703 } else {
6704 printk(KERN_INFO
6705 "%s: version read got: 0x%x\n",
6706 __func__, bahama_version);
6707 }
6708
6709 switch (bahama_version) {
6710 case 0x08: /* varient of bahama v1 */
6711 case 0x10:
6712 case 0x00:
6713 return VER_1_0;
6714 case 0x09: /* variant of bahama v2 */
6715 return VER_2_0;
6716 default:
6717 return VER_UNSUPPORTED;
6718 }
6719}
6720
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006721static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006722static unsigned int msm_bahama_setup_power(void)
6723{
6724 int rc = 0;
6725 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006726
6727 if (machine_is_msm8x60_dragon())
6728 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6729
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006730 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6731
6732 if (IS_ERR(vreg_bahama)) {
6733 rc = PTR_ERR(vreg_bahama);
6734 pr_err("%s: regulator_get %s = %d\n", __func__,
6735 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006736 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006737 }
6738
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006739 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6740 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006741 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6742 msm_bahama_regulator, rc);
6743 goto unget;
6744 }
6745
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006746 rc = regulator_enable(vreg_bahama);
6747 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006748 pr_err("%s: regulator_enable %s = %d\n", __func__,
6749 msm_bahama_regulator, rc);
6750 goto unget;
6751 }
6752
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006753 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6754 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006755 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006756 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006757 goto unenable;
6758 }
6759
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006760 gpio_direction_output(msm_bahama_sys_rst, 0);
6761 usleep_range(1000, 1050);
6762 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6763 usleep_range(1000, 1050);
6764 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006765 return rc;
6766
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006767unenable:
6768 regulator_disable(vreg_bahama);
6769unget:
6770 regulator_put(vreg_bahama);
6771 return rc;
6772};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006773
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006774static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006775{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006776 if (msm_bahama_setup_power_enable) {
6777 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6778 gpio_free(msm_bahama_sys_rst);
6779 regulator_disable(vreg_bahama);
6780 regulator_put(vreg_bahama);
6781 msm_bahama_setup_power_enable = 0;
6782 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006783
6784 return 0;
6785};
6786
6787static unsigned int msm_bahama_core_config(int type)
6788{
6789 int rc = 0;
6790
6791 if (type == BAHAMA_ID) {
6792
6793 int i;
6794 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6795
6796 const struct bahama_config_register v20_init[] = {
6797 /* reg, value, mask */
6798 { 0xF4, 0x84, 0xFF }, /* AREG */
6799 { 0xF0, 0x04, 0xFF } /* DREG */
6800 };
6801
6802 if (read_bahama_ver() == VER_2_0) {
6803 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6804 u8 value = v20_init[i].value;
6805 rc = marimba_write_bit_mask(&config,
6806 v20_init[i].reg,
6807 &value,
6808 sizeof(v20_init[i].value),
6809 v20_init[i].mask);
6810 if (rc < 0) {
6811 printk(KERN_ERR
6812 "%s: reg %d write failed: %d\n",
6813 __func__, v20_init[i].reg, rc);
6814 return rc;
6815 }
6816 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6817 " mask 0x%02x\n",
6818 __func__, v20_init[i].reg,
6819 v20_init[i].value, v20_init[i].mask);
6820 }
6821 }
6822 }
6823 printk(KERN_INFO "core type: %d\n", type);
6824
6825 return rc;
6826}
6827
6828static struct regulator *fm_regulator_s3;
6829static struct msm_xo_voter *fm_clock;
6830
6831static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6832{
6833 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306834 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006835 .direction = PM_GPIO_DIR_IN,
6836 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306837 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006838 .function = PM_GPIO_FUNC_NORMAL,
6839 .inv_int_pol = 0,
6840 };
6841
6842 if (!fm_regulator_s3) {
6843 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6844 if (IS_ERR(fm_regulator_s3)) {
6845 rc = PTR_ERR(fm_regulator_s3);
6846 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6847 __func__, rc);
6848 goto out;
6849 }
6850 }
6851
6852
6853 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6854 if (rc < 0) {
6855 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6856 __func__, rc);
6857 goto fm_fail_put;
6858 }
6859
6860 rc = regulator_enable(fm_regulator_s3);
6861 if (rc < 0) {
6862 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6863 __func__, rc);
6864 goto fm_fail_put;
6865 }
6866
6867 /*Vote for XO clock*/
6868 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6869
6870 if (IS_ERR(fm_clock)) {
6871 rc = PTR_ERR(fm_clock);
6872 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6873 __func__, rc);
6874 goto fm_fail_switch;
6875 }
6876
6877 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6878 if (rc < 0) {
6879 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6880 __func__, rc);
6881 goto fm_fail_vote;
6882 }
6883
6884 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306885 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006886 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306887 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006888 __func__, rc);
6889 goto fm_fail_clock;
6890 }
6891 goto out;
6892
6893fm_fail_clock:
6894 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6895fm_fail_vote:
6896 msm_xo_put(fm_clock);
6897fm_fail_switch:
6898 regulator_disable(fm_regulator_s3);
6899fm_fail_put:
6900 regulator_put(fm_regulator_s3);
6901out:
6902 return rc;
6903};
6904
6905static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6906{
6907 int rc = 0;
6908 if (fm_regulator_s3 != NULL) {
6909 rc = regulator_disable(fm_regulator_s3);
6910 if (rc < 0) {
6911 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6912 __func__, rc);
6913 }
6914 regulator_put(fm_regulator_s3);
6915 fm_regulator_s3 = NULL;
6916 }
6917 printk(KERN_ERR "%s: Voting off for XO", __func__);
6918
6919 if (fm_clock != NULL) {
6920 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6921 if (rc < 0) {
6922 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6923 __func__, rc);
6924 }
6925 msm_xo_put(fm_clock);
6926 }
6927 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6928}
6929
6930/* Slave id address for FM/CDC/QMEMBIST
6931 * Values can be programmed using Marimba slave id 0
6932 * should there be a conflict with other I2C devices
6933 * */
6934#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6935#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6936
6937static struct marimba_fm_platform_data marimba_fm_pdata = {
6938 .fm_setup = fm_radio_setup,
6939 .fm_shutdown = fm_radio_shutdown,
6940 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
6941 .is_fm_soc_i2s_master = false,
6942 .config_i2s_gpio = NULL,
6943};
6944
6945/*
6946Just initializing the BAHAMA related slave
6947*/
6948static struct marimba_platform_data marimba_pdata = {
6949 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
6950 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
6951 .bahama_setup = msm_bahama_setup_power,
6952 .bahama_shutdown = msm_bahama_shutdown_power,
6953 .bahama_core_config = msm_bahama_core_config,
6954 .fm = &marimba_fm_pdata,
6955 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6956};
6957
6958
6959static struct i2c_board_info msm_marimba_board_info[] = {
6960 {
6961 I2C_BOARD_INFO("marimba", 0xc),
6962 .platform_data = &marimba_pdata,
6963 }
6964};
6965#endif /* CONFIG_MAIMBA_CORE */
6966
6967#ifdef CONFIG_I2C
6968#define I2C_SURF 1
6969#define I2C_FFA (1 << 1)
6970#define I2C_RUMI (1 << 2)
6971#define I2C_SIM (1 << 3)
6972#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006973#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006974
6975struct i2c_registry {
6976 u8 machs;
6977 int bus;
6978 struct i2c_board_info *info;
6979 int len;
6980};
6981
6982static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006983#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
6984 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006985 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006986 MSM_GSBI8_QUP_I2C_BUS_ID,
6987 core_expander_i2c_info,
6988 ARRAY_SIZE(core_expander_i2c_info),
6989 },
6990 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006991 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006992 MSM_GSBI8_QUP_I2C_BUS_ID,
6993 docking_expander_i2c_info,
6994 ARRAY_SIZE(docking_expander_i2c_info),
6995 },
6996 {
6997 I2C_SURF,
6998 MSM_GSBI8_QUP_I2C_BUS_ID,
6999 surf_expanders_i2c_info,
7000 ARRAY_SIZE(surf_expanders_i2c_info),
7001 },
7002 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007003 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007004 MSM_GSBI3_QUP_I2C_BUS_ID,
7005 fha_expanders_i2c_info,
7006 ARRAY_SIZE(fha_expanders_i2c_info),
7007 },
7008 {
7009 I2C_FLUID,
7010 MSM_GSBI3_QUP_I2C_BUS_ID,
7011 fluid_expanders_i2c_info,
7012 ARRAY_SIZE(fluid_expanders_i2c_info),
7013 },
7014 {
7015 I2C_FLUID,
7016 MSM_GSBI8_QUP_I2C_BUS_ID,
7017 fluid_core_expander_i2c_info,
7018 ARRAY_SIZE(fluid_core_expander_i2c_info),
7019 },
7020#endif
7021#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7022 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7023 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007024 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007025 MSM_GSBI3_QUP_I2C_BUS_ID,
7026 msm_i2c_gsbi3_tdisc_info,
7027 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7028 },
7029#endif
7030 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007031 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007032 MSM_GSBI3_QUP_I2C_BUS_ID,
7033 cy8ctmg200_board_info,
7034 ARRAY_SIZE(cy8ctmg200_board_info),
7035 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007036 {
7037 I2C_DRAGON,
7038 MSM_GSBI3_QUP_I2C_BUS_ID,
7039 cy8ctma340_dragon_board_info,
7040 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7041 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007042#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7043 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7044 {
7045 I2C_FLUID,
7046 MSM_GSBI3_QUP_I2C_BUS_ID,
7047 cyttsp_fluid_info,
7048 ARRAY_SIZE(cyttsp_fluid_info),
7049 },
7050 {
7051 I2C_FFA | I2C_SURF,
7052 MSM_GSBI3_QUP_I2C_BUS_ID,
7053 cyttsp_ffa_info,
7054 ARRAY_SIZE(cyttsp_ffa_info),
7055 },
7056#endif
7057#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007058 {
7059 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007060 MSM_GSBI4_QUP_I2C_BUS_ID,
7061 msm_camera_boardinfo,
7062 ARRAY_SIZE(msm_camera_boardinfo),
7063 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007064 {
7065 I2C_DRAGON,
7066 MSM_GSBI4_QUP_I2C_BUS_ID,
7067 msm_camera_dragon_boardinfo,
7068 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7069 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007070#endif
7071 {
7072 I2C_SURF | I2C_FFA | I2C_FLUID,
7073 MSM_GSBI7_QUP_I2C_BUS_ID,
7074 msm_i2c_gsbi7_timpani_info,
7075 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7076 },
7077#if defined(CONFIG_MARIMBA_CORE)
7078 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007079 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007080 MSM_GSBI7_QUP_I2C_BUS_ID,
7081 msm_marimba_board_info,
7082 ARRAY_SIZE(msm_marimba_board_info),
7083 },
7084#endif /* CONFIG_MARIMBA_CORE */
7085#ifdef CONFIG_ISL9519_CHARGER
7086 {
7087 I2C_SURF | I2C_FFA,
7088 MSM_GSBI8_QUP_I2C_BUS_ID,
7089 isl_charger_i2c_info,
7090 ARRAY_SIZE(isl_charger_i2c_info),
7091 },
7092#endif
7093#if defined(CONFIG_HAPTIC_ISA1200) || \
7094 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7095 {
7096 I2C_FLUID,
7097 MSM_GSBI8_QUP_I2C_BUS_ID,
7098 msm_isa1200_board_info,
7099 ARRAY_SIZE(msm_isa1200_board_info),
7100 },
7101#endif
7102#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7103 {
7104 I2C_FLUID,
7105 MSM_GSBI8_QUP_I2C_BUS_ID,
7106 smb137b_charger_i2c_info,
7107 ARRAY_SIZE(smb137b_charger_i2c_info),
7108 },
7109#endif
7110#if defined(CONFIG_BATTERY_BQ27520) || \
7111 defined(CONFIG_BATTERY_BQ27520_MODULE)
7112 {
7113 I2C_FLUID,
7114 MSM_GSBI8_QUP_I2C_BUS_ID,
7115 msm_bq27520_board_info,
7116 ARRAY_SIZE(msm_bq27520_board_info),
7117 },
7118#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007119#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7120 {
7121 I2C_DRAGON,
7122 MSM_GSBI8_QUP_I2C_BUS_ID,
7123 wm8903_codec_i2c_info,
7124 ARRAY_SIZE(wm8903_codec_i2c_info),
7125 },
7126#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007127};
7128#endif /* CONFIG_I2C */
7129
7130static void fixup_i2c_configs(void)
7131{
7132#ifdef CONFIG_I2C
7133#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7134 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7135 sx150x_data[SX150X_CORE].irq_summary =
7136 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007137 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7138 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007139 sx150x_data[SX150X_CORE].irq_summary =
7140 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7141 else if (machine_is_msm8x60_fluid())
7142 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7143 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7144#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007145#endif
7146}
7147
7148static void register_i2c_devices(void)
7149{
7150#ifdef CONFIG_I2C
7151 u8 mach_mask = 0;
7152 int i;
7153
7154 /* Build the matching 'supported_machs' bitmask */
7155 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7156 mach_mask = I2C_SURF;
7157 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7158 mach_mask = I2C_FFA;
7159 else if (machine_is_msm8x60_rumi3())
7160 mach_mask = I2C_RUMI;
7161 else if (machine_is_msm8x60_sim())
7162 mach_mask = I2C_SIM;
7163 else if (machine_is_msm8x60_fluid())
7164 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007165 else if (machine_is_msm8x60_dragon())
7166 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007167 else
7168 pr_err("unmatched machine ID in register_i2c_devices\n");
7169
7170 /* Run the array and install devices as appropriate */
7171 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7172 if (msm8x60_i2c_devices[i].machs & mach_mask)
7173 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7174 msm8x60_i2c_devices[i].info,
7175 msm8x60_i2c_devices[i].len);
7176 }
7177#endif
7178}
7179
7180static void __init msm8x60_init_uart12dm(void)
7181{
7182#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7183 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7184 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7185
7186 if (!fpga_mem)
7187 pr_err("%s(): Error getting memory\n", __func__);
7188
7189 /* Advanced mode */
7190 writew(0xFFFF, fpga_mem + 0x15C);
7191 /* FPGA_UART_SEL */
7192 writew(0, fpga_mem + 0x172);
7193 /* FPGA_GPIO_CONFIG_117 */
7194 writew(1, fpga_mem + 0xEA);
7195 /* FPGA_GPIO_CONFIG_118 */
7196 writew(1, fpga_mem + 0xEC);
7197 mb();
7198 iounmap(fpga_mem);
7199#endif
7200}
7201
7202#define MSM_GSBI9_PHYS 0x19900000
7203#define GSBI_DUAL_MODE_CODE 0x60
7204
7205static void __init msm8x60_init_buses(void)
7206{
7207#ifdef CONFIG_I2C_QUP
7208 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7209 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7210 writel_relaxed(0x6 << 4, gsbi_mem);
7211 /* Ensure protocol code is written before proceeding further */
7212 mb();
7213 iounmap(gsbi_mem);
7214
7215 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7216 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7217 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7218 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7219
7220#ifdef CONFIG_MSM_GSBI9_UART
7221 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7222 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7223 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7224 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7225 iounmap(gsbi_mem);
7226 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7227 }
7228#endif
7229 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7230 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7231#endif
7232#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7233 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7234#endif
7235#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007236 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7237#endif
7238
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307239#ifdef CONFIG_MSM_SSBI
7240 msm_device_ssbi_pmic1.dev.platform_data =
7241 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307242 msm_device_ssbi_pmic2.dev.platform_data =
7243 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307244#endif
7245
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007246 if (machine_is_msm8x60_fluid()) {
7247#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7248 (defined(CONFIG_SMB137B_CHARGER) || \
7249 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7250 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7251#endif
7252#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7253 msm_gsbi10_qup_spi_device.dev.platform_data =
7254 &msm_gsbi10_qup_spi_pdata;
7255#endif
7256 }
7257
7258#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7259 /*
7260 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7261 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7262 * and ID notifications are available only on V2 surf and FFA
7263 * with a hardware workaround.
7264 */
7265 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7266 (machine_is_msm8x60_surf() ||
7267 (machine_is_msm8x60_ffa() &&
7268 pmic_id_notif_supported)))
7269 msm_otg_pdata.phy_can_powercollapse = 1;
7270 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7271#endif
7272
7273#ifdef CONFIG_USB_GADGET_MSM_72K
7274 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7275#endif
7276
7277#ifdef CONFIG_SERIAL_MSM_HS
7278 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7279 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7280#endif
7281#ifdef CONFIG_MSM_GSBI9_UART
7282 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7283 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7284 if (IS_ERR(msm_device_uart_gsbi9))
7285 pr_err("%s(): Failed to create uart gsbi9 device\n",
7286 __func__);
7287 }
7288#endif
7289
7290#ifdef CONFIG_MSM_BUS_SCALING
7291
7292 /* RPM calls are only enabled on V2 */
7293 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7294 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7295 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7296 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7297 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7298 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7299 }
7300
7301 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7302 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7303 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7304 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7305 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7306#endif
7307}
7308
7309static void __init msm8x60_map_io(void)
7310{
7311 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7312 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007313
7314 if (socinfo_init() < 0)
7315 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007316}
7317
7318/*
7319 * Most segments of the EBI2 bus are disabled by default.
7320 */
7321static void __init msm8x60_init_ebi2(void)
7322{
7323 uint32_t ebi2_cfg;
7324 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007325 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7326
7327 if (IS_ERR(mem_clk)) {
7328 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7329 "msm_ebi2", "mem_clk");
7330 return;
7331 }
7332 clk_enable(mem_clk);
7333 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007334
7335 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7336 if (ebi2_cfg_ptr != 0) {
7337 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7338
7339 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007340 machine_is_msm8x60_fluid() ||
7341 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007342 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7343 else if (machine_is_msm8x60_sim())
7344 ebi2_cfg |= (1 << 4); /* CS2 */
7345 else if (machine_is_msm8x60_rumi3())
7346 ebi2_cfg |= (1 << 5); /* CS3 */
7347
7348 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7349 iounmap(ebi2_cfg_ptr);
7350 }
7351
7352 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007353 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007354 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7355 if (ebi2_cfg_ptr != 0) {
7356 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7357 writel_relaxed(0UL, ebi2_cfg_ptr);
7358
7359 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7360 * LAN9221 Ethernet controller reads and writes.
7361 * The lowest 4 bits are the read delay, the next
7362 * 4 are the write delay. */
7363 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7364#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7365 /*
7366 * RECOVERY=5, HOLD_WR=1
7367 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7368 * WAIT_WR=1, WAIT_RD=2
7369 */
7370 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7371 /*
7372 * HOLD_RD=1
7373 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7374 */
7375 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7376#else
7377 /* EBI2 CS3 muxed address/data,
7378 * two cyc addr enable */
7379 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7380
7381#endif
7382 iounmap(ebi2_cfg_ptr);
7383 }
7384 }
7385}
7386
7387static void __init msm8x60_configure_smc91x(void)
7388{
7389 if (machine_is_msm8x60_sim()) {
7390
7391 smc91x_resources[0].start = 0x1b800300;
7392 smc91x_resources[0].end = 0x1b8003ff;
7393
7394 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7395 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7396
7397 } else if (machine_is_msm8x60_rumi3()) {
7398
7399 smc91x_resources[0].start = 0x1d000300;
7400 smc91x_resources[0].end = 0x1d0003ff;
7401
7402 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7403 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7404 }
7405}
7406
7407static void __init msm8x60_init_tlmm(void)
7408{
7409 if (machine_is_msm8x60_rumi3())
7410 msm_gpio_install_direct_irq(0, 0, 1);
7411}
7412
7413#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7414 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7415 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7416 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7417 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7418
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007419/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007420#define MAX_SDCC_CONTROLLER 5
7421
7422struct msm_sdcc_gpio {
7423 /* maximum 10 GPIOs per SDCC controller */
7424 s16 no;
7425 /* name of this GPIO */
7426 const char *name;
7427 bool always_on;
7428 bool is_enabled;
7429};
7430
7431#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7432static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7433 {159, "sdc1_dat_0"},
7434 {160, "sdc1_dat_1"},
7435 {161, "sdc1_dat_2"},
7436 {162, "sdc1_dat_3"},
7437#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7438 {163, "sdc1_dat_4"},
7439 {164, "sdc1_dat_5"},
7440 {165, "sdc1_dat_6"},
7441 {166, "sdc1_dat_7"},
7442#endif
7443 {167, "sdc1_clk"},
7444 {168, "sdc1_cmd"}
7445};
7446#endif
7447
7448#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7449static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7450 {143, "sdc2_dat_0"},
7451 {144, "sdc2_dat_1", 1},
7452 {145, "sdc2_dat_2"},
7453 {146, "sdc2_dat_3"},
7454#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7455 {147, "sdc2_dat_4"},
7456 {148, "sdc2_dat_5"},
7457 {149, "sdc2_dat_6"},
7458 {150, "sdc2_dat_7"},
7459#endif
7460 {151, "sdc2_cmd"},
7461 {152, "sdc2_clk", 1}
7462};
7463#endif
7464
7465#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7466static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7467 {95, "sdc5_cmd"},
7468 {96, "sdc5_dat_3"},
7469 {97, "sdc5_clk", 1},
7470 {98, "sdc5_dat_2"},
7471 {99, "sdc5_dat_1", 1},
7472 {100, "sdc5_dat_0"}
7473};
7474#endif
7475
7476struct msm_sdcc_pad_pull_cfg {
7477 enum msm_tlmm_pull_tgt pull;
7478 u32 pull_val;
7479};
7480
7481struct msm_sdcc_pad_drv_cfg {
7482 enum msm_tlmm_hdrive_tgt drv;
7483 u32 drv_val;
7484};
7485
7486#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7487static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7488 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7489 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7490 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7491};
7492
7493static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7494 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7495 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7496};
7497
7498static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7499 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7500 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7501 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7502};
7503
7504static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7505 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7506 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7507};
7508#endif
7509
7510#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7511static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7512 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7513 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7514 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7515};
7516
7517static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7518 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7519 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7520};
7521
7522static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7523 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7524 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7525 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7526};
7527
7528static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7529 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7530 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7531};
7532#endif
7533
7534struct msm_sdcc_pin_cfg {
7535 /*
7536 * = 1 if controller pins are using gpios
7537 * = 0 if controller has dedicated MSM pins
7538 */
7539 u8 is_gpio;
7540 u8 cfg_sts;
7541 u8 gpio_data_size;
7542 struct msm_sdcc_gpio *gpio_data;
7543 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7544 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7545 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7546 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7547 u8 pad_drv_data_size;
7548 u8 pad_pull_data_size;
7549 u8 sdio_lpm_gpio_cfg;
7550};
7551
7552
7553static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7554#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7555 [0] = {
7556 .is_gpio = 1,
7557 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7558 .gpio_data = sdc1_gpio_cfg
7559 },
7560#endif
7561#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7562 [1] = {
7563 .is_gpio = 1,
7564 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7565 .gpio_data = sdc2_gpio_cfg
7566 },
7567#endif
7568#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7569 [2] = {
7570 .is_gpio = 0,
7571 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7572 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7573 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7574 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7575 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7576 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7577 },
7578#endif
7579#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7580 [3] = {
7581 .is_gpio = 0,
7582 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7583 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7584 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7585 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7586 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7587 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7588 },
7589#endif
7590#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7591 [4] = {
7592 .is_gpio = 1,
7593 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7594 .gpio_data = sdc5_gpio_cfg
7595 }
7596#endif
7597};
7598
7599static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7600{
7601 int rc = 0;
7602 struct msm_sdcc_pin_cfg *curr;
7603 int n;
7604
7605 curr = &sdcc_pin_cfg_data[dev_id - 1];
7606 if (!curr->gpio_data)
7607 goto out;
7608
7609 for (n = 0; n < curr->gpio_data_size; n++) {
7610 if (enable) {
7611
7612 if (curr->gpio_data[n].always_on &&
7613 curr->gpio_data[n].is_enabled)
7614 continue;
7615 pr_debug("%s: enable: %s\n", __func__,
7616 curr->gpio_data[n].name);
7617 rc = gpio_request(curr->gpio_data[n].no,
7618 curr->gpio_data[n].name);
7619 if (rc) {
7620 pr_err("%s: gpio_request(%d, %s)"
7621 "failed", __func__,
7622 curr->gpio_data[n].no,
7623 curr->gpio_data[n].name);
7624 goto free_gpios;
7625 }
7626 /* set direction as output for all GPIOs */
7627 rc = gpio_direction_output(
7628 curr->gpio_data[n].no, 1);
7629 if (rc) {
7630 pr_err("%s: gpio_direction_output"
7631 "(%d, 1) failed\n", __func__,
7632 curr->gpio_data[n].no);
7633 goto free_gpios;
7634 }
7635 curr->gpio_data[n].is_enabled = 1;
7636 } else {
7637 /*
7638 * now free this GPIO which will put GPIO
7639 * in low power mode and will also put GPIO
7640 * in input mode
7641 */
7642 if (curr->gpio_data[n].always_on)
7643 continue;
7644 pr_debug("%s: disable: %s\n", __func__,
7645 curr->gpio_data[n].name);
7646 gpio_free(curr->gpio_data[n].no);
7647 curr->gpio_data[n].is_enabled = 0;
7648 }
7649 }
7650 curr->cfg_sts = enable;
7651 goto out;
7652
7653free_gpios:
7654 for (; n >= 0; n--)
7655 gpio_free(curr->gpio_data[n].no);
7656out:
7657 return rc;
7658}
7659
7660static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7661{
7662 int rc = 0;
7663 struct msm_sdcc_pin_cfg *curr;
7664 int n;
7665
7666 curr = &sdcc_pin_cfg_data[dev_id - 1];
7667 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7668 goto out;
7669
7670 if (enable) {
7671 /*
7672 * set up the normal driver strength and
7673 * pull config for pads
7674 */
7675 for (n = 0; n < curr->pad_drv_data_size; n++) {
7676 if (curr->sdio_lpm_gpio_cfg) {
7677 if (curr->pad_drv_on_data[n].drv ==
7678 TLMM_HDRV_SDC4_DATA)
7679 continue;
7680 }
7681 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7682 curr->pad_drv_on_data[n].drv_val);
7683 }
7684 for (n = 0; n < curr->pad_pull_data_size; n++) {
7685 if (curr->sdio_lpm_gpio_cfg) {
7686 if (curr->pad_pull_on_data[n].pull ==
7687 TLMM_PULL_SDC4_DATA)
7688 continue;
7689 }
7690 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7691 curr->pad_pull_on_data[n].pull_val);
7692 }
7693 } else {
7694 /* set the low power config for pads */
7695 for (n = 0; n < curr->pad_drv_data_size; n++) {
7696 if (curr->sdio_lpm_gpio_cfg) {
7697 if (curr->pad_drv_off_data[n].drv ==
7698 TLMM_HDRV_SDC4_DATA)
7699 continue;
7700 }
7701 msm_tlmm_set_hdrive(
7702 curr->pad_drv_off_data[n].drv,
7703 curr->pad_drv_off_data[n].drv_val);
7704 }
7705 for (n = 0; n < curr->pad_pull_data_size; n++) {
7706 if (curr->sdio_lpm_gpio_cfg) {
7707 if (curr->pad_pull_off_data[n].pull ==
7708 TLMM_PULL_SDC4_DATA)
7709 continue;
7710 }
7711 msm_tlmm_set_pull(
7712 curr->pad_pull_off_data[n].pull,
7713 curr->pad_pull_off_data[n].pull_val);
7714 }
7715 }
7716 curr->cfg_sts = enable;
7717out:
7718 return rc;
7719}
7720
7721struct sdcc_reg {
7722 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7723 const char *reg_name;
7724 /*
7725 * is set voltage supported for this regulator?
7726 * 0 = not supported, 1 = supported
7727 */
7728 unsigned char set_voltage_sup;
7729 /* voltage level to be set */
7730 unsigned int level;
7731 /* VDD/VCC/VCCQ voltage regulator handle */
7732 struct regulator *reg;
7733 /* is this regulator enabled? */
7734 bool enabled;
7735 /* is this regulator needs to be always on? */
7736 bool always_on;
7737 /* is operating power mode setting required for this regulator? */
7738 bool op_pwr_mode_sup;
7739 /* Load values for low power and high power mode */
7740 unsigned int lpm_uA;
7741 unsigned int hpm_uA;
7742};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007743/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007744static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7745/* only SDCC1 requires VCCQ voltage */
7746static struct sdcc_reg sdcc_vccq_reg_data[1];
7747/* all SDCC controllers may require voting for VDD PAD voltage */
7748static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7749
7750struct sdcc_reg_data {
7751 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7752 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7753 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7754 unsigned char sts; /* regulator enable/disable status */
7755};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007756/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007757static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7758
7759static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7760{
7761 int rc = 0;
7762
7763 /* Get the regulator handle */
7764 vreg->reg = regulator_get(NULL, vreg->reg_name);
7765 if (IS_ERR(vreg->reg)) {
7766 rc = PTR_ERR(vreg->reg);
7767 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7768 __func__, vreg->reg_name, rc);
7769 goto out;
7770 }
7771
7772 /* Set the voltage level if required */
7773 if (vreg->set_voltage_sup) {
7774 rc = regulator_set_voltage(vreg->reg, vreg->level,
7775 vreg->level);
7776 if (rc) {
7777 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7778 __func__, vreg->reg_name, rc);
7779 goto vreg_put;
7780 }
7781 }
7782 goto out;
7783
7784vreg_put:
7785 regulator_put(vreg->reg);
7786out:
7787 return rc;
7788}
7789
7790static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7791{
7792 regulator_put(vreg->reg);
7793}
7794
7795/* this init function should be called only once for each SDCC */
7796static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7797{
7798 int rc = 0;
7799 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7800 struct sdcc_reg_data *curr;
7801
7802 curr = &sdcc_vreg_data[dev_id - 1];
7803 curr_vdd_reg = curr->vdd_data;
7804 curr_vccq_reg = curr->vccq_data;
7805 curr_vddp_reg = curr->vddp_data;
7806
7807 if (init) {
7808 /*
7809 * get the regulator handle from voltage regulator framework
7810 * and then try to set the voltage level for the regulator
7811 */
7812 if (curr_vdd_reg) {
7813 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7814 if (rc)
7815 goto out;
7816 }
7817 if (curr_vccq_reg) {
7818 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7819 if (rc)
7820 goto vdd_reg_deinit;
7821 }
7822 if (curr_vddp_reg) {
7823 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7824 if (rc)
7825 goto vccq_reg_deinit;
7826 }
7827 goto out;
7828 } else
7829 /* deregister with all regulators from regulator framework */
7830 goto vddp_reg_deinit;
7831
7832vddp_reg_deinit:
7833 if (curr_vddp_reg)
7834 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7835vccq_reg_deinit:
7836 if (curr_vccq_reg)
7837 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7838vdd_reg_deinit:
7839 if (curr_vdd_reg)
7840 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7841out:
7842 return rc;
7843}
7844
7845static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7846{
7847 int rc;
7848
7849 if (!vreg->enabled) {
7850 rc = regulator_enable(vreg->reg);
7851 if (rc) {
7852 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7853 __func__, vreg->reg_name, rc);
7854 goto out;
7855 }
7856 vreg->enabled = 1;
7857 }
7858
7859 /* Put always_on regulator in HPM (high power mode) */
7860 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7861 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7862 if (rc < 0) {
7863 pr_err("%s: reg=%s: HPM setting failed"
7864 " hpm_uA=%d, rc=%d\n",
7865 __func__, vreg->reg_name,
7866 vreg->hpm_uA, rc);
7867 goto vreg_disable;
7868 }
7869 rc = 0;
7870 }
7871 goto out;
7872
7873vreg_disable:
7874 regulator_disable(vreg->reg);
7875 vreg->enabled = 0;
7876out:
7877 return rc;
7878}
7879
7880static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7881{
7882 int rc;
7883
7884 /* Never disable always_on regulator */
7885 if (!vreg->always_on) {
7886 rc = regulator_disable(vreg->reg);
7887 if (rc) {
7888 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7889 __func__, vreg->reg_name, rc);
7890 goto out;
7891 }
7892 vreg->enabled = 0;
7893 }
7894
7895 /* Put always_on regulator in LPM (low power mode) */
7896 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7897 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7898 if (rc < 0) {
7899 pr_err("%s: reg=%s: LPM setting failed"
7900 " lpm_uA=%d, rc=%d\n",
7901 __func__,
7902 vreg->reg_name,
7903 vreg->lpm_uA, rc);
7904 goto out;
7905 }
7906 rc = 0;
7907 }
7908
7909out:
7910 return rc;
7911}
7912
7913static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7914{
7915 int rc = 0;
7916 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7917 struct sdcc_reg_data *curr;
7918
7919 curr = &sdcc_vreg_data[dev_id - 1];
7920 curr_vdd_reg = curr->vdd_data;
7921 curr_vccq_reg = curr->vccq_data;
7922 curr_vddp_reg = curr->vddp_data;
7923
7924 /* check if regulators are initialized or not? */
7925 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7926 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7927 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7928 /* initialize voltage regulators required for this SDCC */
7929 rc = msm_sdcc_vreg_init(dev_id, 1);
7930 if (rc) {
7931 pr_err("%s: regulator init failed = %d\n",
7932 __func__, rc);
7933 goto out;
7934 }
7935 }
7936
7937 if (curr->sts == enable)
7938 goto out;
7939
7940 if (curr_vdd_reg) {
7941 if (enable)
7942 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
7943 else
7944 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
7945 if (rc)
7946 goto out;
7947 }
7948
7949 if (curr_vccq_reg) {
7950 if (enable)
7951 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
7952 else
7953 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
7954 if (rc)
7955 goto out;
7956 }
7957
7958 if (curr_vddp_reg) {
7959 if (enable)
7960 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
7961 else
7962 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
7963 if (rc)
7964 goto out;
7965 }
7966 curr->sts = enable;
7967
7968out:
7969 return rc;
7970}
7971
7972static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
7973{
7974 u32 rc_pin_cfg = 0;
7975 u32 rc_vreg_cfg = 0;
7976 u32 rc = 0;
7977 struct platform_device *pdev;
7978 struct msm_sdcc_pin_cfg *curr_pin_cfg;
7979
7980 pdev = container_of(dv, struct platform_device, dev);
7981
7982 /* setup gpio/pad */
7983 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
7984 if (curr_pin_cfg->cfg_sts == !!vdd)
7985 goto setup_vreg;
7986
7987 if (curr_pin_cfg->is_gpio)
7988 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
7989 else
7990 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
7991
7992setup_vreg:
7993 /* setup voltage regulators */
7994 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
7995
7996 if (rc_pin_cfg || rc_vreg_cfg)
7997 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
7998
7999 return rc;
8000}
8001
8002static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8003{
8004 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8005 struct platform_device *pdev;
8006
8007 pdev = container_of(dv, struct platform_device, dev);
8008 /* setup gpio/pad */
8009 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8010
8011 if (curr_pin_cfg->cfg_sts == active)
8012 return;
8013
8014 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8015 if (curr_pin_cfg->is_gpio)
8016 msm_sdcc_setup_gpio(pdev->id, active);
8017 else
8018 msm_sdcc_setup_pad(pdev->id, active);
8019 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8020}
8021
8022static int msm_sdc3_get_wpswitch(struct device *dev)
8023{
8024 struct platform_device *pdev;
8025 int status;
8026 pdev = container_of(dev, struct platform_device, dev);
8027
8028 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8029 if (status) {
8030 pr_err("%s:Failed to request GPIO %d\n",
8031 __func__, GPIO_SDC_WP);
8032 } else {
8033 status = gpio_direction_input(GPIO_SDC_WP);
8034 if (!status) {
8035 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8036 pr_info("%s: WP Status for Slot %d = %d\n",
8037 __func__, pdev->id, status);
8038 }
8039 gpio_free(GPIO_SDC_WP);
8040 }
8041 return status;
8042}
8043
8044#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8045int sdc5_register_status_notify(void (*callback)(int, void *),
8046 void *dev_id)
8047{
8048 sdc5_status_notify_cb = callback;
8049 sdc5_status_notify_cb_devid = dev_id;
8050 return 0;
8051}
8052#endif
8053
8054#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8055int sdc2_register_status_notify(void (*callback)(int, void *),
8056 void *dev_id)
8057{
8058 sdc2_status_notify_cb = callback;
8059 sdc2_status_notify_cb_devid = dev_id;
8060 return 0;
8061}
8062#endif
8063
8064/* Interrupt handler for SDC2 and SDC5 detection
8065 * This function uses dual-edge interrputs settings in order
8066 * to get SDIO detection when the GPIO is rising and SDIO removal
8067 * when the GPIO is falling */
8068static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8069{
8070 int status;
8071
8072 if (!machine_is_msm8x60_fusion() &&
8073 !machine_is_msm8x60_fusn_ffa())
8074 return IRQ_NONE;
8075
8076 status = gpio_get_value(MDM2AP_SYNC);
8077 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8078 __func__, status);
8079
8080#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8081 if (sdc2_status_notify_cb) {
8082 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8083 sdc2_status_notify_cb(status,
8084 sdc2_status_notify_cb_devid);
8085 }
8086#endif
8087
8088#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8089 if (sdc5_status_notify_cb) {
8090 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8091 sdc5_status_notify_cb(status,
8092 sdc5_status_notify_cb_devid);
8093 }
8094#endif
8095 return IRQ_HANDLED;
8096}
8097
8098static int msm8x60_multi_sdio_init(void)
8099{
8100 int ret, irq_num;
8101
8102 if (!machine_is_msm8x60_fusion() &&
8103 !machine_is_msm8x60_fusn_ffa())
8104 return 0;
8105
8106 ret = msm_gpiomux_get(MDM2AP_SYNC);
8107 if (ret) {
8108 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8109 __func__, MDM2AP_SYNC, ret);
8110 return ret;
8111 }
8112
8113 irq_num = gpio_to_irq(MDM2AP_SYNC);
8114
8115 ret = request_irq(irq_num,
8116 msm8x60_multi_sdio_slot_status_irq,
8117 IRQ_TYPE_EDGE_BOTH,
8118 "sdio_multidetection", NULL);
8119
8120 if (ret) {
8121 pr_err("%s:Failed to request irq, ret=%d\n",
8122 __func__, ret);
8123 return ret;
8124 }
8125
8126 return ret;
8127}
8128
8129#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8130#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8131static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8132{
8133 int status;
8134
8135 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8136 , "SD_HW_Detect");
8137 if (status) {
8138 pr_err("%s:Failed to request GPIO %d\n", __func__,
8139 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8140 } else {
8141 status = gpio_direction_input(
8142 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8143 if (!status)
8144 status = !(gpio_get_value_cansleep(
8145 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8146 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8147 }
8148 return (unsigned int) status;
8149}
8150#endif
8151#endif
8152
8153#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8154static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8155{
8156 struct platform_device *pdev;
8157 enum msm_mpm_pin pin;
8158 int ret = 0;
8159
8160 pdev = container_of(dev, struct platform_device, dev);
8161
8162 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8163 if (pdev->id == 4)
8164 pin = MSM_MPM_PIN_SDC4_DAT1;
8165 else
8166 return -EINVAL;
8167
8168 switch (mode) {
8169 case SDC_DAT1_DISABLE:
8170 ret = msm_mpm_enable_pin(pin, 0);
8171 break;
8172 case SDC_DAT1_ENABLE:
8173 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8174 ret = msm_mpm_enable_pin(pin, 1);
8175 break;
8176 case SDC_DAT1_ENWAKE:
8177 ret = msm_mpm_set_pin_wake(pin, 1);
8178 break;
8179 case SDC_DAT1_DISWAKE:
8180 ret = msm_mpm_set_pin_wake(pin, 0);
8181 break;
8182 default:
8183 ret = -EINVAL;
8184 break;
8185 }
8186 return ret;
8187}
8188#endif
8189#endif
8190
8191#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8192static struct mmc_platform_data msm8x60_sdc1_data = {
8193 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8194 .translate_vdd = msm_sdcc_setup_power,
8195#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8196 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8197#else
8198 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8199#endif
8200 .msmsdcc_fmin = 400000,
8201 .msmsdcc_fmid = 24000000,
8202 .msmsdcc_fmax = 48000000,
8203 .nonremovable = 1,
8204 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008205};
8206#endif
8207
8208#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8209static struct mmc_platform_data msm8x60_sdc2_data = {
8210 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8211 .translate_vdd = msm_sdcc_setup_power,
8212 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8213 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8214 .msmsdcc_fmin = 400000,
8215 .msmsdcc_fmid = 24000000,
8216 .msmsdcc_fmax = 48000000,
8217 .nonremovable = 0,
8218 .pclk_src_dfab = 1,
8219 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008220#ifdef CONFIG_MSM_SDIO_AL
8221 .is_sdio_al_client = 1,
8222#endif
8223};
8224#endif
8225
8226#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8227static struct mmc_platform_data msm8x60_sdc3_data = {
8228 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8229 .translate_vdd = msm_sdcc_setup_power,
8230 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8231 .wpswitch = msm_sdc3_get_wpswitch,
8232#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8233 .status = msm8x60_sdcc_slot_status,
8234 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8235 PMIC_GPIO_SDC3_DET - 1),
8236 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8237#endif
8238 .msmsdcc_fmin = 400000,
8239 .msmsdcc_fmid = 24000000,
8240 .msmsdcc_fmax = 48000000,
8241 .nonremovable = 0,
8242 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008243};
8244#endif
8245
8246#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8247static struct mmc_platform_data msm8x60_sdc4_data = {
8248 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8249 .translate_vdd = msm_sdcc_setup_power,
8250 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8251 .msmsdcc_fmin = 400000,
8252 .msmsdcc_fmid = 24000000,
8253 .msmsdcc_fmax = 48000000,
8254 .nonremovable = 0,
8255 .pclk_src_dfab = 1,
8256 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008257};
8258#endif
8259
8260#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8261static struct mmc_platform_data msm8x60_sdc5_data = {
8262 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8263 .translate_vdd = msm_sdcc_setup_power,
8264 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8265 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8266 .msmsdcc_fmin = 400000,
8267 .msmsdcc_fmid = 24000000,
8268 .msmsdcc_fmax = 48000000,
8269 .nonremovable = 0,
8270 .pclk_src_dfab = 1,
8271 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008272#ifdef CONFIG_MSM_SDIO_AL
8273 .is_sdio_al_client = 1,
8274#endif
8275};
8276#endif
8277
8278static void __init msm8x60_init_mmc(void)
8279{
8280#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8281 /* SDCC1 : eMMC card connected */
8282 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8283 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8284 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8285 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308286 sdcc_vreg_data[0].vdd_data->always_on = 1;
8287 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8288 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8289 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008290
8291 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8292 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8293 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8294 sdcc_vreg_data[0].vccq_data->always_on = 1;
8295
8296 msm_add_sdcc(1, &msm8x60_sdc1_data);
8297#endif
8298#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8299 /*
8300 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8301 * and no card is connected on 8660 SURF/FFA/FLUID.
8302 */
8303 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8304 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8305 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8306 sdcc_vreg_data[1].vdd_data->level = 1800000;
8307
8308 sdcc_vreg_data[1].vccq_data = NULL;
8309
8310 if (machine_is_msm8x60_fusion())
8311 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8312 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8313#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8314 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8315 msm_sdcc_setup_gpio(2, 1);
8316#endif
8317 msm_add_sdcc(2, &msm8x60_sdc2_data);
8318 }
8319#endif
8320#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8321 /* SDCC3 : External card slot connected */
8322 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8323 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8324 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8325 sdcc_vreg_data[2].vdd_data->level = 2850000;
8326 sdcc_vreg_data[2].vdd_data->always_on = 1;
8327 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8328 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8329 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8330
8331 sdcc_vreg_data[2].vccq_data = NULL;
8332
8333 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8334 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8335 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8336 sdcc_vreg_data[2].vddp_data->level = 2850000;
8337 sdcc_vreg_data[2].vddp_data->always_on = 1;
8338 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8339 /* Sleep current required is ~300 uA. But min. RPM
8340 * vote can be in terms of mA (min. 1 mA).
8341 * So let's vote for 2 mA during sleep.
8342 */
8343 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8344 /* Max. Active current required is 16 mA */
8345 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8346
8347 if (machine_is_msm8x60_fluid())
8348 msm8x60_sdc3_data.wpswitch = NULL;
8349 msm_add_sdcc(3, &msm8x60_sdc3_data);
8350#endif
8351#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8352 /* SDCC4 : WLAN WCN1314 chip is connected */
8353 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8354 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8355 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8356 sdcc_vreg_data[3].vdd_data->level = 1800000;
8357
8358 sdcc_vreg_data[3].vccq_data = NULL;
8359
8360 msm_add_sdcc(4, &msm8x60_sdc4_data);
8361#endif
8362#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8363 /*
8364 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8365 * and no card is connected on 8660 SURF/FFA/FLUID.
8366 */
8367 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8368 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8369 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8370 sdcc_vreg_data[4].vdd_data->level = 1800000;
8371
8372 sdcc_vreg_data[4].vccq_data = NULL;
8373
8374 if (machine_is_msm8x60_fusion())
8375 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8376 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8377#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8378 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8379 msm_sdcc_setup_gpio(5, 1);
8380#endif
8381 msm_add_sdcc(5, &msm8x60_sdc5_data);
8382 }
8383#endif
8384}
8385
8386#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8387static inline void display_common_power(int on) {}
8388#else
8389
8390#define _GET_REGULATOR(var, name) do { \
8391 if (var == NULL) { \
8392 var = regulator_get(NULL, name); \
8393 if (IS_ERR(var)) { \
8394 pr_err("'%s' regulator not found, rc=%ld\n", \
8395 name, PTR_ERR(var)); \
8396 var = NULL; \
8397 } \
8398 } \
8399} while (0)
8400
8401static int dsub_regulator(int on)
8402{
8403 static struct regulator *dsub_reg;
8404 static struct regulator *mpp0_reg;
8405 static int dsub_reg_enabled;
8406 int rc = 0;
8407
8408 _GET_REGULATOR(dsub_reg, "8901_l3");
8409 if (IS_ERR(dsub_reg)) {
8410 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8411 __func__, PTR_ERR(dsub_reg));
8412 return PTR_ERR(dsub_reg);
8413 }
8414
8415 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8416 if (IS_ERR(mpp0_reg)) {
8417 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8418 __func__, PTR_ERR(mpp0_reg));
8419 return PTR_ERR(mpp0_reg);
8420 }
8421
8422 if (on && !dsub_reg_enabled) {
8423 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8424 if (rc) {
8425 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8426 " err=%d", __func__, rc);
8427 goto dsub_regulator_err;
8428 }
8429 rc = regulator_enable(dsub_reg);
8430 if (rc) {
8431 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8432 " err=%d", __func__, rc);
8433 goto dsub_regulator_err;
8434 }
8435 rc = regulator_enable(mpp0_reg);
8436 if (rc) {
8437 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8438 " err=%d", __func__, rc);
8439 goto dsub_regulator_err;
8440 }
8441 dsub_reg_enabled = 1;
8442 } else if (!on && dsub_reg_enabled) {
8443 rc = regulator_disable(dsub_reg);
8444 if (rc)
8445 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8446 " err=%d", __func__, rc);
8447 rc = regulator_disable(mpp0_reg);
8448 if (rc)
8449 printk(KERN_WARNING "%s: failed to disable reg "
8450 "8901_mpp0 err=%d", __func__, rc);
8451 dsub_reg_enabled = 0;
8452 }
8453
8454 return rc;
8455
8456dsub_regulator_err:
8457 regulator_put(mpp0_reg);
8458 regulator_put(dsub_reg);
8459 return rc;
8460}
8461
8462static int display_power_on;
8463static void setup_display_power(void)
8464{
8465 if (display_power_on)
8466 if (lcdc_vga_enabled) {
8467 dsub_regulator(1);
8468 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8469 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8470 if (machine_is_msm8x60_ffa() ||
8471 machine_is_msm8x60_fusn_ffa())
8472 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8473 } else {
8474 dsub_regulator(0);
8475 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8476 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8477 if (machine_is_msm8x60_ffa() ||
8478 machine_is_msm8x60_fusn_ffa())
8479 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8480 }
8481 else {
8482 dsub_regulator(0);
8483 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8484 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8485 /* BACKLIGHT */
8486 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8487 /* LVDS */
8488 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8489 }
8490}
8491
8492#define _GET_REGULATOR(var, name) do { \
8493 if (var == NULL) { \
8494 var = regulator_get(NULL, name); \
8495 if (IS_ERR(var)) { \
8496 pr_err("'%s' regulator not found, rc=%ld\n", \
8497 name, PTR_ERR(var)); \
8498 var = NULL; \
8499 } \
8500 } \
8501} while (0)
8502
8503#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8504
8505static void display_common_power(int on)
8506{
8507 int rc;
8508 static struct regulator *display_reg;
8509
8510 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8511 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8512 if (on) {
8513 /* LVDS */
8514 _GET_REGULATOR(display_reg, "8901_l2");
8515 if (!display_reg)
8516 return;
8517 rc = regulator_set_voltage(display_reg,
8518 3300000, 3300000);
8519 if (rc)
8520 goto out;
8521 rc = regulator_enable(display_reg);
8522 if (rc)
8523 goto out;
8524 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8525 "LVDS_STDN_OUT_N");
8526 if (rc) {
8527 printk(KERN_ERR "%s: LVDS gpio %d request"
8528 "failed\n", __func__,
8529 GPIO_LVDS_SHUTDOWN_N);
8530 goto out2;
8531 }
8532
8533 /* BACKLIGHT */
8534 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8535 if (rc) {
8536 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8537 "failed\n", __func__,
8538 GPIO_BACKLIGHT_EN);
8539 goto out3;
8540 }
8541
8542 if (machine_is_msm8x60_ffa() ||
8543 machine_is_msm8x60_fusn_ffa()) {
8544 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8545 "DONGLE_PWR_EN");
8546 if (rc) {
8547 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8548 " %d request failed\n", __func__,
8549 GPIO_DONGLE_PWR_EN);
8550 goto out4;
8551 }
8552 }
8553
8554 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8555 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8556 if (machine_is_msm8x60_ffa() ||
8557 machine_is_msm8x60_fusn_ffa())
8558 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8559 mdelay(20);
8560 display_power_on = 1;
8561 setup_display_power();
8562 } else {
8563 if (display_power_on) {
8564 display_power_on = 0;
8565 setup_display_power();
8566 mdelay(20);
8567 if (machine_is_msm8x60_ffa() ||
8568 machine_is_msm8x60_fusn_ffa())
8569 gpio_free(GPIO_DONGLE_PWR_EN);
8570 goto out4;
8571 }
8572 }
8573 }
8574#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8575 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8576 else if (machine_is_msm8x60_fluid()) {
8577 static struct regulator *fluid_reg;
8578 static struct regulator *fluid_reg2;
8579
8580 if (on) {
8581 _GET_REGULATOR(fluid_reg, "8901_l2");
8582 if (!fluid_reg)
8583 return;
8584 _GET_REGULATOR(fluid_reg2, "8058_s3");
8585 if (!fluid_reg2) {
8586 regulator_put(fluid_reg);
8587 return;
8588 }
8589 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8590 if (rc) {
8591 regulator_put(fluid_reg2);
8592 regulator_put(fluid_reg);
8593 return;
8594 }
8595 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8596 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8597 regulator_enable(fluid_reg);
8598 regulator_enable(fluid_reg2);
8599 msleep(20);
8600 gpio_direction_output(GPIO_RESX_N, 0);
8601 udelay(10);
8602 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8603 display_power_on = 1;
8604 setup_display_power();
8605 } else {
8606 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8607 gpio_free(GPIO_RESX_N);
8608 msleep(20);
8609 regulator_disable(fluid_reg2);
8610 regulator_disable(fluid_reg);
8611 regulator_put(fluid_reg2);
8612 regulator_put(fluid_reg);
8613 display_power_on = 0;
8614 setup_display_power();
8615 fluid_reg = NULL;
8616 fluid_reg2 = NULL;
8617 }
8618 }
8619#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008620#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8621 else if (machine_is_msm8x60_dragon()) {
8622 static struct regulator *dragon_reg;
8623 static struct regulator *dragon_reg2;
8624
8625 if (on) {
8626 _GET_REGULATOR(dragon_reg, "8901_l2");
8627 if (!dragon_reg)
8628 return;
8629 _GET_REGULATOR(dragon_reg2, "8058_l16");
8630 if (!dragon_reg2) {
8631 regulator_put(dragon_reg);
8632 dragon_reg = NULL;
8633 return;
8634 }
8635
8636 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8637 if (rc) {
8638 pr_err("%s: gpio %d request failed with rc=%d\n",
8639 __func__, GPIO_NT35582_BL_EN, rc);
8640 regulator_put(dragon_reg);
8641 regulator_put(dragon_reg2);
8642 dragon_reg = NULL;
8643 dragon_reg2 = NULL;
8644 return;
8645 }
8646
8647 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8648 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8649 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8650 pr_err("%s: config gpio '%d' failed!\n",
8651 __func__, GPIO_NT35582_RESET);
8652 gpio_free(GPIO_NT35582_BL_EN);
8653 regulator_put(dragon_reg);
8654 regulator_put(dragon_reg2);
8655 dragon_reg = NULL;
8656 dragon_reg2 = NULL;
8657 return;
8658 }
8659
8660 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8661 if (rc) {
8662 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8663 __func__, GPIO_NT35582_RESET, rc);
8664 gpio_free(GPIO_NT35582_BL_EN);
8665 regulator_put(dragon_reg);
8666 regulator_put(dragon_reg2);
8667 dragon_reg = NULL;
8668 dragon_reg2 = NULL;
8669 return;
8670 }
8671
8672 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8673 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8674 regulator_enable(dragon_reg);
8675 regulator_enable(dragon_reg2);
8676 msleep(20);
8677
8678 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8679 msleep(20);
8680 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8681 msleep(20);
8682 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8683 msleep(50);
8684
8685 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8686
8687 display_power_on = 1;
8688 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8689 gpio_free(GPIO_NT35582_RESET);
8690 gpio_free(GPIO_NT35582_BL_EN);
8691 regulator_disable(dragon_reg2);
8692 regulator_disable(dragon_reg);
8693 regulator_put(dragon_reg2);
8694 regulator_put(dragon_reg);
8695 display_power_on = 0;
8696 dragon_reg = NULL;
8697 dragon_reg2 = NULL;
8698 }
8699 }
8700#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008701 return;
8702
8703out4:
8704 gpio_free(GPIO_BACKLIGHT_EN);
8705out3:
8706 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8707out2:
8708 regulator_disable(display_reg);
8709out:
8710 regulator_put(display_reg);
8711 display_reg = NULL;
8712}
8713#undef _GET_REGULATOR
8714#endif
8715
8716static int mipi_dsi_panel_power(int on);
8717
8718#define LCDC_NUM_GPIO 28
8719#define LCDC_GPIO_START 0
8720
8721static void lcdc_samsung_panel_power(int on)
8722{
8723 int n, ret = 0;
8724
8725 display_common_power(on);
8726
8727 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8728 if (on) {
8729 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8730 if (unlikely(ret)) {
8731 pr_err("%s not able to get gpio\n", __func__);
8732 break;
8733 }
8734 } else
8735 gpio_free(LCDC_GPIO_START + n);
8736 }
8737
8738 if (ret) {
8739 for (n--; n >= 0; n--)
8740 gpio_free(LCDC_GPIO_START + n);
8741 }
8742
8743 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8744}
8745
8746#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8747#define _GET_REGULATOR(var, name) do { \
8748 var = regulator_get(NULL, name); \
8749 if (IS_ERR(var)) { \
8750 pr_err("'%s' regulator not found, rc=%ld\n", \
8751 name, IS_ERR(var)); \
8752 var = NULL; \
8753 return -ENODEV; \
8754 } \
8755} while (0)
8756
8757static int hdmi_enable_5v(int on)
8758{
8759 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8760 static struct regulator *reg_8901_mpp0; /* External 5V */
8761 static int prev_on;
8762 int rc;
8763
8764 if (on == prev_on)
8765 return 0;
8766
8767 if (!reg_8901_hdmi_mvs)
8768 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8769 if (!reg_8901_mpp0)
8770 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8771
8772 if (on) {
8773 rc = regulator_enable(reg_8901_mpp0);
8774 if (rc) {
8775 pr_err("'%s' regulator enable failed, rc=%d\n",
8776 "reg_8901_mpp0", rc);
8777 return rc;
8778 }
8779 rc = regulator_enable(reg_8901_hdmi_mvs);
8780 if (rc) {
8781 pr_err("'%s' regulator enable failed, rc=%d\n",
8782 "8901_hdmi_mvs", rc);
8783 return rc;
8784 }
8785 pr_info("%s(on): success\n", __func__);
8786 } else {
8787 rc = regulator_disable(reg_8901_hdmi_mvs);
8788 if (rc)
8789 pr_warning("'%s' regulator disable failed, rc=%d\n",
8790 "8901_hdmi_mvs", rc);
8791 rc = regulator_disable(reg_8901_mpp0);
8792 if (rc)
8793 pr_warning("'%s' regulator disable failed, rc=%d\n",
8794 "reg_8901_mpp0", rc);
8795 pr_info("%s(off): success\n", __func__);
8796 }
8797
8798 prev_on = on;
8799
8800 return 0;
8801}
8802
8803static int hdmi_core_power(int on, int show)
8804{
8805 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8806 static int prev_on;
8807 int rc;
8808
8809 if (on == prev_on)
8810 return 0;
8811
8812 if (!reg_8058_l16)
8813 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8814
8815 if (on) {
8816 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8817 if (!rc)
8818 rc = regulator_enable(reg_8058_l16);
8819 if (rc) {
8820 pr_err("'%s' regulator enable failed, rc=%d\n",
8821 "8058_l16", rc);
8822 return rc;
8823 }
8824 rc = gpio_request(170, "HDMI_DDC_CLK");
8825 if (rc) {
8826 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8827 "HDMI_DDC_CLK", 170, rc);
8828 goto error1;
8829 }
8830 rc = gpio_request(171, "HDMI_DDC_DATA");
8831 if (rc) {
8832 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8833 "HDMI_DDC_DATA", 171, rc);
8834 goto error2;
8835 }
8836 rc = gpio_request(172, "HDMI_HPD");
8837 if (rc) {
8838 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8839 "HDMI_HPD", 172, rc);
8840 goto error3;
8841 }
8842 pr_info("%s(on): success\n", __func__);
8843 } else {
8844 gpio_free(170);
8845 gpio_free(171);
8846 gpio_free(172);
8847 rc = regulator_disable(reg_8058_l16);
8848 if (rc)
8849 pr_warning("'%s' regulator disable failed, rc=%d\n",
8850 "8058_l16", rc);
8851 pr_info("%s(off): success\n", __func__);
8852 }
8853
8854 prev_on = on;
8855
8856 return 0;
8857
8858error3:
8859 gpio_free(171);
8860error2:
8861 gpio_free(170);
8862error1:
8863 regulator_disable(reg_8058_l16);
8864 return rc;
8865}
8866
8867static int hdmi_cec_power(int on)
8868{
8869 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8870 static int prev_on;
8871 int rc;
8872
8873 if (on == prev_on)
8874 return 0;
8875
8876 if (!reg_8901_l3)
8877 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8878
8879 if (on) {
8880 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8881 if (!rc)
8882 rc = regulator_enable(reg_8901_l3);
8883 if (rc) {
8884 pr_err("'%s' regulator enable failed, rc=%d\n",
8885 "8901_l3", rc);
8886 return rc;
8887 }
8888 rc = gpio_request(169, "HDMI_CEC_VAR");
8889 if (rc) {
8890 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8891 "HDMI_CEC_VAR", 169, rc);
8892 goto error;
8893 }
8894 pr_info("%s(on): success\n", __func__);
8895 } else {
8896 gpio_free(169);
8897 rc = regulator_disable(reg_8901_l3);
8898 if (rc)
8899 pr_warning("'%s' regulator disable failed, rc=%d\n",
8900 "8901_l3", rc);
8901 pr_info("%s(off): success\n", __func__);
8902 }
8903
8904 prev_on = on;
8905
8906 return 0;
8907error:
8908 regulator_disable(reg_8901_l3);
8909 return rc;
8910}
8911
8912#undef _GET_REGULATOR
8913
8914#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8915
8916static int lcdc_panel_power(int on)
8917{
8918 int flag_on = !!on;
8919 static int lcdc_power_save_on;
8920
8921 if (lcdc_power_save_on == flag_on)
8922 return 0;
8923
8924 lcdc_power_save_on = flag_on;
8925
8926 lcdc_samsung_panel_power(on);
8927
8928 return 0;
8929}
8930
8931#ifdef CONFIG_MSM_BUS_SCALING
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008932static struct msm_bus_vectors mdp_init_vectors[] = {
8933 /* For now, 0th array entry is reserved.
8934 * Please leave 0 as is and don't use it
8935 */
8936 {
8937 .src = MSM_BUS_MASTER_MDP_PORT0,
8938 .dst = MSM_BUS_SLAVE_SMI,
8939 .ab = 0,
8940 .ib = 0,
8941 },
8942 /* Master and slaves can be from different fabrics */
8943 {
8944 .src = MSM_BUS_MASTER_MDP_PORT0,
8945 .dst = MSM_BUS_SLAVE_EBI_CH0,
8946 .ab = 0,
8947 .ib = 0,
8948 },
8949};
8950
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07008951#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
8952static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
8953 /* If HDMI is used as primary */
8954 {
8955 .src = MSM_BUS_MASTER_MDP_PORT0,
8956 .dst = MSM_BUS_SLAVE_SMI,
8957 .ab = 2000000000,
8958 .ib = 2000000000,
8959 },
8960 /* Master and slaves can be from different fabrics */
8961 {
8962 .src = MSM_BUS_MASTER_MDP_PORT0,
8963 .dst = MSM_BUS_SLAVE_EBI_CH0,
8964 .ab = 2000000000,
8965 .ib = 2000000000,
8966 },
8967};
8968
8969static struct msm_bus_paths mdp_bus_scale_usecases[] = {
8970 {
8971 ARRAY_SIZE(mdp_init_vectors),
8972 mdp_init_vectors,
8973 },
8974 {
8975 ARRAY_SIZE(hdmi_as_primary_vectors),
8976 hdmi_as_primary_vectors,
8977 },
8978 {
8979 ARRAY_SIZE(hdmi_as_primary_vectors),
8980 hdmi_as_primary_vectors,
8981 },
8982 {
8983 ARRAY_SIZE(hdmi_as_primary_vectors),
8984 hdmi_as_primary_vectors,
8985 },
8986 {
8987 ARRAY_SIZE(hdmi_as_primary_vectors),
8988 hdmi_as_primary_vectors,
8989 },
8990 {
8991 ARRAY_SIZE(hdmi_as_primary_vectors),
8992 hdmi_as_primary_vectors,
8993 },
8994};
8995#else
8996#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008997static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
8998 /* Default case static display/UI/2d/3d if FB SMI */
8999 {
9000 .src = MSM_BUS_MASTER_MDP_PORT0,
9001 .dst = MSM_BUS_SLAVE_SMI,
9002 .ab = 388800000,
9003 .ib = 486000000,
9004 },
9005 /* Master and slaves can be from different fabrics */
9006 {
9007 .src = MSM_BUS_MASTER_MDP_PORT0,
9008 .dst = MSM_BUS_SLAVE_EBI_CH0,
9009 .ab = 0,
9010 .ib = 0,
9011 },
9012};
9013
9014static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9015 /* Default case static display/UI/2d/3d if FB SMI */
9016 {
9017 .src = MSM_BUS_MASTER_MDP_PORT0,
9018 .dst = MSM_BUS_SLAVE_SMI,
9019 .ab = 0,
9020 .ib = 0,
9021 },
9022 /* Master and slaves can be from different fabrics */
9023 {
9024 .src = MSM_BUS_MASTER_MDP_PORT0,
9025 .dst = MSM_BUS_SLAVE_EBI_CH0,
9026 .ab = 388800000,
9027 .ib = 486000000 * 2,
9028 },
9029};
9030static struct msm_bus_vectors mdp_vga_vectors[] = {
9031 /* VGA and less video */
9032 {
9033 .src = MSM_BUS_MASTER_MDP_PORT0,
9034 .dst = MSM_BUS_SLAVE_SMI,
9035 .ab = 458092800,
9036 .ib = 572616000,
9037 },
9038 {
9039 .src = MSM_BUS_MASTER_MDP_PORT0,
9040 .dst = MSM_BUS_SLAVE_EBI_CH0,
9041 .ab = 458092800,
9042 .ib = 572616000 * 2,
9043 },
9044};
9045static struct msm_bus_vectors mdp_720p_vectors[] = {
9046 /* 720p and less video */
9047 {
9048 .src = MSM_BUS_MASTER_MDP_PORT0,
9049 .dst = MSM_BUS_SLAVE_SMI,
9050 .ab = 471744000,
9051 .ib = 589680000,
9052 },
9053 /* Master and slaves can be from different fabrics */
9054 {
9055 .src = MSM_BUS_MASTER_MDP_PORT0,
9056 .dst = MSM_BUS_SLAVE_EBI_CH0,
9057 .ab = 471744000,
9058 .ib = 589680000 * 2,
9059 },
9060};
9061
9062static struct msm_bus_vectors mdp_1080p_vectors[] = {
9063 /* 1080p and less video */
9064 {
9065 .src = MSM_BUS_MASTER_MDP_PORT0,
9066 .dst = MSM_BUS_SLAVE_SMI,
9067 .ab = 575424000,
9068 .ib = 719280000,
9069 },
9070 /* Master and slaves can be from different fabrics */
9071 {
9072 .src = MSM_BUS_MASTER_MDP_PORT0,
9073 .dst = MSM_BUS_SLAVE_EBI_CH0,
9074 .ab = 575424000,
9075 .ib = 719280000 * 2,
9076 },
9077};
9078
9079#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009080static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9081 /* Default case static display/UI/2d/3d if FB SMI */
9082 {
9083 .src = MSM_BUS_MASTER_MDP_PORT0,
9084 .dst = MSM_BUS_SLAVE_SMI,
9085 .ab = 175110000,
9086 .ib = 218887500,
9087 },
9088 /* Master and slaves can be from different fabrics */
9089 {
9090 .src = MSM_BUS_MASTER_MDP_PORT0,
9091 .dst = MSM_BUS_SLAVE_EBI_CH0,
9092 .ab = 0,
9093 .ib = 0,
9094 },
9095};
9096
9097static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9098 /* Default case static display/UI/2d/3d if FB SMI */
9099 {
9100 .src = MSM_BUS_MASTER_MDP_PORT0,
9101 .dst = MSM_BUS_SLAVE_SMI,
9102 .ab = 0,
9103 .ib = 0,
9104 },
9105 /* Master and slaves can be from different fabrics */
9106 {
9107 .src = MSM_BUS_MASTER_MDP_PORT0,
9108 .dst = MSM_BUS_SLAVE_EBI_CH0,
9109 .ab = 216000000,
9110 .ib = 270000000 * 2,
9111 },
9112};
9113static struct msm_bus_vectors mdp_vga_vectors[] = {
9114 /* VGA and less video */
9115 {
9116 .src = MSM_BUS_MASTER_MDP_PORT0,
9117 .dst = MSM_BUS_SLAVE_SMI,
9118 .ab = 216000000,
9119 .ib = 270000000,
9120 },
9121 {
9122 .src = MSM_BUS_MASTER_MDP_PORT0,
9123 .dst = MSM_BUS_SLAVE_EBI_CH0,
9124 .ab = 216000000,
9125 .ib = 270000000 * 2,
9126 },
9127};
9128
9129static struct msm_bus_vectors mdp_720p_vectors[] = {
9130 /* 720p and less video */
9131 {
9132 .src = MSM_BUS_MASTER_MDP_PORT0,
9133 .dst = MSM_BUS_SLAVE_SMI,
9134 .ab = 230400000,
9135 .ib = 288000000,
9136 },
9137 /* Master and slaves can be from different fabrics */
9138 {
9139 .src = MSM_BUS_MASTER_MDP_PORT0,
9140 .dst = MSM_BUS_SLAVE_EBI_CH0,
9141 .ab = 230400000,
9142 .ib = 288000000 * 2,
9143 },
9144};
9145
9146static struct msm_bus_vectors mdp_1080p_vectors[] = {
9147 /* 1080p and less video */
9148 {
9149 .src = MSM_BUS_MASTER_MDP_PORT0,
9150 .dst = MSM_BUS_SLAVE_SMI,
9151 .ab = 334080000,
9152 .ib = 417600000,
9153 },
9154 /* Master and slaves can be from different fabrics */
9155 {
9156 .src = MSM_BUS_MASTER_MDP_PORT0,
9157 .dst = MSM_BUS_SLAVE_EBI_CH0,
9158 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009159 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009160 },
9161};
9162
9163#endif
9164static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9165 {
9166 ARRAY_SIZE(mdp_init_vectors),
9167 mdp_init_vectors,
9168 },
9169 {
9170 ARRAY_SIZE(mdp_sd_smi_vectors),
9171 mdp_sd_smi_vectors,
9172 },
9173 {
9174 ARRAY_SIZE(mdp_sd_ebi_vectors),
9175 mdp_sd_ebi_vectors,
9176 },
9177 {
9178 ARRAY_SIZE(mdp_vga_vectors),
9179 mdp_vga_vectors,
9180 },
9181 {
9182 ARRAY_SIZE(mdp_720p_vectors),
9183 mdp_720p_vectors,
9184 },
9185 {
9186 ARRAY_SIZE(mdp_1080p_vectors),
9187 mdp_1080p_vectors,
9188 },
9189};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009190#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009191static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9192 mdp_bus_scale_usecases,
9193 ARRAY_SIZE(mdp_bus_scale_usecases),
9194 .name = "mdp",
9195};
9196
9197#endif
9198#ifdef CONFIG_MSM_BUS_SCALING
9199static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9200 /* For now, 0th array entry is reserved.
9201 * Please leave 0 as is and don't use it
9202 */
9203 {
9204 .src = MSM_BUS_MASTER_MDP_PORT0,
9205 .dst = MSM_BUS_SLAVE_SMI,
9206 .ab = 0,
9207 .ib = 0,
9208 },
9209 /* Master and slaves can be from different fabrics */
9210 {
9211 .src = MSM_BUS_MASTER_MDP_PORT0,
9212 .dst = MSM_BUS_SLAVE_EBI_CH0,
9213 .ab = 0,
9214 .ib = 0,
9215 },
9216};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009217#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9218static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9219 /* For now, 0th array entry is reserved.
9220 * Please leave 0 as is and don't use it
9221 */
9222 {
9223 .src = MSM_BUS_MASTER_MDP_PORT0,
9224 .dst = MSM_BUS_SLAVE_SMI,
9225 .ab = 2000000000,
9226 .ib = 2000000000,
9227 },
9228 /* Master and slaves can be from different fabrics */
9229 {
9230 .src = MSM_BUS_MASTER_MDP_PORT0,
9231 .dst = MSM_BUS_SLAVE_EBI_CH0,
9232 .ab = 2000000000,
9233 .ib = 2000000000,
9234 },
9235};
9236#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009237static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9238 /* For now, 0th array entry is reserved.
9239 * Please leave 0 as is and don't use it
9240 */
9241 {
9242 .src = MSM_BUS_MASTER_MDP_PORT0,
9243 .dst = MSM_BUS_SLAVE_SMI,
9244 .ab = 566092800,
9245 .ib = 707616000,
9246 },
9247 /* Master and slaves can be from different fabrics */
9248 {
9249 .src = MSM_BUS_MASTER_MDP_PORT0,
9250 .dst = MSM_BUS_SLAVE_EBI_CH0,
9251 .ab = 566092800,
9252 .ib = 707616000,
9253 },
9254};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009255#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009256static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9257 {
9258 ARRAY_SIZE(dtv_bus_init_vectors),
9259 dtv_bus_init_vectors,
9260 },
9261 {
9262 ARRAY_SIZE(dtv_bus_def_vectors),
9263 dtv_bus_def_vectors,
9264 },
9265};
9266static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9267 dtv_bus_scale_usecases,
9268 ARRAY_SIZE(dtv_bus_scale_usecases),
9269 .name = "dtv",
9270};
9271
9272static struct lcdc_platform_data dtv_pdata = {
9273 .bus_scale_table = &dtv_bus_scale_pdata,
9274};
9275#endif
9276
9277
9278static struct lcdc_platform_data lcdc_pdata = {
9279 .lcdc_power_save = lcdc_panel_power,
9280};
9281
9282
9283#define MDP_VSYNC_GPIO 28
9284
9285/*
9286 * MIPI_DSI only use 8058_LDO0 which need always on
9287 * therefore it need to be put at low power mode if
9288 * it was not used instead of turn it off.
9289 */
9290static int mipi_dsi_panel_power(int on)
9291{
9292 int flag_on = !!on;
9293 static int mipi_dsi_power_save_on;
9294 static struct regulator *ldo0;
9295 int rc = 0;
9296
9297 if (mipi_dsi_power_save_on == flag_on)
9298 return 0;
9299
9300 mipi_dsi_power_save_on = flag_on;
9301
9302 if (ldo0 == NULL) { /* init */
9303 ldo0 = regulator_get(NULL, "8058_l0");
9304 if (IS_ERR(ldo0)) {
9305 pr_debug("%s: LDO0 failed\n", __func__);
9306 rc = PTR_ERR(ldo0);
9307 return rc;
9308 }
9309
9310 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9311 if (rc)
9312 goto out;
9313
9314 rc = regulator_enable(ldo0);
9315 if (rc)
9316 goto out;
9317 }
9318
9319 if (on) {
9320 /* set ldo0 to HPM */
9321 rc = regulator_set_optimum_mode(ldo0, 100000);
9322 if (rc < 0)
9323 goto out;
9324 } else {
9325 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309326 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009327 if (rc < 0)
9328 goto out;
9329 }
9330
9331 return 0;
9332out:
9333 regulator_disable(ldo0);
9334 regulator_put(ldo0);
9335 ldo0 = NULL;
9336 return rc;
9337}
9338
9339static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9340 .vsync_gpio = MDP_VSYNC_GPIO,
9341 .dsi_power_save = mipi_dsi_panel_power,
9342};
9343
9344#ifdef CONFIG_FB_MSM_TVOUT
9345static struct regulator *reg_8058_l13;
9346
9347static int atv_dac_power(int on)
9348{
9349 int rc = 0;
9350 #define _GET_REGULATOR(var, name) do { \
9351 var = regulator_get(NULL, name); \
9352 if (IS_ERR(var)) { \
9353 pr_info("'%s' regulator not found, rc=%ld\n", \
9354 name, IS_ERR(var)); \
9355 var = NULL; \
9356 return -ENODEV; \
9357 } \
9358 } while (0)
9359
9360 if (!reg_8058_l13)
9361 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9362 #undef _GET_REGULATOR
9363
9364 if (on) {
9365 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9366 if (rc) {
9367 pr_info("%s: '%s' regulator set voltage failed,\
9368 rc=%d\n", __func__, "8058_l13", rc);
9369 return rc;
9370 }
9371
9372 rc = regulator_enable(reg_8058_l13);
9373 if (rc) {
9374 pr_err("%s: '%s' regulator enable failed,\
9375 rc=%d\n", __func__, "8058_l13", rc);
9376 return rc;
9377 }
9378 } else {
9379 rc = regulator_force_disable(reg_8058_l13);
9380 if (rc)
9381 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9382 __func__, "8058_l13", rc);
9383 }
9384 return rc;
9385
9386}
9387#endif
9388
9389#ifdef CONFIG_FB_MSM_MIPI_DSI
9390int mdp_core_clk_rate_table[] = {
9391 85330000,
9392 85330000,
9393 160000000,
9394 200000000,
9395};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009396#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9397int mdp_core_clk_rate_table[] = {
9398 200000000,
9399 200000000,
9400 200000000,
9401 200000000,
9402};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009403#else
9404int mdp_core_clk_rate_table[] = {
9405 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009406 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009407 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009408 200000000,
9409};
9410#endif
9411
9412static struct msm_panel_common_pdata mdp_pdata = {
9413 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009414#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9415 .mdp_core_clk_rate = 200000000,
9416#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009417 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009418#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009419 .mdp_core_clk_table = mdp_core_clk_rate_table,
9420 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9421#ifdef CONFIG_MSM_BUS_SCALING
9422 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9423#endif
9424 .mdp_rev = MDP_REV_41,
Huaibin Yanga5419422011-12-08 23:52:10 -08009425 .mdp_writeback_memtype = MEMTYPE_EBI1,
9426 .mdp_writeback_phys = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009427};
9428
Huaibin Yanga5419422011-12-08 23:52:10 -08009429static void __init reserve_mdp_memory(void)
9430{
9431 mdp_pdata.mdp_writeback_size_ov0 = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9432 mdp_pdata.mdp_writeback_size_ov1 = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9433
9434 msm8x60_reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
9435 mdp_pdata.mdp_writeback_size_ov0;
9436 msm8x60_reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
9437 mdp_pdata.mdp_writeback_size_ov1;
9438}
9439
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009440#ifdef CONFIG_FB_MSM_TVOUT
9441
9442#ifdef CONFIG_MSM_BUS_SCALING
9443static struct msm_bus_vectors atv_bus_init_vectors[] = {
9444 /* For now, 0th array entry is reserved.
9445 * Please leave 0 as is and don't use it
9446 */
9447 {
9448 .src = MSM_BUS_MASTER_MDP_PORT0,
9449 .dst = MSM_BUS_SLAVE_SMI,
9450 .ab = 0,
9451 .ib = 0,
9452 },
9453 /* Master and slaves can be from different fabrics */
9454 {
9455 .src = MSM_BUS_MASTER_MDP_PORT0,
9456 .dst = MSM_BUS_SLAVE_EBI_CH0,
9457 .ab = 0,
9458 .ib = 0,
9459 },
9460};
9461static struct msm_bus_vectors atv_bus_def_vectors[] = {
9462 /* For now, 0th array entry is reserved.
9463 * Please leave 0 as is and don't use it
9464 */
9465 {
9466 .src = MSM_BUS_MASTER_MDP_PORT0,
9467 .dst = MSM_BUS_SLAVE_SMI,
9468 .ab = 236390400,
9469 .ib = 265939200,
9470 },
9471 /* Master and slaves can be from different fabrics */
9472 {
9473 .src = MSM_BUS_MASTER_MDP_PORT0,
9474 .dst = MSM_BUS_SLAVE_EBI_CH0,
9475 .ab = 236390400,
9476 .ib = 265939200,
9477 },
9478};
9479static struct msm_bus_paths atv_bus_scale_usecases[] = {
9480 {
9481 ARRAY_SIZE(atv_bus_init_vectors),
9482 atv_bus_init_vectors,
9483 },
9484 {
9485 ARRAY_SIZE(atv_bus_def_vectors),
9486 atv_bus_def_vectors,
9487 },
9488};
9489static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9490 atv_bus_scale_usecases,
9491 ARRAY_SIZE(atv_bus_scale_usecases),
9492 .name = "atv",
9493};
9494#endif
9495
9496static struct tvenc_platform_data atv_pdata = {
9497 .poll = 0,
9498 .pm_vid_en = atv_dac_power,
9499#ifdef CONFIG_MSM_BUS_SCALING
9500 .bus_scale_table = &atv_bus_scale_pdata,
9501#endif
9502};
9503#endif
9504
9505static void __init msm_fb_add_devices(void)
9506{
9507#ifdef CONFIG_FB_MSM_LCDC_DSUB
9508 mdp_pdata.mdp_core_clk_table = NULL;
9509 mdp_pdata.num_mdp_clk = 0;
9510 mdp_pdata.mdp_core_clk_rate = 200000000;
9511#endif
9512 if (machine_is_msm8x60_rumi3())
9513 msm_fb_register_device("mdp", NULL);
9514 else
9515 msm_fb_register_device("mdp", &mdp_pdata);
9516
9517 msm_fb_register_device("lcdc", &lcdc_pdata);
9518 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9519#ifdef CONFIG_MSM_BUS_SCALING
9520 msm_fb_register_device("dtv", &dtv_pdata);
9521#endif
9522#ifdef CONFIG_FB_MSM_TVOUT
9523 msm_fb_register_device("tvenc", &atv_pdata);
9524 msm_fb_register_device("tvout_device", NULL);
9525#endif
9526}
9527
9528#if (defined(CONFIG_MARIMBA_CORE)) && \
9529 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9530
9531static const struct {
9532 char *name;
9533 int vmin;
9534 int vmax;
9535} bt_regs_info[] = {
9536 { "8058_s3", 1800000, 1800000 },
9537 { "8058_s2", 1300000, 1300000 },
9538 { "8058_l8", 2900000, 3050000 },
9539};
9540
9541static struct {
9542 bool enabled;
9543} bt_regs_status[] = {
9544 { false },
9545 { false },
9546 { false },
9547};
9548static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9549
9550static int bahama_bt(int on)
9551{
9552 int rc;
9553 int i;
9554 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9555
9556 struct bahama_variant_register {
9557 const size_t size;
9558 const struct bahama_config_register *set;
9559 };
9560
9561 const struct bahama_config_register *p;
9562
9563 u8 version;
9564
9565 const struct bahama_config_register v10_bt_on[] = {
9566 { 0xE9, 0x00, 0xFF },
9567 { 0xF4, 0x80, 0xFF },
9568 { 0xE4, 0x00, 0xFF },
9569 { 0xE5, 0x00, 0x0F },
9570#ifdef CONFIG_WLAN
9571 { 0xE6, 0x38, 0x7F },
9572 { 0xE7, 0x06, 0xFF },
9573#endif
9574 { 0xE9, 0x21, 0xFF },
9575 { 0x01, 0x0C, 0x1F },
9576 { 0x01, 0x08, 0x1F },
9577 };
9578
9579 const struct bahama_config_register v20_bt_on_fm_off[] = {
9580 { 0x11, 0x0C, 0xFF },
9581 { 0x13, 0x01, 0xFF },
9582 { 0xF4, 0x80, 0xFF },
9583 { 0xF0, 0x00, 0xFF },
9584 { 0xE9, 0x00, 0xFF },
9585#ifdef CONFIG_WLAN
9586 { 0x81, 0x00, 0x7F },
9587 { 0x82, 0x00, 0xFF },
9588 { 0xE6, 0x38, 0x7F },
9589 { 0xE7, 0x06, 0xFF },
9590#endif
9591 { 0xE9, 0x21, 0xFF },
9592 };
9593
9594 const struct bahama_config_register v20_bt_on_fm_on[] = {
9595 { 0x11, 0x0C, 0xFF },
9596 { 0x13, 0x01, 0xFF },
9597 { 0xF4, 0x86, 0xFF },
9598 { 0xF0, 0x06, 0xFF },
9599 { 0xE9, 0x00, 0xFF },
9600#ifdef CONFIG_WLAN
9601 { 0x81, 0x00, 0x7F },
9602 { 0x82, 0x00, 0xFF },
9603 { 0xE6, 0x38, 0x7F },
9604 { 0xE7, 0x06, 0xFF },
9605#endif
9606 { 0xE9, 0x21, 0xFF },
9607 };
9608
9609 const struct bahama_config_register v10_bt_off[] = {
9610 { 0xE9, 0x00, 0xFF },
9611 };
9612
9613 const struct bahama_config_register v20_bt_off_fm_off[] = {
9614 { 0xF4, 0x84, 0xFF },
9615 { 0xF0, 0x04, 0xFF },
9616 { 0xE9, 0x00, 0xFF }
9617 };
9618
9619 const struct bahama_config_register v20_bt_off_fm_on[] = {
9620 { 0xF4, 0x86, 0xFF },
9621 { 0xF0, 0x06, 0xFF },
9622 { 0xE9, 0x00, 0xFF }
9623 };
9624 const struct bahama_variant_register bt_bahama[2][3] = {
9625 {
9626 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9627 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9628 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9629 },
9630 {
9631 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9632 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9633 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9634 }
9635 };
9636
9637 u8 offset = 0; /* index into bahama configs */
9638
9639 on = on ? 1 : 0;
9640 version = read_bahama_ver();
9641
9642 if (version == VER_UNSUPPORTED) {
9643 dev_err(&msm_bt_power_device.dev,
9644 "%s: unsupported version\n",
9645 __func__);
9646 return -EIO;
9647 }
9648
9649 if (version == VER_2_0) {
9650 if (marimba_get_fm_status(&config))
9651 offset = 0x01;
9652 }
9653
9654 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9655 if (on && (version == VER_2_0)) {
9656 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9657 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9658 && (bt_regs_status[i].enabled == true)) {
9659 if (regulator_disable(bt_regs[i])) {
9660 dev_err(&msm_bt_power_device.dev,
9661 "%s: regulator disable failed",
9662 __func__);
9663 }
9664 bt_regs_status[i].enabled = false;
9665 break;
9666 }
9667 }
9668 }
9669
9670 p = bt_bahama[on][version + offset].set;
9671
9672 dev_info(&msm_bt_power_device.dev,
9673 "%s: found version %d\n", __func__, version);
9674
9675 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9676 u8 value = (p+i)->value;
9677 rc = marimba_write_bit_mask(&config,
9678 (p+i)->reg,
9679 &value,
9680 sizeof((p+i)->value),
9681 (p+i)->mask);
9682 if (rc < 0) {
9683 dev_err(&msm_bt_power_device.dev,
9684 "%s: reg %d write failed: %d\n",
9685 __func__, (p+i)->reg, rc);
9686 return rc;
9687 }
9688 dev_dbg(&msm_bt_power_device.dev,
9689 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9690 __func__, (p+i)->reg,
9691 value, (p+i)->mask);
9692 }
9693 /* Update BT Status */
9694 if (on)
9695 marimba_set_bt_status(&config, true);
9696 else
9697 marimba_set_bt_status(&config, false);
9698
9699 return 0;
9700}
9701
9702static int bluetooth_use_regulators(int on)
9703{
9704 int i, recover = -1, rc = 0;
9705
9706 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9707 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9708 bt_regs_info[i].name) :
9709 (regulator_put(bt_regs[i]), NULL);
9710 if (IS_ERR(bt_regs[i])) {
9711 rc = PTR_ERR(bt_regs[i]);
9712 dev_err(&msm_bt_power_device.dev,
9713 "regulator %s get failed (%d)\n",
9714 bt_regs_info[i].name, rc);
9715 recover = i - 1;
9716 bt_regs[i] = NULL;
9717 break;
9718 }
9719
9720 if (!on)
9721 continue;
9722
9723 rc = regulator_set_voltage(bt_regs[i],
9724 bt_regs_info[i].vmin,
9725 bt_regs_info[i].vmax);
9726 if (rc < 0) {
9727 dev_err(&msm_bt_power_device.dev,
9728 "regulator %s voltage set (%d)\n",
9729 bt_regs_info[i].name, rc);
9730 recover = i;
9731 break;
9732 }
9733 }
9734
9735 if (on && (recover > -1))
9736 for (i = recover; i >= 0; i--) {
9737 regulator_put(bt_regs[i]);
9738 bt_regs[i] = NULL;
9739 }
9740
9741 return rc;
9742}
9743
9744static int bluetooth_switch_regulators(int on)
9745{
9746 int i, rc = 0;
9747
9748 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9749 if (on && (bt_regs_status[i].enabled == false)) {
9750 rc = regulator_enable(bt_regs[i]);
9751 if (rc < 0) {
9752 dev_err(&msm_bt_power_device.dev,
9753 "regulator %s %s failed (%d)\n",
9754 bt_regs_info[i].name,
9755 "enable", rc);
9756 if (i > 0) {
9757 while (--i) {
9758 regulator_disable(bt_regs[i]);
9759 bt_regs_status[i].enabled
9760 = false;
9761 }
9762 break;
9763 }
9764 }
9765 bt_regs_status[i].enabled = true;
9766 } else if (!on && (bt_regs_status[i].enabled == true)) {
9767 rc = regulator_disable(bt_regs[i]);
9768 if (rc < 0) {
9769 dev_err(&msm_bt_power_device.dev,
9770 "regulator %s %s failed (%d)\n",
9771 bt_regs_info[i].name,
9772 "disable", rc);
9773 break;
9774 }
9775 bt_regs_status[i].enabled = false;
9776 }
9777 }
9778 return rc;
9779}
9780
9781static struct msm_xo_voter *bt_clock;
9782
9783static int bluetooth_power(int on)
9784{
9785 int rc = 0;
9786 int id;
9787
9788 /* In case probe function fails, cur_connv_type would be -1 */
9789 id = adie_get_detected_connectivity_type();
9790 if (id != BAHAMA_ID) {
9791 pr_err("%s: unexpected adie connectivity type: %d\n",
9792 __func__, id);
9793 return -ENODEV;
9794 }
9795
9796 if (on) {
9797
9798 rc = bluetooth_use_regulators(1);
9799 if (rc < 0)
9800 goto out;
9801
9802 rc = bluetooth_switch_regulators(1);
9803
9804 if (rc < 0)
9805 goto fail_put;
9806
9807 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9808
9809 if (IS_ERR(bt_clock)) {
9810 pr_err("Couldn't get TCXO_D0 voter\n");
9811 goto fail_switch;
9812 }
9813
9814 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9815
9816 if (rc < 0) {
9817 pr_err("Failed to vote for TCXO_DO ON\n");
9818 goto fail_vote;
9819 }
9820
9821 rc = bahama_bt(1);
9822
9823 if (rc < 0)
9824 goto fail_clock;
9825
9826 msleep(10);
9827
9828 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
9829
9830 if (rc < 0) {
9831 pr_err("Failed to vote for TCXO_DO pin control\n");
9832 goto fail_vote;
9833 }
9834 } else {
9835 /* check for initial RFKILL block (power off) */
9836 /* some RFKILL versions/configurations rfkill_register */
9837 /* calls here for an initial set_block */
9838 /* avoid calling i2c and regulator before unblock (on) */
9839 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
9840 dev_info(&msm_bt_power_device.dev,
9841 "%s: initialized OFF/blocked\n", __func__);
9842 goto out;
9843 }
9844
9845 bahama_bt(0);
9846
9847fail_clock:
9848 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
9849fail_vote:
9850 msm_xo_put(bt_clock);
9851fail_switch:
9852 bluetooth_switch_regulators(0);
9853fail_put:
9854 bluetooth_use_regulators(0);
9855 }
9856
9857out:
9858 if (rc < 0)
9859 on = 0;
9860 dev_info(&msm_bt_power_device.dev,
9861 "Bluetooth power switch: state %d result %d\n", on, rc);
9862
9863 return rc;
9864}
9865
9866#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
9867
9868static void __init msm8x60_cfg_smsc911x(void)
9869{
9870 smsc911x_resources[1].start =
9871 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9872 smsc911x_resources[1].end =
9873 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9874}
9875
9876#ifdef CONFIG_MSM_RPM
9877static struct msm_rpm_platform_data msm_rpm_data = {
9878 .reg_base_addrs = {
9879 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
9880 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
9881 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
9882 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
9883 },
9884
9885 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
9886 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
9887 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
9888 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
9889 .msm_apps_ipc_rpm_val = 4,
9890};
9891#endif
9892
Laura Abbott5d2d1e62011-08-10 16:27:35 -07009893void msm_fusion_setup_pinctrl(void)
9894{
9895 struct msm_xo_voter *a1;
9896
9897 if (socinfo_get_platform_subtype() == 0x3) {
9898 /*
9899 * Vote for the A1 clock to be in pin control mode before
9900 * the external images are loaded.
9901 */
9902 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
9903 BUG_ON(!a1);
9904 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
9905 }
9906}
9907
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009908struct msm_board_data {
9909 struct msm_gpiomux_configs *gpiomux_cfgs;
9910};
9911
9912static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
9913 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9914};
9915
9916static struct msm_board_data msm8x60_sim_board_data __initdata = {
9917 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9918};
9919
9920static struct msm_board_data msm8x60_surf_board_data __initdata = {
9921 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9922};
9923
9924static struct msm_board_data msm8x60_ffa_board_data __initdata = {
9925 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9926};
9927
9928static struct msm_board_data msm8x60_fluid_board_data __initdata = {
9929 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
9930};
9931
9932static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
9933 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9934};
9935
9936static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
9937 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9938};
9939
Zhang Chang Kenef05b172011-07-27 15:28:13 -04009940static struct msm_board_data msm8x60_dragon_board_data __initdata = {
9941 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
9942};
9943
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009944static void __init msm8x60_init(struct msm_board_data *board_data)
9945{
9946 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05309947#ifdef CONFIG_USB_EHCI_MSM_72K
9948 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
9949 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
9950 .level = PM8901_MPP_DIG_LEVEL_L5,
9951 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
9952 };
9953#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +05309954 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -07009955
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009956 /*
9957 * Initialize RPM first as other drivers and devices may need
9958 * it for their initialization.
9959 */
9960#ifdef CONFIG_MSM_RPM
9961 BUG_ON(msm_rpm_init(&msm_rpm_data));
9962#endif
9963 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
9964 ARRAY_SIZE(msm_rpmrs_levels)));
9965 if (msm_xo_init())
9966 pr_err("Failed to initialize XO votes\n");
9967
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009968 msm8x60_check_2d_hardware();
9969
9970 /* Change SPM handling of core 1 if PMM 8160 is present. */
9971 soc_platform_version = socinfo_get_platform_version();
9972 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
9973 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
9974 struct msm_spm_platform_data *spm_data;
9975
9976 spm_data = &msm_spm_data_v1[1];
9977 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9978 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9979
9980 spm_data = &msm_spm_data[1];
9981 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9982 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9983 }
9984
9985 /*
9986 * Initialize SPM before acpuclock as the latter calls into SPM
9987 * driver to set ACPU voltages.
9988 */
9989 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
9990 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
9991 else
9992 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
9993
9994 /*
9995 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
9996 * devices so that the RPM doesn't drop into a low power mode that an
9997 * un-reworked SURF cannot resume from.
9998 */
9999 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010000 int i;
10001
10002 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10003 if (rpm_regulator_init_data[i].id
10004 == RPM_VREG_ID_PM8901_L4
10005 || rpm_regulator_init_data[i].id
10006 == RPM_VREG_ID_PM8901_L6)
10007 rpm_regulator_init_data[i]
10008 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010009 }
10010
10011 /*
10012 * Disable regulator info printing so that regulator registration
10013 * messages do not enter the kmsg log.
10014 */
10015 regulator_suppress_info_printing();
10016
10017 /* Initialize regulators needed for clock_init. */
10018 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10019
Stephen Boydbb600ae2011-08-02 20:11:40 -070010020 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010021
10022 /* Buses need to be initialized before early-device registration
10023 * to get the platform data for fabrics.
10024 */
10025 msm8x60_init_buses();
10026 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10027 /* CPU frequency control is not supported on simulated targets. */
10028 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010029 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010030
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010031 /*
10032 * Enable EBI2 only for boards which make use of it. Leave
10033 * it disabled for all others for additional power savings.
10034 */
10035 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10036 machine_is_msm8x60_rumi3() ||
10037 machine_is_msm8x60_sim() ||
10038 machine_is_msm8x60_fluid() ||
10039 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010040 msm8x60_init_ebi2();
10041 msm8x60_init_tlmm();
10042 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10043 msm8x60_init_uart12dm();
10044 msm8x60_init_mmc();
10045
10046#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10047 msm8x60_init_pm8058_othc();
10048#endif
10049
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010050 if (machine_is_msm8x60_fluid())
10051 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10052 else if (machine_is_msm8x60_dragon())
10053 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10054 else
10055 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010056
Jilai Wang53d27a82011-07-13 14:32:58 -040010057 /* Specify reset pin for OV9726 */
10058 if (machine_is_msm8x60_dragon()) {
10059 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10060 ov9726_sensor_8660_info.mount_angle = 270;
10061 }
10062
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010063#ifdef CONFIG_BATTERY_MSM8X60
10064 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10065 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10066 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10067 platform_device_register(&msm_charger_device);
10068#endif
10069
10070 if (machine_is_msm8x60_dragon())
10071 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10072 if (!machine_is_msm8x60_fluid())
10073 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10074
10075 /* configure pmic leds */
10076 if (machine_is_msm8x60_fluid())
10077 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10078 else if (machine_is_msm8x60_dragon())
10079 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10080 else
10081 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10082
10083 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10084 machine_is_msm8x60_dragon()) {
10085 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10086 }
10087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010088 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10089 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010090 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010091 msm8x60_cfg_smsc911x();
10092 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10093 platform_add_devices(msm_footswitch_devices,
10094 msm_num_footswitch_devices);
10095 platform_add_devices(surf_devices,
10096 ARRAY_SIZE(surf_devices));
10097
10098#ifdef CONFIG_MSM_DSPS
10099 if (machine_is_msm8x60_fluid()) {
10100 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10101 msm8x60_init_dsps();
10102 }
10103#endif
10104
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010105 pm8901_vreg_mpp0_init();
10106
10107 platform_device_register(&msm8x60_8901_mpp_vreg);
10108
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010109#ifdef CONFIG_USB_EHCI_MSM_72K
10110 /*
10111 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10112 * fluid
10113 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010114 if (machine_is_msm8x60_fluid())
10115 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10116 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010117#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010118
10119#ifdef CONFIG_SND_SOC_MSM8660_APQ
10120 if (machine_is_msm8x60_dragon())
10121 platform_add_devices(dragon_alsa_devices,
10122 ARRAY_SIZE(dragon_alsa_devices));
10123 else
10124#endif
10125 platform_add_devices(asoc_devices,
10126 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010127 } else {
10128 msm8x60_configure_smc91x();
10129 platform_add_devices(rumi_sim_devices,
10130 ARRAY_SIZE(rumi_sim_devices));
10131 }
10132#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010133 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10134 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010135 msm8x60_cfg_isp1763();
10136#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010137
10138 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10139 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10140
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010141
10142#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10143 if (machine_is_msm8x60_fluid())
10144 platform_device_register(&msm_gsbi10_qup_spi_device);
10145 else
10146 platform_device_register(&msm_gsbi1_qup_spi_device);
10147#endif
10148
10149#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10150 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10151 if (machine_is_msm8x60_fluid())
10152 cyttsp_set_params();
10153#endif
10154 if (!machine_is_msm8x60_sim())
10155 msm_fb_add_devices();
10156 fixup_i2c_configs();
10157 register_i2c_devices();
10158
Terence Hampson1c73fef2011-07-19 17:10:49 -040010159 if (machine_is_msm8x60_dragon())
10160 smsc911x_config.reset_gpio
10161 = GPIO_ETHERNET_RESET_N_DRAGON;
10162
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010163 platform_device_register(&smsc911x_device);
10164
10165#if (defined(CONFIG_SPI_QUP)) && \
10166 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010167 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10168 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010169
10170 if (machine_is_msm8x60_fluid()) {
10171#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10172 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10173 spi_register_board_info(lcdc_samsung_spi_board_info,
10174 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10175 } else
10176#endif
10177 {
10178#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10179 spi_register_board_info(lcdc_auo_spi_board_info,
10180 ARRAY_SIZE(lcdc_auo_spi_board_info));
10181#endif
10182 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010183#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10184 } else if (machine_is_msm8x60_dragon()) {
10185 spi_register_board_info(lcdc_nt35582_spi_board_info,
10186 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10187#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010188 }
10189#endif
10190
10191 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10192 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10193 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10194 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010195 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010196
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010197 pm8058_gpios_init();
10198
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010199#ifdef CONFIG_SENSORS_MSM_ADC
10200 if (machine_is_msm8x60_fluid()) {
10201 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10202 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10203 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10204 msm_adc_pdata.gpio_config = APROC_CONFIG;
10205 else
10206 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10207 }
10208 msm_adc_pdata.target_hw = MSM_8x60;
10209#endif
10210#ifdef CONFIG_MSM8X60_AUDIO
10211 msm_snddev_init();
10212#endif
10213#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10214 if (machine_is_msm8x60_fluid())
10215 platform_device_register(&fluid_leds_gpio);
10216 else
10217 platform_device_register(&gpio_leds);
10218#endif
10219
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010220 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010221
10222 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10223 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010224}
10225
10226static void __init msm8x60_rumi3_init(void)
10227{
10228 msm8x60_init(&msm8x60_rumi3_board_data);
10229}
10230
10231static void __init msm8x60_sim_init(void)
10232{
10233 msm8x60_init(&msm8x60_sim_board_data);
10234}
10235
10236static void __init msm8x60_surf_init(void)
10237{
10238 msm8x60_init(&msm8x60_surf_board_data);
10239}
10240
10241static void __init msm8x60_ffa_init(void)
10242{
10243 msm8x60_init(&msm8x60_ffa_board_data);
10244}
10245
10246static void __init msm8x60_fluid_init(void)
10247{
10248 msm8x60_init(&msm8x60_fluid_board_data);
10249}
10250
10251static void __init msm8x60_charm_surf_init(void)
10252{
10253 msm8x60_init(&msm8x60_charm_surf_board_data);
10254}
10255
10256static void __init msm8x60_charm_ffa_init(void)
10257{
10258 msm8x60_init(&msm8x60_charm_ffa_board_data);
10259}
10260
10261static void __init msm8x60_charm_init_early(void)
10262{
10263 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010264}
10265
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010266static void __init msm8x60_dragon_init(void)
10267{
10268 msm8x60_init(&msm8x60_dragon_board_data);
10269}
10270
Steve Mucklea55df6e2010-01-07 12:43:24 -080010271MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10272 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010273 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010274 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010275 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010276 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010277 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010278MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010279
10280MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10281 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010282 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010283 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010284 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010285 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010286 .init_early = msm8x60_charm_init_early,
10287MACHINE_END
10288
10289MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10290 .map_io = msm8x60_map_io,
10291 .reserve = msm8x60_reserve,
10292 .init_irq = msm8x60_init_irq,
10293 .init_machine = msm8x60_surf_init,
10294 .timer = &msm_timer,
10295 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010296MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010297
10298MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10299 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010300 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010301 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010302 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010303 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010304 .init_early = msm8x60_charm_init_early,
10305MACHINE_END
10306
10307MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10308 .map_io = msm8x60_map_io,
10309 .reserve = msm8x60_reserve,
10310 .init_irq = msm8x60_init_irq,
10311 .init_machine = msm8x60_fluid_init,
10312 .timer = &msm_timer,
10313 .init_early = msm8x60_charm_init_early,
10314MACHINE_END
10315
10316MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10317 .map_io = msm8x60_map_io,
10318 .reserve = msm8x60_reserve,
10319 .init_irq = msm8x60_init_irq,
10320 .init_machine = msm8x60_charm_surf_init,
10321 .timer = &msm_timer,
10322 .init_early = msm8x60_charm_init_early,
10323MACHINE_END
10324
10325MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10326 .map_io = msm8x60_map_io,
10327 .reserve = msm8x60_reserve,
10328 .init_irq = msm8x60_init_irq,
10329 .init_machine = msm8x60_charm_ffa_init,
10330 .timer = &msm_timer,
10331 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010332MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010333
10334MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10335 .map_io = msm8x60_map_io,
10336 .reserve = msm8x60_reserve,
10337 .init_irq = msm8x60_init_irq,
10338 .init_machine = msm8x60_dragon_init,
10339 .timer = &msm_timer,
10340 .init_early = msm8x60_charm_init_early,
10341MACHINE_END