blob: 80e1bf840a6afa8c4f273ed1f8422f21c5096ac1 [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
19#include <linux/types.h>
20#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070021#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070023#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#ifdef MSM_CAMERA_GCC
25#include <time.h>
26#else
27#include <linux/time.h>
28#endif
29
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -070030#include <linux/ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070031
Nishant Pandit5dd54422012-06-26 22:52:44 +053032#define BIT(nr) (1UL << (nr))
33
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034#define MSM_CAM_IOCTL_MAGIC 'm'
35
36#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
37 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
38
39#define MSM_CAM_IOCTL_REGISTER_PMEM \
40 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
41
42#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
43 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
44
45#define MSM_CAM_IOCTL_CTRL_COMMAND \
46 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
47
48#define MSM_CAM_IOCTL_CONFIG_VFE \
49 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
50
51#define MSM_CAM_IOCTL_GET_STATS \
52 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
53
54#define MSM_CAM_IOCTL_GETFRAME \
55 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
56
57#define MSM_CAM_IOCTL_ENABLE_VFE \
58 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
59
60#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
61 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
62
63#define MSM_CAM_IOCTL_CONFIG_CMD \
64 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_DISABLE_VFE \
67 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
68
69#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
70 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_VFE_APPS_RESET \
73 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
76 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
79 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
80
81#define MSM_CAM_IOCTL_AXI_CONFIG \
82 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
83
84#define MSM_CAM_IOCTL_GET_PICTURE \
85 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
86
87#define MSM_CAM_IOCTL_SET_CROP \
88 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
89
90#define MSM_CAM_IOCTL_PICT_PP \
91 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
92
93#define MSM_CAM_IOCTL_PICT_PP_DONE \
94 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
95
96#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
97 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
98
99#define MSM_CAM_IOCTL_FLASH_LED_CFG \
100 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
101
102#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
103 _IO(MSM_CAM_IOCTL_MAGIC, 23)
104
105#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
106 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
107
108#define MSM_CAM_IOCTL_AF_CTRL \
109 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
110
111#define MSM_CAM_IOCTL_AF_CTRL_DONE \
112 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_CONFIG_VPE \
115 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
116
117#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
118 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
121 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
124 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
127 _IO(MSM_CAM_IOCTL_MAGIC, 31)
128
129#define MSM_CAM_IOCTL_FLASH_CTRL \
130 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
131
132#define MSM_CAM_IOCTL_ERROR_CONFIG \
133 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
134
135#define MSM_CAM_IOCTL_ABORT_CAPTURE \
136 _IO(MSM_CAM_IOCTL_MAGIC, 34)
137
138#define MSM_CAM_IOCTL_SET_FD_ROI \
139 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
140
141#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
142 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
143
144#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
145 _IO(MSM_CAM_IOCTL_MAGIC, 37)
146
147#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
148 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
149
150#define MSM_CAM_IOCTL_PUT_ST_FRAME \
151 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
152
Mansoor Aftab5d418372011-07-26 17:01:26 -0700153#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Kevin Chan94b4c832012-03-02 21:27:16 -0800154 _IOR(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event *)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700155
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700156#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800157 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700158
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700159#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800160 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700161
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700162#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800163 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700164
165#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800166 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700167
168#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800169 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700170
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800171#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800172 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800173
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800174#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800175 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800176
177#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800178 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800179
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800180#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800181 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800182
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800183#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800184 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800185
186#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800187 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800188
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800189#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800190 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800191
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700192#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
193 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
194
Nishant Panditb2157c92012-04-25 01:09:28 +0530195#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
196 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
197
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700198#define MSM_CAM_IOCTL_STATS_REQBUF \
199 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
200
201#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
202 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
203
204#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
205 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
206
Ankit Premrajka4b3443f2012-06-11 14:06:31 -0700207#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
208 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
209
210#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
211 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
212
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700213struct msm_stats_reqbuf {
214 int num_buf; /* how many buffers requested */
215 int stats_type; /* stats type */
216};
217
218struct msm_stats_flush_bufq {
219 int stats_type; /* enum msm_stats_enum_type */
220};
221
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700222struct msm_mctl_pp_cmd {
223 int32_t id;
224 uint16_t length;
225 void *value;
226};
227
228struct msm_mctl_post_proc_cmd {
229 int32_t type;
230 struct msm_mctl_pp_cmd cmd;
231};
232
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700233#define MSM_CAMERA_LED_OFF 0
234#define MSM_CAMERA_LED_LOW 1
235#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530236#define MSM_CAMERA_LED_INIT 3
237#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700238
239#define MSM_CAMERA_STROBE_FLASH_NONE 0
240#define MSM_CAMERA_STROBE_FLASH_XENON 1
241
242#define MSM_MAX_CAMERA_SENSORS 5
243#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800244#define MAX_CAM_NAME_SIZE 32
245#define MAX_ACT_MOD_NAME_SIZE 32
246#define MAX_ACT_NAME_SIZE 32
247#define NUM_ACTUATOR_DIR 2
248#define MAX_ACTUATOR_SCENARIO 8
249#define MAX_ACTUATOR_REGION 5
250#define MAX_ACTUATOR_INIT_SET 12
251#define MAX_ACTUATOR_TYPE_SIZE 32
252#define MAX_ACTUATOR_REG_TBL_SIZE 8
253
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700254
255#define MSM_MAX_CAMERA_CONFIGS 2
256
257#define PP_SNAP 0x01
258#define PP_RAW_SNAP ((0x01)<<1)
259#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800260#define PP_THUMB ((0x01)<<3)
261#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700262
263#define MSM_CAM_CTRL_CMD_DONE 0
264#define MSM_CAM_SENSOR_VFE_CMD 1
265
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700266/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
267#define MAX_PLANES 8
268
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700269/*****************************************************
270 * structure
271 *****************************************************/
272
273/* define five type of structures for userspace <==> kernel
274 * space communication:
275 * command 1 - 2 are from userspace ==> kernel
276 * command 3 - 4 are from kernel ==> userspace
277 *
278 * 1. control command: control command(from control thread),
279 * control status (from config thread);
280 */
281struct msm_ctrl_cmd {
282 uint16_t type;
283 uint16_t length;
284 void *value;
285 uint16_t status;
286 uint32_t timeout_ms;
287 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
288 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800289 int queue_idx;
290 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700291 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700292 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700293};
294
295struct msm_cam_evt_msg {
296 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
297 unsigned short msg_id;
298 unsigned int len; /* size in, number of bytes out */
299 uint32_t frame_id;
300 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700301 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700302};
303
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700304struct msm_pp_frame_sp {
305 /* phy addr of the buffer */
306 unsigned long phy_addr;
307 uint32_t y_off;
308 uint32_t cbcr_off;
309 /* buffer length */
310 uint32_t length;
311 int32_t fd;
312 uint32_t addr_offset;
313 /* mapped addr */
314 unsigned long vaddr;
315};
316
317struct msm_pp_frame_mp {
318 /* phy addr of the plane */
319 unsigned long phy_addr;
320 /* offset of plane data */
321 uint32_t data_offset;
322 /* plane length */
323 uint32_t length;
324 int32_t fd;
325 uint32_t addr_offset;
326 /* mapped addr */
327 unsigned long vaddr;
328};
329
330struct msm_pp_frame {
331 uint32_t handle; /* stores vb cookie */
332 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800333 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700334 int path;
335 unsigned short image_type;
336 unsigned short num_planes; /* 1 for sp */
337 struct timeval timestamp;
338 union {
339 struct msm_pp_frame_sp sp;
340 struct msm_pp_frame_mp mp[MAX_PLANES];
341 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800342 int node_type;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700343};
344
Mingcheng Zhu49505502011-07-19 20:44:36 -0700345struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700346 unsigned short image_mode;
347 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700348 unsigned short inst_idx;
349 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700350 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700351 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700352};
353
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700354struct msm_mctl_pp_cmd_ack_event {
355 uint32_t cmd; /* VPE_CMD_ZOOM? */
356 int status; /* 0 done, < 0 err */
357 uint32_t cookie; /* daemon's cookie */
358};
359
360struct msm_mctl_pp_event_info {
361 int32_t event;
362 union {
363 struct msm_mctl_pp_cmd_ack_event ack;
364 };
365};
366
367struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700368 unsigned short resptype;
369 union {
370 struct msm_cam_evt_msg isp_msg;
371 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700372 struct msm_cam_evt_divert_frame div_frame;
373 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700374 } isp_data;
375};
376
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700377#define MSM_CAM_RESP_CTRL 0
378#define MSM_CAM_RESP_STAT_EVT_MSG 1
379#define MSM_CAM_RESP_STEREO_OP_1 2
380#define MSM_CAM_RESP_STEREO_OP_2 3
381#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700382#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700383#define MSM_CAM_RESP_DONE_EVENT 6
384#define MSM_CAM_RESP_MCTL_PP_EVENT 7
385#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700386
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700387#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800388#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700389
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700390/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700391
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700392struct msm_stats_event_ctrl {
393 /* 0 - ctrl_cmd from control thread,
394 * 1 - stats/event kernel,
395 * 2 - V4L control or read request */
396 int resptype;
397 int timeout_ms;
398 struct msm_ctrl_cmd ctrl_cmd;
399 /* struct vfe_event_t stats_event; */
400 struct msm_cam_evt_msg stats_event;
401};
402
403/* 2. config command: config command(from config thread); */
404struct msm_camera_cfg_cmd {
405 /* what to config:
406 * 1 - sensor config, 2 - vfe config */
407 uint16_t cfg_type;
408
409 /* sensor config type */
410 uint16_t cmd_type;
411 uint16_t queue;
412 uint16_t length;
413 void *value;
414};
415
416#define CMD_GENERAL 0
417#define CMD_AXI_CFG_OUT1 1
418#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
419#define CMD_AXI_CFG_OUT2 3
420#define CMD_PICT_T_AXI_CFG 4
421#define CMD_PICT_M_AXI_CFG 5
422#define CMD_RAW_PICT_AXI_CFG 6
423
424#define CMD_FRAME_BUF_RELEASE 7
425#define CMD_PREV_BUF_CFG 8
426#define CMD_SNAP_BUF_RELEASE 9
427#define CMD_SNAP_BUF_CFG 10
428#define CMD_STATS_DISABLE 11
429#define CMD_STATS_AEC_AWB_ENABLE 12
430#define CMD_STATS_AF_ENABLE 13
431#define CMD_STATS_AEC_ENABLE 14
432#define CMD_STATS_AWB_ENABLE 15
433#define CMD_STATS_ENABLE 16
434
435#define CMD_STATS_AXI_CFG 17
436#define CMD_STATS_AEC_AXI_CFG 18
437#define CMD_STATS_AF_AXI_CFG 19
438#define CMD_STATS_AWB_AXI_CFG 20
439#define CMD_STATS_RS_AXI_CFG 21
440#define CMD_STATS_CS_AXI_CFG 22
441#define CMD_STATS_IHIST_AXI_CFG 23
442#define CMD_STATS_SKIN_AXI_CFG 24
443
444#define CMD_STATS_BUF_RELEASE 25
445#define CMD_STATS_AEC_BUF_RELEASE 26
446#define CMD_STATS_AF_BUF_RELEASE 27
447#define CMD_STATS_AWB_BUF_RELEASE 28
448#define CMD_STATS_RS_BUF_RELEASE 29
449#define CMD_STATS_CS_BUF_RELEASE 30
450#define CMD_STATS_IHIST_BUF_RELEASE 31
451#define CMD_STATS_SKIN_BUF_RELEASE 32
452
453#define UPDATE_STATS_INVALID 33
454#define CMD_AXI_CFG_SNAP_GEMINI 34
455#define CMD_AXI_CFG_SNAP 35
456#define CMD_AXI_CFG_PREVIEW 36
457#define CMD_AXI_CFG_VIDEO 37
458
459#define CMD_STATS_IHIST_ENABLE 38
460#define CMD_STATS_RS_ENABLE 39
461#define CMD_STATS_CS_ENABLE 40
462#define CMD_VPE 41
463#define CMD_AXI_CFG_VPE 42
464#define CMD_AXI_CFG_ZSL 43
465#define CMD_AXI_CFG_SNAP_VPE 44
466#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530467#define CMD_CONFIG_PING_ADDR 46
468#define CMD_CONFIG_PONG_ADDR 47
469#define CMD_CONFIG_FREE_BUF_ADDR 48
470#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
471#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530472#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700473#define CMD_VFE_PROCESS_IRQ 52
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700474
Nishant Pandit5dd54422012-06-26 22:52:44 +0530475#define CMD_AXI_CFG_PRIM BIT(8)
476#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
477#define CMD_AXI_CFG_SEC BIT(10)
478#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
479#define CMD_AXI_CFG_TERT1 BIT(12)
480#define CMD_AXI_CFG_TERT2 BIT(13)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800481
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700482#define CMD_AXI_START 0xE1
483#define CMD_AXI_STOP 0xE2
484
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700485/* vfe config command: config command(from config thread)*/
486struct msm_vfe_cfg_cmd {
487 int cmd_type;
488 uint16_t length;
489 void *value;
490};
491
492struct msm_vpe_cfg_cmd {
493 int cmd_type;
494 uint16_t length;
495 void *value;
496};
497
498#define MAX_CAMERA_ENABLE_NAME_LEN 32
499struct camera_enable_cmd {
500 char name[MAX_CAMERA_ENABLE_NAME_LEN];
501};
502
503#define MSM_PMEM_OUTPUT1 0
504#define MSM_PMEM_OUTPUT2 1
505#define MSM_PMEM_OUTPUT1_OUTPUT2 2
506#define MSM_PMEM_THUMBNAIL 3
507#define MSM_PMEM_MAINIMG 4
508#define MSM_PMEM_RAW_MAINIMG 5
509#define MSM_PMEM_AEC_AWB 6
510#define MSM_PMEM_AF 7
511#define MSM_PMEM_AEC 8
512#define MSM_PMEM_AWB 9
513#define MSM_PMEM_RS 10
514#define MSM_PMEM_CS 11
515#define MSM_PMEM_IHIST 12
516#define MSM_PMEM_SKIN 13
517#define MSM_PMEM_VIDEO 14
518#define MSM_PMEM_PREVIEW 15
519#define MSM_PMEM_VIDEO_VPE 16
520#define MSM_PMEM_C2D 17
521#define MSM_PMEM_MAINIMG_VPE 18
522#define MSM_PMEM_THUMBNAIL_VPE 19
523#define MSM_PMEM_MAX 20
524
525#define STAT_AEAW 0
526#define STAT_AEC 1
527#define STAT_AF 2
528#define STAT_AWB 3
529#define STAT_RS 4
530#define STAT_CS 5
531#define STAT_IHIST 6
532#define STAT_SKIN 7
533#define STAT_MAX 8
534
535#define FRAME_PREVIEW_OUTPUT1 0
536#define FRAME_PREVIEW_OUTPUT2 1
537#define FRAME_SNAPSHOT 2
538#define FRAME_THUMBNAIL 3
539#define FRAME_RAW_SNAPSHOT 4
540#define FRAME_MAX 5
541
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700542enum msm_stats_enum_type {
543 MSM_STATS_TYPE_AEC, /* legacy based AEC */
544 MSM_STATS_TYPE_AF, /* legacy based AF */
545 MSM_STATS_TYPE_AWB, /* legacy based AWB */
546 MSM_STATS_TYPE_RS, /* legacy based RS */
547 MSM_STATS_TYPE_CS, /* legacy based CS */
548 MSM_STATS_TYPE_IHIST, /* legacy based HIST */
549 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */
550 MSM_STATS_TYPE_BG, /* Bayer Grids */
551 MSM_STATS_TYPE_BF, /* Bayer Focus */
552 MSM_STATS_TYPE_BHIST, /* Bayer Hist */
553 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/
554 MSM_STATS_TYPE_MAX /* MAX */
555};
556
557struct msm_stats_buf_info {
558 int type; /* msm_stats_enum_type */
559 int fd;
560 void *vaddr;
561 uint32_t offset;
562 uint32_t len;
563 uint32_t y_off;
564 uint32_t cbcr_off;
565 uint32_t planar0_off;
566 uint32_t planar1_off;
567 uint32_t planar2_off;
568 uint8_t active;
569 int buf_idx;
570};
571
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700572struct msm_pmem_info {
573 int type;
574 int fd;
575 void *vaddr;
576 uint32_t offset;
577 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700578 uint32_t y_off;
579 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530580 uint32_t planar0_off;
581 uint32_t planar1_off;
582 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700583 uint8_t active;
584};
585
586struct outputCfg {
587 uint32_t height;
588 uint32_t width;
589
590 uint32_t window_height_firstline;
591 uint32_t window_height_lastline;
592};
593
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800594#define VIDEO_NODE 0
595#define MCTL_NODE 1
596
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700597#define OUTPUT_1 0
598#define OUTPUT_2 1
599#define OUTPUT_1_AND_2 2 /* snapshot only */
600#define OUTPUT_1_AND_3 3 /* video */
601#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
602#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
603#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
604#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700605#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530606#define OUTPUT_VIDEO_ALL_CHNLS 9
607#define OUTPUT_ZSL_ALL_CHNLS 10
608#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700609
Nishant Pandit5dd54422012-06-26 22:52:44 +0530610#define OUTPUT_PRIM BIT(8)
611#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
612#define OUTPUT_SEC BIT(10)
613#define OUTPUT_SEC_ALL_CHNLS BIT(11)
614#define OUTPUT_TERT1 BIT(12)
615#define OUTPUT_TERT2 BIT(13)
616
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800617
618
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700619#define MSM_FRAME_PREV_1 0
620#define MSM_FRAME_PREV_2 1
621#define MSM_FRAME_ENC 2
622
Nishant Pandit5dd54422012-06-26 22:52:44 +0530623#define OUTPUT_TYPE_P BIT(0)
624#define OUTPUT_TYPE_T BIT(1)
625#define OUTPUT_TYPE_S BIT(2)
626#define OUTPUT_TYPE_V BIT(3)
627#define OUTPUT_TYPE_L BIT(4)
628#define OUTPUT_TYPE_ST_L BIT(5)
629#define OUTPUT_TYPE_ST_R BIT(6)
630#define OUTPUT_TYPE_ST_D BIT(7)
631#define OUTPUT_TYPE_R BIT(8)
632#define OUTPUT_TYPE_R1 BIT(9)
633
634
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700635
636struct fd_roi_info {
637 void *info;
638 int info_len;
639};
640
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700641struct msm_mem_map_info {
642 uint32_t cookie;
643 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700644 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700645};
646
Mingcheng Zhu49505502011-07-19 20:44:36 -0700647#define MSM_MEM_MMAP 0
648#define MSM_MEM_USERPTR 1
649#define MSM_PLANE_MAX 8
650#define MSM_PLANE_Y 0
651#define MSM_PLANE_UV 1
652
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700653struct msm_frame {
654 struct timespec ts;
655 int path;
656 int type;
657 unsigned long buffer;
658 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700659 uint32_t y_off;
660 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530661 uint32_t planar0_off;
662 uint32_t planar1_off;
663 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700664 int fd;
665
666 void *cropinfo;
667 int croplen;
668 uint32_t error_code;
669 struct fd_roi_info roi_info;
670 uint32_t frame_id;
671 int stcam_quality_ind;
672 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700673
674 struct ion_allocation_data ion_alloc;
675 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700676 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700677};
678
679enum msm_st_frame_packing {
680 SIDE_BY_SIDE_HALF,
681 SIDE_BY_SIDE_FULL,
682 TOP_DOWN_HALF,
683 TOP_DOWN_FULL,
684};
685
686struct msm_st_crop {
687 uint32_t in_w;
688 uint32_t in_h;
689 uint32_t out_w;
690 uint32_t out_h;
691};
692
693struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530694 uint32_t buf_p0_off;
695 uint32_t buf_p1_off;
696 uint32_t buf_p0_stride;
697 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700698 uint32_t pix_x_off;
699 uint32_t pix_y_off;
700 struct msm_st_crop stCropInfo;
701};
702
703struct msm_st_frame {
704 struct msm_frame buf_info;
705 int type;
706 enum msm_st_frame_packing packing;
707 struct msm_st_half L;
708 struct msm_st_half R;
709 int frame_id;
710};
711
712#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
713
714struct stats_buff {
715 unsigned long buff;
716 int fd;
717};
718
719struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700720 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700721 struct stats_buff aec;
722 struct stats_buff awb;
723 struct stats_buff af;
724 struct stats_buff ihist;
725 struct stats_buff rs;
726 struct stats_buff cs;
727 struct stats_buff skin;
728 int type;
729 uint32_t status_bits;
730 unsigned long buffer;
731 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800732 int length;
733 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700734 uint32_t frame_id;
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700735 int buf_idx;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700736};
737#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
738/* video capture mode in VIDIOC_S_PARM */
739#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
740 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
741/* extendedmode for video recording in VIDIOC_S_PARM */
742#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
743 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
744/* extendedmode for the full size main image in VIDIOC_S_PARM */
745#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
746/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
747#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
748 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
749#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
750 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Nishant Pandit5dd54422012-06-26 22:52:44 +0530751#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
752 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
753#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
754 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
755#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
756 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
757#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700758
759
760#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
761#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
762#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
763#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
764#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
765#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
766#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
767#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
768#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
769#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
770#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
771#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
772#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
773#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
774#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700775#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
776#define MSM_V4L2_PID_MMAP_ENTRY (V4L2_CID_PRIVATE_BASE+16)
777#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800778#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
779#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700780
781/* camera operation mode for video recording - two frame output queues */
782#define MSM_V4L2_CAM_OP_DEFAULT 0
783/* camera operation mode for video recording - two frame output queues */
784#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
785/* camera operation mode for video recording - two frame output queues */
786#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
787/* camera operation mode for standard shapshot - two frame output queues */
788#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
789/* camera operation mode for zsl shapshot - three output queues */
790#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
791/* camera operation mode for raw snapshot - one frame output queue */
792#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800793/* camera operation mode for jpeg snapshot - one frame output queue */
794#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
795
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700796
797#define MSM_V4L2_VID_CAP_TYPE 0
798#define MSM_V4L2_STREAM_ON 1
799#define MSM_V4L2_STREAM_OFF 2
800#define MSM_V4L2_SNAPSHOT 3
801#define MSM_V4L2_QUERY_CTRL 4
802#define MSM_V4L2_GET_CTRL 5
803#define MSM_V4L2_SET_CTRL 6
804#define MSM_V4L2_QUERY 7
805#define MSM_V4L2_GET_CROP 8
806#define MSM_V4L2_SET_CROP 9
807#define MSM_V4L2_OPEN 10
808#define MSM_V4L2_CLOSE 11
809#define MSM_V4L2_SET_CTRL_CMD 12
810#define MSM_V4L2_EVT_SUB_MASK 13
811#define MSM_V4L2_MAX 14
812#define V4L2_CAMERA_EXIT 43
813
814struct crop_info {
815 void *info;
816 int len;
817};
818
819struct msm_postproc {
820 int ftnum;
821 struct msm_frame fthumnail;
822 int fmnum;
823 struct msm_frame fmain;
824};
825
826struct msm_snapshot_pp_status {
827 void *status;
828};
829
830#define CFG_SET_MODE 0
831#define CFG_SET_EFFECT 1
832#define CFG_START 2
833#define CFG_PWR_UP 3
834#define CFG_PWR_DOWN 4
835#define CFG_WRITE_EXPOSURE_GAIN 5
836#define CFG_SET_DEFAULT_FOCUS 6
837#define CFG_MOVE_FOCUS 7
838#define CFG_REGISTER_TO_REAL_GAIN 8
839#define CFG_REAL_TO_REGISTER_GAIN 9
840#define CFG_SET_FPS 10
841#define CFG_SET_PICT_FPS 11
842#define CFG_SET_BRIGHTNESS 12
843#define CFG_SET_CONTRAST 13
844#define CFG_SET_ZOOM 14
845#define CFG_SET_EXPOSURE_MODE 15
846#define CFG_SET_WB 16
847#define CFG_SET_ANTIBANDING 17
848#define CFG_SET_EXP_GAIN 18
849#define CFG_SET_PICT_EXP_GAIN 19
850#define CFG_SET_LENS_SHADING 20
851#define CFG_GET_PICT_FPS 21
852#define CFG_GET_PREV_L_PF 22
853#define CFG_GET_PREV_P_PL 23
854#define CFG_GET_PICT_L_PF 24
855#define CFG_GET_PICT_P_PL 25
856#define CFG_GET_AF_MAX_STEPS 26
857#define CFG_GET_PICT_MAX_EXP_LC 27
858#define CFG_SEND_WB_INFO 28
859#define CFG_SENSOR_INIT 29
860#define CFG_GET_3D_CALI_DATA 30
861#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700862#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700863#define CFG_GET_EEPROM_INFO 33
864#define CFG_GET_EEPROM_DATA 34
865#define CFG_SET_ACTUATOR_INFO 35
866#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530867/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700868#define CFG_SET_SATURATION 37
869#define CFG_SET_SHARPNESS 38
870#define CFG_SET_TOUCHAEC 39
871#define CFG_SET_AUTO_FOCUS 40
872#define CFG_SET_AUTOFLASH 41
873#define CFG_SET_EXPOSURE_COMPENSATION 42
874#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +0530875#define CFG_START_STREAM 44
876#define CFG_STOP_STREAM 45
877#define CFG_GET_CSI_PARAMS 46
878#define CFG_MAX 47
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700879
880
881#define MOVE_NEAR 0
882#define MOVE_FAR 1
883
884#define SENSOR_PREVIEW_MODE 0
885#define SENSOR_SNAPSHOT_MODE 1
886#define SENSOR_RAW_SNAPSHOT_MODE 2
887#define SENSOR_HFR_60FPS_MODE 3
888#define SENSOR_HFR_90FPS_MODE 4
889#define SENSOR_HFR_120FPS_MODE 5
890
891#define SENSOR_QTR_SIZE 0
892#define SENSOR_FULL_SIZE 1
893#define SENSOR_QVGA_SIZE 2
894#define SENSOR_INVALID_SIZE 3
895
896#define CAMERA_EFFECT_OFF 0
897#define CAMERA_EFFECT_MONO 1
898#define CAMERA_EFFECT_NEGATIVE 2
899#define CAMERA_EFFECT_SOLARIZE 3
900#define CAMERA_EFFECT_SEPIA 4
901#define CAMERA_EFFECT_POSTERIZE 5
902#define CAMERA_EFFECT_WHITEBOARD 6
903#define CAMERA_EFFECT_BLACKBOARD 7
904#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -0700905#define CAMERA_EFFECT_EMBOSS 9
906#define CAMERA_EFFECT_SKETCH 10
907#define CAMERA_EFFECT_NEON 11
908#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700909
Taniya Dasa9bdb012011-09-08 11:21:33 +0530910/* QRD */
911#define CAMERA_EFFECT_BW 10
912#define CAMERA_EFFECT_BLUISH 12
913#define CAMERA_EFFECT_REDDISH 13
914#define CAMERA_EFFECT_GREENISH 14
915
916/* QRD */
917#define CAMERA_ANTIBANDING_OFF 0
918#define CAMERA_ANTIBANDING_50HZ 2
919#define CAMERA_ANTIBANDING_60HZ 1
920#define CAMERA_ANTIBANDING_AUTO 3
921
922#define CAMERA_CONTRAST_LV0 0
923#define CAMERA_CONTRAST_LV1 1
924#define CAMERA_CONTRAST_LV2 2
925#define CAMERA_CONTRAST_LV3 3
926#define CAMERA_CONTRAST_LV4 4
927#define CAMERA_CONTRAST_LV5 5
928#define CAMERA_CONTRAST_LV6 6
929#define CAMERA_CONTRAST_LV7 7
930#define CAMERA_CONTRAST_LV8 8
931#define CAMERA_CONTRAST_LV9 9
932
933#define CAMERA_BRIGHTNESS_LV0 0
934#define CAMERA_BRIGHTNESS_LV1 1
935#define CAMERA_BRIGHTNESS_LV2 2
936#define CAMERA_BRIGHTNESS_LV3 3
937#define CAMERA_BRIGHTNESS_LV4 4
938#define CAMERA_BRIGHTNESS_LV5 5
939#define CAMERA_BRIGHTNESS_LV6 6
940#define CAMERA_BRIGHTNESS_LV7 7
941#define CAMERA_BRIGHTNESS_LV8 8
942
943
944#define CAMERA_SATURATION_LV0 0
945#define CAMERA_SATURATION_LV1 1
946#define CAMERA_SATURATION_LV2 2
947#define CAMERA_SATURATION_LV3 3
948#define CAMERA_SATURATION_LV4 4
949#define CAMERA_SATURATION_LV5 5
950#define CAMERA_SATURATION_LV6 6
951#define CAMERA_SATURATION_LV7 7
952#define CAMERA_SATURATION_LV8 8
953
954#define CAMERA_SHARPNESS_LV0 0
955#define CAMERA_SHARPNESS_LV1 3
956#define CAMERA_SHARPNESS_LV2 6
957#define CAMERA_SHARPNESS_LV3 9
958#define CAMERA_SHARPNESS_LV4 12
959#define CAMERA_SHARPNESS_LV5 15
960#define CAMERA_SHARPNESS_LV6 18
961#define CAMERA_SHARPNESS_LV7 21
962#define CAMERA_SHARPNESS_LV8 24
963#define CAMERA_SHARPNESS_LV9 27
964#define CAMERA_SHARPNESS_LV10 30
965
966#define CAMERA_SETAE_AVERAGE 0
967#define CAMERA_SETAE_CENWEIGHT 1
968
Taniya Dasa9bdb012011-09-08 11:21:33 +0530969#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
970#define CAMERA_WB_CUSTOM 2
971#define CAMERA_WB_INCANDESCENT 3
972#define CAMERA_WB_FLUORESCENT 4
973#define CAMERA_WB_DAYLIGHT 5
974#define CAMERA_WB_CLOUDY_DAYLIGHT 6
975#define CAMERA_WB_TWILIGHT 7
976#define CAMERA_WB_SHADE 8
977
978#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
979#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
980#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
981#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
982#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
983
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800984enum msm_v4l2_saturation_level {
985 MSM_V4L2_SATURATION_L0,
986 MSM_V4L2_SATURATION_L1,
987 MSM_V4L2_SATURATION_L2,
988 MSM_V4L2_SATURATION_L3,
989 MSM_V4L2_SATURATION_L4,
990 MSM_V4L2_SATURATION_L5,
991 MSM_V4L2_SATURATION_L6,
992 MSM_V4L2_SATURATION_L7,
993 MSM_V4L2_SATURATION_L8,
994 MSM_V4L2_SATURATION_L9,
995 MSM_V4L2_SATURATION_L10,
996};
997
Suresh Vankadara212d9722012-05-30 15:51:20 +0530998enum msm_v4l2_contrast_level {
999 MSM_V4L2_CONTRAST_L0,
1000 MSM_V4L2_CONTRAST_L1,
1001 MSM_V4L2_CONTRAST_L2,
1002 MSM_V4L2_CONTRAST_L3,
1003 MSM_V4L2_CONTRAST_L4,
1004 MSM_V4L2_CONTRAST_L5,
1005 MSM_V4L2_CONTRAST_L6,
1006 MSM_V4L2_CONTRAST_L7,
1007 MSM_V4L2_CONTRAST_L8,
1008 MSM_V4L2_CONTRAST_L9,
1009 MSM_V4L2_CONTRAST_L10,
1010};
1011
1012
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001013enum msm_v4l2_exposure_level {
1014 MSM_V4L2_EXPOSURE_N2,
1015 MSM_V4L2_EXPOSURE_N1,
1016 MSM_V4L2_EXPOSURE_D,
1017 MSM_V4L2_EXPOSURE_P1,
1018 MSM_V4L2_EXPOSURE_P2,
1019};
1020
1021enum msm_v4l2_sharpness_level {
1022 MSM_V4L2_SHARPNESS_L0,
1023 MSM_V4L2_SHARPNESS_L1,
1024 MSM_V4L2_SHARPNESS_L2,
1025 MSM_V4L2_SHARPNESS_L3,
1026 MSM_V4L2_SHARPNESS_L4,
1027 MSM_V4L2_SHARPNESS_L5,
1028 MSM_V4L2_SHARPNESS_L6,
1029};
1030
1031enum msm_v4l2_expo_metering_mode {
1032 MSM_V4L2_EXP_FRAME_AVERAGE,
1033 MSM_V4L2_EXP_CENTER_WEIGHTED,
1034 MSM_V4L2_EXP_SPOT_METERING,
1035};
1036
1037enum msm_v4l2_iso_mode {
1038 MSM_V4L2_ISO_AUTO = 0,
1039 MSM_V4L2_ISO_DEBLUR,
1040 MSM_V4L2_ISO_100,
1041 MSM_V4L2_ISO_200,
1042 MSM_V4L2_ISO_400,
1043 MSM_V4L2_ISO_800,
1044 MSM_V4L2_ISO_1600,
1045};
1046
1047enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +05301048 MSM_V4L2_WB_OFF,
1049 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001050 MSM_V4L2_WB_CUSTOM,
1051 MSM_V4L2_WB_INCANDESCENT,
1052 MSM_V4L2_WB_FLUORESCENT,
1053 MSM_V4L2_WB_DAYLIGHT,
1054 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301055};
1056
1057enum msm_v4l2_special_effect {
1058 MSM_V4L2_EFFECT_OFF,
1059 MSM_V4L2_EFFECT_MONO,
1060 MSM_V4L2_EFFECT_NEGATIVE,
1061 MSM_V4L2_EFFECT_SOLARIZE,
1062 MSM_V4L2_EFFECT_SEPIA,
1063 MSM_V4L2_EFFECT_POSTERAIZE,
1064 MSM_V4L2_EFFECT_WHITEBOARD,
1065 MSM_V4L2_EFFECT_BLACKBOARD,
1066 MSM_V4L2_EFFECT_AQUA,
1067 MSM_V4L2_EFFECT_EMBOSS,
1068 MSM_V4L2_EFFECT_SKETCH,
1069 MSM_V4L2_EFFECT_NEON,
1070 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001071};
1072
1073enum msm_v4l2_power_line_frequency {
1074 MSM_V4L2_POWER_LINE_OFF,
1075 MSM_V4L2_POWER_LINE_60HZ,
1076 MSM_V4L2_POWER_LINE_50HZ,
1077 MSM_V4L2_POWER_LINE_AUTO,
1078};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301079
Su Liu6c3bb322012-02-14 02:15:05 +05301080#define CAMERA_ISO_TYPE_AUTO 0
1081#define CAMEAR_ISO_TYPE_HJR 1
1082#define CAMEAR_ISO_TYPE_100 2
1083#define CAMERA_ISO_TYPE_200 3
1084#define CAMERA_ISO_TYPE_400 4
1085#define CAMEAR_ISO_TYPE_800 5
1086#define CAMERA_ISO_TYPE_1600 6
1087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001088struct sensor_pict_fps {
1089 uint16_t prevfps;
1090 uint16_t pictfps;
1091};
1092
1093struct exp_gain_cfg {
1094 uint16_t gain;
1095 uint32_t line;
1096};
1097
1098struct focus_cfg {
1099 int32_t steps;
1100 int dir;
1101};
1102
1103struct fps_cfg {
1104 uint16_t f_mult;
1105 uint16_t fps_div;
1106 uint32_t pict_fps_div;
1107};
1108struct wb_info_cfg {
1109 uint16_t red_gain;
1110 uint16_t green_gain;
1111 uint16_t blue_gain;
1112};
1113struct sensor_3d_exp_cfg {
1114 uint16_t gain;
1115 uint32_t line;
1116 uint16_t r_gain;
1117 uint16_t b_gain;
1118 uint16_t gr_gain;
1119 uint16_t gb_gain;
1120 uint16_t gain_adjust;
1121};
1122struct sensor_3d_cali_data_t{
1123 unsigned char left_p_matrix[3][4][8];
1124 unsigned char right_p_matrix[3][4][8];
1125 unsigned char square_len[8];
1126 unsigned char focal_len[8];
1127 unsigned char pixel_pitch[8];
1128 uint16_t left_r;
1129 uint16_t left_b;
1130 uint16_t left_gb;
1131 uint16_t left_af_far;
1132 uint16_t left_af_mid;
1133 uint16_t left_af_short;
1134 uint16_t left_af_5um;
1135 uint16_t left_af_50up;
1136 uint16_t left_af_50down;
1137 uint16_t right_r;
1138 uint16_t right_b;
1139 uint16_t right_gb;
1140 uint16_t right_af_far;
1141 uint16_t right_af_mid;
1142 uint16_t right_af_short;
1143 uint16_t right_af_5um;
1144 uint16_t right_af_50up;
1145 uint16_t right_af_50down;
1146};
1147struct sensor_init_cfg {
1148 uint8_t prev_res;
1149 uint8_t pict_res;
1150};
1151
1152struct sensor_calib_data {
1153 /* Color Related Measurements */
1154 uint16_t r_over_g;
1155 uint16_t b_over_g;
1156 uint16_t gr_over_gb;
1157
1158 /* Lens Related Measurements */
1159 uint16_t macro_2_inf;
1160 uint16_t inf_2_macro;
1161 uint16_t stroke_amt;
1162 uint16_t af_pos_1m;
1163 uint16_t af_pos_inf;
1164};
1165
Kevin Chana980f392011-08-01 20:55:00 -07001166enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001167 MSM_SENSOR_RES_FULL,
1168 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001169 MSM_SENSOR_RES_2,
1170 MSM_SENSOR_RES_3,
1171 MSM_SENSOR_RES_4,
1172 MSM_SENSOR_RES_5,
1173 MSM_SENSOR_RES_6,
1174 MSM_SENSOR_RES_7,
1175 MSM_SENSOR_INVALID_RES,
1176};
1177
1178struct msm_sensor_output_info_t {
1179 uint16_t x_output;
1180 uint16_t y_output;
1181 uint16_t line_length_pclk;
1182 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001183 uint32_t vt_pixel_clk;
1184 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001185 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001186};
1187
1188struct sensor_output_info_t {
1189 struct msm_sensor_output_info_t *output_info;
1190 uint16_t num_info;
1191};
1192
Taniya Dasa9bdb012011-09-08 11:21:33 +05301193struct mirror_flip {
1194 int32_t x_mirror;
1195 int32_t y_flip;
1196};
1197
1198struct cord {
1199 uint32_t x;
1200 uint32_t y;
1201};
1202
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001203struct msm_eeprom_data_t {
1204 void *eeprom_data;
1205 uint16_t index;
1206};
1207
Nishant Panditb2157c92012-04-25 01:09:28 +05301208struct msm_camera_csid_vc_cfg {
1209 uint8_t cid;
1210 uint8_t dt;
1211 uint8_t decode_format;
1212};
1213
1214struct csi_lane_params_t {
1215 uint8_t csi_lane_assign;
1216 uint8_t csi_lane_mask;
1217 uint8_t csi_if;
1218 uint8_t csid_core;
1219 uint32_t csid_version;
1220};
1221
1222#define CSI_EMBED_DATA 0x12
1223#define CSI_RESERVED_DATA_0 0x13
1224#define CSI_YUV422_8 0x1E
1225#define CSI_RAW8 0x2A
1226#define CSI_RAW10 0x2B
1227#define CSI_RAW12 0x2C
1228
1229#define CSI_DECODE_6BIT 0
1230#define CSI_DECODE_8BIT 1
1231#define CSI_DECODE_10BIT 2
1232#define CSI_DECODE_DPCM_10_8_10 5
1233
1234#define ISPIF_STREAM(intf, action) (((intf)<<ISPIF_S_STREAM_SHIFT)+(action))
1235#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1236#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1237#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1238#define ISPIF_S_STREAM_SHIFT 4
1239
1240
1241#define PIX_0 (0x01 << 0)
1242#define RDI_0 (0x01 << 1)
1243#define PIX_1 (0x01 << 2)
1244#define RDI_1 (0x01 << 3)
1245#define PIX_2 (0x01 << 4)
1246#define RDI_2 (0x01 << 5)
1247
1248
1249enum msm_ispif_intftype {
1250 PIX0,
1251 RDI0,
1252 PIX1,
1253 RDI1,
1254 PIX2,
1255 RDI2,
1256 INTF_MAX,
1257};
1258
1259enum msm_ispif_vc {
1260 VC0,
1261 VC1,
1262 VC2,
1263 VC3,
1264};
1265
1266enum msm_ispif_cid {
1267 CID0,
1268 CID1,
1269 CID2,
1270 CID3,
1271 CID4,
1272 CID5,
1273 CID6,
1274 CID7,
1275 CID8,
1276 CID9,
1277 CID10,
1278 CID11,
1279 CID12,
1280 CID13,
1281 CID14,
1282 CID15,
1283};
1284
1285struct msm_ispif_params {
1286 uint8_t intftype;
1287 uint16_t cid_mask;
1288 uint8_t csid;
1289};
1290
1291struct msm_ispif_params_list {
1292 uint32_t len;
1293 struct msm_ispif_params params[4];
1294};
1295
1296enum ispif_cfg_type_t {
1297 ISPIF_INIT,
1298 ISPIF_SET_CFG,
1299 ISPIF_SET_ON_FRAME_BOUNDARY,
1300 ISPIF_SET_OFF_FRAME_BOUNDARY,
1301 ISPIF_SET_OFF_IMMEDIATELY,
1302 ISPIF_RELEASE,
1303};
1304
1305struct ispif_cfg_data {
1306 enum ispif_cfg_type_t cfgtype;
1307 union {
1308 uint32_t csid_version;
1309 int cmd;
1310 struct msm_ispif_params_list ispif_params;
1311 } cfg;
1312};
1313
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001314struct sensor_cfg_data {
1315 int cfgtype;
1316 int mode;
1317 int rs;
1318 uint8_t max_steps;
1319
1320 union {
1321 int8_t effect;
1322 uint8_t lens_shading;
1323 uint16_t prevl_pf;
1324 uint16_t prevp_pl;
1325 uint16_t pictl_pf;
1326 uint16_t pictp_pl;
1327 uint32_t pict_max_exp_lc;
1328 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301329 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001330 struct sensor_init_cfg init_info;
1331 struct sensor_pict_fps gfps;
1332 struct exp_gain_cfg exp_gain;
1333 struct focus_cfg focus;
1334 struct fps_cfg fps;
1335 struct wb_info_cfg wb_info;
1336 struct sensor_3d_exp_cfg sensor_3d_exp;
1337 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001338 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001339 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301340 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301341 /* QRD */
1342 uint16_t antibanding;
1343 uint8_t contrast;
1344 uint8_t saturation;
1345 uint8_t sharpness;
1346 int8_t brightness;
1347 int ae_mode;
1348 uint8_t wb_val;
1349 int8_t exp_compensation;
1350 struct cord aec_cord;
1351 int is_autoflash;
1352 struct mirror_flip mirror_flip;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001353 } cfg;
1354};
1355
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001356struct damping_params_t {
1357 uint32_t damping_step;
1358 uint32_t damping_delay;
1359 uint32_t hw_params;
1360};
1361
1362enum actuator_type {
1363 ACTUATOR_VCM,
1364 ACTUATOR_PIEZO,
1365};
1366
1367enum msm_actuator_data_type {
1368 MSM_ACTUATOR_BYTE_DATA = 1,
1369 MSM_ACTUATOR_WORD_DATA,
1370};
1371
1372enum msm_actuator_addr_type {
1373 MSM_ACTUATOR_BYTE_ADDR = 1,
1374 MSM_ACTUATOR_WORD_ADDR,
1375};
1376
1377enum msm_actuator_write_type {
1378 MSM_ACTUATOR_WRITE_HW_DAMP,
1379 MSM_ACTUATOR_WRITE_DAC,
1380};
1381
1382struct msm_actuator_reg_params_t {
1383 enum msm_actuator_write_type reg_write_type;
1384 uint32_t hw_mask;
1385 uint16_t reg_addr;
1386 uint16_t hw_shift;
1387 uint16_t data_shift;
1388};
1389
1390struct reg_settings_t {
1391 uint16_t reg_addr;
1392 uint16_t reg_data;
1393};
1394
1395struct region_params_t {
1396 /* [0] = ForwardDirection Macro boundary
1397 [1] = ReverseDirection Inf boundary
1398 */
1399 uint16_t step_bound[2];
1400 uint16_t code_per_step;
1401};
1402
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001403struct msm_actuator_move_params_t {
1404 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001405 int8_t sign_dir;
1406 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001407 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001408 struct damping_params_t *ringing_params;
1409};
1410
1411struct msm_actuator_tuning_params_t {
1412 int16_t initial_code;
1413 uint16_t pwd_step;
1414 uint16_t region_size;
1415 uint32_t total_steps;
1416 struct region_params_t *region_params;
1417};
1418
1419struct msm_actuator_params_t {
1420 enum actuator_type act_type;
1421 uint8_t reg_tbl_size;
1422 uint16_t data_size;
1423 uint16_t init_setting_size;
1424 uint32_t i2c_addr;
1425 enum msm_actuator_addr_type i2c_addr_type;
1426 enum msm_actuator_data_type i2c_data_type;
1427 struct msm_actuator_reg_params_t *reg_tbl_params;
1428 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001429};
1430
1431struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001432 struct msm_actuator_params_t actuator_params;
1433 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001434};
1435
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001436struct msm_actuator_get_info_t {
1437 uint32_t focal_length_num;
1438 uint32_t focal_length_den;
1439 uint32_t f_number_num;
1440 uint32_t f_number_den;
1441 uint32_t f_pix_num;
1442 uint32_t f_pix_den;
1443 uint32_t total_f_dist_num;
1444 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001445 uint32_t hor_view_angle_num;
1446 uint32_t hor_view_angle_den;
1447 uint32_t ver_view_angle_num;
1448 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001449};
1450
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001451enum af_camera_name {
1452 ACTUATOR_MAIN_CAM_0,
1453 ACTUATOR_MAIN_CAM_1,
1454 ACTUATOR_MAIN_CAM_2,
1455 ACTUATOR_MAIN_CAM_3,
1456 ACTUATOR_MAIN_CAM_4,
1457 ACTUATOR_MAIN_CAM_5,
1458 ACTUATOR_WEB_CAM_0,
1459 ACTUATOR_WEB_CAM_1,
1460 ACTUATOR_WEB_CAM_2,
1461};
1462
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001463struct msm_actuator_cfg_data {
1464 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001465 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001466 union {
1467 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001468 struct msm_actuator_set_info_t set_info;
1469 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001470 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001471 } cfg;
1472};
1473
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001474struct msm_eeprom_support {
1475 uint16_t is_supported;
1476 uint16_t size;
1477 uint16_t index;
1478 uint16_t qvalue;
1479};
1480
1481struct msm_calib_wb {
1482 uint16_t r_over_g;
1483 uint16_t b_over_g;
1484 uint16_t gr_over_gb;
1485};
1486
1487struct msm_calib_af {
1488 uint16_t macro_dac;
1489 uint16_t inf_dac;
1490 uint16_t start_dac;
1491};
1492
1493struct msm_calib_lsc {
1494 uint16_t r_gain[221];
1495 uint16_t b_gain[221];
1496 uint16_t gr_gain[221];
1497 uint16_t gb_gain[221];
1498};
1499
1500struct pixel_t {
1501 int x;
1502 int y;
1503};
1504
1505struct msm_calib_dpc {
1506 uint16_t validcount;
1507 struct pixel_t snapshot_coord[128];
1508 struct pixel_t preview_coord[128];
1509 struct pixel_t video_coord[128];
1510};
1511
1512struct msm_camera_eeprom_info_t {
1513 struct msm_eeprom_support af;
1514 struct msm_eeprom_support wb;
1515 struct msm_eeprom_support lsc;
1516 struct msm_eeprom_support dpc;
1517};
1518
1519struct msm_eeprom_cfg_data {
1520 int cfgtype;
1521 uint8_t is_eeprom_supported;
1522 union {
1523 struct msm_eeprom_data_t get_data;
1524 struct msm_camera_eeprom_info_t get_info;
1525 } cfg;
1526};
1527
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001528struct sensor_large_data {
1529 int cfgtype;
1530 union {
1531 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1532 } data;
1533};
1534
1535enum sensor_type_t {
1536 BAYER,
1537 YUV,
1538 JPEG_SOC,
1539};
1540
1541enum flash_type {
1542 LED_FLASH,
1543 STROBE_FLASH,
1544};
1545
1546enum strobe_flash_ctrl_type {
1547 STROBE_FLASH_CTRL_INIT,
1548 STROBE_FLASH_CTRL_CHARGE,
1549 STROBE_FLASH_CTRL_RELEASE
1550};
1551
1552struct strobe_flash_ctrl_data {
1553 enum strobe_flash_ctrl_type type;
1554 int charge_en;
1555};
1556
1557struct msm_camera_info {
1558 int num_cameras;
1559 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1560 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1561 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1562 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1563 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001564};
1565
1566struct msm_cam_config_dev_info {
1567 int num_config_nodes;
1568 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001569 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001570};
1571
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001572struct msm_mctl_node_info {
1573 int num_mctl_nodes;
1574 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1575};
1576
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001577struct flash_ctrl_data {
1578 int flashtype;
1579 union {
1580 int led_state;
1581 struct strobe_flash_ctrl_data strobe_ctrl;
1582 } ctrl_data;
1583};
1584
1585#define GET_NAME 0
1586#define GET_PREVIEW_LINE_PER_FRAME 1
1587#define GET_PREVIEW_PIXELS_PER_LINE 2
1588#define GET_SNAPSHOT_LINE_PER_FRAME 3
1589#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1590#define GET_SNAPSHOT_FPS 5
1591#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1592
1593struct msm_camsensor_info {
1594 char name[MAX_SENSOR_NAME];
1595 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001596 uint8_t strobe_flash_enabled;
1597 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301598 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001599 int8_t total_steps;
1600 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001601 enum flash_type flashtype;
1602 enum sensor_type_t sensor_type;
1603 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1604 uint32_t camera_type; /* msm_camera_type */
1605 int mount_angle;
1606 uint32_t max_width;
1607 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001608};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001609
1610#define V4L2_SINGLE_PLANE 0
1611#define V4L2_MULTI_PLANE_Y 0
1612#define V4L2_MULTI_PLANE_CBCR 1
1613#define V4L2_MULTI_PLANE_CB 1
1614#define V4L2_MULTI_PLANE_CR 2
1615
1616struct plane_data {
1617 int plane_id;
1618 uint32_t offset;
1619 unsigned long size;
1620};
1621
1622struct img_plane_info {
1623 uint32_t width;
1624 uint32_t height;
1625 uint32_t pixelformat;
1626 uint8_t buffer_type; /*Single/Multi planar*/
1627 uint8_t output_port;
1628 uint32_t ext_mode;
1629 uint8_t num_planes;
1630 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001631 uint32_t sp_y_offset;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001632 uint8_t vpe_can_use;
1633};
1634
Kevin Chan210061f2012-02-14 20:56:16 -08001635#define QCAMERA_NAME "qcamera"
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001636#define QCAMERA_SERVER_NAME "qcamera_server"
Kevin Chan210061f2012-02-14 20:56:16 -08001637#define QCAMERA_DEVICE_GROUP_ID 1
1638#define QCAMERA_VNODE_GROUP_ID 2
1639
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001640enum msm_cam_subdev_type {
1641 CSIPHY_DEV,
1642 CSID_DEV,
1643 CSIC_DEV,
1644 ISPIF_DEV,
1645 VFE_DEV,
1646 AXI_DEV,
1647 VPE_DEV,
1648 SENSOR_DEV,
1649 ACTUATOR_DEV,
1650 EEPROM_DEV,
1651 GESTURE_DEV,
1652 IRQ_ROUTER_DEV,
1653 CPP_DEV,
1654};
1655
1656struct msm_mctl_set_sdev_data {
1657 uint32_t revision;
1658 enum msm_cam_subdev_type sdev_type;
1659};
1660
Kevin Chan94b4c832012-03-02 21:27:16 -08001661#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001662 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001663
1664#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001665 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001666
1667#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001668 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001669
1670#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07001671 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001672
1673#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07001674 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001675
Sunid Wilson4584b5f2012-04-13 12:48:25 -07001676#define MSM_CAM_IOCTL_SEND_EVENT \
1677 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1678
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07001679#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1680 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1681
Kevin Chan41a38702012-06-06 22:25:41 -07001682#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1683 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1684
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001685#define VIDIOC_MSM_VPE_INIT \
1686 _IO('V', BASE_VIDIOC_PRIVATE + 15)
1687
1688#define VIDIOC_MSM_VPE_RELEASE \
1689 _IO('V', BASE_VIDIOC_PRIVATE + 16)
1690
1691#define VIDIOC_MSM_VPE_CFG \
1692 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
1693
1694#define VIDIOC_MSM_AXI_INIT \
1695 _IO('V', BASE_VIDIOC_PRIVATE + 18)
1696
1697#define VIDIOC_MSM_AXI_RELEASE \
1698 _IO('V', BASE_VIDIOC_PRIVATE + 19)
1699
1700#define VIDIOC_MSM_AXI_CFG \
1701 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
1702
1703#define VIDIOC_MSM_AXI_IRQ \
1704 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
1705
1706#define VIDIOC_MSM_AXI_BUF_CFG \
1707 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
1708
1709#define VIDIOC_MSM_VFE_INIT \
1710 _IO('V', BASE_VIDIOC_PRIVATE + 22)
1711
1712#define VIDIOC_MSM_VFE_RELEASE \
1713 _IO('V', BASE_VIDIOC_PRIVATE + 23)
1714
Kevin Chan94b4c832012-03-02 21:27:16 -08001715struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07001716 uint32_t id;
Kevin Chan94b4c832012-03-02 21:27:16 -08001717 void __user *ioctl_ptr;
Kevin Chan41a38702012-06-06 22:25:41 -07001718 uint32_t len;
Kevin Chan94b4c832012-03-02 21:27:16 -08001719};
1720
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07001721enum msm_camss_irq_idx {
1722 CAMERA_SS_IRQ_0,
1723 CAMERA_SS_IRQ_1,
1724 CAMERA_SS_IRQ_2,
1725 CAMERA_SS_IRQ_3,
1726 CAMERA_SS_IRQ_4,
1727 CAMERA_SS_IRQ_5,
1728 CAMERA_SS_IRQ_6,
1729 CAMERA_SS_IRQ_7,
1730 CAMERA_SS_IRQ_8,
1731 CAMERA_SS_IRQ_9,
1732 CAMERA_SS_IRQ_10,
1733 CAMERA_SS_IRQ_11,
1734 CAMERA_SS_IRQ_12,
1735 CAMERA_SS_IRQ_MAX
1736};
1737
1738enum msm_cam_hw_idx {
1739 MSM_CAM_HW_MICRO,
1740 MSM_CAM_HW_CCI,
1741 MSM_CAM_HW_CSI0,
1742 MSM_CAM_HW_CSI1,
1743 MSM_CAM_HW_CSI2,
1744 MSM_CAM_HW_CSI3,
1745 MSM_CAM_HW_ISPIF,
1746 MSM_CAM_HW_CPP,
1747 MSM_CAM_HW_VFE0,
1748 MSM_CAM_HW_VFE1,
1749 MSM_CAM_HW_JPEG0,
1750 MSM_CAM_HW_JPEG1,
1751 MSM_CAM_HW_JPEG2,
1752 MSM_CAM_HW_MAX
1753};
1754
1755struct msm_camera_irq_cfg {
1756 /* Bit mask of all the camera hardwares that needs to
1757 * be composited into a single IRQ to the MSM.
1758 * Current usage: (may be updated based on hw changes)
1759 * Bits 31:13 - Reserved.
1760 * Bits 12:0
1761 * 12 - MSM_CAM_HW_JPEG2
1762 * 11 - MSM_CAM_HW_JPEG1
1763 * 10 - MSM_CAM_HW_JPEG0
1764 * 9 - MSM_CAM_HW_VFE1
1765 * 8 - MSM_CAM_HW_VFE0
1766 * 7 - MSM_CAM_HW_CPP
1767 * 6 - MSM_CAM_HW_ISPIF
1768 * 5 - MSM_CAM_HW_CSI3
1769 * 4 - MSM_CAM_HW_CSI2
1770 * 3 - MSM_CAM_HW_CSI1
1771 * 2 - MSM_CAM_HW_CSI0
1772 * 1 - MSM_CAM_HW_CCI
1773 * 0 - MSM_CAM_HW_MICRO
1774 */
1775 uint32_t cam_hw_mask;
1776 uint8_t irq_idx;
1777 uint8_t num_hwcore;
1778};
1779
1780#define MSM_IRQROUTER_CFG_COMPIRQ \
1781 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
1782
Kevin Chan73ec7282012-06-07 01:32:00 -07001783#define MAX_NUM_CPP_STRIPS 8
1784
1785enum msm_cpp_frame_type {
1786 MSM_CPP_OFFLINE_FRAME,
1787 MSM_CPP_REALTIME_FRAME,
1788};
1789
1790struct msm_cpp_frame_strip_info {
1791 int scale_v_en;
1792 int scale_h_en;
1793
1794 int upscale_v_en;
1795 int upscale_h_en;
1796
1797 int src_start_x;
1798 int src_end_x;
1799 int src_start_y;
1800 int src_end_y;
1801
1802 /* Padding is required for upscaler because it does not
1803 * pad internally like other blocks, also needed for rotation
1804 * rotation expects all the blocks in the stripe to be the same size
1805 * Padding is done such that all the extra padded pixels
1806 * are on the right and bottom
1807 */
1808 int pad_bottom;
1809 int pad_top;
1810 int pad_right;
1811 int pad_left;
1812
1813 int v_init_phase;
1814 int h_init_phase;
1815 int h_phase_step;
1816 int v_phase_step;
1817
1818 int prescale_crop_width_first_pixel;
1819 int prescale_crop_width_last_pixel;
1820 int prescale_crop_height_first_line;
1821 int prescale_crop_height_last_line;
1822
1823 int postscale_crop_height_first_line;
1824 int postscale_crop_height_last_line;
1825 int postscale_crop_width_first_pixel;
1826 int postscale_crop_width_last_pixel;
1827
1828 int dst_start_x;
1829 int dst_end_x;
1830 int dst_start_y;
1831 int dst_end_y;
1832
1833 int bytes_per_pixel;
1834 unsigned int source_address;
1835 unsigned int destination_address;
1836 unsigned int src_stride;
1837 unsigned int dst_stride;
1838 int rotate_270;
1839 int horizontal_flip;
1840 int vertical_flip;
1841 int scale_output_width;
1842 int scale_output_height;
1843};
1844
1845struct msm_cpp_frame_info_t {
1846 int32_t frame_id;
1847 uint32_t inst_id;
1848 uint32_t client_id;
1849 enum msm_cpp_frame_type frame_type;
1850 uint32_t num_strips;
1851 struct msm_cpp_frame_strip_info *strip_info;
1852};
1853
1854#define VIDIOC_MSM_CPP_CFG \
1855 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
1856
1857#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
1858 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
1859
1860#define VIDIOC_MSM_CPP_GET_INST_INFO \
1861 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
1862
1863#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
1864
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001865#endif /* __LINUX_MSM_CAMERA_H */