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Christian Lamparter32ddf072008-08-08 21:17:37 +02001#ifndef P54COMMON_H
2#define P54COMMON_H
Michael Wueff1a592007-09-25 18:11:01 -07003
4/*
5 * Common code specific definitions for mac80211 Prism54 drivers
6 *
7 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
8 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
9 *
10 * Based on the islsm (softmac prism54) driver, which is:
11 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18struct bootrec {
19 __le32 code;
20 __le32 len;
21 u32 data[0];
22} __attribute__((packed));
23
24struct bootrec_exp_if {
25 __le16 role;
26 __le16 if_id;
27 __le16 variant;
28 __le16 btm_compat;
29 __le16 top_compat;
30} __attribute__((packed));
31
Christian Lamparter4e416a62008-09-01 22:48:41 +020032struct bootrec_desc {
33 __le16 modes;
34 __le16 flags;
35 __le32 rx_start;
36 __le32 rx_end;
37 u8 headroom;
38 u8 tailroom;
39 u8 unimportant[6];
40 u8 rates[16];
41} __attribute__((packed));
42
Michael Wueff1a592007-09-25 18:11:01 -070043#define BR_CODE_MIN 0x80000000
44#define BR_CODE_COMPONENT_ID 0x80000001
45#define BR_CODE_COMPONENT_VERSION 0x80000002
46#define BR_CODE_DEPENDENT_IF 0x80000003
47#define BR_CODE_EXPOSED_IF 0x80000004
48#define BR_CODE_DESCR 0x80000101
49#define BR_CODE_MAX 0x8FFFFFFF
50#define BR_CODE_END_OF_BRA 0xFF0000FF
51#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
52
53#define FW_FMAC 0x464d4143
54#define FW_LM86 0x4c4d3836
55#define FW_LM87 0x4c4d3837
56#define FW_LM20 0x4c4d3230
57
58/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
59
60struct pda_entry {
61 __le16 len; /* includes both code and data */
62 __le16 code;
63 u8 data[0];
64} __attribute__ ((packed));
65
66struct eeprom_pda_wrap {
Johannes Berg8c282932008-02-29 13:56:33 +010067 __le32 magic;
68 __le16 pad;
69 __le16 len;
70 __le32 arm_opcode;
Michael Wueff1a592007-09-25 18:11:01 -070071 u8 data[0];
72} __attribute__ ((packed));
73
74struct pda_iq_autocal_entry {
75 __le16 freq;
76 __le16 iq_param[4];
77} __attribute__ ((packed));
78
79struct pda_channel_output_limit {
80 __le16 freq;
81 u8 val_bpsk;
82 u8 val_qpsk;
83 u8 val_16qam;
84 u8 val_64qam;
85 u8 rate_set_mask;
86 u8 rate_set_size;
87} __attribute__ ((packed));
88
89struct pda_pa_curve_data_sample_rev0 {
90 u8 rf_power;
91 u8 pa_detector;
92 u8 pcv;
93} __attribute__ ((packed));
94
95struct pda_pa_curve_data_sample_rev1 {
96 u8 rf_power;
97 u8 pa_detector;
98 u8 data_barker;
99 u8 data_bpsk;
100 u8 data_qpsk;
101 u8 data_16qam;
102 u8 data_64qam;
Christian Lamparter154e3af2008-08-23 22:15:25 +0200103} __attribute__ ((packed));
104
105struct p54_pa_curve_data_sample {
106 u8 rf_power;
107 u8 pa_detector;
108 u8 data_barker;
109 u8 data_bpsk;
110 u8 data_qpsk;
111 u8 data_16qam;
112 u8 data_64qam;
Michael Wueff1a592007-09-25 18:11:01 -0700113 u8 padding;
114} __attribute__ ((packed));
115
116struct pda_pa_curve_data {
117 u8 cal_method_rev;
118 u8 channels;
119 u8 points_per_channel;
120 u8 padding;
121 u8 data[0];
122} __attribute__ ((packed));
123
124/*
125 * this defines the PDR codes used to build PDAs as defined in document
126 * number 553155. The current implementation mirrors version 1.1 of the
127 * document and lists only PDRs supported by the ARM platform.
128 */
129
130/* common and choice range (0x0000 - 0x0fff) */
131#define PDR_END 0x0000
132#define PDR_MANUFACTURING_PART_NUMBER 0x0001
133#define PDR_PDA_VERSION 0x0002
134#define PDR_NIC_SERIAL_NUMBER 0x0003
135
136#define PDR_MAC_ADDRESS 0x0101
137#define PDR_REGULATORY_DOMAIN_LIST 0x0103
138#define PDR_TEMPERATURE_TYPE 0x0107
139
140#define PDR_PRISM_PCI_IDENTIFIER 0x0402
141
142/* ARM range (0x1000 - 0x1fff) */
143#define PDR_COUNTRY_INFORMATION 0x1000
144#define PDR_INTERFACE_LIST 0x1001
145#define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
146#define PDR_OEM_NAME 0x1003
147#define PDR_PRODUCT_NAME 0x1004
148#define PDR_UTF8_OEM_NAME 0x1005
149#define PDR_UTF8_PRODUCT_NAME 0x1006
150#define PDR_COUNTRY_LIST 0x1007
151#define PDR_DEFAULT_COUNTRY 0x1008
152
153#define PDR_ANTENNA_GAIN 0x1100
154
155#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
156#define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
157#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
158#define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
159#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
160#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
161#define PDR_REGULATORY_POWER_LIMITS 0x1907
162#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
163#define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
164#define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
165
166/* reserved range (0x2000 - 0x7fff) */
167
168/* customer range (0x8000 - 0xffff) */
169#define PDR_BASEBAND_REGISTERS 0x8000
170#define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
171
172/* stored in skb->cb */
173struct memrecord {
174 u32 start_addr;
175 u32 end_addr;
Michael Wueff1a592007-09-25 18:11:01 -0700176};
177
178struct p54_eeprom_lm86 {
179 __le16 offset;
180 __le16 len;
181 u8 data[0];
182} __attribute__ ((packed));
183
184struct p54_rx_hdr {
185 __le16 magic;
186 __le16 len;
187 __le16 freq;
188 u8 antenna;
189 u8 rate;
190 u8 rssi;
191 u8 quality;
192 u16 unknown2;
193 __le64 timestamp;
194 u8 data[0];
195} __attribute__ ((packed));
196
197struct p54_frame_sent_hdr {
198 u8 status;
199 u8 retries;
200 __le16 ack_rssi;
201 __le16 seq;
202 u16 rate;
203} __attribute__ ((packed));
204
205struct p54_tx_control_allocdata {
206 u8 rateset[8];
Christian Lamparteraaa15532008-08-09 19:20:47 -0500207 u8 unalloc0[2];
208 u8 key_type;
209 u8 key_len;
210 u8 key[16];
211 u8 hw_queue;
212 u8 unalloc1[9];
213 u8 tx_antenna;
Michael Wueff1a592007-09-25 18:11:01 -0700214 u8 output_power;
Christian Lamparteraaa15532008-08-09 19:20:47 -0500215 u8 cts_rate;
216 u8 unalloc2[3];
Michael Wueff1a592007-09-25 18:11:01 -0700217 u8 align[0];
218} __attribute__ ((packed));
219
220struct p54_tx_control_filter {
221 __le16 filter_type;
222 u8 dst[ETH_ALEN];
223 u8 src[ETH_ALEN];
224 u8 antenna;
225 u8 debug;
226 __le32 magic3;
227 u8 rates[8]; // FIXME: what's this for?
228 __le32 rx_addr;
229 __le16 max_rx;
230 __le16 rxhw;
231 __le16 magic8;
232 __le16 magic9;
233} __attribute__ ((packed));
234
235struct p54_tx_control_channel {
Christian Lamparter154e3af2008-08-23 22:15:25 +0200236 __le16 flags;
237 __le16 dwell;
Michael Wueff1a592007-09-25 18:11:01 -0700238 u8 padding1[20];
239 struct pda_iq_autocal_entry iq_autocal;
240 u8 pa_points_per_curve;
241 u8 val_barker;
242 u8 val_bpsk;
243 u8 val_qpsk;
244 u8 val_16qam;
245 u8 val_64qam;
Christian Lamparter154e3af2008-08-23 22:15:25 +0200246 struct pda_pa_curve_data_sample_rev1 curve_data[8];
247 u8 dup_bpsk;
248 u8 dup_qpsk;
249 u8 dup_16qam;
250 u8 dup_64qam;
251 __le16 rssical_mul;
252 __le16 rssical_add;
Michael Wueff1a592007-09-25 18:11:01 -0700253} __attribute__ ((packed));
254
255struct p54_tx_control_led {
256 __le16 mode;
257 __le16 led_temporary;
258 __le16 led_permanent;
259 __le16 duration;
260} __attribute__ ((packed));
261
262struct p54_tx_vdcf_queues {
263 __le16 aifs;
264 __le16 cwmin;
265 __le16 cwmax;
266 __le16 txop;
267} __attribute__ ((packed));
268
269struct p54_tx_control_vdcf {
270 u8 padding;
271 u8 slottime;
272 u8 magic1;
273 u8 magic2;
274 struct p54_tx_vdcf_queues queue[8];
275 u8 pad2[4];
276 __le16 frameburst;
277} __attribute__ ((packed));
278
Christian Lamparter32ddf072008-08-08 21:17:37 +0200279#endif /* P54COMMON_H */