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review.evervolv.com / android_kernel_htc_msm8960 / 534a7b8e10ec55d9f521e68c20dbb3634c25b98a / . / include / video / neomagic.h
blob: bc5013e8059d562cbffd46c214c7c7e485abf76d [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 * linux/include/video/neo_reg.h -- NeoMagic Framebuffer Driver
3 *
4 * Copyright (c) 2001 Denis Oliver Kropp <dok@convergence.de>
5 *
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file COPYING in the main directory of this
8 * archive for more details.
9 */
10
11#define NEO_BS0_BLT_BUSY 0x00000001
12#define NEO_BS0_FIFO_AVAIL 0x00000002
13#define NEO_BS0_FIFO_PEND 0x00000004
14
15#define NEO_BC0_DST_Y_DEC 0x00000001
16#define NEO_BC0_X_DEC 0x00000002
17#define NEO_BC0_SRC_TRANS 0x00000004
18#define NEO_BC0_SRC_IS_FG 0x00000008
19#define NEO_BC0_SRC_Y_DEC 0x00000010
20#define NEO_BC0_FILL_PAT 0x00000020
21#define NEO_BC0_SRC_MONO 0x00000040
22#define NEO_BC0_SYS_TO_VID 0x00000080
23
24#define NEO_BC1_DEPTH8 0x00000100
25#define NEO_BC1_DEPTH16 0x00000200
26#define NEO_BC1_X_320 0x00000400
27#define NEO_BC1_X_640 0x00000800
28#define NEO_BC1_X_800 0x00000c00
29#define NEO_BC1_X_1024 0x00001000
30#define NEO_BC1_X_1152 0x00001400
31#define NEO_BC1_X_1280 0x00001800
32#define NEO_BC1_X_1600 0x00001c00
33#define NEO_BC1_DST_TRANS 0x00002000
34#define NEO_BC1_MSTR_BLT 0x00004000
35#define NEO_BC1_FILTER_Z 0x00008000
36
37#define NEO_BC2_WR_TR_DST 0x00800000
38
39#define NEO_BC3_SRC_XY_ADDR 0x01000000
40#define NEO_BC3_DST_XY_ADDR 0x02000000
41#define NEO_BC3_CLIP_ON 0x04000000
42#define NEO_BC3_FIFO_EN 0x08000000
43#define NEO_BC3_BLT_ON_ADDR 0x10000000
44#define NEO_BC3_SKIP_MAPPING 0x80000000
45
46#define NEO_MODE1_DEPTH8 0x0100
47#define NEO_MODE1_DEPTH16 0x0200
48#define NEO_MODE1_DEPTH24 0x0300
49#define NEO_MODE1_X_320 0x0400
50#define NEO_MODE1_X_640 0x0800
51#define NEO_MODE1_X_800 0x0c00
52#define NEO_MODE1_X_1024 0x1000
53#define NEO_MODE1_X_1152 0x1400
54#define NEO_MODE1_X_1280 0x1800
55#define NEO_MODE1_X_1600 0x1c00
56#define NEO_MODE1_BLT_ON_ADDR 0x2000
57
58/* These are offseted in MMIO space by par->CursorOff */
59#define NEOREG_CURSCNTL 0x00
60#define NEOREG_CURSX 0x04
61#define NEOREG_CURSY 0x08
62#define NEOREG_CURSBGCOLOR 0x0C
63#define NEOREG_CURSFGCOLOR 0x10
64#define NEOREG_CURSMEMPOS 0x14
65
66#define NEO_CURS_DISABLE 0x00000000
67#define NEO_CURS_ENABLE 0x00000001
68#define NEO_ICON64_ENABLE 0x00000008
69#define NEO_ICON128_ENABLE 0x0000000C
70#define NEO_ICON_BLANK 0x00000010
71
72#define NEO_GR01_SUPPRESS_VSYNC 0x10
73#define NEO_GR01_SUPPRESS_HSYNC 0x20
74
75#ifdef __KERNEL__
76
77#ifdef NEOFB_DEBUG
78# define DBG(x) printk (KERN_DEBUG "neofb: %s\n", (x));
79#else
80# define DBG(x)
81#endif
82
83#define PCI_CHIP_NM2070 0x0001
84#define PCI_CHIP_NM2090 0x0002
85#define PCI_CHIP_NM2093 0x0003
86#define PCI_CHIP_NM2097 0x0083
87#define PCI_CHIP_NM2160 0x0004
88#define PCI_CHIP_NM2200 0x0005
89#define PCI_CHIP_NM2230 0x0025
90#define PCI_CHIP_NM2360 0x0006
91#define PCI_CHIP_NM2380 0x0016
92
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]93/* --------------------------------------------------------------------- */
94
95typedef volatile struct {
96 __u32 bltStat;
97 __u32 bltCntl;
98 __u32 xpColor;
99 __u32 fgColor;
100 __u32 bgColor;
101 __u32 pitch;
102 __u32 clipLT;
103 __u32 clipRB;
104 __u32 srcBitOffset;
105 __u32 srcStart;
106 __u32 reserved0;
107 __u32 dstStart;
108 __u32 xyExt;
109
110 __u32 reserved1[19];
111
112 __u32 pageCntl;
113 __u32 pageBase;
114 __u32 postBase;
115 __u32 postPtr;
116 __u32 dataPtr;
117} Neo2200;
118
119#define MMIO_SIZE 0x200000
120
121#define NEO_EXT_CR_MAX 0x85
122#define NEO_EXT_GR_MAX 0xC7
123
124struct neofb_par {
125 struct vgastate state;
Jiri Slabyc4f28e52007-02-12 00:55:11 -0800[diff] [blame]126 unsigned int ref_count;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]127
128 unsigned char MiscOutReg; /* Misc */
129 unsigned char CRTC[25]; /* Crtc Controller */
130 unsigned char Sequencer[5]; /* Video Sequencer */
131 unsigned char Graphics[9]; /* Video Graphics */
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300[diff] [blame]132 unsigned char Attribute[21]; /* Video Attribute */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]133
134 unsigned char GeneralLockReg;
135 unsigned char ExtCRTDispAddr;
136 unsigned char ExtCRTOffset;
137 unsigned char SysIfaceCntl1;
138 unsigned char SysIfaceCntl2;
139 unsigned char ExtColorModeSelect;
140 unsigned char biosMode;
141
142 unsigned char PanelDispCntlReg1;
143 unsigned char PanelDispCntlReg2;
144 unsigned char PanelDispCntlReg3;
Christian Trefzer9f672002006-02-15 15:17:34 -0800[diff] [blame]145 unsigned char PanelDispCntlRegRead;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]146 unsigned char PanelVertCenterReg1;
147 unsigned char PanelVertCenterReg2;
148 unsigned char PanelVertCenterReg3;
149 unsigned char PanelVertCenterReg4;
150 unsigned char PanelVertCenterReg5;
151 unsigned char PanelHorizCenterReg1;
152 unsigned char PanelHorizCenterReg2;
153 unsigned char PanelHorizCenterReg3;
154 unsigned char PanelHorizCenterReg4;
155 unsigned char PanelHorizCenterReg5;
156
157 int ProgramVCLK;
158 unsigned char VCLK3NumeratorLow;
159 unsigned char VCLK3NumeratorHigh;
160 unsigned char VCLK3Denominator;
161 unsigned char VerticalExt;
162
163#ifdef CONFIG_MTRR
164 int mtrr;
165#endif
166 u8 __iomem *mmio_vbase;
167 u8 cursorOff;
168 u8 *cursorPad; /* Must die !! */
169
170 Neo2200 __iomem *neo2200;
171
172 /* Panels size */
173 int NeoPanelWidth;
174 int NeoPanelHeight;
175
176 int maxClock;
177
178 int pci_burst;
179 int lcd_stretch;
180 int internal_display;
181 int external_display;
182 int libretto;
Antonino A. Daplas9f19bc52006-01-09 20:53:09 -0800[diff] [blame]183 u32 palette[16];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]184};
185
186typedef struct {
187 int x_res;
188 int y_res;
189 int mode;
190} biosMode;
191
192#endif