blob: eaaf6ff289905501fffb048fb1aa0e3a4850b48d [file] [log] [blame]
Shawn Guo4afbbb72010-12-18 21:39:35 +08001/*
2 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17#include <linux/gpio.h>
Shawn Guo53b8ff92011-05-31 17:07:03 +080018#include <linux/leds.h>
Shawn Guo4afbbb72010-12-18 21:39:35 +080019#include <linux/irq.h>
20#include <linux/clk.h>
21
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24#include <asm/mach/time.h>
25
26#include <mach/common.h>
27#include <mach/iomux-mx28.h>
28
29#include "devices-mx28.h"
Shawn Guo4afbbb72010-12-18 21:39:35 +080030
Shawn Guoacc9cdc2011-03-03 22:13:38 +080031#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
Shawn Guo4afbbb72010-12-18 21:39:35 +080032#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
Shawn Guo53b8ff92011-05-31 17:07:03 +080033#define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5)
Shawn Guo0590a792011-03-08 18:51:10 +080034#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
35#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
Shawn Guo4afbbb72010-12-18 21:39:35 +080036#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
37
Shawn Guo5bb2c822011-02-22 16:50:24 +080038#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
39#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
40#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
41#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
42
Shawn Guo4afbbb72010-12-18 21:39:35 +080043static const iomux_cfg_t mx28evk_pads[] __initconst = {
44 /* duart */
Shawn Guodb63a492011-03-06 00:40:19 +080045 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
46 MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,
Shawn Guo4afbbb72010-12-18 21:39:35 +080047
Shawn Guo15808182011-02-17 14:28:52 +080048 /* auart0 */
Shawn Guodb63a492011-03-06 00:40:19 +080049 MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
50 MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
51 MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,
52 MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,
Shawn Guo15808182011-02-17 14:28:52 +080053 /* auart3 */
Shawn Guodb63a492011-03-06 00:40:19 +080054 MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
55 MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
56 MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
57 MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
Shawn Guo15808182011-02-17 14:28:52 +080058
Shawn Guodb63a492011-03-06 00:40:19 +080059#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
Shawn Guo4afbbb72010-12-18 21:39:35 +080060 /* fec0 */
Shawn Guodb63a492011-03-06 00:40:19 +080061 MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
62 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
63 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
64 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
65 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
66 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
67 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
68 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
69 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
Shawn Guo48f76ed2011-01-11 20:09:24 +080070 /* fec1 */
Shawn Guodb63a492011-03-06 00:40:19 +080071 MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
72 MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
73 MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
74 MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
75 MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
76 MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
Shawn Guo4afbbb72010-12-18 21:39:35 +080077 /* phy power line */
Shawn Guodb63a492011-03-06 00:40:19 +080078 MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL,
Shawn Guo4afbbb72010-12-18 21:39:35 +080079 /* phy reset line */
Shawn Guodb63a492011-03-06 00:40:19 +080080 MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL,
Shawn Guoacc9cdc2011-03-03 22:13:38 +080081
82 /* flexcan0 */
83 MX28_PAD_GPMI_RDY2__CAN0_TX,
84 MX28_PAD_GPMI_RDY3__CAN0_RX,
85 /* flexcan1 */
86 MX28_PAD_GPMI_CE2N__CAN1_TX,
87 MX28_PAD_GPMI_CE3N__CAN1_RX,
88 /* transceiver power control */
89 MX28_PAD_SSP1_CMD__GPIO_2_13,
Shawn Guo0590a792011-03-08 18:51:10 +080090
91 /* mxsfb (lcdif) */
92 MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
93 MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
94 MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
95 MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
96 MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
97 MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
98 MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
99 MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
100 MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
101 MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
102 MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
103 MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
104 MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
105 MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
106 MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
107 MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
108 MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
109 MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
110 MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
111 MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
112 MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
113 MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
114 MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
115 MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
116 MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
117 MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
118 MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
119 MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL,
120 /* LCD panel enable */
121 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
122 /* backlight control */
123 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800124 /* mmc0 */
125 MX28_PAD_SSP0_DATA0__SSP0_D0 |
126 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
127 MX28_PAD_SSP0_DATA1__SSP0_D1 |
128 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
129 MX28_PAD_SSP0_DATA2__SSP0_D2 |
130 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
131 MX28_PAD_SSP0_DATA3__SSP0_D3 |
132 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
133 MX28_PAD_SSP0_DATA4__SSP0_D4 |
134 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
135 MX28_PAD_SSP0_DATA5__SSP0_D5 |
136 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
137 MX28_PAD_SSP0_DATA6__SSP0_D6 |
138 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
139 MX28_PAD_SSP0_DATA7__SSP0_D7 |
140 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
141 MX28_PAD_SSP0_CMD__SSP0_CMD |
142 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
143 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
144 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
145 MX28_PAD_SSP0_SCK__SSP0_SCK |
146 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
147 /* write protect */
148 MX28_PAD_SSP1_SCK__GPIO_2_12 |
149 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
150 /* slot power enable */
151 MX28_PAD_PWM3__GPIO_3_28 |
152 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
153
154 /* mmc1 */
155 MX28_PAD_GPMI_D00__SSP1_D0 |
156 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
157 MX28_PAD_GPMI_D01__SSP1_D1 |
158 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
159 MX28_PAD_GPMI_D02__SSP1_D2 |
160 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
161 MX28_PAD_GPMI_D03__SSP1_D3 |
162 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
163 MX28_PAD_GPMI_D04__SSP1_D4 |
164 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
165 MX28_PAD_GPMI_D05__SSP1_D5 |
166 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
167 MX28_PAD_GPMI_D06__SSP1_D6 |
168 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
169 MX28_PAD_GPMI_D07__SSP1_D7 |
170 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
171 MX28_PAD_GPMI_RDY1__SSP1_CMD |
172 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
173 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
174 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
175 MX28_PAD_GPMI_WRN__SSP1_SCK |
176 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
177 /* write protect */
178 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
179 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
180 /* slot power enable */
181 MX28_PAD_PWM4__GPIO_3_29 |
182 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
Shawn Guo53b8ff92011-05-31 17:07:03 +0800183
184 /* led */
185 MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL,
186};
187
188/* led */
189static const struct gpio_led mx28evk_leds[] __initconst = {
190 {
191 .name = "GPIO-LED",
192 .default_trigger = "heartbeat",
193 .gpio = MX28EVK_GPIO_LED,
194 },
195};
196
197static const struct gpio_led_platform_data mx28evk_led_data __initconst = {
198 .leds = mx28evk_leds,
199 .num_leds = ARRAY_SIZE(mx28evk_leds),
Shawn Guo4afbbb72010-12-18 21:39:35 +0800200};
201
202/* fec */
203static void __init mx28evk_fec_reset(void)
204{
205 int ret;
206 struct clk *clk;
207
208 /* Enable fec phy clock */
209 clk = clk_get_sys("pll2", NULL);
210 if (!IS_ERR(clk))
211 clk_enable(clk);
212
213 /* Power up fec phy */
214 ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");
215 if (ret) {
216 pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret);
217 return;
218 }
219
220 ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0);
221 if (ret) {
222 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret);
223 return;
224 }
225
226 /* Reset fec phy */
227 ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset");
228 if (ret) {
229 pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret);
230 return;
231 }
232
233 gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0);
234 if (ret) {
235 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret);
236 return;
237 }
238
239 mdelay(1);
240 gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
241}
242
Shawn Guoa320b272011-01-14 15:25:52 +0800243static struct fec_platform_data mx28_fec_pdata[] __initdata = {
Shawn Guo48f76ed2011-01-11 20:09:24 +0800244 {
245 /* fec0 */
246 .phy = PHY_INTERFACE_MODE_RMII,
247 }, {
248 /* fec1 */
249 .phy = PHY_INTERFACE_MODE_RMII,
250 },
Shawn Guo4afbbb72010-12-18 21:39:35 +0800251};
252
Shawn Guoa320b272011-01-14 15:25:52 +0800253static int __init mx28evk_fec_get_mac(void)
254{
255 int i;
256 u32 val;
257 const u32 *ocotp = mxs_get_ocotp();
258
259 if (!ocotp)
260 goto error;
261
262 /*
263 * OCOTP only stores the last 4 octets for each mac address,
264 * so hard-code Freescale OUI (00:04:9f) here.
265 */
266 for (i = 0; i < 2; i++) {
267 val = ocotp[i * 4];
268 mx28_fec_pdata[i].mac[0] = 0x00;
269 mx28_fec_pdata[i].mac[1] = 0x04;
270 mx28_fec_pdata[i].mac[2] = 0x9f;
271 mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
272 mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
273 mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
274 }
275
276 return 0;
277
278error:
279 pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__);
280 return -ETIMEDOUT;
281}
282
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800283/*
284 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
285 */
286static int flexcan0_en, flexcan1_en;
287
288static void mx28evk_flexcan_switch(void)
289{
290 if (flexcan0_en || flexcan1_en)
291 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
292 else
293 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
294}
295
296static void mx28evk_flexcan0_switch(int enable)
297{
298 flexcan0_en = enable;
299 mx28evk_flexcan_switch();
300}
301
302static void mx28evk_flexcan1_switch(int enable)
303{
304 flexcan1_en = enable;
305 mx28evk_flexcan_switch();
306}
307
308static const struct flexcan_platform_data
309 mx28evk_flexcan_pdata[] __initconst = {
310 {
311 .transceiver_switch = mx28evk_flexcan0_switch,
312 }, {
313 .transceiver_switch = mx28evk_flexcan1_switch,
314 }
315};
316
Shawn Guo0590a792011-03-08 18:51:10 +0800317/* mxsfb (lcdif) */
318static struct fb_videomode mx28evk_video_modes[] = {
319 {
320 .name = "Seiko-43WVF1G",
321 .refresh = 60,
322 .xres = 800,
323 .yres = 480,
324 .pixclock = 29851, /* picosecond (33.5 MHz) */
325 .left_margin = 89,
326 .right_margin = 164,
327 .upper_margin = 23,
328 .lower_margin = 10,
329 .hsync_len = 10,
330 .vsync_len = 10,
331 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
332 FB_SYNC_DOTCLK_FAILING_ACT,
333 },
334};
335
336static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
337 .mode_list = mx28evk_video_modes,
338 .mode_count = ARRAY_SIZE(mx28evk_video_modes),
339 .default_bpp = 32,
340 .ld_intf_width = STMLCDIF_24BIT,
341};
342
Shawn Guo5bb2c822011-02-22 16:50:24 +0800343static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
344 {
345 /* mmc0 */
346 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
347 .flags = SLOTF_8_BIT_CAPABLE,
348 }, {
349 /* mmc1 */
350 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
351 .flags = SLOTF_8_BIT_CAPABLE,
352 },
353};
354
Shawn Guo4afbbb72010-12-18 21:39:35 +0800355static void __init mx28evk_init(void)
356{
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800357 int ret;
358
Shawn Guo4afbbb72010-12-18 21:39:35 +0800359 mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));
360
361 mx28_add_duart();
Shawn Guo15808182011-02-17 14:28:52 +0800362 mx28_add_auart0();
363 mx28_add_auart3();
Shawn Guo4afbbb72010-12-18 21:39:35 +0800364
Shawn Guoa320b272011-01-14 15:25:52 +0800365 if (mx28evk_fec_get_mac())
366 pr_warn("%s: failed on fec mac setup\n", __func__);
367
Shawn Guo4afbbb72010-12-18 21:39:35 +0800368 mx28evk_fec_reset();
Shawn Guo48f76ed2011-01-11 20:09:24 +0800369 mx28_add_fec(0, &mx28_fec_pdata[0]);
370 mx28_add_fec(1, &mx28_fec_pdata[1]);
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800371
372 ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
373 "flexcan-switch");
374 if (ret) {
375 pr_err("failed to request gpio flexcan-switch: %d\n", ret);
376 } else {
377 mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]);
378 mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);
379 }
Shawn Guo0590a792011-03-08 18:51:10 +0800380
381 ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");
382 if (ret)
383 pr_warn("failed to request gpio lcd-enable: %d\n", ret);
384 else
385 gpio_set_value(MX28EVK_LCD_ENABLE, 1);
386
387 ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable");
388 if (ret)
389 pr_warn("failed to request gpio bl-enable: %d\n", ret);
390 else
391 gpio_set_value(MX28EVK_BL_ENABLE, 1);
392
393 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
Shawn Guo5bb2c822011-02-22 16:50:24 +0800394
395 /* power on mmc slot by writing 0 to the gpio */
Fabio Estevamc7dae182011-03-29 16:45:09 -0300396 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800397 "mmc0-slot-power");
398 if (ret)
399 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
400 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
401
Fabio Estevamc7dae182011-03-29 16:45:09 -0300402 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800403 "mmc1-slot-power");
404 if (ret)
405 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
406 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
Shawn Guo53b8ff92011-05-31 17:07:03 +0800407
408 gpio_led_register_device(0, &mx28evk_led_data);
Shawn Guo4afbbb72010-12-18 21:39:35 +0800409}
410
411static void __init mx28evk_timer_init(void)
412{
413 mx28_clocks_init();
414}
415
416static struct sys_timer mx28evk_timer = {
417 .init = mx28evk_timer_init,
418};
419
420MACHINE_START(MX28EVK, "Freescale MX28 EVK")
421 /* Maintainer: Freescale Semiconductor, Inc. */
422 .map_io = mx28_map_io,
423 .init_irq = mx28_init_irq,
424 .init_machine = mx28evk_init,
425 .timer = &mx28evk_timer,
426MACHINE_END