| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * linux/kernel/irq/chip.c | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | 
|  | 5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | 
|  | 6 | * | 
|  | 7 | * This file contains the core interrupt handling code, for irq-chip | 
|  | 8 | * based architectures. | 
|  | 9 | * | 
|  | 10 | * Detailed information is available in Documentation/DocBook/genericirq | 
|  | 11 | */ | 
|  | 12 |  | 
|  | 13 | #include <linux/irq.h> | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 14 | #include <linux/msi.h> | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 15 | #include <linux/module.h> | 
|  | 16 | #include <linux/interrupt.h> | 
|  | 17 | #include <linux/kernel_stat.h> | 
|  | 18 |  | 
|  | 19 | #include "internals.h" | 
|  | 20 |  | 
| Brandon Phiilps | ced5b69 | 2010-02-10 01:20:06 -0800 | [diff] [blame] | 21 | static void dynamic_irq_init_x(unsigned int irq, bool keep_chip_data) | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 22 | { | 
| Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 23 | struct irq_desc *desc; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 24 | unsigned long flags; | 
|  | 25 |  | 
| Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 26 | desc = irq_to_desc(irq); | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 27 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 28 | WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 29 | return; | 
|  | 30 | } | 
|  | 31 |  | 
|  | 32 | /* Ensure we don't have left over values from a previous use of this irq */ | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 33 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 34 | desc->status = IRQ_DISABLED; | 
|  | 35 | desc->chip = &no_irq_chip; | 
|  | 36 | desc->handle_irq = handle_bad_irq; | 
|  | 37 | desc->depth = 1; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 38 | desc->msi_desc = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 39 | desc->handler_data = NULL; | 
| Brandon Phiilps | ced5b69 | 2010-02-10 01:20:06 -0800 | [diff] [blame] | 40 | if (!keep_chip_data) | 
|  | 41 | desc->chip_data = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 42 | desc->action = NULL; | 
|  | 43 | desc->irq_count = 0; | 
|  | 44 | desc->irqs_unhandled = 0; | 
|  | 45 | #ifdef CONFIG_SMP | 
| Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 46 | cpumask_setall(desc->affinity); | 
|  | 47 | #ifdef CONFIG_GENERIC_PENDING_IRQ | 
|  | 48 | cpumask_clear(desc->pending_mask); | 
|  | 49 | #endif | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 50 | #endif | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 51 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 52 | } | 
|  | 53 |  | 
|  | 54 | /** | 
| Brandon Phiilps | ced5b69 | 2010-02-10 01:20:06 -0800 | [diff] [blame] | 55 | *	dynamic_irq_init - initialize a dynamically allocated irq | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 56 | *	@irq:	irq number to initialize | 
|  | 57 | */ | 
| Brandon Phiilps | ced5b69 | 2010-02-10 01:20:06 -0800 | [diff] [blame] | 58 | void dynamic_irq_init(unsigned int irq) | 
|  | 59 | { | 
|  | 60 | dynamic_irq_init_x(irq, false); | 
|  | 61 | } | 
|  | 62 |  | 
|  | 63 | /** | 
|  | 64 | *	dynamic_irq_init_keep_chip_data - initialize a dynamically allocated irq | 
|  | 65 | *	@irq:	irq number to initialize | 
|  | 66 | * | 
|  | 67 | *	does not set irq_to_desc(irq)->chip_data to NULL | 
|  | 68 | */ | 
|  | 69 | void dynamic_irq_init_keep_chip_data(unsigned int irq) | 
|  | 70 | { | 
|  | 71 | dynamic_irq_init_x(irq, true); | 
|  | 72 | } | 
|  | 73 |  | 
|  | 74 | static void dynamic_irq_cleanup_x(unsigned int irq, bool keep_chip_data) | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 75 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 76 | struct irq_desc *desc = irq_to_desc(irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 77 | unsigned long flags; | 
|  | 78 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 79 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 80 | WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 81 | return; | 
|  | 82 | } | 
|  | 83 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 84 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 85 | if (desc->action) { | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 86 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 87 | WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n", | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 88 | irq); | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 89 | return; | 
|  | 90 | } | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 91 | desc->msi_desc = NULL; | 
|  | 92 | desc->handler_data = NULL; | 
| Brandon Phiilps | ced5b69 | 2010-02-10 01:20:06 -0800 | [diff] [blame] | 93 | if (!keep_chip_data) | 
|  | 94 | desc->chip_data = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 95 | desc->handle_irq = handle_bad_irq; | 
|  | 96 | desc->chip = &no_irq_chip; | 
| Dean Nelson | b6f3b78 | 2008-10-18 16:06:56 -0700 | [diff] [blame] | 97 | desc->name = NULL; | 
| Yinghai Lu | 0f3c2a8 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 98 | clear_kstat_irqs(desc); | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 99 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 100 | } | 
|  | 101 |  | 
| Brandon Phiilps | ced5b69 | 2010-02-10 01:20:06 -0800 | [diff] [blame] | 102 | /** | 
|  | 103 | *	dynamic_irq_cleanup - cleanup a dynamically allocated irq | 
|  | 104 | *	@irq:	irq number to initialize | 
|  | 105 | */ | 
|  | 106 | void dynamic_irq_cleanup(unsigned int irq) | 
|  | 107 | { | 
|  | 108 | dynamic_irq_cleanup_x(irq, false); | 
|  | 109 | } | 
|  | 110 |  | 
|  | 111 | /** | 
|  | 112 | *	dynamic_irq_cleanup_keep_chip_data - cleanup a dynamically allocated irq | 
|  | 113 | *	@irq:	irq number to initialize | 
|  | 114 | * | 
|  | 115 | *	does not set irq_to_desc(irq)->chip_data to NULL | 
|  | 116 | */ | 
|  | 117 | void dynamic_irq_cleanup_keep_chip_data(unsigned int irq) | 
|  | 118 | { | 
|  | 119 | dynamic_irq_cleanup_x(irq, true); | 
|  | 120 | } | 
|  | 121 |  | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 122 |  | 
|  | 123 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 124 | *	set_irq_chip - set the irq chip for an irq | 
|  | 125 | *	@irq:	irq number | 
|  | 126 | *	@chip:	pointer to irq chip description structure | 
|  | 127 | */ | 
|  | 128 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | 
|  | 129 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 130 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 131 | unsigned long flags; | 
|  | 132 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 133 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 134 | WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 135 | return -EINVAL; | 
|  | 136 | } | 
|  | 137 |  | 
|  | 138 | if (!chip) | 
|  | 139 | chip = &no_irq_chip; | 
|  | 140 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 141 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 142 | irq_chip_set_defaults(chip); | 
|  | 143 | desc->chip = chip; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 144 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 145 |  | 
|  | 146 | return 0; | 
|  | 147 | } | 
|  | 148 | EXPORT_SYMBOL(set_irq_chip); | 
|  | 149 |  | 
|  | 150 | /** | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 151 | *	set_irq_type - set the irq trigger type for an irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 152 | *	@irq:	irq number | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 153 | *	@type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 154 | */ | 
|  | 155 | int set_irq_type(unsigned int irq, unsigned int type) | 
|  | 156 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 157 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 158 | unsigned long flags; | 
|  | 159 | int ret = -ENXIO; | 
|  | 160 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 161 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 162 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); | 
|  | 163 | return -ENODEV; | 
|  | 164 | } | 
|  | 165 |  | 
| David Brownell | f2b662d | 2008-12-01 14:31:38 -0800 | [diff] [blame] | 166 | type &= IRQ_TYPE_SENSE_MASK; | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 167 | if (type == IRQ_TYPE_NONE) | 
|  | 168 | return 0; | 
|  | 169 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 170 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Chris Friesen | 0b3682b | 2008-10-20 12:41:58 -0600 | [diff] [blame] | 171 | ret = __irq_set_trigger(desc, irq, type); | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 172 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 173 | return ret; | 
|  | 174 | } | 
|  | 175 | EXPORT_SYMBOL(set_irq_type); | 
|  | 176 |  | 
|  | 177 | /** | 
|  | 178 | *	set_irq_data - set irq type data for an irq | 
|  | 179 | *	@irq:	Interrupt number | 
|  | 180 | *	@data:	Pointer to interrupt specific data | 
|  | 181 | * | 
|  | 182 | *	Set the hardware irq controller data for an irq | 
|  | 183 | */ | 
|  | 184 | int set_irq_data(unsigned int irq, void *data) | 
|  | 185 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 186 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 187 | unsigned long flags; | 
|  | 188 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 189 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 190 | printk(KERN_ERR | 
|  | 191 | "Trying to install controller data for IRQ%d\n", irq); | 
|  | 192 | return -EINVAL; | 
|  | 193 | } | 
|  | 194 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 195 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 196 | desc->handler_data = data; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 197 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 198 | return 0; | 
|  | 199 | } | 
|  | 200 | EXPORT_SYMBOL(set_irq_data); | 
|  | 201 |  | 
|  | 202 | /** | 
| Liuweni | 24b26d4 | 2009-11-04 20:11:05 +0800 | [diff] [blame] | 203 | *	set_irq_msi - set MSI descriptor data for an irq | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 204 | *	@irq:	Interrupt number | 
| Randy Dunlap | 472900b | 2007-02-16 01:28:25 -0800 | [diff] [blame] | 205 | *	@entry:	Pointer to MSI descriptor data | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 206 | * | 
| Liuweni | 24b26d4 | 2009-11-04 20:11:05 +0800 | [diff] [blame] | 207 | *	Set the MSI descriptor entry for an irq | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 208 | */ | 
|  | 209 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | 
|  | 210 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 211 | struct irq_desc *desc = irq_to_desc(irq); | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 212 | unsigned long flags; | 
|  | 213 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 214 | if (!desc) { | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 215 | printk(KERN_ERR | 
|  | 216 | "Trying to install msi data for IRQ%d\n", irq); | 
|  | 217 | return -EINVAL; | 
|  | 218 | } | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 219 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 220 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 221 | desc->msi_desc = entry; | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 222 | if (entry) | 
|  | 223 | entry->irq = irq; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 224 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 225 | return 0; | 
|  | 226 | } | 
|  | 227 |  | 
|  | 228 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 229 | *	set_irq_chip_data - set irq chip data for an irq | 
|  | 230 | *	@irq:	Interrupt number | 
|  | 231 | *	@data:	Pointer to chip specific data | 
|  | 232 | * | 
|  | 233 | *	Set the hardware irq chip data for an irq | 
|  | 234 | */ | 
|  | 235 | int set_irq_chip_data(unsigned int irq, void *data) | 
|  | 236 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 237 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 238 | unsigned long flags; | 
|  | 239 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 240 | if (!desc) { | 
|  | 241 | printk(KERN_ERR | 
|  | 242 | "Trying to install chip data for IRQ%d\n", irq); | 
|  | 243 | return -EINVAL; | 
|  | 244 | } | 
|  | 245 |  | 
|  | 246 | if (!desc->chip) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 247 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); | 
|  | 248 | return -EINVAL; | 
|  | 249 | } | 
|  | 250 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 251 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 252 | desc->chip_data = data; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 253 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 254 |  | 
|  | 255 | return 0; | 
|  | 256 | } | 
|  | 257 | EXPORT_SYMBOL(set_irq_chip_data); | 
|  | 258 |  | 
| Thomas Gleixner | 399b5da | 2009-08-13 13:21:38 +0200 | [diff] [blame] | 259 | /** | 
|  | 260 | *	set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq | 
|  | 261 | * | 
|  | 262 | *	@irq:	Interrupt number | 
|  | 263 | *	@nest:	0 to clear / 1 to set the IRQ_NESTED_THREAD flag | 
|  | 264 | * | 
|  | 265 | *	The IRQ_NESTED_THREAD flag indicates that on | 
|  | 266 | *	request_threaded_irq() no separate interrupt thread should be | 
|  | 267 | *	created for the irq as the handler are called nested in the | 
|  | 268 | *	context of a demultiplexing interrupt handler thread. | 
|  | 269 | */ | 
|  | 270 | void set_irq_nested_thread(unsigned int irq, int nest) | 
|  | 271 | { | 
|  | 272 | struct irq_desc *desc = irq_to_desc(irq); | 
|  | 273 | unsigned long flags; | 
|  | 274 |  | 
|  | 275 | if (!desc) | 
|  | 276 | return; | 
|  | 277 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 278 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Thomas Gleixner | 399b5da | 2009-08-13 13:21:38 +0200 | [diff] [blame] | 279 | if (nest) | 
|  | 280 | desc->status |= IRQ_NESTED_THREAD; | 
|  | 281 | else | 
|  | 282 | desc->status &= ~IRQ_NESTED_THREAD; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 283 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Thomas Gleixner | 399b5da | 2009-08-13 13:21:38 +0200 | [diff] [blame] | 284 | } | 
|  | 285 | EXPORT_SYMBOL_GPL(set_irq_nested_thread); | 
|  | 286 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 287 | /* | 
|  | 288 | * default enable function | 
|  | 289 | */ | 
|  | 290 | static void default_enable(unsigned int irq) | 
|  | 291 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 292 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 293 |  | 
|  | 294 | desc->chip->unmask(irq); | 
|  | 295 | desc->status &= ~IRQ_MASKED; | 
|  | 296 | } | 
|  | 297 |  | 
|  | 298 | /* | 
|  | 299 | * default disable function | 
|  | 300 | */ | 
|  | 301 | static void default_disable(unsigned int irq) | 
|  | 302 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 303 | } | 
|  | 304 |  | 
|  | 305 | /* | 
|  | 306 | * default startup function | 
|  | 307 | */ | 
|  | 308 | static unsigned int default_startup(unsigned int irq) | 
|  | 309 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 310 | struct irq_desc *desc = irq_to_desc(irq); | 
| Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 311 |  | 
| Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 312 | desc->chip->enable(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 313 | return 0; | 
|  | 314 | } | 
|  | 315 |  | 
|  | 316 | /* | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 317 | * default shutdown function | 
|  | 318 | */ | 
|  | 319 | static void default_shutdown(unsigned int irq) | 
|  | 320 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 321 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 322 |  | 
|  | 323 | desc->chip->mask(irq); | 
|  | 324 | desc->status |= IRQ_MASKED; | 
|  | 325 | } | 
|  | 326 |  | 
|  | 327 | /* | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 328 | * Fixup enable/disable function pointers | 
|  | 329 | */ | 
|  | 330 | void irq_chip_set_defaults(struct irq_chip *chip) | 
|  | 331 | { | 
|  | 332 | if (!chip->enable) | 
|  | 333 | chip->enable = default_enable; | 
|  | 334 | if (!chip->disable) | 
|  | 335 | chip->disable = default_disable; | 
|  | 336 | if (!chip->startup) | 
|  | 337 | chip->startup = default_startup; | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 338 | /* | 
|  | 339 | * We use chip->disable, when the user provided its own. When | 
|  | 340 | * we have default_disable set for chip->disable, then we need | 
|  | 341 | * to use default_shutdown, otherwise the irq line is not | 
|  | 342 | * disabled on free_irq(): | 
|  | 343 | */ | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 344 | if (!chip->shutdown) | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 345 | chip->shutdown = chip->disable != default_disable ? | 
|  | 346 | chip->disable : default_shutdown; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 347 | if (!chip->name) | 
|  | 348 | chip->name = chip->typename; | 
| Zhang, Yanmin | b86432b | 2006-11-16 01:19:10 -0800 | [diff] [blame] | 349 | if (!chip->end) | 
|  | 350 | chip->end = dummy_irq_chip.end; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 351 | } | 
|  | 352 |  | 
|  | 353 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | 
|  | 354 | { | 
|  | 355 | if (desc->chip->mask_ack) | 
|  | 356 | desc->chip->mask_ack(irq); | 
|  | 357 | else { | 
|  | 358 | desc->chip->mask(irq); | 
| Wang Chen | efdc64f | 2008-12-29 13:35:11 +0800 | [diff] [blame] | 359 | if (desc->chip->ack) | 
|  | 360 | desc->chip->ack(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 361 | } | 
| Thomas Gleixner | 0b1adaa | 2010-03-09 19:45:54 +0100 | [diff] [blame] | 362 | desc->status |= IRQ_MASKED; | 
|  | 363 | } | 
|  | 364 |  | 
|  | 365 | static inline void mask_irq(struct irq_desc *desc, int irq) | 
|  | 366 | { | 
|  | 367 | if (desc->chip->mask) { | 
|  | 368 | desc->chip->mask(irq); | 
|  | 369 | desc->status |= IRQ_MASKED; | 
|  | 370 | } | 
|  | 371 | } | 
|  | 372 |  | 
|  | 373 | static inline void unmask_irq(struct irq_desc *desc, int irq) | 
|  | 374 | { | 
|  | 375 | if (desc->chip->unmask) { | 
|  | 376 | desc->chip->unmask(irq); | 
|  | 377 | desc->status &= ~IRQ_MASKED; | 
|  | 378 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 379 | } | 
|  | 380 |  | 
| Thomas Gleixner | 399b5da | 2009-08-13 13:21:38 +0200 | [diff] [blame] | 381 | /* | 
|  | 382 | *	handle_nested_irq - Handle a nested irq from a irq thread | 
|  | 383 | *	@irq:	the interrupt number | 
|  | 384 | * | 
|  | 385 | *	Handle interrupts which are nested into a threaded interrupt | 
|  | 386 | *	handler. The handler function is called inside the calling | 
|  | 387 | *	threads context. | 
|  | 388 | */ | 
|  | 389 | void handle_nested_irq(unsigned int irq) | 
|  | 390 | { | 
|  | 391 | struct irq_desc *desc = irq_to_desc(irq); | 
|  | 392 | struct irqaction *action; | 
|  | 393 | irqreturn_t action_ret; | 
|  | 394 |  | 
|  | 395 | might_sleep(); | 
|  | 396 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 397 | raw_spin_lock_irq(&desc->lock); | 
| Thomas Gleixner | 399b5da | 2009-08-13 13:21:38 +0200 | [diff] [blame] | 398 |  | 
|  | 399 | kstat_incr_irqs_this_cpu(irq, desc); | 
|  | 400 |  | 
|  | 401 | action = desc->action; | 
|  | 402 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
|  | 403 | goto out_unlock; | 
|  | 404 |  | 
|  | 405 | desc->status |= IRQ_INPROGRESS; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 406 | raw_spin_unlock_irq(&desc->lock); | 
| Thomas Gleixner | 399b5da | 2009-08-13 13:21:38 +0200 | [diff] [blame] | 407 |  | 
|  | 408 | action_ret = action->thread_fn(action->irq, action->dev_id); | 
|  | 409 | if (!noirqdebug) | 
|  | 410 | note_interrupt(irq, desc, action_ret); | 
|  | 411 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 412 | raw_spin_lock_irq(&desc->lock); | 
| Thomas Gleixner | 399b5da | 2009-08-13 13:21:38 +0200 | [diff] [blame] | 413 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 414 |  | 
|  | 415 | out_unlock: | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 416 | raw_spin_unlock_irq(&desc->lock); | 
| Thomas Gleixner | 399b5da | 2009-08-13 13:21:38 +0200 | [diff] [blame] | 417 | } | 
|  | 418 | EXPORT_SYMBOL_GPL(handle_nested_irq); | 
|  | 419 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 420 | /** | 
|  | 421 | *	handle_simple_irq - Simple and software-decoded IRQs. | 
|  | 422 | *	@irq:	the interrupt number | 
|  | 423 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 424 | * | 
|  | 425 | *	Simple interrupts are either sent from a demultiplexing interrupt | 
|  | 426 | *	handler or come from hardware, where no interrupt hardware control | 
|  | 427 | *	is necessary. | 
|  | 428 | * | 
|  | 429 | *	Note: The caller is expected to handle the ack, clear, mask and | 
|  | 430 | *	unmask issues if necessary. | 
|  | 431 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 432 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 433 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 434 | { | 
|  | 435 | struct irqaction *action; | 
|  | 436 | irqreturn_t action_ret; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 437 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 438 | raw_spin_lock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 439 |  | 
|  | 440 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
|  | 441 | goto out_unlock; | 
| Steven Rostedt | 971e5b35f | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 442 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 443 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 444 |  | 
|  | 445 | action = desc->action; | 
| Steven Rostedt | 971e5b35f | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 446 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 447 | goto out_unlock; | 
|  | 448 |  | 
|  | 449 | desc->status |= IRQ_INPROGRESS; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 450 | raw_spin_unlock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 451 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 452 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 453 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 454 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 455 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 456 | raw_spin_lock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 457 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 458 | out_unlock: | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 459 | raw_spin_unlock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 460 | } | 
|  | 461 |  | 
|  | 462 | /** | 
|  | 463 | *	handle_level_irq - Level type irq handler | 
|  | 464 | *	@irq:	the interrupt number | 
|  | 465 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 466 | * | 
|  | 467 | *	Level type interrupts are active as long as the hardware line has | 
|  | 468 | *	the active level. This may require to mask the interrupt and unmask | 
|  | 469 | *	it after the associated handler has acknowledged the device, so the | 
|  | 470 | *	interrupt line is back to inactive. | 
|  | 471 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 472 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 473 | handle_level_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 474 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 475 | struct irqaction *action; | 
|  | 476 | irqreturn_t action_ret; | 
|  | 477 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 478 | raw_spin_lock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 479 | mask_ack_irq(desc, irq); | 
|  | 480 |  | 
|  | 481 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 482 | goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 483 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 484 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 485 |  | 
|  | 486 | /* | 
|  | 487 | * If its disabled or no action available | 
|  | 488 | * keep it masked and get out of here | 
|  | 489 | */ | 
|  | 490 | action = desc->action; | 
| Thomas Gleixner | 4966342 | 2007-08-12 15:46:34 +0000 | [diff] [blame] | 491 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 492 | goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 493 |  | 
|  | 494 | desc->status |= IRQ_INPROGRESS; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 495 | raw_spin_unlock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 496 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 497 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 498 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 499 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 500 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 501 | raw_spin_lock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 502 | desc->status &= ~IRQ_INPROGRESS; | 
| Thomas Gleixner | b25c340 | 2009-08-13 12:17:22 +0200 | [diff] [blame] | 503 |  | 
| Thomas Gleixner | 0b1adaa | 2010-03-09 19:45:54 +0100 | [diff] [blame] | 504 | if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT))) | 
|  | 505 | unmask_irq(desc, irq); | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 506 | out_unlock: | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 507 | raw_spin_unlock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 508 | } | 
| Ingo Molnar | 14819ea | 2009-01-14 12:34:21 +0100 | [diff] [blame] | 509 | EXPORT_SYMBOL_GPL(handle_level_irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 510 |  | 
|  | 511 | /** | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 512 | *	handle_fasteoi_irq - irq handler for transparent controllers | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 513 | *	@irq:	the interrupt number | 
|  | 514 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 515 | * | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 516 | *	Only a single callback will be issued to the chip: an ->eoi() | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 517 | *	call when the interrupt has been serviced. This enables support | 
|  | 518 | *	for modern forms of interrupt handlers, which handle the flow | 
|  | 519 | *	details in hardware, transparently. | 
|  | 520 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 521 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 522 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 523 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 524 | struct irqaction *action; | 
|  | 525 | irqreturn_t action_ret; | 
|  | 526 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 527 | raw_spin_lock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 528 |  | 
|  | 529 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
|  | 530 | goto out; | 
|  | 531 |  | 
|  | 532 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 533 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 534 |  | 
|  | 535 | /* | 
|  | 536 | * If its disabled or no action available | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 537 | * then mask it and get out of here: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 538 | */ | 
|  | 539 | action = desc->action; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 540 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { | 
|  | 541 | desc->status |= IRQ_PENDING; | 
| Thomas Gleixner | 0b1adaa | 2010-03-09 19:45:54 +0100 | [diff] [blame] | 542 | mask_irq(desc, irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 543 | goto out; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 544 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 545 |  | 
|  | 546 | desc->status |= IRQ_INPROGRESS; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 547 | desc->status &= ~IRQ_PENDING; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 548 | raw_spin_unlock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 549 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 550 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 551 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 552 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 553 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 554 | raw_spin_lock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 555 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 556 | out: | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 557 | desc->chip->eoi(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 558 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 559 | raw_spin_unlock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 560 | } | 
|  | 561 |  | 
|  | 562 | /** | 
|  | 563 | *	handle_edge_irq - edge type IRQ handler | 
|  | 564 | *	@irq:	the interrupt number | 
|  | 565 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 566 | * | 
|  | 567 | *	Interrupt occures on the falling and/or rising edge of a hardware | 
|  | 568 | *	signal. The occurence is latched into the irq controller hardware | 
|  | 569 | *	and must be acked in order to be reenabled. After the ack another | 
|  | 570 | *	interrupt can happen on the same source even before the first one | 
| Uwe Kleine-König | dfff061 | 2010-02-12 21:58:11 +0100 | [diff] [blame] | 571 | *	is handled by the associated event handler. If this happens it | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 572 | *	might be necessary to disable (mask) the interrupt depending on the | 
|  | 573 | *	controller hardware. This requires to reenable the interrupt inside | 
|  | 574 | *	of the loop which handles the interrupts which have arrived while | 
|  | 575 | *	the handler was running. If all pending interrupts are handled, the | 
|  | 576 | *	loop is left. | 
|  | 577 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 578 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 579 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 580 | { | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 581 | raw_spin_lock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 582 |  | 
|  | 583 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
|  | 584 |  | 
|  | 585 | /* | 
|  | 586 | * If we're currently running this IRQ, or its disabled, | 
|  | 587 | * we shouldn't process the IRQ. Mark it pending, handle | 
|  | 588 | * the necessary masking and go out | 
|  | 589 | */ | 
|  | 590 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | 
|  | 591 | !desc->action)) { | 
|  | 592 | desc->status |= (IRQ_PENDING | IRQ_MASKED); | 
|  | 593 | mask_ack_irq(desc, irq); | 
|  | 594 | goto out_unlock; | 
|  | 595 | } | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 596 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 597 |  | 
|  | 598 | /* Start handling the irq */ | 
| Thomas Gleixner | 4dbc9ca | 2009-08-27 09:38:49 +0200 | [diff] [blame] | 599 | if (desc->chip->ack) | 
|  | 600 | desc->chip->ack(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 601 |  | 
|  | 602 | /* Mark the IRQ currently in progress.*/ | 
|  | 603 | desc->status |= IRQ_INPROGRESS; | 
|  | 604 |  | 
|  | 605 | do { | 
|  | 606 | struct irqaction *action = desc->action; | 
|  | 607 | irqreturn_t action_ret; | 
|  | 608 |  | 
|  | 609 | if (unlikely(!action)) { | 
| Thomas Gleixner | 0b1adaa | 2010-03-09 19:45:54 +0100 | [diff] [blame] | 610 | mask_irq(desc, irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 611 | goto out_unlock; | 
|  | 612 | } | 
|  | 613 |  | 
|  | 614 | /* | 
|  | 615 | * When another irq arrived while we were handling | 
|  | 616 | * one, we could have masked the irq. | 
|  | 617 | * Renable it, if it was not disabled in meantime. | 
|  | 618 | */ | 
|  | 619 | if (unlikely((desc->status & | 
|  | 620 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | 
|  | 621 | (IRQ_PENDING | IRQ_MASKED))) { | 
| Thomas Gleixner | 0b1adaa | 2010-03-09 19:45:54 +0100 | [diff] [blame] | 622 | unmask_irq(desc, irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 623 | } | 
|  | 624 |  | 
|  | 625 | desc->status &= ~IRQ_PENDING; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 626 | raw_spin_unlock(&desc->lock); | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 627 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 628 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 629 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 630 | raw_spin_lock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 631 |  | 
|  | 632 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | 
|  | 633 |  | 
|  | 634 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 635 | out_unlock: | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 636 | raw_spin_unlock(&desc->lock); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 637 | } | 
|  | 638 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 639 | /** | 
| Liuweni | 24b26d4 | 2009-11-04 20:11:05 +0800 | [diff] [blame] | 640 | *	handle_percpu_irq - Per CPU local irq handler | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 641 | *	@irq:	the interrupt number | 
|  | 642 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 643 | * | 
|  | 644 | *	Per CPU interrupts on SMP machines without locking requirements | 
|  | 645 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 646 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 647 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 648 | { | 
|  | 649 | irqreturn_t action_ret; | 
|  | 650 |  | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 651 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 652 |  | 
|  | 653 | if (desc->chip->ack) | 
|  | 654 | desc->chip->ack(irq); | 
|  | 655 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 656 | action_ret = handle_IRQ_event(irq, desc->action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 657 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 658 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 659 |  | 
| Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 660 | if (desc->chip->eoi) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 661 | desc->chip->eoi(irq); | 
|  | 662 | } | 
|  | 663 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 664 | void | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 665 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, | 
|  | 666 | const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 667 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 668 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 669 | unsigned long flags; | 
|  | 670 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 671 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 672 | printk(KERN_ERR | 
|  | 673 | "Trying to install type control for IRQ%d\n", irq); | 
|  | 674 | return; | 
|  | 675 | } | 
|  | 676 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 677 | if (!handle) | 
|  | 678 | handle = handle_bad_irq; | 
| Thomas Gleixner | 9d7ac8b | 2006-12-22 01:08:14 -0800 | [diff] [blame] | 679 | else if (desc->chip == &no_irq_chip) { | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 680 | printk(KERN_WARNING "Trying to install %sinterrupt handler " | 
| Geert Uytterhoeven | b039db8 | 2006-12-20 15:59:48 +0100 | [diff] [blame] | 681 | "for IRQ%d\n", is_chained ? "chained " : "", irq); | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 682 | /* | 
|  | 683 | * Some ARM implementations install a handler for really dumb | 
|  | 684 | * interrupt hardware without setting an irq_chip. This worked | 
|  | 685 | * with the ARM no_irq_chip but the check in setup_irq would | 
|  | 686 | * prevent us to setup the interrupt at all. Switch it to | 
|  | 687 | * dummy_irq_chip for easy transition. | 
|  | 688 | */ | 
|  | 689 | desc->chip = &dummy_irq_chip; | 
|  | 690 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 691 |  | 
| Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 692 | chip_bus_lock(irq, desc); | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 693 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 694 |  | 
|  | 695 | /* Uninstall? */ | 
|  | 696 | if (handle == handle_bad_irq) { | 
| Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 697 | if (desc->chip != &no_irq_chip) | 
| Jan Beulich | 5575ddf | 2007-02-16 01:28:26 -0800 | [diff] [blame] | 698 | mask_ack_irq(desc, irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 699 | desc->status |= IRQ_DISABLED; | 
|  | 700 | desc->depth = 1; | 
|  | 701 | } | 
|  | 702 | desc->handle_irq = handle; | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 703 | desc->name = name; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 704 |  | 
|  | 705 | if (handle != handle_bad_irq && is_chained) { | 
|  | 706 | desc->status &= ~IRQ_DISABLED; | 
|  | 707 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | 
|  | 708 | desc->depth = 0; | 
| Pawel MOLL | 7e6e178 | 2008-09-01 10:12:11 +0100 | [diff] [blame] | 709 | desc->chip->startup(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 710 | } | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 711 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 712 | chip_bus_sync_unlock(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 713 | } | 
| Ingo Molnar | 14819ea | 2009-01-14 12:34:21 +0100 | [diff] [blame] | 714 | EXPORT_SYMBOL_GPL(__set_irq_handler); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 715 |  | 
|  | 716 | void | 
|  | 717 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | 
| David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 718 | irq_flow_handler_t handle) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 719 | { | 
|  | 720 | set_irq_chip(irq, chip); | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 721 | __set_irq_handler(irq, handle, 0, NULL); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 722 | } | 
|  | 723 |  | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 724 | void | 
|  | 725 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | 
|  | 726 | irq_flow_handler_t handle, const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 727 | { | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 728 | set_irq_chip(irq, chip); | 
|  | 729 | __set_irq_handler(irq, handle, 0, name); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 730 | } | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 731 |  | 
| Henrik Kretzschmar | 860652b | 2010-03-24 12:59:20 +0100 | [diff] [blame] | 732 | void set_irq_noprobe(unsigned int irq) | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 733 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 734 | struct irq_desc *desc = irq_to_desc(irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 735 | unsigned long flags; | 
|  | 736 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 737 | if (!desc) { | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 738 | printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 739 | return; | 
|  | 740 | } | 
|  | 741 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 742 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 743 | desc->status |= IRQ_NOPROBE; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 744 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 745 | } | 
|  | 746 |  | 
| Henrik Kretzschmar | 860652b | 2010-03-24 12:59:20 +0100 | [diff] [blame] | 747 | void set_irq_probe(unsigned int irq) | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 748 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 749 | struct irq_desc *desc = irq_to_desc(irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 750 | unsigned long flags; | 
|  | 751 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 752 | if (!desc) { | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 753 | printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 754 | return; | 
|  | 755 | } | 
|  | 756 |  | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 757 | raw_spin_lock_irqsave(&desc->lock, flags); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 758 | desc->status &= ~IRQ_NOPROBE; | 
| Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 759 | raw_spin_unlock_irqrestore(&desc->lock, flags); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 760 | } |