Sathish Ambley | 4df614c | 2011-10-07 16:30:46 -0700 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
| 3 | /include/ "skeleton.dtsi" |
| 4 | |
| 5 | / { |
| 6 | model = "Qualcomm MSM Copper"; |
| 7 | compatible = "qcom,msmcopper-sim", "qcom,msmcopper"; |
| 8 | interrupt-parent = <&intc>; |
| 9 | |
| 10 | intc: interrupt-controller@F9000000 { |
| 11 | compatible = "qcom,msm-qgic2"; |
| 12 | interrupt-controller; |
Michael Bohan | c722453 | 2012-01-06 16:02:52 -0800 | [diff] [blame] | 13 | #interrupt-cells = <3>; |
Sathish Ambley | 4df614c | 2011-10-07 16:30:46 -0700 | [diff] [blame] | 14 | reg = <0xF9000000 0x1000>, |
| 15 | <0xF9002000 0x1000>; |
| 16 | }; |
Sathish Ambley | 3d50c76 | 2011-10-25 15:26:00 -0700 | [diff] [blame] | 17 | |
Michael Bohan | 0425f6f | 2012-01-17 14:36:39 -0800 | [diff] [blame] | 18 | msmgpio: gpio@fd400000 { |
| 19 | compatible = "qcom,msm-gpio"; |
| 20 | interrupt-controller; |
| 21 | #interrupt-cells = <2>; |
| 22 | reg = <0xfd400000 0x4000>; |
| 23 | }; |
| 24 | |
Sathish Ambley | 098f9bd | 2011-11-09 16:32:53 -0800 | [diff] [blame] | 25 | timer { |
| 26 | compatible = "qcom,msm-qtimer"; |
Michael Bohan | c722453 | 2012-01-06 16:02:52 -0800 | [diff] [blame] | 27 | interrupts = <1 2 0>; |
Sathish Ambley | 098f9bd | 2011-11-09 16:32:53 -0800 | [diff] [blame] | 28 | }; |
| 29 | |
David Brown | 225abee | 2012-02-09 22:28:50 -0800 | [diff] [blame] | 30 | serial@f991f000 { |
Sathish Ambley | 3d50c76 | 2011-10-25 15:26:00 -0700 | [diff] [blame] | 31 | compatible = "qcom,msm-lsuart-v14"; |
David Brown | 225abee | 2012-02-09 22:28:50 -0800 | [diff] [blame] | 32 | reg = <0xf991f000 0x1000>; |
Michael Bohan | c722453 | 2012-01-06 16:02:52 -0800 | [diff] [blame] | 33 | interrupts = <0 109 0>; |
Sathish Ambley | 3d50c76 | 2011-10-25 15:26:00 -0700 | [diff] [blame] | 34 | }; |
Pavankumar Kondeti | eaea7fe | 2011-10-27 14:46:45 +0530 | [diff] [blame] | 35 | |
David Brown | 225abee | 2012-02-09 22:28:50 -0800 | [diff] [blame] | 36 | usb@f9a55000 { |
Pavankumar Kondeti | eaea7fe | 2011-10-27 14:46:45 +0530 | [diff] [blame] | 37 | compatible = "qcom,hsusb-otg"; |
David Brown | 225abee | 2012-02-09 22:28:50 -0800 | [diff] [blame] | 38 | reg = <0xf9a55000 0x400>; |
Michael Bohan | c722453 | 2012-01-06 16:02:52 -0800 | [diff] [blame] | 39 | interrupts = <0 134 0>; |
Pavankumar Kondeti | eaea7fe | 2011-10-27 14:46:45 +0530 | [diff] [blame] | 40 | |
| 41 | qcom,hsusb-otg-phy-type = <2>; |
| 42 | qcom,hsusb-otg-mode = <1>; |
| 43 | qcom,hsusb-otg-otg-control = <1>; |
| 44 | }; |
Sujit Reddy Thumma | 7285c2e | 2011-11-04 10:18:15 +0530 | [diff] [blame] | 45 | |
David Brown | 225abee | 2012-02-09 22:28:50 -0800 | [diff] [blame] | 46 | qcom,sdcc@f980b000 { |
Sujit Reddy Thumma | 7285c2e | 2011-11-04 10:18:15 +0530 | [diff] [blame] | 47 | cell-index = <1>; |
| 48 | compatible = "qcom,msm-sdcc"; |
David Brown | 225abee | 2012-02-09 22:28:50 -0800 | [diff] [blame] | 49 | reg = <0xf980b000 0x1000>; |
Michael Bohan | c722453 | 2012-01-06 16:02:52 -0800 | [diff] [blame] | 50 | interrupts = <0 123 0>; |
Sujit Reddy Thumma | 7285c2e | 2011-11-04 10:18:15 +0530 | [diff] [blame] | 51 | |
Subhash Jadavani | 56e0eaa | 2012-03-13 18:06:04 +0530 | [diff] [blame^] | 52 | qcom,sdcc-clk-rates = <400000 24000000 48000000 96000000 192000000>; |
Sujit Reddy Thumma | 7285c2e | 2011-11-04 10:18:15 +0530 | [diff] [blame] | 53 | qcom,sdcc-sup-voltages = <3300 3300>; |
| 54 | qcom,sdcc-bus-width = <8>; |
Subhash Jadavani | 56e0eaa | 2012-03-13 18:06:04 +0530 | [diff] [blame^] | 55 | qcom,sdcc-hs200; |
Sujit Reddy Thumma | 7285c2e | 2011-11-04 10:18:15 +0530 | [diff] [blame] | 56 | qcom,sdcc-nonremovable; |
| 57 | qcom,sdcc-disable_cmd23; |
| 58 | }; |
| 59 | |
David Brown | 225abee | 2012-02-09 22:28:50 -0800 | [diff] [blame] | 60 | qcom,sdcc@f984b000 { |
Sujit Reddy Thumma | 7285c2e | 2011-11-04 10:18:15 +0530 | [diff] [blame] | 61 | cell-index = <3>; |
| 62 | compatible = "qcom,msm-sdcc"; |
David Brown | 225abee | 2012-02-09 22:28:50 -0800 | [diff] [blame] | 63 | reg = <0xf984b000 0x1000>; |
Michael Bohan | c722453 | 2012-01-06 16:02:52 -0800 | [diff] [blame] | 64 | interrupts = <0 127 0>; |
Sujit Reddy Thumma | 7285c2e | 2011-11-04 10:18:15 +0530 | [diff] [blame] | 65 | |
| 66 | qcom,sdcc-clk-rates = <400000 24000000 48000000>; |
| 67 | qcom,sdcc-sup-voltages = <3300 3300>; |
| 68 | qcom,sdcc-bus-width = <4>; |
| 69 | qcom,sdcc-disable_cmd23; |
| 70 | }; |
Yan He | 1466daa | 2011-11-30 17:25:38 -0800 | [diff] [blame] | 71 | |
David Brown | 225abee | 2012-02-09 22:28:50 -0800 | [diff] [blame] | 72 | qcom,sps@f9980000 { |
Yan He | 1466daa | 2011-11-30 17:25:38 -0800 | [diff] [blame] | 73 | compatible = "qcom,msm_sps"; |
David Brown | 225abee | 2012-02-09 22:28:50 -0800 | [diff] [blame] | 74 | reg = <0xf9984000 0x15000>, |
| 75 | <0xf9999000 0xb000>; |
Michael Bohan | c722453 | 2012-01-06 16:02:52 -0800 | [diff] [blame] | 76 | interrupts = <0 94 0>; |
Yan He | 1466daa | 2011-11-30 17:25:38 -0800 | [diff] [blame] | 77 | |
| 78 | qcom,bam-dma-res-pipes = <6>; |
| 79 | }; |
| 80 | |
Harini Jayaraman | 5f98dbb | 2011-12-20 13:38:19 -0700 | [diff] [blame] | 81 | spi@f9924000 { |
| 82 | compatible = "qcom,spi-qup-v2"; |
| 83 | reg = <0xf9924000 0x1000>; |
Michael Bohan | 857c8ac | 2012-01-23 16:57:34 -0800 | [diff] [blame] | 84 | interrupts = <0 96 0>; |
Harini Jayaraman | 5f98dbb | 2011-12-20 13:38:19 -0700 | [diff] [blame] | 85 | spi-max-frequency = <24000000>; |
| 86 | }; |
Kenneth Heitke | f3c829c | 2012-01-13 17:02:43 -0700 | [diff] [blame] | 87 | |
| 88 | qcom,spmi@fc4c0000 { |
| 89 | cell-index = <0>; |
| 90 | compatible = "qcom,spmi-pmic-arb"; |
| 91 | reg = <0xfc4cf000 0x1000>, |
| 92 | <0Xfc4cb000 0x1000>; |
| 93 | /* 190,ee0_krait_hlos_spmi_periph_irq */ |
| 94 | /* 187,channel_0_krait_hlos_trans_done_irq */ |
| 95 | interrupts = <0 190 0 0 187 0>; |
| 96 | qcom,pmic-arb-ee = <0>; |
| 97 | qcom,pmic-arb-channel = <0>; |
Gilad Avidov | a11c0b5 | 2012-02-15 15:30:49 -0700 | [diff] [blame] | 98 | qcom,pmic-arb-ppid-map = <0x13000000>, /* PM8941_LDO1 */ |
| 99 | <0x13100001>, /* PM8941_LDO2 */ |
| 100 | <0x13200002>, /* PM8941_LDO3 */ |
| 101 | <0x13300003>, /* PM8941_LDO4 */ |
| 102 | <0x13400004>, /* PM8941_LDO5 */ |
| 103 | <0x13500005>, /* PM8941_LDO6 */ |
| 104 | <0x13600006>, /* PM8941_LDO7 */ |
| 105 | <0x13700007>, /* PM8941_LDO8 */ |
| 106 | <0x13800008>, /* PM8941_LDO9 */ |
| 107 | <0x13900009>, /* PM8941_LDO10 */ |
| 108 | <0x13a0000a>, /* PM8941_LDO11 */ |
| 109 | <0x13b0000b>, /* PM8941_LDO12 */ |
| 110 | <0x13c0000c>, /* PM8941_LDO13 */ |
| 111 | <0x13d0000d>, /* PM8941_LDO14 */ |
| 112 | <0x13e0000e>, /* PM8941_LDO15 */ |
| 113 | <0x13f0000f>, /* PM8941_LDO16 */ |
| 114 | <0x14000010>, /* PM8941_LDO17 */ |
| 115 | <0x14100011>, /* PM8941_LDO18 */ |
| 116 | <0x14200012>, /* PM8941_LDO19 */ |
| 117 | <0x14300013>, /* PM8941_LDO20 */ |
| 118 | <0x14400014>, /* PM8941_LDO21 */ |
| 119 | <0x14500015>, /* PM8941_LDO22 */ |
| 120 | <0x14600016>, /* PM8941_LDO23 */ |
| 121 | <0x14700017>, /* PM8941_LDO24 */ |
| 122 | <0x14800018>, /* PM8941_LDO25 */ |
| 123 | <0x14900019>, /* PM8941_LDO26 */ |
| 124 | <0x0c00001a>, /* PM8941_GPIO1 */ |
| 125 | <0x0c10001b>, /* PM8941_GPIO2 */ |
| 126 | <0x0c20001c>, /* PM8941_GPIO3 */ |
| 127 | <0x0c30001d>, /* PM8941_GPIO4 */ |
| 128 | <0x0c40001e>, /* PM8941_GPIO5 */ |
| 129 | <0x0c50001f>, /* PM8941_GPIO6 */ |
| 130 | <0x0c600020>, /* PM8941_GPIO7 */ |
| 131 | <0x0c700021>, /* PM8941_GPIO8 */ |
| 132 | <0x0c800022>, /* PM8941_GPIO9 */ |
| 133 | <0x0c900023>, /* PM8941_GPIO10 */ |
| 134 | <0x0ca00024>, /* PM8941_GPIO11 */ |
| 135 | <0x0cb00025>, /* PM8941_GPIO12 */ |
| 136 | <0x0cc00026>, /* PM8941_GPIO13 */ |
| 137 | <0x0cd00027>, /* PM8941_GPIO14 */ |
| 138 | <0x0ce00028>, /* PM8941_GPIO15 */ |
| 139 | <0x0cf00029>, /* PM8941_GPIO16 */ |
| 140 | <0x0d00002a>, /* PM8941_GPIO17 */ |
| 141 | <0x0d10002b>, /* PM8941_GPIO18 */ |
| 142 | <0x0d20002c>, /* PM8941_GPIO19 */ |
| 143 | <0x0d30002d>, /* PM8941_GPIO20 */ |
| 144 | <0x0d40002e>, /* PM8941_GPIO21 */ |
| 145 | <0x0d50002f>, /* PM8941_GPIO22 */ |
| 146 | <0x0d600030>, /* PM8941_GPIO23 */ |
| 147 | <0x0d700031>, /* PM8941_GPIO24 */ |
| 148 | <0x0d800032>, /* PM8941_GPIO25 */ |
| 149 | <0x0d900033>, /* PM8941_GPIO26 */ |
| 150 | <0x0da00034>, /* PM8941_GPIO27 */ |
| 151 | <0x0db00035>, /* PM8941_GPIO28 */ |
| 152 | <0x0dc00036>, /* PM8941_GPIO29 */ |
| 153 | <0x0dd00037>, /* PM8941_GPIO30 */ |
| 154 | <0x0de00038>, /* PM8941_GPIO31 */ |
| 155 | <0x0df00039>, /* PM8941_GPIO32 */ |
| 156 | <0x0e00003a>, /* PM8941_GPIO33 */ |
| 157 | <0x0e10003b>, /* PM8941_GPIO34 */ |
| 158 | <0x0e20003c>, /* PM8941_GPIO35 */ |
| 159 | <0x0e30003d>, /* PM8941_GPIO36 */ |
| 160 | <0x0280003e>, /* COINCELL */ |
| 161 | <0x0100003f>, /* SMBC_OVP */ |
| 162 | <0x01100040>, /* SMBC_CHG */ |
| 163 | <0x01200041>, /* SMBC_BIF */ |
| 164 | <0x00500042>, /* INTERRUPT */ |
| 165 | <0x00100043>, /* PM8941_0 */ |
| 166 | <0x20100044>, /* PM8841_0 */ |
| 167 | <0x10100045>, /* PM8941_1 */ |
| 168 | <0x30100046>, /* PM8841_1 */ |
| 169 | <0x00800047>, /* PON0 */ |
| 170 | <0x20800048>, /* PON1 */ |
| 171 | <0x11000049>, /* PM8941_SMPS1 */ |
| 172 | <0x1110004a>, /* PM8941_SMPS2 */ |
| 173 | <0x1120004b>, /* PM8941_SMPS3 */ |
| 174 | <0x3100004c>, /* PM8841_SMPS1 */ |
| 175 | <0x3110004d>, /* PM8841_SMPS2 */ |
| 176 | <0x3120004e>, /* PM8841_SMPS3 */ |
| 177 | <0x3130004f>, /* PM8841_SMPS4 */ |
| 178 | <0x31400050>, /* PM8841_SMPS5 */ |
| 179 | <0x31500051>, /* PM8841_SMPS6 */ |
| 180 | <0x31600052>, /* PM8841_SMPS7 */ |
| 181 | <0x31700053>, /* PM8841_SMPS8 */ |
| 182 | <0x05000054>, /* SHARED_XO */ |
| 183 | <0x05100055>, /* BB_CLK1 */ |
| 184 | <0x05200056>, /* BB_CLK2 */ |
| 185 | <0x05900057>, /* SLEEP_CLK */ |
| 186 | <0x07000058>, /* PBS_CORE */ |
| 187 | <0x07100059>, /* PBS_CLIENT1 */ |
| 188 | <0x0720005a>; /* PBS_CLIENT2 */ |
Kenneth Heitke | f3c829c | 2012-01-13 17:02:43 -0700 | [diff] [blame] | 189 | }; |
Sathish Ambley | 4df614c | 2011-10-07 16:30:46 -0700 | [diff] [blame] | 190 | }; |