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Mauro Carvalho Chehabafd1a0c2005-12-12 00:37:27 -08001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * dmx.h
3 *
4 * Copyright (C) 2000 Marcus Metzler <marcus@convergence.de>
5 * & Ralph Metzler <ralph@convergence.de>
6 * for convergence integrated media GmbH
7 *
Hamad Kadmany32cb9822012-05-10 08:47:44 +03008 * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
9 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU Lesser General Public License
12 * as published by the Free Software Foundation; either version 2.1
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU Lesser General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 *
24 */
25
26#ifndef _DVBDMX_H_
27#define _DVBDMX_H_
28
Jaswinder Singh Rajputc86629c2009-01-30 19:55:32 +053029#include <linux/types.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#ifdef __KERNEL__
31#include <linux/time.h>
32#else
33#include <time.h>
34#endif
35
36
37#define DMX_FILTER_SIZE 16
38
Hamad Kadmany4f877942012-07-15 15:06:01 +030039/* Min recording chunk upon which event is generated */
40#define DMX_REC_BUFF_CHUNK_MIN_SIZE (100*188)
41
Gilad Broner39b9ae12012-12-03 15:57:44 +020042/* Decoder buffers are usually large ~1MB, 10 should suffice */
43#define DMX_MAX_DECODER_BUFFER_NUM (10)
44
Linus Torvalds1da177e2005-04-16 15:20:36 -070045typedef enum
46{
47 DMX_OUT_DECODER, /* Streaming directly to decoder. */
48 DMX_OUT_TAP, /* Output going to a memory buffer */
Mauro Carvalho Chehab674434c2005-12-12 00:37:28 -080049 /* (to be retrieved via the read command).*/
Peter Hartleyb01cd932008-04-22 14:45:36 -030050 DMX_OUT_TS_TAP, /* Output multiplexed into a new TS */
Mauro Carvalho Chehab674434c2005-12-12 00:37:28 -080051 /* (to be retrieved by reading from the */
52 /* logical DVR device). */
Peter Hartleyb01cd932008-04-22 14:45:36 -030053 DMX_OUT_TSDEMUX_TAP /* Like TS_TAP but retrieved from the DMX device */
Linus Torvalds1da177e2005-04-16 15:20:36 -070054} dmx_output_t;
55
56
57typedef enum
58{
59 DMX_IN_FRONTEND, /* Input from a front-end device. */
60 DMX_IN_DVR /* Input from the logical DVR device. */
61} dmx_input_t;
62
63
64typedef enum
65{
Mauro Carvalho Chehabafd1a0c2005-12-12 00:37:27 -080066 DMX_PES_AUDIO0,
Linus Torvalds1da177e2005-04-16 15:20:36 -070067 DMX_PES_VIDEO0,
68 DMX_PES_TELETEXT0,
69 DMX_PES_SUBTITLE0,
70 DMX_PES_PCR0,
71
Mauro Carvalho Chehabafd1a0c2005-12-12 00:37:27 -080072 DMX_PES_AUDIO1,
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 DMX_PES_VIDEO1,
74 DMX_PES_TELETEXT1,
75 DMX_PES_SUBTITLE1,
76 DMX_PES_PCR1,
77
Mauro Carvalho Chehabafd1a0c2005-12-12 00:37:27 -080078 DMX_PES_AUDIO2,
Linus Torvalds1da177e2005-04-16 15:20:36 -070079 DMX_PES_VIDEO2,
80 DMX_PES_TELETEXT2,
81 DMX_PES_SUBTITLE2,
82 DMX_PES_PCR2,
83
Mauro Carvalho Chehabafd1a0c2005-12-12 00:37:27 -080084 DMX_PES_AUDIO3,
Linus Torvalds1da177e2005-04-16 15:20:36 -070085 DMX_PES_VIDEO3,
86 DMX_PES_TELETEXT3,
87 DMX_PES_SUBTITLE3,
88 DMX_PES_PCR3,
89
90 DMX_PES_OTHER
91} dmx_pes_type_t;
92
93#define DMX_PES_AUDIO DMX_PES_AUDIO0
94#define DMX_PES_VIDEO DMX_PES_VIDEO0
95#define DMX_PES_TELETEXT DMX_PES_TELETEXT0
96#define DMX_PES_SUBTITLE DMX_PES_SUBTITLE0
97#define DMX_PES_PCR DMX_PES_PCR0
98
99
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100typedef struct dmx_filter
101{
102 __u8 filter[DMX_FILTER_SIZE];
103 __u8 mask[DMX_FILTER_SIZE];
104 __u8 mode[DMX_FILTER_SIZE];
105} dmx_filter_t;
106
107
Liron Kuchd4cc3b02012-05-17 16:31:58 +0300108/* Filter flags */
109#define DMX_CHECK_CRC 0x01
110#define DMX_ONESHOT 0x02
111#define DMX_IMMEDIATE_START 0x04
112#define DMX_ENABLE_INDEXING 0x08
113#define DMX_KERNEL_CLIENT 0x8000
114
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115struct dmx_sct_filter_params
116{
117 __u16 pid;
118 dmx_filter_t filter;
119 __u32 timeout;
120 __u32 flags;
Liron Kuchd4cc3b02012-05-17 16:31:58 +0300121};
122
123
124/* Indexing: supported video standards */
125enum dmx_indexing_video_standard {
126 DMX_INDEXING_MPEG2,
127 DMX_INDEXING_H264,
128 DMX_INDEXING_VC1
129};
130
131/* Indexing: Supported video profiles */
132enum dmx_indexing_video_profile {
133 DMX_INDEXING_MPEG2_ANY,
134 DMX_INDEXING_H264_ANY,
135 DMX_INDEXING_VC1_ANY
136};
137
138/* Indexing: video configuration parameters */
139struct dmx_indexing_video_params {
140 enum dmx_indexing_video_standard standard;
141 enum dmx_indexing_video_profile profile;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142};
143
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144struct dmx_pes_filter_params
145{
146 __u16 pid;
147 dmx_input_t input;
148 dmx_output_t output;
149 dmx_pes_type_t pes_type;
150 __u32 flags;
Liron Kuchd4cc3b02012-05-17 16:31:58 +0300151
Hamad Kadmany4f877942012-07-15 15:06:01 +0300152 /*
153 * The following configures when the event
154 * DMX_EVENT_NEW_REC_CHUNK will be triggered.
155 * When new recorded data is received with size
156 * equal or larger than this value a new event
157 * will be triggered. This is relevent when
158 * output is DMX_OUT_TS_TAP or DMX_OUT_TSDEMUX_TAP,
159 * size must be at least DMX_REC_BUFF_CHUNK_MIN_SIZE
160 * and smaller than buffer size.
161 */
162 __u32 rec_chunk_size;
163
Liron Kuchd4cc3b02012-05-17 16:31:58 +0300164 struct dmx_indexing_video_params video_params;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165};
166
Hamad Kadmany32cb9822012-05-10 08:47:44 +0300167struct dmx_buffer_status {
168 /* size of buffer in bytes */
169 unsigned int size;
170
171 /* fullness of buffer in bytes */
172 unsigned int fullness;
173
174 /*
175 * How many bytes are free
176 * It's the same as: size-fullness-1
177 */
178 unsigned int free_bytes;
179
180 /* read pointer offset in bytes */
181 unsigned int read_offset;
182
183 /* write pointer offset in bytes */
184 unsigned int write_offset;
185
186 /* non-zero if data error occured */
187 int error;
188};
189
Hamad Kadmany4f877942012-07-15 15:06:01 +0300190/* Events associated with each demux filter */
191enum dmx_event {
192 /* New PES packet is ready to be consumed */
193 DMX_EVENT_NEW_PES,
194
195 /* New section is ready to be consumed */
196 DMX_EVENT_NEW_SECTION,
197
198 /* New recording chunk is ready to be consumed */
199 DMX_EVENT_NEW_REC_CHUNK,
200
201 /* New PCR value is ready */
202 DMX_EVENT_NEW_PCR,
203
204 /* Overflow */
205 DMX_EVENT_BUFFER_OVERFLOW,
206
207 /* Section was dropped due to CRC error */
208 DMX_EVENT_SECTION_CRC_ERROR,
209
210 /* End-of-stream, no more data from this filter */
211 DMX_EVENT_EOS
212};
213
214/* Flags passed in filter events */
215
216/* Continuity counter error was detected */
217#define DMX_FILTER_CC_ERROR 0x01
218
219/* Discontinuity indicator was set */
220#define DMX_FILTER_DISCONTINUITY_INDEICATOR 0x02
221
222/* PES legnth in PES header is not correct */
223#define DMX_FILTER_PES_LENGTH_ERROR 0x04
224
225
226/* PES info associated with DMX_EVENT_NEW_PES event */
227struct dmx_pes_event_info {
228 /* Offset at which PES information starts */
229 __u32 base_offset;
230
231 /*
232 * Start offset at which PES data
233 * from the stream starts.
234 * Equal to base_offset if PES data
235 * starts from the beginning.
236 */
237 __u32 start_offset;
238
239 /* Total length holding the PES information */
240 __u32 total_length;
241
242 /* Actual length holding the PES data */
243 __u32 actual_length;
244
245 /* Local receiver timestamp in 27MHz */
246 __u64 stc;
247
248 /* Flags passed in filter events */
249 __u32 flags;
250};
251
252/* Section info associated with DMX_EVENT_NEW_SECTION event */
253struct dmx_section_event_info {
254 /* Offset at which section information starts */
255 __u32 base_offset;
256
257 /*
258 * Start offset at which section data
259 * from the stream starts.
260 * Equal to base_offset if section data
261 * starts from the beginning.
262 */
263 __u32 start_offset;
264
265 /* Total length holding the section information */
266 __u32 total_length;
267
268 /* Actual length holding the section data */
269 __u32 actual_length;
270
271 /* Flags passed in filter events */
272 __u32 flags;
273};
274
275/* Recording info associated with DMX_EVENT_NEW_REC_CHUNK event */
276struct dmx_rec_chunk_event_info {
277 /* Offset at which recording chunk starts */
278 __u32 offset;
279
280 /* Size of recording chunk in bytes */
281 __u32 size;
282};
283
284/* PCR info associated with DMX_EVENT_NEW_PCR event */
285struct dmx_pcr_event_info {
286 /* Local timestamp in 27MHz
287 * when PCR packet was received
288 */
289 __u64 stc;
290
291 /* PCR value in 27MHz */
292 __u64 pcr;
293
294 /* Flags passed in filter events */
295 __u32 flags;
296};
297
298/*
299 * Filter's event returned through DMX_GET_EVENT.
300 * poll with POLLPRI would block until events are available.
301 */
302struct dmx_filter_event {
303 enum dmx_event type;
304
305 union {
306 struct dmx_pes_event_info pes;
307 struct dmx_section_event_info section;
308 struct dmx_rec_chunk_event_info recording_chunk;
309 struct dmx_pcr_event_info pcr;
310 } params;
311};
312
Hamad Kadmanycce85632012-09-20 07:58:57 +0300313/* Filter's buffer requirement returned in dmx_caps */
314struct dmx_buffer_requirement {
315 /* Buffer size alignment, 0 means no special requirement */
316 __u32 size_alignment;
317
318 /* Maximum buffer size allowed */
319 __u32 max_size;
Gilad Broner39b9ae12012-12-03 15:57:44 +0200320
321 /* Maximum number of linear buffers handled by demux */
322 __u32 max_buffer_num;
323
324 /* Feature support bitmap as detailed below */
Hamad Kadmanycce85632012-09-20 07:58:57 +0300325 __u32 flags;
326
Gilad Broner39b9ae12012-12-03 15:57:44 +0200327/* Buffer must be allocated as physically contiguous memory */
328#define DMX_BUFFER_CONTIGUOUS_MEM 0x1
Hamad Kadmanycce85632012-09-20 07:58:57 +0300329
330/* If the filter's data is decrypted, the buffer should be secured one */
331#define DMX_BUFFER_SECURED_IF_DECRYPTED 0x2
Gilad Broner39b9ae12012-12-03 15:57:44 +0200332
333/* Buffer can be allocated externally */
334#define DMX_BUFFER_EXTERNAL_SUPPORT 0x4
335
336/* Buffer can be allocated internally */
337#define DMX_BUFFER_INTERNAL_SUPPORT 0x8
338
339/* Filter output can be output to a linear buffer group */
340#define DMX_BUFFER_LINEAR_GROUP_SUPPORT 0x10
Hamad Kadmanycce85632012-09-20 07:58:57 +0300341};
342
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343typedef struct dmx_caps {
344 __u32 caps;
Hamad Kadmanyd2c325e2012-05-28 13:52:49 +0300345
346/* Indicates whether demux support playback from memory in pull mode */
347#define DMX_CAP_PULL_MODE 0x01
348
349/* Indicates whether demux support indexing of recorded video stream */
350#define DMX_CAP_VIDEO_INDEXING 0x02
351
352/* Indicates whether demux support sending data directly to video decoder */
353#define DMX_CAP_VIDEO_DECODER_DATA 0x04
354
355/* Indicates whether demux support sending data directly to audio decoder */
356#define DMX_CAP_AUDIO_DECODER_DATA 0x08
357
358/* Indicates whether demux support sending data directly to subtitle decoder */
359#define DMX_CAP_SUBTITLE_DECODER_DATA 0x10
360
361 /* Number of decoders demux can output data to */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362 int num_decoders;
Hamad Kadmanyd2c325e2012-05-28 13:52:49 +0300363
364 /* Number of demux devices */
365 int num_demux_devices;
366
367 /* Max number of PID filters */
368 int num_pid_filters;
369
370 /* Max number of section filters */
371 int num_section_filters;
372
373 /*
374 * Max number of section filters using same PID,
375 * 0 if not supported
376 */
377 int num_section_filters_per_pid;
378
379 /*
380 * Length of section filter, not including section
381 * length field (2 bytes).
382 */
383 int section_filter_length;
384
385 /* Max number of demod based input */
386 int num_demod_inputs;
387
388 /* Max number of memory based input */
389 int num_memory_inputs;
390
391 /* Overall bitrate from all inputs concurrently. Mbit/sec */
392 int max_bitrate;
393
394 /* Max bitrate from single demod input. Mbit/sec */
395 int demod_input_max_bitrate;
396
397 /* Max bitrate from single memory input. Mbit/sec */
398 int memory_input_max_bitrate;
Hamad Kadmanycce85632012-09-20 07:58:57 +0300399
400 struct dmx_buffer_requirement section;
401
402 /* For PES not sent to decoder */
403 struct dmx_buffer_requirement pes;
404
Gilad Broner39b9ae12012-12-03 15:57:44 +0200405 /* For PES sent to decoder */
406 struct dmx_buffer_requirement decoder;
407
Hamad Kadmanycce85632012-09-20 07:58:57 +0300408 /* Recording buffer for recording of 188 bytes packets */
409 struct dmx_buffer_requirement recording_188_tsp;
410
411 /* Recording buffer for recording of 192 bytes packets */
412 struct dmx_buffer_requirement recording_192_tsp;
413
414 /* DVR input buffer for playback of 188 bytes packets */
415 struct dmx_buffer_requirement playback_188_tsp;
416
417 /* DVR input buffer for playback of 192 bytes packets */
418 struct dmx_buffer_requirement playback_192_tsp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419} dmx_caps_t;
420
421typedef enum {
422 DMX_SOURCE_FRONT0 = 0,
423 DMX_SOURCE_FRONT1,
424 DMX_SOURCE_FRONT2,
425 DMX_SOURCE_FRONT3,
426 DMX_SOURCE_DVR0 = 16,
427 DMX_SOURCE_DVR1,
428 DMX_SOURCE_DVR2,
429 DMX_SOURCE_DVR3
430} dmx_source_t;
431
Hamad Kadmany32cb9822012-05-10 08:47:44 +0300432enum dmx_tsp_format_t {
433 DMX_TSP_FORMAT_188 = 0,
434 DMX_TSP_FORMAT_192_TAIL,
435 DMX_TSP_FORMAT_192_HEAD,
436 DMX_TSP_FORMAT_204,
437};
438
439enum dmx_playback_mode_t {
440 /*
441 * In push mode, if one of output buffers
442 * is full, the buffer would overflow
443 * and demux continue processing incoming stream.
444 * This is the default mode. When playing from frontend,
445 * this is the only mode that is allowed.
446 */
447 DMX_PB_MODE_PUSH = 0,
448
449 /*
450 * In pull mode, if one of output buffers
451 * is full, demux stalls waiting for free space,
452 * this would cause DVR input buffer fullness
453 * to accumulate.
454 * This mode is possible only when playing
455 * from DVR.
456 */
457 DMX_PB_MODE_PULL,
458};
459
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460struct dmx_stc {
Gilad Broner39b9ae12012-12-03 15:57:44 +0200461 unsigned int num; /* input : which STC? 0..N */
462 unsigned int base; /* output: divisor for stc to get 90 kHz clock */
463 __u64 stc; /* output: stc in 'base'*90 kHz units */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464};
465
Hamad Kadmanycce85632012-09-20 07:58:57 +0300466enum dmx_buffer_mode {
467 /*
468 * demux buffers are allocated internally
469 * by the demux driver. This is the default mode.
470 * DMX_SET_BUFFER_SIZE can be used to set the size of
471 * this buffer.
472 */
473 DMX_BUFFER_MODE_INTERNAL,
474
475 /*
476 * demux buffers are allocated externally and provided
477 * to demux through DMX_SET_BUFFER.
478 * When this mode is used DMX_SET_BUFFER_SIZE and
479 * mmap are prohibited.
480 */
481 DMX_BUFFER_MODE_EXTERNAL,
482};
483
484struct dmx_buffer {
485 unsigned int size;
486 int handle;
487};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488
Gilad Broner39b9ae12012-12-03 15:57:44 +0200489
490struct dmx_decoder_buffers {
491 /*
492 * Specify if linear buffer support is requested. If set, buffers_num
493 * must be greater than 1
494 */
495 int is_linear;
496
497 /*
498 * Specify number of external buffers allocated by user.
499 * If set to 0 means internal buffer allocation is requested
500 */
501 __u32 buffers_num;
502
503 /* Specify buffer size, either external or internal */
504 __u32 buffers_size;
505
506 /* Array of externally allocated buffer handles */
507 int handles[DMX_MAX_DECODER_BUFFER_NUM];
508};
509
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510#define DMX_START _IO('o', 41)
511#define DMX_STOP _IO('o', 42)
512#define DMX_SET_FILTER _IOW('o', 43, struct dmx_sct_filter_params)
513#define DMX_SET_PES_FILTER _IOW('o', 44, struct dmx_pes_filter_params)
514#define DMX_SET_BUFFER_SIZE _IO('o', 45)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700515#define DMX_GET_PES_PIDS _IOR('o', 47, __u16[5])
516#define DMX_GET_CAPS _IOR('o', 48, dmx_caps_t)
517#define DMX_SET_SOURCE _IOW('o', 49, dmx_source_t)
518#define DMX_GET_STC _IOWR('o', 50, struct dmx_stc)
Andreas Oberritter1cb662a2009-07-14 20:28:50 -0300519#define DMX_ADD_PID _IOW('o', 51, __u16)
520#define DMX_REMOVE_PID _IOW('o', 52, __u16)
Hamad Kadmany32cb9822012-05-10 08:47:44 +0300521#define DMX_SET_TS_PACKET_FORMAT _IOW('o', 53, enum dmx_tsp_format_t)
522#define DMX_SET_TS_OUT_FORMAT _IOW('o', 54, enum dmx_tsp_format_t)
523#define DMX_SET_DECODER_BUFFER_SIZE _IO('o', 55)
524#define DMX_GET_BUFFER_STATUS _IOR('o', 56, struct dmx_buffer_status)
525#define DMX_RELEASE_DATA _IO('o', 57)
526#define DMX_FEED_DATA _IO('o', 58)
527#define DMX_SET_PLAYBACK_MODE _IOW('o', 59, enum dmx_playback_mode_t)
Hamad Kadmany4f877942012-07-15 15:06:01 +0300528#define DMX_GET_EVENT _IOR('o', 60, struct dmx_filter_event)
Hamad Kadmanycce85632012-09-20 07:58:57 +0300529#define DMX_SET_BUFFER_MODE _IOW('o', 61, enum dmx_buffer_mode)
530#define DMX_SET_BUFFER _IOW('o', 62, struct dmx_buffer)
Gilad Broner39b9ae12012-12-03 15:57:44 +0200531#define DMX_SET_DECODER_BUFFER _IOW('o', 63, struct dmx_decoder_buffers)
532
Linus Torvalds1da177e2005-04-16 15:20:36 -0700533
534#endif /*_DVBDMX_H_*/