blob: a7ae2ccf650c6469aabbfa46ebdb541e807e6d5a [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
19#include <linux/types.h>
20#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070021#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070023#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#ifdef MSM_CAMERA_GCC
25#include <time.h>
26#else
27#include <linux/time.h>
28#endif
29
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -070030#include <linux/ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070031
Nishant Pandit5dd54422012-06-26 22:52:44 +053032#define BIT(nr) (1UL << (nr))
33
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034#define MSM_CAM_IOCTL_MAGIC 'm'
35
36#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
37 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
38
39#define MSM_CAM_IOCTL_REGISTER_PMEM \
40 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
41
42#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
43 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
44
45#define MSM_CAM_IOCTL_CTRL_COMMAND \
46 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
47
48#define MSM_CAM_IOCTL_CONFIG_VFE \
49 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
50
51#define MSM_CAM_IOCTL_GET_STATS \
52 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
53
54#define MSM_CAM_IOCTL_GETFRAME \
55 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
56
57#define MSM_CAM_IOCTL_ENABLE_VFE \
58 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
59
60#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
61 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
62
63#define MSM_CAM_IOCTL_CONFIG_CMD \
64 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_DISABLE_VFE \
67 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
68
69#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
70 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_VFE_APPS_RESET \
73 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
76 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
79 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
80
81#define MSM_CAM_IOCTL_AXI_CONFIG \
82 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
83
84#define MSM_CAM_IOCTL_GET_PICTURE \
85 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
86
87#define MSM_CAM_IOCTL_SET_CROP \
88 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
89
90#define MSM_CAM_IOCTL_PICT_PP \
91 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
92
93#define MSM_CAM_IOCTL_PICT_PP_DONE \
94 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
95
96#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
97 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
98
99#define MSM_CAM_IOCTL_FLASH_LED_CFG \
100 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
101
102#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
103 _IO(MSM_CAM_IOCTL_MAGIC, 23)
104
105#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
106 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
107
108#define MSM_CAM_IOCTL_AF_CTRL \
109 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
110
111#define MSM_CAM_IOCTL_AF_CTRL_DONE \
112 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_CONFIG_VPE \
115 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
116
117#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
118 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
121 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
124 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
127 _IO(MSM_CAM_IOCTL_MAGIC, 31)
128
129#define MSM_CAM_IOCTL_FLASH_CTRL \
130 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
131
132#define MSM_CAM_IOCTL_ERROR_CONFIG \
133 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
134
135#define MSM_CAM_IOCTL_ABORT_CAPTURE \
136 _IO(MSM_CAM_IOCTL_MAGIC, 34)
137
138#define MSM_CAM_IOCTL_SET_FD_ROI \
139 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
140
141#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
142 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
143
144#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
145 _IO(MSM_CAM_IOCTL_MAGIC, 37)
146
147#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
148 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
149
150#define MSM_CAM_IOCTL_PUT_ST_FRAME \
151 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
152
Mansoor Aftab5d418372011-07-26 17:01:26 -0700153#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Kevin Chan94b4c832012-03-02 21:27:16 -0800154 _IOR(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event *)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700155
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700156#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800157 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700158
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700159#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800160 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700161
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700162#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800163 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700164
165#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800166 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700167
168#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800169 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700170
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800171#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800172 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800173
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800174#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800175 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800176
177#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800178 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800179
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800180#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800181 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800182
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800183#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800184 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800185
186#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800187 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800188
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800189#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800190 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800191
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700192#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
193 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
194
Nishant Panditb2157c92012-04-25 01:09:28 +0530195#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
196 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
197
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700198#define MSM_CAM_IOCTL_STATS_REQBUF \
199 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
200
201#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
202 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
203
204#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
205 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
206
Ankit Premrajka4b3443f2012-06-11 14:06:31 -0700207#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
208 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
209
210#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
211 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
212
Kiran Kumar H N90785902012-07-05 13:59:38 -0700213#define MSM_CAM_IOCTL_GET_INST_HANDLE \
214 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *)
215
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700216#define MSM_CAM_IOCTL_STATS_UNREG_BUF \
217 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *)
218
219
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700220struct msm_stats_reqbuf {
221 int num_buf; /* how many buffers requested */
222 int stats_type; /* stats type */
223};
224
225struct msm_stats_flush_bufq {
226 int stats_type; /* enum msm_stats_enum_type */
227};
228
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700229struct msm_mctl_pp_cmd {
230 int32_t id;
231 uint16_t length;
232 void *value;
233};
234
235struct msm_mctl_post_proc_cmd {
236 int32_t type;
237 struct msm_mctl_pp_cmd cmd;
238};
239
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700240#define MSM_CAMERA_LED_OFF 0
241#define MSM_CAMERA_LED_LOW 1
242#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530243#define MSM_CAMERA_LED_INIT 3
244#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700245
246#define MSM_CAMERA_STROBE_FLASH_NONE 0
247#define MSM_CAMERA_STROBE_FLASH_XENON 1
248
249#define MSM_MAX_CAMERA_SENSORS 5
250#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800251#define MAX_CAM_NAME_SIZE 32
252#define MAX_ACT_MOD_NAME_SIZE 32
253#define MAX_ACT_NAME_SIZE 32
254#define NUM_ACTUATOR_DIR 2
255#define MAX_ACTUATOR_SCENARIO 8
256#define MAX_ACTUATOR_REGION 5
257#define MAX_ACTUATOR_INIT_SET 12
258#define MAX_ACTUATOR_TYPE_SIZE 32
259#define MAX_ACTUATOR_REG_TBL_SIZE 8
260
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700261
262#define MSM_MAX_CAMERA_CONFIGS 2
263
264#define PP_SNAP 0x01
265#define PP_RAW_SNAP ((0x01)<<1)
266#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800267#define PP_THUMB ((0x01)<<3)
268#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700269
270#define MSM_CAM_CTRL_CMD_DONE 0
271#define MSM_CAM_SENSOR_VFE_CMD 1
272
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700273/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
274#define MAX_PLANES 8
275
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700276/*****************************************************
277 * structure
278 *****************************************************/
279
280/* define five type of structures for userspace <==> kernel
281 * space communication:
282 * command 1 - 2 are from userspace ==> kernel
283 * command 3 - 4 are from kernel ==> userspace
284 *
285 * 1. control command: control command(from control thread),
286 * control status (from config thread);
287 */
288struct msm_ctrl_cmd {
289 uint16_t type;
290 uint16_t length;
291 void *value;
292 uint16_t status;
293 uint32_t timeout_ms;
294 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
295 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800296 int queue_idx;
297 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700298 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700299 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700300};
301
302struct msm_cam_evt_msg {
303 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
304 unsigned short msg_id;
305 unsigned int len; /* size in, number of bytes out */
306 uint32_t frame_id;
307 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700308 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700309};
310
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700311struct msm_pp_frame_sp {
312 /* phy addr of the buffer */
313 unsigned long phy_addr;
314 uint32_t y_off;
315 uint32_t cbcr_off;
316 /* buffer length */
317 uint32_t length;
318 int32_t fd;
319 uint32_t addr_offset;
320 /* mapped addr */
321 unsigned long vaddr;
322};
323
324struct msm_pp_frame_mp {
325 /* phy addr of the plane */
326 unsigned long phy_addr;
327 /* offset of plane data */
328 uint32_t data_offset;
329 /* plane length */
330 uint32_t length;
331 int32_t fd;
332 uint32_t addr_offset;
333 /* mapped addr */
334 unsigned long vaddr;
335};
336
337struct msm_pp_frame {
338 uint32_t handle; /* stores vb cookie */
339 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800340 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700341 int path;
342 unsigned short image_type;
343 unsigned short num_planes; /* 1 for sp */
344 struct timeval timestamp;
345 union {
346 struct msm_pp_frame_sp sp;
347 struct msm_pp_frame_mp mp[MAX_PLANES];
348 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800349 int node_type;
Kiran Kumar H N90785902012-07-05 13:59:38 -0700350 uint32_t inst_handle;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700351};
352
Mingcheng Zhu49505502011-07-19 20:44:36 -0700353struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700354 unsigned short image_mode;
355 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700356 unsigned short inst_idx;
357 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700358 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700359 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700360};
361
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700362struct msm_mctl_pp_cmd_ack_event {
363 uint32_t cmd; /* VPE_CMD_ZOOM? */
364 int status; /* 0 done, < 0 err */
365 uint32_t cookie; /* daemon's cookie */
366};
367
368struct msm_mctl_pp_event_info {
369 int32_t event;
370 union {
371 struct msm_mctl_pp_cmd_ack_event ack;
372 };
373};
374
375struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700376 unsigned short resptype;
377 union {
378 struct msm_cam_evt_msg isp_msg;
379 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700380 struct msm_cam_evt_divert_frame div_frame;
381 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700382 } isp_data;
383};
384
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700385#define MSM_CAM_RESP_CTRL 0
386#define MSM_CAM_RESP_STAT_EVT_MSG 1
387#define MSM_CAM_RESP_STEREO_OP_1 2
388#define MSM_CAM_RESP_STEREO_OP_2 3
389#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700390#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700391#define MSM_CAM_RESP_DONE_EVENT 6
392#define MSM_CAM_RESP_MCTL_PP_EVENT 7
393#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700394
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700395#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800396#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700397
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700398/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700399
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700400struct msm_stats_event_ctrl {
401 /* 0 - ctrl_cmd from control thread,
402 * 1 - stats/event kernel,
403 * 2 - V4L control or read request */
404 int resptype;
405 int timeout_ms;
406 struct msm_ctrl_cmd ctrl_cmd;
407 /* struct vfe_event_t stats_event; */
408 struct msm_cam_evt_msg stats_event;
409};
410
411/* 2. config command: config command(from config thread); */
412struct msm_camera_cfg_cmd {
413 /* what to config:
414 * 1 - sensor config, 2 - vfe config */
415 uint16_t cfg_type;
416
417 /* sensor config type */
418 uint16_t cmd_type;
419 uint16_t queue;
420 uint16_t length;
421 void *value;
422};
423
424#define CMD_GENERAL 0
425#define CMD_AXI_CFG_OUT1 1
426#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
427#define CMD_AXI_CFG_OUT2 3
428#define CMD_PICT_T_AXI_CFG 4
429#define CMD_PICT_M_AXI_CFG 5
430#define CMD_RAW_PICT_AXI_CFG 6
431
432#define CMD_FRAME_BUF_RELEASE 7
433#define CMD_PREV_BUF_CFG 8
434#define CMD_SNAP_BUF_RELEASE 9
435#define CMD_SNAP_BUF_CFG 10
436#define CMD_STATS_DISABLE 11
437#define CMD_STATS_AEC_AWB_ENABLE 12
438#define CMD_STATS_AF_ENABLE 13
439#define CMD_STATS_AEC_ENABLE 14
440#define CMD_STATS_AWB_ENABLE 15
441#define CMD_STATS_ENABLE 16
442
443#define CMD_STATS_AXI_CFG 17
444#define CMD_STATS_AEC_AXI_CFG 18
445#define CMD_STATS_AF_AXI_CFG 19
446#define CMD_STATS_AWB_AXI_CFG 20
447#define CMD_STATS_RS_AXI_CFG 21
448#define CMD_STATS_CS_AXI_CFG 22
449#define CMD_STATS_IHIST_AXI_CFG 23
450#define CMD_STATS_SKIN_AXI_CFG 24
451
452#define CMD_STATS_BUF_RELEASE 25
453#define CMD_STATS_AEC_BUF_RELEASE 26
454#define CMD_STATS_AF_BUF_RELEASE 27
455#define CMD_STATS_AWB_BUF_RELEASE 28
456#define CMD_STATS_RS_BUF_RELEASE 29
457#define CMD_STATS_CS_BUF_RELEASE 30
458#define CMD_STATS_IHIST_BUF_RELEASE 31
459#define CMD_STATS_SKIN_BUF_RELEASE 32
460
461#define UPDATE_STATS_INVALID 33
462#define CMD_AXI_CFG_SNAP_GEMINI 34
463#define CMD_AXI_CFG_SNAP 35
464#define CMD_AXI_CFG_PREVIEW 36
465#define CMD_AXI_CFG_VIDEO 37
466
467#define CMD_STATS_IHIST_ENABLE 38
468#define CMD_STATS_RS_ENABLE 39
469#define CMD_STATS_CS_ENABLE 40
470#define CMD_VPE 41
471#define CMD_AXI_CFG_VPE 42
472#define CMD_AXI_CFG_ZSL 43
473#define CMD_AXI_CFG_SNAP_VPE 44
474#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530475#define CMD_CONFIG_PING_ADDR 46
476#define CMD_CONFIG_PONG_ADDR 47
477#define CMD_CONFIG_FREE_BUF_ADDR 48
478#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
479#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530480#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700481#define CMD_VFE_PROCESS_IRQ 52
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700482
Nishant Pandit5dd54422012-06-26 22:52:44 +0530483#define CMD_AXI_CFG_PRIM BIT(8)
484#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
485#define CMD_AXI_CFG_SEC BIT(10)
486#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
487#define CMD_AXI_CFG_TERT1 BIT(12)
488#define CMD_AXI_CFG_TERT2 BIT(13)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800489
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700490#define CMD_AXI_START 0xE1
491#define CMD_AXI_STOP 0xE2
492
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700493/* vfe config command: config command(from config thread)*/
494struct msm_vfe_cfg_cmd {
495 int cmd_type;
496 uint16_t length;
497 void *value;
498};
499
500struct msm_vpe_cfg_cmd {
501 int cmd_type;
502 uint16_t length;
503 void *value;
504};
505
506#define MAX_CAMERA_ENABLE_NAME_LEN 32
507struct camera_enable_cmd {
508 char name[MAX_CAMERA_ENABLE_NAME_LEN];
509};
510
511#define MSM_PMEM_OUTPUT1 0
512#define MSM_PMEM_OUTPUT2 1
513#define MSM_PMEM_OUTPUT1_OUTPUT2 2
514#define MSM_PMEM_THUMBNAIL 3
515#define MSM_PMEM_MAINIMG 4
516#define MSM_PMEM_RAW_MAINIMG 5
517#define MSM_PMEM_AEC_AWB 6
518#define MSM_PMEM_AF 7
519#define MSM_PMEM_AEC 8
520#define MSM_PMEM_AWB 9
521#define MSM_PMEM_RS 10
522#define MSM_PMEM_CS 11
523#define MSM_PMEM_IHIST 12
524#define MSM_PMEM_SKIN 13
525#define MSM_PMEM_VIDEO 14
526#define MSM_PMEM_PREVIEW 15
527#define MSM_PMEM_VIDEO_VPE 16
528#define MSM_PMEM_C2D 17
529#define MSM_PMEM_MAINIMG_VPE 18
530#define MSM_PMEM_THUMBNAIL_VPE 19
531#define MSM_PMEM_MAX 20
532
533#define STAT_AEAW 0
534#define STAT_AEC 1
535#define STAT_AF 2
536#define STAT_AWB 3
537#define STAT_RS 4
538#define STAT_CS 5
539#define STAT_IHIST 6
540#define STAT_SKIN 7
541#define STAT_MAX 8
542
543#define FRAME_PREVIEW_OUTPUT1 0
544#define FRAME_PREVIEW_OUTPUT2 1
545#define FRAME_SNAPSHOT 2
546#define FRAME_THUMBNAIL 3
547#define FRAME_RAW_SNAPSHOT 4
548#define FRAME_MAX 5
549
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700550enum msm_stats_enum_type {
551 MSM_STATS_TYPE_AEC, /* legacy based AEC */
552 MSM_STATS_TYPE_AF, /* legacy based AF */
553 MSM_STATS_TYPE_AWB, /* legacy based AWB */
554 MSM_STATS_TYPE_RS, /* legacy based RS */
555 MSM_STATS_TYPE_CS, /* legacy based CS */
556 MSM_STATS_TYPE_IHIST, /* legacy based HIST */
557 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */
558 MSM_STATS_TYPE_BG, /* Bayer Grids */
559 MSM_STATS_TYPE_BF, /* Bayer Focus */
560 MSM_STATS_TYPE_BHIST, /* Bayer Hist */
561 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/
562 MSM_STATS_TYPE_MAX /* MAX */
563};
564
565struct msm_stats_buf_info {
566 int type; /* msm_stats_enum_type */
567 int fd;
568 void *vaddr;
569 uint32_t offset;
570 uint32_t len;
571 uint32_t y_off;
572 uint32_t cbcr_off;
573 uint32_t planar0_off;
574 uint32_t planar1_off;
575 uint32_t planar2_off;
576 uint8_t active;
577 int buf_idx;
578};
579
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700580struct msm_pmem_info {
581 int type;
582 int fd;
583 void *vaddr;
584 uint32_t offset;
585 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700586 uint32_t y_off;
587 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530588 uint32_t planar0_off;
589 uint32_t planar1_off;
590 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700591 uint8_t active;
592};
593
594struct outputCfg {
595 uint32_t height;
596 uint32_t width;
597
598 uint32_t window_height_firstline;
599 uint32_t window_height_lastline;
600};
601
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800602#define VIDEO_NODE 0
603#define MCTL_NODE 1
604
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700605#define OUTPUT_1 0
606#define OUTPUT_2 1
607#define OUTPUT_1_AND_2 2 /* snapshot only */
608#define OUTPUT_1_AND_3 3 /* video */
609#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
610#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
611#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
612#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700613#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530614#define OUTPUT_VIDEO_ALL_CHNLS 9
615#define OUTPUT_ZSL_ALL_CHNLS 10
616#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700617
Nishant Pandit5dd54422012-06-26 22:52:44 +0530618#define OUTPUT_PRIM BIT(8)
619#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
620#define OUTPUT_SEC BIT(10)
621#define OUTPUT_SEC_ALL_CHNLS BIT(11)
622#define OUTPUT_TERT1 BIT(12)
623#define OUTPUT_TERT2 BIT(13)
624
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800625
626
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700627#define MSM_FRAME_PREV_1 0
628#define MSM_FRAME_PREV_2 1
629#define MSM_FRAME_ENC 2
630
Nishant Pandit5dd54422012-06-26 22:52:44 +0530631#define OUTPUT_TYPE_P BIT(0)
632#define OUTPUT_TYPE_T BIT(1)
633#define OUTPUT_TYPE_S BIT(2)
634#define OUTPUT_TYPE_V BIT(3)
635#define OUTPUT_TYPE_L BIT(4)
636#define OUTPUT_TYPE_ST_L BIT(5)
637#define OUTPUT_TYPE_ST_R BIT(6)
638#define OUTPUT_TYPE_ST_D BIT(7)
639#define OUTPUT_TYPE_R BIT(8)
640#define OUTPUT_TYPE_R1 BIT(9)
641
642
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700643
644struct fd_roi_info {
645 void *info;
646 int info_len;
647};
648
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700649struct msm_mem_map_info {
650 uint32_t cookie;
651 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700652 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700653};
654
Mingcheng Zhu49505502011-07-19 20:44:36 -0700655#define MSM_MEM_MMAP 0
656#define MSM_MEM_USERPTR 1
657#define MSM_PLANE_MAX 8
658#define MSM_PLANE_Y 0
659#define MSM_PLANE_UV 1
660
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700661struct msm_frame {
662 struct timespec ts;
663 int path;
664 int type;
665 unsigned long buffer;
666 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700667 uint32_t y_off;
668 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530669 uint32_t planar0_off;
670 uint32_t planar1_off;
671 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700672 int fd;
673
674 void *cropinfo;
675 int croplen;
676 uint32_t error_code;
677 struct fd_roi_info roi_info;
678 uint32_t frame_id;
679 int stcam_quality_ind;
680 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700681
682 struct ion_allocation_data ion_alloc;
683 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700684 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700685};
686
687enum msm_st_frame_packing {
688 SIDE_BY_SIDE_HALF,
689 SIDE_BY_SIDE_FULL,
690 TOP_DOWN_HALF,
691 TOP_DOWN_FULL,
692};
693
694struct msm_st_crop {
695 uint32_t in_w;
696 uint32_t in_h;
697 uint32_t out_w;
698 uint32_t out_h;
699};
700
701struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530702 uint32_t buf_p0_off;
703 uint32_t buf_p1_off;
704 uint32_t buf_p0_stride;
705 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700706 uint32_t pix_x_off;
707 uint32_t pix_y_off;
708 struct msm_st_crop stCropInfo;
709};
710
711struct msm_st_frame {
712 struct msm_frame buf_info;
713 int type;
714 enum msm_st_frame_packing packing;
715 struct msm_st_half L;
716 struct msm_st_half R;
717 int frame_id;
718};
719
720#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
721
722struct stats_buff {
723 unsigned long buff;
724 int fd;
725};
726
727struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700728 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700729 struct stats_buff aec;
730 struct stats_buff awb;
731 struct stats_buff af;
732 struct stats_buff ihist;
733 struct stats_buff rs;
734 struct stats_buff cs;
735 struct stats_buff skin;
736 int type;
737 uint32_t status_bits;
738 unsigned long buffer;
739 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800740 int length;
741 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700742 uint32_t frame_id;
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700743 int buf_idx;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700744};
745#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
746/* video capture mode in VIDIOC_S_PARM */
747#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
748 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
749/* extendedmode for video recording in VIDIOC_S_PARM */
750#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
751 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
752/* extendedmode for the full size main image in VIDIOC_S_PARM */
753#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
754/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
755#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
756 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
757#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
758 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Nishant Pandit5dd54422012-06-26 22:52:44 +0530759#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
760 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
761#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
762 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
763#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
764 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
765#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700766
767
768#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
769#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
770#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
771#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
772#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
773#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
774#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
775#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
776#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
777#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
778#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
779#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
780#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
781#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
782#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700783#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
Kiran Kumar H N90785902012-07-05 13:59:38 -0700784#define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700785#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800786#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
787#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700788
789/* camera operation mode for video recording - two frame output queues */
790#define MSM_V4L2_CAM_OP_DEFAULT 0
791/* camera operation mode for video recording - two frame output queues */
792#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
793/* camera operation mode for video recording - two frame output queues */
794#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
795/* camera operation mode for standard shapshot - two frame output queues */
796#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
797/* camera operation mode for zsl shapshot - three output queues */
798#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
799/* camera operation mode for raw snapshot - one frame output queue */
800#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800801/* camera operation mode for jpeg snapshot - one frame output queue */
802#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
803
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700804
805#define MSM_V4L2_VID_CAP_TYPE 0
806#define MSM_V4L2_STREAM_ON 1
807#define MSM_V4L2_STREAM_OFF 2
808#define MSM_V4L2_SNAPSHOT 3
809#define MSM_V4L2_QUERY_CTRL 4
810#define MSM_V4L2_GET_CTRL 5
811#define MSM_V4L2_SET_CTRL 6
812#define MSM_V4L2_QUERY 7
813#define MSM_V4L2_GET_CROP 8
814#define MSM_V4L2_SET_CROP 9
815#define MSM_V4L2_OPEN 10
816#define MSM_V4L2_CLOSE 11
817#define MSM_V4L2_SET_CTRL_CMD 12
818#define MSM_V4L2_EVT_SUB_MASK 13
819#define MSM_V4L2_MAX 14
820#define V4L2_CAMERA_EXIT 43
821
822struct crop_info {
823 void *info;
824 int len;
825};
826
827struct msm_postproc {
828 int ftnum;
829 struct msm_frame fthumnail;
830 int fmnum;
831 struct msm_frame fmain;
832};
833
834struct msm_snapshot_pp_status {
835 void *status;
836};
837
838#define CFG_SET_MODE 0
839#define CFG_SET_EFFECT 1
840#define CFG_START 2
841#define CFG_PWR_UP 3
842#define CFG_PWR_DOWN 4
843#define CFG_WRITE_EXPOSURE_GAIN 5
844#define CFG_SET_DEFAULT_FOCUS 6
845#define CFG_MOVE_FOCUS 7
846#define CFG_REGISTER_TO_REAL_GAIN 8
847#define CFG_REAL_TO_REGISTER_GAIN 9
848#define CFG_SET_FPS 10
849#define CFG_SET_PICT_FPS 11
850#define CFG_SET_BRIGHTNESS 12
851#define CFG_SET_CONTRAST 13
852#define CFG_SET_ZOOM 14
853#define CFG_SET_EXPOSURE_MODE 15
854#define CFG_SET_WB 16
855#define CFG_SET_ANTIBANDING 17
856#define CFG_SET_EXP_GAIN 18
857#define CFG_SET_PICT_EXP_GAIN 19
858#define CFG_SET_LENS_SHADING 20
859#define CFG_GET_PICT_FPS 21
860#define CFG_GET_PREV_L_PF 22
861#define CFG_GET_PREV_P_PL 23
862#define CFG_GET_PICT_L_PF 24
863#define CFG_GET_PICT_P_PL 25
864#define CFG_GET_AF_MAX_STEPS 26
865#define CFG_GET_PICT_MAX_EXP_LC 27
866#define CFG_SEND_WB_INFO 28
867#define CFG_SENSOR_INIT 29
868#define CFG_GET_3D_CALI_DATA 30
869#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700870#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700871#define CFG_GET_EEPROM_INFO 33
872#define CFG_GET_EEPROM_DATA 34
873#define CFG_SET_ACTUATOR_INFO 35
874#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530875/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700876#define CFG_SET_SATURATION 37
877#define CFG_SET_SHARPNESS 38
878#define CFG_SET_TOUCHAEC 39
879#define CFG_SET_AUTO_FOCUS 40
880#define CFG_SET_AUTOFLASH 41
881#define CFG_SET_EXPOSURE_COMPENSATION 42
882#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +0530883#define CFG_START_STREAM 44
884#define CFG_STOP_STREAM 45
885#define CFG_GET_CSI_PARAMS 46
886#define CFG_MAX 47
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700887
888
889#define MOVE_NEAR 0
890#define MOVE_FAR 1
891
892#define SENSOR_PREVIEW_MODE 0
893#define SENSOR_SNAPSHOT_MODE 1
894#define SENSOR_RAW_SNAPSHOT_MODE 2
895#define SENSOR_HFR_60FPS_MODE 3
896#define SENSOR_HFR_90FPS_MODE 4
897#define SENSOR_HFR_120FPS_MODE 5
898
899#define SENSOR_QTR_SIZE 0
900#define SENSOR_FULL_SIZE 1
901#define SENSOR_QVGA_SIZE 2
902#define SENSOR_INVALID_SIZE 3
903
904#define CAMERA_EFFECT_OFF 0
905#define CAMERA_EFFECT_MONO 1
906#define CAMERA_EFFECT_NEGATIVE 2
907#define CAMERA_EFFECT_SOLARIZE 3
908#define CAMERA_EFFECT_SEPIA 4
909#define CAMERA_EFFECT_POSTERIZE 5
910#define CAMERA_EFFECT_WHITEBOARD 6
911#define CAMERA_EFFECT_BLACKBOARD 7
912#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -0700913#define CAMERA_EFFECT_EMBOSS 9
914#define CAMERA_EFFECT_SKETCH 10
915#define CAMERA_EFFECT_NEON 11
916#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700917
Taniya Dasa9bdb012011-09-08 11:21:33 +0530918/* QRD */
919#define CAMERA_EFFECT_BW 10
920#define CAMERA_EFFECT_BLUISH 12
921#define CAMERA_EFFECT_REDDISH 13
922#define CAMERA_EFFECT_GREENISH 14
923
924/* QRD */
925#define CAMERA_ANTIBANDING_OFF 0
926#define CAMERA_ANTIBANDING_50HZ 2
927#define CAMERA_ANTIBANDING_60HZ 1
928#define CAMERA_ANTIBANDING_AUTO 3
929
930#define CAMERA_CONTRAST_LV0 0
931#define CAMERA_CONTRAST_LV1 1
932#define CAMERA_CONTRAST_LV2 2
933#define CAMERA_CONTRAST_LV3 3
934#define CAMERA_CONTRAST_LV4 4
935#define CAMERA_CONTRAST_LV5 5
936#define CAMERA_CONTRAST_LV6 6
937#define CAMERA_CONTRAST_LV7 7
938#define CAMERA_CONTRAST_LV8 8
939#define CAMERA_CONTRAST_LV9 9
940
941#define CAMERA_BRIGHTNESS_LV0 0
942#define CAMERA_BRIGHTNESS_LV1 1
943#define CAMERA_BRIGHTNESS_LV2 2
944#define CAMERA_BRIGHTNESS_LV3 3
945#define CAMERA_BRIGHTNESS_LV4 4
946#define CAMERA_BRIGHTNESS_LV5 5
947#define CAMERA_BRIGHTNESS_LV6 6
948#define CAMERA_BRIGHTNESS_LV7 7
949#define CAMERA_BRIGHTNESS_LV8 8
950
951
952#define CAMERA_SATURATION_LV0 0
953#define CAMERA_SATURATION_LV1 1
954#define CAMERA_SATURATION_LV2 2
955#define CAMERA_SATURATION_LV3 3
956#define CAMERA_SATURATION_LV4 4
957#define CAMERA_SATURATION_LV5 5
958#define CAMERA_SATURATION_LV6 6
959#define CAMERA_SATURATION_LV7 7
960#define CAMERA_SATURATION_LV8 8
961
962#define CAMERA_SHARPNESS_LV0 0
963#define CAMERA_SHARPNESS_LV1 3
964#define CAMERA_SHARPNESS_LV2 6
965#define CAMERA_SHARPNESS_LV3 9
966#define CAMERA_SHARPNESS_LV4 12
967#define CAMERA_SHARPNESS_LV5 15
968#define CAMERA_SHARPNESS_LV6 18
969#define CAMERA_SHARPNESS_LV7 21
970#define CAMERA_SHARPNESS_LV8 24
971#define CAMERA_SHARPNESS_LV9 27
972#define CAMERA_SHARPNESS_LV10 30
973
974#define CAMERA_SETAE_AVERAGE 0
975#define CAMERA_SETAE_CENWEIGHT 1
976
Taniya Dasa9bdb012011-09-08 11:21:33 +0530977#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
978#define CAMERA_WB_CUSTOM 2
979#define CAMERA_WB_INCANDESCENT 3
980#define CAMERA_WB_FLUORESCENT 4
981#define CAMERA_WB_DAYLIGHT 5
982#define CAMERA_WB_CLOUDY_DAYLIGHT 6
983#define CAMERA_WB_TWILIGHT 7
984#define CAMERA_WB_SHADE 8
985
986#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
987#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
988#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
989#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
990#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
991
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800992enum msm_v4l2_saturation_level {
993 MSM_V4L2_SATURATION_L0,
994 MSM_V4L2_SATURATION_L1,
995 MSM_V4L2_SATURATION_L2,
996 MSM_V4L2_SATURATION_L3,
997 MSM_V4L2_SATURATION_L4,
998 MSM_V4L2_SATURATION_L5,
999 MSM_V4L2_SATURATION_L6,
1000 MSM_V4L2_SATURATION_L7,
1001 MSM_V4L2_SATURATION_L8,
1002 MSM_V4L2_SATURATION_L9,
1003 MSM_V4L2_SATURATION_L10,
1004};
1005
Suresh Vankadara212d9722012-05-30 15:51:20 +05301006enum msm_v4l2_contrast_level {
1007 MSM_V4L2_CONTRAST_L0,
1008 MSM_V4L2_CONTRAST_L1,
1009 MSM_V4L2_CONTRAST_L2,
1010 MSM_V4L2_CONTRAST_L3,
1011 MSM_V4L2_CONTRAST_L4,
1012 MSM_V4L2_CONTRAST_L5,
1013 MSM_V4L2_CONTRAST_L6,
1014 MSM_V4L2_CONTRAST_L7,
1015 MSM_V4L2_CONTRAST_L8,
1016 MSM_V4L2_CONTRAST_L9,
1017 MSM_V4L2_CONTRAST_L10,
1018};
1019
1020
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001021enum msm_v4l2_exposure_level {
1022 MSM_V4L2_EXPOSURE_N2,
1023 MSM_V4L2_EXPOSURE_N1,
1024 MSM_V4L2_EXPOSURE_D,
1025 MSM_V4L2_EXPOSURE_P1,
1026 MSM_V4L2_EXPOSURE_P2,
1027};
1028
1029enum msm_v4l2_sharpness_level {
1030 MSM_V4L2_SHARPNESS_L0,
1031 MSM_V4L2_SHARPNESS_L1,
1032 MSM_V4L2_SHARPNESS_L2,
1033 MSM_V4L2_SHARPNESS_L3,
1034 MSM_V4L2_SHARPNESS_L4,
1035 MSM_V4L2_SHARPNESS_L5,
1036 MSM_V4L2_SHARPNESS_L6,
1037};
1038
1039enum msm_v4l2_expo_metering_mode {
1040 MSM_V4L2_EXP_FRAME_AVERAGE,
1041 MSM_V4L2_EXP_CENTER_WEIGHTED,
1042 MSM_V4L2_EXP_SPOT_METERING,
1043};
1044
1045enum msm_v4l2_iso_mode {
1046 MSM_V4L2_ISO_AUTO = 0,
1047 MSM_V4L2_ISO_DEBLUR,
1048 MSM_V4L2_ISO_100,
1049 MSM_V4L2_ISO_200,
1050 MSM_V4L2_ISO_400,
1051 MSM_V4L2_ISO_800,
1052 MSM_V4L2_ISO_1600,
1053};
1054
1055enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +05301056 MSM_V4L2_WB_OFF,
1057 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001058 MSM_V4L2_WB_CUSTOM,
1059 MSM_V4L2_WB_INCANDESCENT,
1060 MSM_V4L2_WB_FLUORESCENT,
1061 MSM_V4L2_WB_DAYLIGHT,
1062 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301063};
1064
1065enum msm_v4l2_special_effect {
1066 MSM_V4L2_EFFECT_OFF,
1067 MSM_V4L2_EFFECT_MONO,
1068 MSM_V4L2_EFFECT_NEGATIVE,
1069 MSM_V4L2_EFFECT_SOLARIZE,
1070 MSM_V4L2_EFFECT_SEPIA,
1071 MSM_V4L2_EFFECT_POSTERAIZE,
1072 MSM_V4L2_EFFECT_WHITEBOARD,
1073 MSM_V4L2_EFFECT_BLACKBOARD,
1074 MSM_V4L2_EFFECT_AQUA,
1075 MSM_V4L2_EFFECT_EMBOSS,
1076 MSM_V4L2_EFFECT_SKETCH,
1077 MSM_V4L2_EFFECT_NEON,
1078 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001079};
1080
1081enum msm_v4l2_power_line_frequency {
1082 MSM_V4L2_POWER_LINE_OFF,
1083 MSM_V4L2_POWER_LINE_60HZ,
1084 MSM_V4L2_POWER_LINE_50HZ,
1085 MSM_V4L2_POWER_LINE_AUTO,
1086};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301087
Su Liu6c3bb322012-02-14 02:15:05 +05301088#define CAMERA_ISO_TYPE_AUTO 0
1089#define CAMEAR_ISO_TYPE_HJR 1
1090#define CAMEAR_ISO_TYPE_100 2
1091#define CAMERA_ISO_TYPE_200 3
1092#define CAMERA_ISO_TYPE_400 4
1093#define CAMEAR_ISO_TYPE_800 5
1094#define CAMERA_ISO_TYPE_1600 6
1095
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001096struct sensor_pict_fps {
1097 uint16_t prevfps;
1098 uint16_t pictfps;
1099};
1100
1101struct exp_gain_cfg {
1102 uint16_t gain;
1103 uint32_t line;
1104};
1105
1106struct focus_cfg {
1107 int32_t steps;
1108 int dir;
1109};
1110
1111struct fps_cfg {
1112 uint16_t f_mult;
1113 uint16_t fps_div;
1114 uint32_t pict_fps_div;
1115};
1116struct wb_info_cfg {
1117 uint16_t red_gain;
1118 uint16_t green_gain;
1119 uint16_t blue_gain;
1120};
1121struct sensor_3d_exp_cfg {
1122 uint16_t gain;
1123 uint32_t line;
1124 uint16_t r_gain;
1125 uint16_t b_gain;
1126 uint16_t gr_gain;
1127 uint16_t gb_gain;
1128 uint16_t gain_adjust;
1129};
1130struct sensor_3d_cali_data_t{
1131 unsigned char left_p_matrix[3][4][8];
1132 unsigned char right_p_matrix[3][4][8];
1133 unsigned char square_len[8];
1134 unsigned char focal_len[8];
1135 unsigned char pixel_pitch[8];
1136 uint16_t left_r;
1137 uint16_t left_b;
1138 uint16_t left_gb;
1139 uint16_t left_af_far;
1140 uint16_t left_af_mid;
1141 uint16_t left_af_short;
1142 uint16_t left_af_5um;
1143 uint16_t left_af_50up;
1144 uint16_t left_af_50down;
1145 uint16_t right_r;
1146 uint16_t right_b;
1147 uint16_t right_gb;
1148 uint16_t right_af_far;
1149 uint16_t right_af_mid;
1150 uint16_t right_af_short;
1151 uint16_t right_af_5um;
1152 uint16_t right_af_50up;
1153 uint16_t right_af_50down;
1154};
1155struct sensor_init_cfg {
1156 uint8_t prev_res;
1157 uint8_t pict_res;
1158};
1159
1160struct sensor_calib_data {
1161 /* Color Related Measurements */
1162 uint16_t r_over_g;
1163 uint16_t b_over_g;
1164 uint16_t gr_over_gb;
1165
1166 /* Lens Related Measurements */
1167 uint16_t macro_2_inf;
1168 uint16_t inf_2_macro;
1169 uint16_t stroke_amt;
1170 uint16_t af_pos_1m;
1171 uint16_t af_pos_inf;
1172};
1173
Kevin Chana980f392011-08-01 20:55:00 -07001174enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001175 MSM_SENSOR_RES_FULL,
1176 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001177 MSM_SENSOR_RES_2,
1178 MSM_SENSOR_RES_3,
1179 MSM_SENSOR_RES_4,
1180 MSM_SENSOR_RES_5,
1181 MSM_SENSOR_RES_6,
1182 MSM_SENSOR_RES_7,
1183 MSM_SENSOR_INVALID_RES,
1184};
1185
1186struct msm_sensor_output_info_t {
1187 uint16_t x_output;
1188 uint16_t y_output;
1189 uint16_t line_length_pclk;
1190 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001191 uint32_t vt_pixel_clk;
1192 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001193 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001194};
1195
1196struct sensor_output_info_t {
1197 struct msm_sensor_output_info_t *output_info;
1198 uint16_t num_info;
1199};
1200
Taniya Dasa9bdb012011-09-08 11:21:33 +05301201struct mirror_flip {
1202 int32_t x_mirror;
1203 int32_t y_flip;
1204};
1205
1206struct cord {
1207 uint32_t x;
1208 uint32_t y;
1209};
1210
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001211struct msm_eeprom_data_t {
1212 void *eeprom_data;
1213 uint16_t index;
1214};
1215
Nishant Panditb2157c92012-04-25 01:09:28 +05301216struct msm_camera_csid_vc_cfg {
1217 uint8_t cid;
1218 uint8_t dt;
1219 uint8_t decode_format;
1220};
1221
1222struct csi_lane_params_t {
1223 uint8_t csi_lane_assign;
1224 uint8_t csi_lane_mask;
1225 uint8_t csi_if;
1226 uint8_t csid_core;
1227 uint32_t csid_version;
1228};
1229
1230#define CSI_EMBED_DATA 0x12
1231#define CSI_RESERVED_DATA_0 0x13
1232#define CSI_YUV422_8 0x1E
1233#define CSI_RAW8 0x2A
1234#define CSI_RAW10 0x2B
1235#define CSI_RAW12 0x2C
1236
1237#define CSI_DECODE_6BIT 0
1238#define CSI_DECODE_8BIT 1
1239#define CSI_DECODE_10BIT 2
1240#define CSI_DECODE_DPCM_10_8_10 5
1241
1242#define ISPIF_STREAM(intf, action) (((intf)<<ISPIF_S_STREAM_SHIFT)+(action))
1243#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1244#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1245#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1246#define ISPIF_S_STREAM_SHIFT 4
1247
1248
1249#define PIX_0 (0x01 << 0)
1250#define RDI_0 (0x01 << 1)
1251#define PIX_1 (0x01 << 2)
1252#define RDI_1 (0x01 << 3)
1253#define PIX_2 (0x01 << 4)
1254#define RDI_2 (0x01 << 5)
1255
1256
1257enum msm_ispif_intftype {
1258 PIX0,
1259 RDI0,
1260 PIX1,
1261 RDI1,
1262 PIX2,
1263 RDI2,
1264 INTF_MAX,
1265};
1266
1267enum msm_ispif_vc {
1268 VC0,
1269 VC1,
1270 VC2,
1271 VC3,
1272};
1273
1274enum msm_ispif_cid {
1275 CID0,
1276 CID1,
1277 CID2,
1278 CID3,
1279 CID4,
1280 CID5,
1281 CID6,
1282 CID7,
1283 CID8,
1284 CID9,
1285 CID10,
1286 CID11,
1287 CID12,
1288 CID13,
1289 CID14,
1290 CID15,
1291};
1292
1293struct msm_ispif_params {
1294 uint8_t intftype;
1295 uint16_t cid_mask;
1296 uint8_t csid;
1297};
1298
1299struct msm_ispif_params_list {
1300 uint32_t len;
1301 struct msm_ispif_params params[4];
1302};
1303
1304enum ispif_cfg_type_t {
1305 ISPIF_INIT,
1306 ISPIF_SET_CFG,
1307 ISPIF_SET_ON_FRAME_BOUNDARY,
1308 ISPIF_SET_OFF_FRAME_BOUNDARY,
1309 ISPIF_SET_OFF_IMMEDIATELY,
1310 ISPIF_RELEASE,
1311};
1312
1313struct ispif_cfg_data {
1314 enum ispif_cfg_type_t cfgtype;
1315 union {
1316 uint32_t csid_version;
1317 int cmd;
1318 struct msm_ispif_params_list ispif_params;
1319 } cfg;
1320};
1321
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001322struct sensor_cfg_data {
1323 int cfgtype;
1324 int mode;
1325 int rs;
1326 uint8_t max_steps;
1327
1328 union {
1329 int8_t effect;
1330 uint8_t lens_shading;
1331 uint16_t prevl_pf;
1332 uint16_t prevp_pl;
1333 uint16_t pictl_pf;
1334 uint16_t pictp_pl;
1335 uint32_t pict_max_exp_lc;
1336 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301337 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001338 struct sensor_init_cfg init_info;
1339 struct sensor_pict_fps gfps;
1340 struct exp_gain_cfg exp_gain;
1341 struct focus_cfg focus;
1342 struct fps_cfg fps;
1343 struct wb_info_cfg wb_info;
1344 struct sensor_3d_exp_cfg sensor_3d_exp;
1345 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001346 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001347 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301348 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301349 /* QRD */
1350 uint16_t antibanding;
1351 uint8_t contrast;
1352 uint8_t saturation;
1353 uint8_t sharpness;
1354 int8_t brightness;
1355 int ae_mode;
1356 uint8_t wb_val;
1357 int8_t exp_compensation;
1358 struct cord aec_cord;
1359 int is_autoflash;
1360 struct mirror_flip mirror_flip;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001361 } cfg;
1362};
1363
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001364struct damping_params_t {
1365 uint32_t damping_step;
1366 uint32_t damping_delay;
1367 uint32_t hw_params;
1368};
1369
1370enum actuator_type {
1371 ACTUATOR_VCM,
1372 ACTUATOR_PIEZO,
1373};
1374
1375enum msm_actuator_data_type {
1376 MSM_ACTUATOR_BYTE_DATA = 1,
1377 MSM_ACTUATOR_WORD_DATA,
1378};
1379
1380enum msm_actuator_addr_type {
1381 MSM_ACTUATOR_BYTE_ADDR = 1,
1382 MSM_ACTUATOR_WORD_ADDR,
1383};
1384
1385enum msm_actuator_write_type {
1386 MSM_ACTUATOR_WRITE_HW_DAMP,
1387 MSM_ACTUATOR_WRITE_DAC,
1388};
1389
1390struct msm_actuator_reg_params_t {
1391 enum msm_actuator_write_type reg_write_type;
1392 uint32_t hw_mask;
1393 uint16_t reg_addr;
1394 uint16_t hw_shift;
1395 uint16_t data_shift;
1396};
1397
1398struct reg_settings_t {
1399 uint16_t reg_addr;
1400 uint16_t reg_data;
1401};
1402
1403struct region_params_t {
1404 /* [0] = ForwardDirection Macro boundary
1405 [1] = ReverseDirection Inf boundary
1406 */
1407 uint16_t step_bound[2];
1408 uint16_t code_per_step;
1409};
1410
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001411struct msm_actuator_move_params_t {
1412 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001413 int8_t sign_dir;
1414 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001415 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001416 struct damping_params_t *ringing_params;
1417};
1418
1419struct msm_actuator_tuning_params_t {
1420 int16_t initial_code;
1421 uint16_t pwd_step;
1422 uint16_t region_size;
1423 uint32_t total_steps;
1424 struct region_params_t *region_params;
1425};
1426
1427struct msm_actuator_params_t {
1428 enum actuator_type act_type;
1429 uint8_t reg_tbl_size;
1430 uint16_t data_size;
1431 uint16_t init_setting_size;
1432 uint32_t i2c_addr;
1433 enum msm_actuator_addr_type i2c_addr_type;
1434 enum msm_actuator_data_type i2c_data_type;
1435 struct msm_actuator_reg_params_t *reg_tbl_params;
1436 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001437};
1438
1439struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001440 struct msm_actuator_params_t actuator_params;
1441 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001442};
1443
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001444struct msm_actuator_get_info_t {
1445 uint32_t focal_length_num;
1446 uint32_t focal_length_den;
1447 uint32_t f_number_num;
1448 uint32_t f_number_den;
1449 uint32_t f_pix_num;
1450 uint32_t f_pix_den;
1451 uint32_t total_f_dist_num;
1452 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001453 uint32_t hor_view_angle_num;
1454 uint32_t hor_view_angle_den;
1455 uint32_t ver_view_angle_num;
1456 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001457};
1458
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001459enum af_camera_name {
1460 ACTUATOR_MAIN_CAM_0,
1461 ACTUATOR_MAIN_CAM_1,
1462 ACTUATOR_MAIN_CAM_2,
1463 ACTUATOR_MAIN_CAM_3,
1464 ACTUATOR_MAIN_CAM_4,
1465 ACTUATOR_MAIN_CAM_5,
1466 ACTUATOR_WEB_CAM_0,
1467 ACTUATOR_WEB_CAM_1,
1468 ACTUATOR_WEB_CAM_2,
1469};
1470
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001471struct msm_actuator_cfg_data {
1472 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001473 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001474 union {
1475 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001476 struct msm_actuator_set_info_t set_info;
1477 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001478 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001479 } cfg;
1480};
1481
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001482struct msm_eeprom_support {
1483 uint16_t is_supported;
1484 uint16_t size;
1485 uint16_t index;
1486 uint16_t qvalue;
1487};
1488
1489struct msm_calib_wb {
1490 uint16_t r_over_g;
1491 uint16_t b_over_g;
1492 uint16_t gr_over_gb;
1493};
1494
1495struct msm_calib_af {
1496 uint16_t macro_dac;
1497 uint16_t inf_dac;
1498 uint16_t start_dac;
1499};
1500
1501struct msm_calib_lsc {
1502 uint16_t r_gain[221];
1503 uint16_t b_gain[221];
1504 uint16_t gr_gain[221];
1505 uint16_t gb_gain[221];
1506};
1507
1508struct pixel_t {
1509 int x;
1510 int y;
1511};
1512
1513struct msm_calib_dpc {
1514 uint16_t validcount;
1515 struct pixel_t snapshot_coord[128];
1516 struct pixel_t preview_coord[128];
1517 struct pixel_t video_coord[128];
1518};
1519
1520struct msm_camera_eeprom_info_t {
1521 struct msm_eeprom_support af;
1522 struct msm_eeprom_support wb;
1523 struct msm_eeprom_support lsc;
1524 struct msm_eeprom_support dpc;
1525};
1526
1527struct msm_eeprom_cfg_data {
1528 int cfgtype;
1529 uint8_t is_eeprom_supported;
1530 union {
1531 struct msm_eeprom_data_t get_data;
1532 struct msm_camera_eeprom_info_t get_info;
1533 } cfg;
1534};
1535
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001536struct sensor_large_data {
1537 int cfgtype;
1538 union {
1539 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1540 } data;
1541};
1542
1543enum sensor_type_t {
1544 BAYER,
1545 YUV,
1546 JPEG_SOC,
1547};
1548
1549enum flash_type {
1550 LED_FLASH,
1551 STROBE_FLASH,
1552};
1553
1554enum strobe_flash_ctrl_type {
1555 STROBE_FLASH_CTRL_INIT,
1556 STROBE_FLASH_CTRL_CHARGE,
1557 STROBE_FLASH_CTRL_RELEASE
1558};
1559
1560struct strobe_flash_ctrl_data {
1561 enum strobe_flash_ctrl_type type;
1562 int charge_en;
1563};
1564
1565struct msm_camera_info {
1566 int num_cameras;
1567 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1568 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1569 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1570 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1571 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001572};
1573
1574struct msm_cam_config_dev_info {
1575 int num_config_nodes;
1576 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001577 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001578};
1579
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001580struct msm_mctl_node_info {
1581 int num_mctl_nodes;
1582 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1583};
1584
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001585struct flash_ctrl_data {
1586 int flashtype;
1587 union {
1588 int led_state;
1589 struct strobe_flash_ctrl_data strobe_ctrl;
1590 } ctrl_data;
1591};
1592
1593#define GET_NAME 0
1594#define GET_PREVIEW_LINE_PER_FRAME 1
1595#define GET_PREVIEW_PIXELS_PER_LINE 2
1596#define GET_SNAPSHOT_LINE_PER_FRAME 3
1597#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1598#define GET_SNAPSHOT_FPS 5
1599#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1600
1601struct msm_camsensor_info {
1602 char name[MAX_SENSOR_NAME];
1603 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001604 uint8_t strobe_flash_enabled;
1605 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301606 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001607 int8_t total_steps;
1608 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001609 enum flash_type flashtype;
1610 enum sensor_type_t sensor_type;
1611 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1612 uint32_t camera_type; /* msm_camera_type */
1613 int mount_angle;
1614 uint32_t max_width;
1615 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001616};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001617
1618#define V4L2_SINGLE_PLANE 0
1619#define V4L2_MULTI_PLANE_Y 0
1620#define V4L2_MULTI_PLANE_CBCR 1
1621#define V4L2_MULTI_PLANE_CB 1
1622#define V4L2_MULTI_PLANE_CR 2
1623
1624struct plane_data {
1625 int plane_id;
1626 uint32_t offset;
1627 unsigned long size;
1628};
1629
1630struct img_plane_info {
1631 uint32_t width;
1632 uint32_t height;
1633 uint32_t pixelformat;
1634 uint8_t buffer_type; /*Single/Multi planar*/
1635 uint8_t output_port;
1636 uint32_t ext_mode;
1637 uint8_t num_planes;
1638 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001639 uint32_t sp_y_offset;
Kiran Kumar H N90785902012-07-05 13:59:38 -07001640 uint32_t inst_handle;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001641};
1642
Kevin Chan210061f2012-02-14 20:56:16 -08001643#define QCAMERA_NAME "qcamera"
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001644#define QCAMERA_SERVER_NAME "qcamera_server"
Kevin Chan210061f2012-02-14 20:56:16 -08001645#define QCAMERA_DEVICE_GROUP_ID 1
1646#define QCAMERA_VNODE_GROUP_ID 2
1647
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001648enum msm_cam_subdev_type {
1649 CSIPHY_DEV,
1650 CSID_DEV,
1651 CSIC_DEV,
1652 ISPIF_DEV,
1653 VFE_DEV,
1654 AXI_DEV,
1655 VPE_DEV,
1656 SENSOR_DEV,
1657 ACTUATOR_DEV,
1658 EEPROM_DEV,
1659 GESTURE_DEV,
1660 IRQ_ROUTER_DEV,
1661 CPP_DEV,
1662};
1663
1664struct msm_mctl_set_sdev_data {
1665 uint32_t revision;
1666 enum msm_cam_subdev_type sdev_type;
1667};
1668
Kevin Chan94b4c832012-03-02 21:27:16 -08001669#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001670 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001671
1672#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001673 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001674
1675#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001676 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001677
1678#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07001679 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001680
1681#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07001682 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001683
Sunid Wilson4584b5f2012-04-13 12:48:25 -07001684#define MSM_CAM_IOCTL_SEND_EVENT \
1685 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1686
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07001687#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1688 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1689
Kevin Chan41a38702012-06-06 22:25:41 -07001690#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1691 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1692
Kiran Kumar H N90785902012-07-05 13:59:38 -07001693#define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \
1694 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
1695
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001696#define VIDIOC_MSM_VPE_INIT \
1697 _IO('V', BASE_VIDIOC_PRIVATE + 15)
1698
1699#define VIDIOC_MSM_VPE_RELEASE \
1700 _IO('V', BASE_VIDIOC_PRIVATE + 16)
1701
1702#define VIDIOC_MSM_VPE_CFG \
1703 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
1704
1705#define VIDIOC_MSM_AXI_INIT \
1706 _IO('V', BASE_VIDIOC_PRIVATE + 18)
1707
1708#define VIDIOC_MSM_AXI_RELEASE \
1709 _IO('V', BASE_VIDIOC_PRIVATE + 19)
1710
1711#define VIDIOC_MSM_AXI_CFG \
1712 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
1713
1714#define VIDIOC_MSM_AXI_IRQ \
1715 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
1716
1717#define VIDIOC_MSM_AXI_BUF_CFG \
1718 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
1719
1720#define VIDIOC_MSM_VFE_INIT \
1721 _IO('V', BASE_VIDIOC_PRIVATE + 22)
1722
1723#define VIDIOC_MSM_VFE_RELEASE \
1724 _IO('V', BASE_VIDIOC_PRIVATE + 23)
1725
Kevin Chan94b4c832012-03-02 21:27:16 -08001726struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07001727 uint32_t id;
Kevin Chan94b4c832012-03-02 21:27:16 -08001728 void __user *ioctl_ptr;
Kevin Chan41a38702012-06-06 22:25:41 -07001729 uint32_t len;
Kevin Chan94b4c832012-03-02 21:27:16 -08001730};
1731
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07001732enum msm_camss_irq_idx {
1733 CAMERA_SS_IRQ_0,
1734 CAMERA_SS_IRQ_1,
1735 CAMERA_SS_IRQ_2,
1736 CAMERA_SS_IRQ_3,
1737 CAMERA_SS_IRQ_4,
1738 CAMERA_SS_IRQ_5,
1739 CAMERA_SS_IRQ_6,
1740 CAMERA_SS_IRQ_7,
1741 CAMERA_SS_IRQ_8,
1742 CAMERA_SS_IRQ_9,
1743 CAMERA_SS_IRQ_10,
1744 CAMERA_SS_IRQ_11,
1745 CAMERA_SS_IRQ_12,
1746 CAMERA_SS_IRQ_MAX
1747};
1748
1749enum msm_cam_hw_idx {
1750 MSM_CAM_HW_MICRO,
1751 MSM_CAM_HW_CCI,
1752 MSM_CAM_HW_CSI0,
1753 MSM_CAM_HW_CSI1,
1754 MSM_CAM_HW_CSI2,
1755 MSM_CAM_HW_CSI3,
1756 MSM_CAM_HW_ISPIF,
1757 MSM_CAM_HW_CPP,
1758 MSM_CAM_HW_VFE0,
1759 MSM_CAM_HW_VFE1,
1760 MSM_CAM_HW_JPEG0,
1761 MSM_CAM_HW_JPEG1,
1762 MSM_CAM_HW_JPEG2,
1763 MSM_CAM_HW_MAX
1764};
1765
1766struct msm_camera_irq_cfg {
1767 /* Bit mask of all the camera hardwares that needs to
1768 * be composited into a single IRQ to the MSM.
1769 * Current usage: (may be updated based on hw changes)
1770 * Bits 31:13 - Reserved.
1771 * Bits 12:0
1772 * 12 - MSM_CAM_HW_JPEG2
1773 * 11 - MSM_CAM_HW_JPEG1
1774 * 10 - MSM_CAM_HW_JPEG0
1775 * 9 - MSM_CAM_HW_VFE1
1776 * 8 - MSM_CAM_HW_VFE0
1777 * 7 - MSM_CAM_HW_CPP
1778 * 6 - MSM_CAM_HW_ISPIF
1779 * 5 - MSM_CAM_HW_CSI3
1780 * 4 - MSM_CAM_HW_CSI2
1781 * 3 - MSM_CAM_HW_CSI1
1782 * 2 - MSM_CAM_HW_CSI0
1783 * 1 - MSM_CAM_HW_CCI
1784 * 0 - MSM_CAM_HW_MICRO
1785 */
1786 uint32_t cam_hw_mask;
1787 uint8_t irq_idx;
1788 uint8_t num_hwcore;
1789};
1790
1791#define MSM_IRQROUTER_CFG_COMPIRQ \
1792 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
1793
Kevin Chan73ec7282012-06-07 01:32:00 -07001794#define MAX_NUM_CPP_STRIPS 8
1795
1796enum msm_cpp_frame_type {
1797 MSM_CPP_OFFLINE_FRAME,
1798 MSM_CPP_REALTIME_FRAME,
1799};
1800
1801struct msm_cpp_frame_strip_info {
1802 int scale_v_en;
1803 int scale_h_en;
1804
1805 int upscale_v_en;
1806 int upscale_h_en;
1807
1808 int src_start_x;
1809 int src_end_x;
1810 int src_start_y;
1811 int src_end_y;
1812
1813 /* Padding is required for upscaler because it does not
1814 * pad internally like other blocks, also needed for rotation
1815 * rotation expects all the blocks in the stripe to be the same size
1816 * Padding is done such that all the extra padded pixels
1817 * are on the right and bottom
1818 */
1819 int pad_bottom;
1820 int pad_top;
1821 int pad_right;
1822 int pad_left;
1823
1824 int v_init_phase;
1825 int h_init_phase;
1826 int h_phase_step;
1827 int v_phase_step;
1828
1829 int prescale_crop_width_first_pixel;
1830 int prescale_crop_width_last_pixel;
1831 int prescale_crop_height_first_line;
1832 int prescale_crop_height_last_line;
1833
1834 int postscale_crop_height_first_line;
1835 int postscale_crop_height_last_line;
1836 int postscale_crop_width_first_pixel;
1837 int postscale_crop_width_last_pixel;
1838
1839 int dst_start_x;
1840 int dst_end_x;
1841 int dst_start_y;
1842 int dst_end_y;
1843
1844 int bytes_per_pixel;
1845 unsigned int source_address;
1846 unsigned int destination_address;
1847 unsigned int src_stride;
1848 unsigned int dst_stride;
1849 int rotate_270;
1850 int horizontal_flip;
1851 int vertical_flip;
1852 int scale_output_width;
1853 int scale_output_height;
1854};
1855
1856struct msm_cpp_frame_info_t {
1857 int32_t frame_id;
1858 uint32_t inst_id;
1859 uint32_t client_id;
1860 enum msm_cpp_frame_type frame_type;
1861 uint32_t num_strips;
1862 struct msm_cpp_frame_strip_info *strip_info;
1863};
1864
1865#define VIDIOC_MSM_CPP_CFG \
1866 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
1867
1868#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
1869 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
1870
1871#define VIDIOC_MSM_CPP_GET_INST_INFO \
1872 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
1873
1874#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
1875
Kiran Kumar H N90785902012-07-05 13:59:38 -07001876/* Instance Handle - inst_handle
1877 * Data bundle containing the information about where
1878 * to get a buffer for a particular camera instance.
1879 * This is a bitmask containing the following data:
1880 * Buffer Handle Bitmask:
1881 * ------------------------------------
1882 * Bits : Purpose
1883 * ------------------------------------
1884 * 31 - 24 : Reserved.
1885 * 23 : is Image mode valid?
1886 * 22 - 16 : Image mode.
1887 * 15 : is MCTL PP inst idx valid?
1888 * 14 - 8 : MCTL PP inst idx.
1889 * 7 : is Video inst idx valid?
1890 * 6 - 0 : Video inst idx.
1891 */
1892#define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF)
1893#define SET_IMG_MODE(handle, data) \
1894 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16)))
1895#define GET_IMG_MODE(handle) \
1896 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF)
1897
1898#define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF)
1899#define SET_MCTLPP_INST_IDX(handle, data) \
1900 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8)))
1901#define GET_MCTLPP_INST_IDX(handle) \
1902 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF)
1903
1904#define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00)
1905#define GET_VIDEO_INST_IDX(handle) \
1906 ((handle & 0x80) ? (handle & 0x7F) : 0xFF)
1907#define SET_VIDEO_INST_IDX(handle, data) \
1908 (handle |= (0x1 << 7) | (data & 0x7F))
1909
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001910#endif /* __LINUX_MSM_CAMERA_H */