blob: 1794cc3b0f1836583fec297ee484c554fdefffcd [file] [log] [blame]
Russell Kinge8ce0eb2011-08-26 20:28:52 +01001#include <linux/init.h>
2
Will Deacone6eadc62011-11-15 11:11:19 +00003#include <asm/idmap.h>
Russell Kinge8ce0eb2011-08-26 20:28:52 +01004#include <asm/pgalloc.h>
5#include <asm/pgtable.h>
6#include <asm/memory.h>
7#include <asm/suspend.h>
8#include <asm/tlbflush.h>
9
Russell Kingabda1bd2011-09-01 11:52:33 +010010extern int __cpu_suspend(unsigned long, int (*)(unsigned long));
Russell King62b2d072011-08-31 23:26:18 +010011extern void cpu_resume_mmu(void);
Russell Kinge8ce0eb2011-08-26 20:28:52 +010012
13/*
Russell Kingabda1bd2011-09-01 11:52:33 +010014 * This is called by __cpu_suspend() to save the state, and do whatever
15 * flushing is required to ensure that when the CPU goes to sleep we have
16 * the necessary data available when the caches are not searched.
17 */
18void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
19{
20 *save_ptr = virt_to_phys(ptr);
21
22 /* This must correspond to the LDM in cpu_resume() assembly */
Will Deacone6eadc62011-11-15 11:11:19 +000023 *ptr++ = virt_to_phys(idmap_pgd);
Russell Kingabda1bd2011-09-01 11:52:33 +010024 *ptr++ = sp;
25 *ptr++ = virt_to_phys(cpu_do_resume);
26
27 cpu_do_suspend(ptr);
28
29 flush_cache_all();
Russell King8e6f83b2011-09-01 11:57:59 +010030 outer_clean_range(*save_ptr, *save_ptr + ptrsz);
31 outer_clean_range(virt_to_phys(save_ptr),
32 virt_to_phys(save_ptr) + sizeof(*save_ptr));
Russell Kingabda1bd2011-09-01 11:52:33 +010033}
34
35/*
Russell Kinge8ce0eb2011-08-26 20:28:52 +010036 * Hide the first two arguments to __cpu_suspend - these are an implementation
37 * detail which platform code shouldn't have to know about.
38 */
39int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
40{
41 struct mm_struct *mm = current->active_mm;
42 int ret;
43
Will Deacone6eadc62011-11-15 11:11:19 +000044 if (!idmap_pgd)
Russell Kinge8ce0eb2011-08-26 20:28:52 +010045 return -EINVAL;
46
47 /*
Russell Kingde8e71c2011-08-27 22:39:09 +010048 * Provide a temporary page table with an identity mapping for
49 * the MMU-enable code, required for resuming. On successful
50 * resume (indicated by a zero return code), we need to switch
51 * back to the correct page tables.
Russell Kinge8ce0eb2011-08-26 20:28:52 +010052 */
Russell Kingabda1bd2011-09-01 11:52:33 +010053 ret = __cpu_suspend(arg, fn);
Russell Kingde8e71c2011-08-27 22:39:09 +010054 if (ret == 0) {
55 cpu_switch_mm(mm->pgd, mm);
56 local_flush_tlb_all();
57 }
Russell Kinge8ce0eb2011-08-26 20:28:52 +010058
59 return ret;
60}