| Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 1 | /* | 
|  | 2 | * arch/arch/mach-ixp4xx/fsg-pci.c | 
|  | 3 | * | 
|  | 4 | * FSG board-level PCI initialization | 
|  | 5 | * | 
|  | 6 | * Author: Rod Whitby <rod@whitby.id.au> | 
|  | 7 | * Maintainer: http://www.nslu2-linux.org/ | 
|  | 8 | * | 
|  | 9 | * based on ixdp425-pci.c: | 
|  | 10 | *	Copyright (C) 2002 Intel Corporation. | 
|  | 11 | *	Copyright (C) 2003-2004 MontaVista Software, Inc. | 
|  | 12 | * | 
|  | 13 | * This program is free software; you can redistribute it and/or modify | 
|  | 14 | * it under the terms of the GNU General Public License version 2 as | 
|  | 15 | * published by the Free Software Foundation. | 
|  | 16 | * | 
|  | 17 | */ | 
|  | 18 |  | 
|  | 19 | #include <linux/pci.h> | 
|  | 20 | #include <linux/init.h> | 
|  | 21 | #include <linux/irq.h> | 
| Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 22 | #include <asm/mach/pci.h> | 
|  | 23 | #include <asm/mach-types.h> | 
|  | 24 |  | 
| Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 25 | #define MAX_DEV		3 | 
|  | 26 | #define IRQ_LINES	3 | 
| Krzysztof Hałasa | 914e7bc | 2009-11-16 22:53:53 +0100 | [diff] [blame] | 27 |  | 
|  | 28 | /* PCI controller GPIO to IRQ pin mappings */ | 
| Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 29 | #define INTA	6 | 
|  | 30 | #define INTB	7 | 
|  | 31 | #define INTC	5 | 
| Krzysztof Hałasa | 914e7bc | 2009-11-16 22:53:53 +0100 | [diff] [blame] | 32 |  | 
| Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 33 | void __init fsg_pci_preinit(void) | 
|  | 34 | { | 
| Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 35 | set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); | 
|  | 36 | set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); | 
|  | 37 | set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); | 
| Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 38 | ixp4xx_pci_preinit(); | 
|  | 39 | } | 
|  | 40 |  | 
|  | 41 | static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | 
|  | 42 | { | 
| Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 43 | static int pci_irq_table[IRQ_LINES] = { | 
|  | 44 | IXP4XX_GPIO_IRQ(INTC), | 
|  | 45 | IXP4XX_GPIO_IRQ(INTB), | 
|  | 46 | IXP4XX_GPIO_IRQ(INTA), | 
| Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 47 | }; | 
|  | 48 |  | 
|  | 49 | int irq = -1; | 
| Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 50 | slot -= 11; | 
| Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 51 |  | 
| Krzysztof Hałasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame] | 52 | if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) | 
|  | 53 | irq = pci_irq_table[slot - 1]; | 
| Rod Whitby | 7e36e2f | 2008-04-01 10:53:23 +0100 | [diff] [blame] | 54 | printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n", | 
|  | 55 | __func__, slot, pin, irq); | 
|  | 56 |  | 
|  | 57 | return irq; | 
|  | 58 | } | 
|  | 59 |  | 
|  | 60 | struct hw_pci fsg_pci __initdata = { | 
|  | 61 | .nr_controllers = 1, | 
|  | 62 | .preinit =	  fsg_pci_preinit, | 
|  | 63 | .swizzle =	  pci_std_swizzle, | 
|  | 64 | .setup =	  ixp4xx_setup, | 
|  | 65 | .scan =		  ixp4xx_scan_bus, | 
|  | 66 | .map_irq =	  fsg_map_irq, | 
|  | 67 | }; | 
|  | 68 |  | 
|  | 69 | int __init fsg_pci_init(void) | 
|  | 70 | { | 
|  | 71 | if (machine_is_fsg()) | 
|  | 72 | pci_common_init(&fsg_pci); | 
|  | 73 | return 0; | 
|  | 74 | } | 
|  | 75 |  | 
|  | 76 | subsys_initcall(fsg_pci_init); |