blob: 81b6a40f2e295d43ed91c9b55cfddd36975a5344 [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
19#include <linux/types.h>
20#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070021#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070023#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#ifdef MSM_CAMERA_GCC
25#include <time.h>
26#else
27#include <linux/time.h>
28#endif
29
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -070030#include <linux/ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070031
Nishant Pandit5dd54422012-06-26 22:52:44 +053032#define BIT(nr) (1UL << (nr))
33
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034#define MSM_CAM_IOCTL_MAGIC 'm'
35
36#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
37 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
38
39#define MSM_CAM_IOCTL_REGISTER_PMEM \
40 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
41
42#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
43 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
44
45#define MSM_CAM_IOCTL_CTRL_COMMAND \
46 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
47
48#define MSM_CAM_IOCTL_CONFIG_VFE \
49 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
50
51#define MSM_CAM_IOCTL_GET_STATS \
52 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
53
54#define MSM_CAM_IOCTL_GETFRAME \
55 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
56
57#define MSM_CAM_IOCTL_ENABLE_VFE \
58 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
59
60#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
61 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
62
63#define MSM_CAM_IOCTL_CONFIG_CMD \
64 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_DISABLE_VFE \
67 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
68
69#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
70 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_VFE_APPS_RESET \
73 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
76 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
79 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
80
81#define MSM_CAM_IOCTL_AXI_CONFIG \
82 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
83
84#define MSM_CAM_IOCTL_GET_PICTURE \
85 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
86
87#define MSM_CAM_IOCTL_SET_CROP \
88 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
89
90#define MSM_CAM_IOCTL_PICT_PP \
91 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
92
93#define MSM_CAM_IOCTL_PICT_PP_DONE \
94 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
95
96#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
97 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
98
99#define MSM_CAM_IOCTL_FLASH_LED_CFG \
100 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
101
102#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
103 _IO(MSM_CAM_IOCTL_MAGIC, 23)
104
105#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
106 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
107
108#define MSM_CAM_IOCTL_AF_CTRL \
109 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
110
111#define MSM_CAM_IOCTL_AF_CTRL_DONE \
112 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_CONFIG_VPE \
115 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
116
117#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
118 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
121 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
124 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
127 _IO(MSM_CAM_IOCTL_MAGIC, 31)
128
129#define MSM_CAM_IOCTL_FLASH_CTRL \
130 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
131
132#define MSM_CAM_IOCTL_ERROR_CONFIG \
133 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
134
135#define MSM_CAM_IOCTL_ABORT_CAPTURE \
136 _IO(MSM_CAM_IOCTL_MAGIC, 34)
137
138#define MSM_CAM_IOCTL_SET_FD_ROI \
139 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
140
141#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
142 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
143
144#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
145 _IO(MSM_CAM_IOCTL_MAGIC, 37)
146
147#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
148 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
149
150#define MSM_CAM_IOCTL_PUT_ST_FRAME \
151 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
152
Mansoor Aftab5d418372011-07-26 17:01:26 -0700153#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Kevin Chan94b4c832012-03-02 21:27:16 -0800154 _IOR(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event *)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700155
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700156#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800157 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700158
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700159#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800160 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700161
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700162#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800163 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700164
165#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800166 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700167
168#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800169 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700170
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800171#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800172 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800173
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800174#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800175 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800176
177#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800178 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800179
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800180#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800181 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800182
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800183#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800184 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800185
186#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800187 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800188
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800189#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800190 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800191
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700192#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
193 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
194
Nishant Panditb2157c92012-04-25 01:09:28 +0530195#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
196 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
197
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700198struct msm_mctl_pp_cmd {
199 int32_t id;
200 uint16_t length;
201 void *value;
202};
203
204struct msm_mctl_post_proc_cmd {
205 int32_t type;
206 struct msm_mctl_pp_cmd cmd;
207};
208
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700209#define MSM_CAMERA_LED_OFF 0
210#define MSM_CAMERA_LED_LOW 1
211#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530212#define MSM_CAMERA_LED_INIT 3
213#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700214
215#define MSM_CAMERA_STROBE_FLASH_NONE 0
216#define MSM_CAMERA_STROBE_FLASH_XENON 1
217
218#define MSM_MAX_CAMERA_SENSORS 5
219#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800220#define MAX_CAM_NAME_SIZE 32
221#define MAX_ACT_MOD_NAME_SIZE 32
222#define MAX_ACT_NAME_SIZE 32
223#define NUM_ACTUATOR_DIR 2
224#define MAX_ACTUATOR_SCENARIO 8
225#define MAX_ACTUATOR_REGION 5
226#define MAX_ACTUATOR_INIT_SET 12
227#define MAX_ACTUATOR_TYPE_SIZE 32
228#define MAX_ACTUATOR_REG_TBL_SIZE 8
229
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700230
231#define MSM_MAX_CAMERA_CONFIGS 2
232
233#define PP_SNAP 0x01
234#define PP_RAW_SNAP ((0x01)<<1)
235#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800236#define PP_THUMB ((0x01)<<3)
237#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700238
239#define MSM_CAM_CTRL_CMD_DONE 0
240#define MSM_CAM_SENSOR_VFE_CMD 1
241
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700242/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
243#define MAX_PLANES 8
244
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700245/*****************************************************
246 * structure
247 *****************************************************/
248
249/* define five type of structures for userspace <==> kernel
250 * space communication:
251 * command 1 - 2 are from userspace ==> kernel
252 * command 3 - 4 are from kernel ==> userspace
253 *
254 * 1. control command: control command(from control thread),
255 * control status (from config thread);
256 */
257struct msm_ctrl_cmd {
258 uint16_t type;
259 uint16_t length;
260 void *value;
261 uint16_t status;
262 uint32_t timeout_ms;
263 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
264 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800265 int queue_idx;
266 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700267 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700268 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700269};
270
271struct msm_cam_evt_msg {
272 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
273 unsigned short msg_id;
274 unsigned int len; /* size in, number of bytes out */
275 uint32_t frame_id;
276 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700277 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700278};
279
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700280struct msm_pp_frame_sp {
281 /* phy addr of the buffer */
282 unsigned long phy_addr;
283 uint32_t y_off;
284 uint32_t cbcr_off;
285 /* buffer length */
286 uint32_t length;
287 int32_t fd;
288 uint32_t addr_offset;
289 /* mapped addr */
290 unsigned long vaddr;
291};
292
293struct msm_pp_frame_mp {
294 /* phy addr of the plane */
295 unsigned long phy_addr;
296 /* offset of plane data */
297 uint32_t data_offset;
298 /* plane length */
299 uint32_t length;
300 int32_t fd;
301 uint32_t addr_offset;
302 /* mapped addr */
303 unsigned long vaddr;
304};
305
306struct msm_pp_frame {
307 uint32_t handle; /* stores vb cookie */
308 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800309 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700310 int path;
311 unsigned short image_type;
312 unsigned short num_planes; /* 1 for sp */
313 struct timeval timestamp;
314 union {
315 struct msm_pp_frame_sp sp;
316 struct msm_pp_frame_mp mp[MAX_PLANES];
317 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800318 int node_type;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700319};
320
Mingcheng Zhu49505502011-07-19 20:44:36 -0700321struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700322 unsigned short image_mode;
323 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700324 unsigned short inst_idx;
325 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700326 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700327 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700328};
329
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700330struct msm_mctl_pp_cmd_ack_event {
331 uint32_t cmd; /* VPE_CMD_ZOOM? */
332 int status; /* 0 done, < 0 err */
333 uint32_t cookie; /* daemon's cookie */
334};
335
336struct msm_mctl_pp_event_info {
337 int32_t event;
338 union {
339 struct msm_mctl_pp_cmd_ack_event ack;
340 };
341};
342
343struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700344 unsigned short resptype;
345 union {
346 struct msm_cam_evt_msg isp_msg;
347 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700348 struct msm_cam_evt_divert_frame div_frame;
349 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700350 } isp_data;
351};
352
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700353#define MSM_CAM_RESP_CTRL 0
354#define MSM_CAM_RESP_STAT_EVT_MSG 1
355#define MSM_CAM_RESP_STEREO_OP_1 2
356#define MSM_CAM_RESP_STEREO_OP_2 3
357#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700358#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700359#define MSM_CAM_RESP_DONE_EVENT 6
360#define MSM_CAM_RESP_MCTL_PP_EVENT 7
361#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700362
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700363#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800364#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700365
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700366/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700367
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700368struct msm_stats_event_ctrl {
369 /* 0 - ctrl_cmd from control thread,
370 * 1 - stats/event kernel,
371 * 2 - V4L control or read request */
372 int resptype;
373 int timeout_ms;
374 struct msm_ctrl_cmd ctrl_cmd;
375 /* struct vfe_event_t stats_event; */
376 struct msm_cam_evt_msg stats_event;
377};
378
379/* 2. config command: config command(from config thread); */
380struct msm_camera_cfg_cmd {
381 /* what to config:
382 * 1 - sensor config, 2 - vfe config */
383 uint16_t cfg_type;
384
385 /* sensor config type */
386 uint16_t cmd_type;
387 uint16_t queue;
388 uint16_t length;
389 void *value;
390};
391
392#define CMD_GENERAL 0
393#define CMD_AXI_CFG_OUT1 1
394#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
395#define CMD_AXI_CFG_OUT2 3
396#define CMD_PICT_T_AXI_CFG 4
397#define CMD_PICT_M_AXI_CFG 5
398#define CMD_RAW_PICT_AXI_CFG 6
399
400#define CMD_FRAME_BUF_RELEASE 7
401#define CMD_PREV_BUF_CFG 8
402#define CMD_SNAP_BUF_RELEASE 9
403#define CMD_SNAP_BUF_CFG 10
404#define CMD_STATS_DISABLE 11
405#define CMD_STATS_AEC_AWB_ENABLE 12
406#define CMD_STATS_AF_ENABLE 13
407#define CMD_STATS_AEC_ENABLE 14
408#define CMD_STATS_AWB_ENABLE 15
409#define CMD_STATS_ENABLE 16
410
411#define CMD_STATS_AXI_CFG 17
412#define CMD_STATS_AEC_AXI_CFG 18
413#define CMD_STATS_AF_AXI_CFG 19
414#define CMD_STATS_AWB_AXI_CFG 20
415#define CMD_STATS_RS_AXI_CFG 21
416#define CMD_STATS_CS_AXI_CFG 22
417#define CMD_STATS_IHIST_AXI_CFG 23
418#define CMD_STATS_SKIN_AXI_CFG 24
419
420#define CMD_STATS_BUF_RELEASE 25
421#define CMD_STATS_AEC_BUF_RELEASE 26
422#define CMD_STATS_AF_BUF_RELEASE 27
423#define CMD_STATS_AWB_BUF_RELEASE 28
424#define CMD_STATS_RS_BUF_RELEASE 29
425#define CMD_STATS_CS_BUF_RELEASE 30
426#define CMD_STATS_IHIST_BUF_RELEASE 31
427#define CMD_STATS_SKIN_BUF_RELEASE 32
428
429#define UPDATE_STATS_INVALID 33
430#define CMD_AXI_CFG_SNAP_GEMINI 34
431#define CMD_AXI_CFG_SNAP 35
432#define CMD_AXI_CFG_PREVIEW 36
433#define CMD_AXI_CFG_VIDEO 37
434
435#define CMD_STATS_IHIST_ENABLE 38
436#define CMD_STATS_RS_ENABLE 39
437#define CMD_STATS_CS_ENABLE 40
438#define CMD_VPE 41
439#define CMD_AXI_CFG_VPE 42
440#define CMD_AXI_CFG_ZSL 43
441#define CMD_AXI_CFG_SNAP_VPE 44
442#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530443#define CMD_CONFIG_PING_ADDR 46
444#define CMD_CONFIG_PONG_ADDR 47
445#define CMD_CONFIG_FREE_BUF_ADDR 48
446#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
447#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530448#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700449#define CMD_VFE_PROCESS_IRQ 52
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700450
Nishant Pandit5dd54422012-06-26 22:52:44 +0530451#define CMD_AXI_CFG_PRIM BIT(8)
452#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
453#define CMD_AXI_CFG_SEC BIT(10)
454#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
455#define CMD_AXI_CFG_TERT1 BIT(12)
456#define CMD_AXI_CFG_TERT2 BIT(13)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800457
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700458#define CMD_AXI_START 0xE1
459#define CMD_AXI_STOP 0xE2
460
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700461/* vfe config command: config command(from config thread)*/
462struct msm_vfe_cfg_cmd {
463 int cmd_type;
464 uint16_t length;
465 void *value;
466};
467
468struct msm_vpe_cfg_cmd {
469 int cmd_type;
470 uint16_t length;
471 void *value;
472};
473
474#define MAX_CAMERA_ENABLE_NAME_LEN 32
475struct camera_enable_cmd {
476 char name[MAX_CAMERA_ENABLE_NAME_LEN];
477};
478
479#define MSM_PMEM_OUTPUT1 0
480#define MSM_PMEM_OUTPUT2 1
481#define MSM_PMEM_OUTPUT1_OUTPUT2 2
482#define MSM_PMEM_THUMBNAIL 3
483#define MSM_PMEM_MAINIMG 4
484#define MSM_PMEM_RAW_MAINIMG 5
485#define MSM_PMEM_AEC_AWB 6
486#define MSM_PMEM_AF 7
487#define MSM_PMEM_AEC 8
488#define MSM_PMEM_AWB 9
489#define MSM_PMEM_RS 10
490#define MSM_PMEM_CS 11
491#define MSM_PMEM_IHIST 12
492#define MSM_PMEM_SKIN 13
493#define MSM_PMEM_VIDEO 14
494#define MSM_PMEM_PREVIEW 15
495#define MSM_PMEM_VIDEO_VPE 16
496#define MSM_PMEM_C2D 17
497#define MSM_PMEM_MAINIMG_VPE 18
498#define MSM_PMEM_THUMBNAIL_VPE 19
499#define MSM_PMEM_MAX 20
500
501#define STAT_AEAW 0
502#define STAT_AEC 1
503#define STAT_AF 2
504#define STAT_AWB 3
505#define STAT_RS 4
506#define STAT_CS 5
507#define STAT_IHIST 6
508#define STAT_SKIN 7
509#define STAT_MAX 8
510
511#define FRAME_PREVIEW_OUTPUT1 0
512#define FRAME_PREVIEW_OUTPUT2 1
513#define FRAME_SNAPSHOT 2
514#define FRAME_THUMBNAIL 3
515#define FRAME_RAW_SNAPSHOT 4
516#define FRAME_MAX 5
517
518struct msm_pmem_info {
519 int type;
520 int fd;
521 void *vaddr;
522 uint32_t offset;
523 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700524 uint32_t y_off;
525 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530526 uint32_t planar0_off;
527 uint32_t planar1_off;
528 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700529 uint8_t active;
530};
531
532struct outputCfg {
533 uint32_t height;
534 uint32_t width;
535
536 uint32_t window_height_firstline;
537 uint32_t window_height_lastline;
538};
539
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800540#define VIDEO_NODE 0
541#define MCTL_NODE 1
542
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700543#define OUTPUT_1 0
544#define OUTPUT_2 1
545#define OUTPUT_1_AND_2 2 /* snapshot only */
546#define OUTPUT_1_AND_3 3 /* video */
547#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
548#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
549#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
550#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700551#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530552#define OUTPUT_VIDEO_ALL_CHNLS 9
553#define OUTPUT_ZSL_ALL_CHNLS 10
554#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700555
Nishant Pandit5dd54422012-06-26 22:52:44 +0530556#define OUTPUT_PRIM BIT(8)
557#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
558#define OUTPUT_SEC BIT(10)
559#define OUTPUT_SEC_ALL_CHNLS BIT(11)
560#define OUTPUT_TERT1 BIT(12)
561#define OUTPUT_TERT2 BIT(13)
562
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800563
564
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700565#define MSM_FRAME_PREV_1 0
566#define MSM_FRAME_PREV_2 1
567#define MSM_FRAME_ENC 2
568
Nishant Pandit5dd54422012-06-26 22:52:44 +0530569#define OUTPUT_TYPE_P BIT(0)
570#define OUTPUT_TYPE_T BIT(1)
571#define OUTPUT_TYPE_S BIT(2)
572#define OUTPUT_TYPE_V BIT(3)
573#define OUTPUT_TYPE_L BIT(4)
574#define OUTPUT_TYPE_ST_L BIT(5)
575#define OUTPUT_TYPE_ST_R BIT(6)
576#define OUTPUT_TYPE_ST_D BIT(7)
577#define OUTPUT_TYPE_R BIT(8)
578#define OUTPUT_TYPE_R1 BIT(9)
579
580
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700581
582struct fd_roi_info {
583 void *info;
584 int info_len;
585};
586
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700587struct msm_mem_map_info {
588 uint32_t cookie;
589 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700590 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700591};
592
Mingcheng Zhu49505502011-07-19 20:44:36 -0700593#define MSM_MEM_MMAP 0
594#define MSM_MEM_USERPTR 1
595#define MSM_PLANE_MAX 8
596#define MSM_PLANE_Y 0
597#define MSM_PLANE_UV 1
598
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700599struct msm_frame {
600 struct timespec ts;
601 int path;
602 int type;
603 unsigned long buffer;
604 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700605 uint32_t y_off;
606 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530607 uint32_t planar0_off;
608 uint32_t planar1_off;
609 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700610 int fd;
611
612 void *cropinfo;
613 int croplen;
614 uint32_t error_code;
615 struct fd_roi_info roi_info;
616 uint32_t frame_id;
617 int stcam_quality_ind;
618 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700619
620 struct ion_allocation_data ion_alloc;
621 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700622 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700623};
624
625enum msm_st_frame_packing {
626 SIDE_BY_SIDE_HALF,
627 SIDE_BY_SIDE_FULL,
628 TOP_DOWN_HALF,
629 TOP_DOWN_FULL,
630};
631
632struct msm_st_crop {
633 uint32_t in_w;
634 uint32_t in_h;
635 uint32_t out_w;
636 uint32_t out_h;
637};
638
639struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530640 uint32_t buf_p0_off;
641 uint32_t buf_p1_off;
642 uint32_t buf_p0_stride;
643 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700644 uint32_t pix_x_off;
645 uint32_t pix_y_off;
646 struct msm_st_crop stCropInfo;
647};
648
649struct msm_st_frame {
650 struct msm_frame buf_info;
651 int type;
652 enum msm_st_frame_packing packing;
653 struct msm_st_half L;
654 struct msm_st_half R;
655 int frame_id;
656};
657
658#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
659
660struct stats_buff {
661 unsigned long buff;
662 int fd;
663};
664
665struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700666 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700667 struct stats_buff aec;
668 struct stats_buff awb;
669 struct stats_buff af;
670 struct stats_buff ihist;
671 struct stats_buff rs;
672 struct stats_buff cs;
673 struct stats_buff skin;
674 int type;
675 uint32_t status_bits;
676 unsigned long buffer;
677 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800678 int length;
679 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700680 uint32_t frame_id;
681};
682#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
683/* video capture mode in VIDIOC_S_PARM */
684#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
685 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
686/* extendedmode for video recording in VIDIOC_S_PARM */
687#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
688 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
689/* extendedmode for the full size main image in VIDIOC_S_PARM */
690#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
691/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
692#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
693 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
694#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
695 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Nishant Pandit5dd54422012-06-26 22:52:44 +0530696#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
697 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
698#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
699 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
700#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
701 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
702#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700703
704
705#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
706#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
707#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
708#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
709#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
710#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
711#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
712#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
713#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
714#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
715#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
716#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
717#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
718#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
719#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700720#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
721#define MSM_V4L2_PID_MMAP_ENTRY (V4L2_CID_PRIVATE_BASE+16)
722#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800723#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
724#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700725
726/* camera operation mode for video recording - two frame output queues */
727#define MSM_V4L2_CAM_OP_DEFAULT 0
728/* camera operation mode for video recording - two frame output queues */
729#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
730/* camera operation mode for video recording - two frame output queues */
731#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
732/* camera operation mode for standard shapshot - two frame output queues */
733#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
734/* camera operation mode for zsl shapshot - three output queues */
735#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
736/* camera operation mode for raw snapshot - one frame output queue */
737#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800738/* camera operation mode for jpeg snapshot - one frame output queue */
739#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
740
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700741
742#define MSM_V4L2_VID_CAP_TYPE 0
743#define MSM_V4L2_STREAM_ON 1
744#define MSM_V4L2_STREAM_OFF 2
745#define MSM_V4L2_SNAPSHOT 3
746#define MSM_V4L2_QUERY_CTRL 4
747#define MSM_V4L2_GET_CTRL 5
748#define MSM_V4L2_SET_CTRL 6
749#define MSM_V4L2_QUERY 7
750#define MSM_V4L2_GET_CROP 8
751#define MSM_V4L2_SET_CROP 9
752#define MSM_V4L2_OPEN 10
753#define MSM_V4L2_CLOSE 11
754#define MSM_V4L2_SET_CTRL_CMD 12
755#define MSM_V4L2_EVT_SUB_MASK 13
756#define MSM_V4L2_MAX 14
757#define V4L2_CAMERA_EXIT 43
758
759struct crop_info {
760 void *info;
761 int len;
762};
763
764struct msm_postproc {
765 int ftnum;
766 struct msm_frame fthumnail;
767 int fmnum;
768 struct msm_frame fmain;
769};
770
771struct msm_snapshot_pp_status {
772 void *status;
773};
774
775#define CFG_SET_MODE 0
776#define CFG_SET_EFFECT 1
777#define CFG_START 2
778#define CFG_PWR_UP 3
779#define CFG_PWR_DOWN 4
780#define CFG_WRITE_EXPOSURE_GAIN 5
781#define CFG_SET_DEFAULT_FOCUS 6
782#define CFG_MOVE_FOCUS 7
783#define CFG_REGISTER_TO_REAL_GAIN 8
784#define CFG_REAL_TO_REGISTER_GAIN 9
785#define CFG_SET_FPS 10
786#define CFG_SET_PICT_FPS 11
787#define CFG_SET_BRIGHTNESS 12
788#define CFG_SET_CONTRAST 13
789#define CFG_SET_ZOOM 14
790#define CFG_SET_EXPOSURE_MODE 15
791#define CFG_SET_WB 16
792#define CFG_SET_ANTIBANDING 17
793#define CFG_SET_EXP_GAIN 18
794#define CFG_SET_PICT_EXP_GAIN 19
795#define CFG_SET_LENS_SHADING 20
796#define CFG_GET_PICT_FPS 21
797#define CFG_GET_PREV_L_PF 22
798#define CFG_GET_PREV_P_PL 23
799#define CFG_GET_PICT_L_PF 24
800#define CFG_GET_PICT_P_PL 25
801#define CFG_GET_AF_MAX_STEPS 26
802#define CFG_GET_PICT_MAX_EXP_LC 27
803#define CFG_SEND_WB_INFO 28
804#define CFG_SENSOR_INIT 29
805#define CFG_GET_3D_CALI_DATA 30
806#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700807#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700808#define CFG_GET_EEPROM_INFO 33
809#define CFG_GET_EEPROM_DATA 34
810#define CFG_SET_ACTUATOR_INFO 35
811#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530812/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700813#define CFG_SET_SATURATION 37
814#define CFG_SET_SHARPNESS 38
815#define CFG_SET_TOUCHAEC 39
816#define CFG_SET_AUTO_FOCUS 40
817#define CFG_SET_AUTOFLASH 41
818#define CFG_SET_EXPOSURE_COMPENSATION 42
819#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +0530820#define CFG_START_STREAM 44
821#define CFG_STOP_STREAM 45
822#define CFG_GET_CSI_PARAMS 46
823#define CFG_MAX 47
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700824
825
826#define MOVE_NEAR 0
827#define MOVE_FAR 1
828
829#define SENSOR_PREVIEW_MODE 0
830#define SENSOR_SNAPSHOT_MODE 1
831#define SENSOR_RAW_SNAPSHOT_MODE 2
832#define SENSOR_HFR_60FPS_MODE 3
833#define SENSOR_HFR_90FPS_MODE 4
834#define SENSOR_HFR_120FPS_MODE 5
835
836#define SENSOR_QTR_SIZE 0
837#define SENSOR_FULL_SIZE 1
838#define SENSOR_QVGA_SIZE 2
839#define SENSOR_INVALID_SIZE 3
840
841#define CAMERA_EFFECT_OFF 0
842#define CAMERA_EFFECT_MONO 1
843#define CAMERA_EFFECT_NEGATIVE 2
844#define CAMERA_EFFECT_SOLARIZE 3
845#define CAMERA_EFFECT_SEPIA 4
846#define CAMERA_EFFECT_POSTERIZE 5
847#define CAMERA_EFFECT_WHITEBOARD 6
848#define CAMERA_EFFECT_BLACKBOARD 7
849#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -0700850#define CAMERA_EFFECT_EMBOSS 9
851#define CAMERA_EFFECT_SKETCH 10
852#define CAMERA_EFFECT_NEON 11
853#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700854
Taniya Dasa9bdb012011-09-08 11:21:33 +0530855/* QRD */
856#define CAMERA_EFFECT_BW 10
857#define CAMERA_EFFECT_BLUISH 12
858#define CAMERA_EFFECT_REDDISH 13
859#define CAMERA_EFFECT_GREENISH 14
860
861/* QRD */
862#define CAMERA_ANTIBANDING_OFF 0
863#define CAMERA_ANTIBANDING_50HZ 2
864#define CAMERA_ANTIBANDING_60HZ 1
865#define CAMERA_ANTIBANDING_AUTO 3
866
867#define CAMERA_CONTRAST_LV0 0
868#define CAMERA_CONTRAST_LV1 1
869#define CAMERA_CONTRAST_LV2 2
870#define CAMERA_CONTRAST_LV3 3
871#define CAMERA_CONTRAST_LV4 4
872#define CAMERA_CONTRAST_LV5 5
873#define CAMERA_CONTRAST_LV6 6
874#define CAMERA_CONTRAST_LV7 7
875#define CAMERA_CONTRAST_LV8 8
876#define CAMERA_CONTRAST_LV9 9
877
878#define CAMERA_BRIGHTNESS_LV0 0
879#define CAMERA_BRIGHTNESS_LV1 1
880#define CAMERA_BRIGHTNESS_LV2 2
881#define CAMERA_BRIGHTNESS_LV3 3
882#define CAMERA_BRIGHTNESS_LV4 4
883#define CAMERA_BRIGHTNESS_LV5 5
884#define CAMERA_BRIGHTNESS_LV6 6
885#define CAMERA_BRIGHTNESS_LV7 7
886#define CAMERA_BRIGHTNESS_LV8 8
887
888
889#define CAMERA_SATURATION_LV0 0
890#define CAMERA_SATURATION_LV1 1
891#define CAMERA_SATURATION_LV2 2
892#define CAMERA_SATURATION_LV3 3
893#define CAMERA_SATURATION_LV4 4
894#define CAMERA_SATURATION_LV5 5
895#define CAMERA_SATURATION_LV6 6
896#define CAMERA_SATURATION_LV7 7
897#define CAMERA_SATURATION_LV8 8
898
899#define CAMERA_SHARPNESS_LV0 0
900#define CAMERA_SHARPNESS_LV1 3
901#define CAMERA_SHARPNESS_LV2 6
902#define CAMERA_SHARPNESS_LV3 9
903#define CAMERA_SHARPNESS_LV4 12
904#define CAMERA_SHARPNESS_LV5 15
905#define CAMERA_SHARPNESS_LV6 18
906#define CAMERA_SHARPNESS_LV7 21
907#define CAMERA_SHARPNESS_LV8 24
908#define CAMERA_SHARPNESS_LV9 27
909#define CAMERA_SHARPNESS_LV10 30
910
911#define CAMERA_SETAE_AVERAGE 0
912#define CAMERA_SETAE_CENWEIGHT 1
913
Taniya Dasa9bdb012011-09-08 11:21:33 +0530914#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
915#define CAMERA_WB_CUSTOM 2
916#define CAMERA_WB_INCANDESCENT 3
917#define CAMERA_WB_FLUORESCENT 4
918#define CAMERA_WB_DAYLIGHT 5
919#define CAMERA_WB_CLOUDY_DAYLIGHT 6
920#define CAMERA_WB_TWILIGHT 7
921#define CAMERA_WB_SHADE 8
922
923#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
924#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
925#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
926#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
927#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
928
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800929enum msm_v4l2_saturation_level {
930 MSM_V4L2_SATURATION_L0,
931 MSM_V4L2_SATURATION_L1,
932 MSM_V4L2_SATURATION_L2,
933 MSM_V4L2_SATURATION_L3,
934 MSM_V4L2_SATURATION_L4,
935 MSM_V4L2_SATURATION_L5,
936 MSM_V4L2_SATURATION_L6,
937 MSM_V4L2_SATURATION_L7,
938 MSM_V4L2_SATURATION_L8,
939 MSM_V4L2_SATURATION_L9,
940 MSM_V4L2_SATURATION_L10,
941};
942
Suresh Vankadara212d9722012-05-30 15:51:20 +0530943enum msm_v4l2_contrast_level {
944 MSM_V4L2_CONTRAST_L0,
945 MSM_V4L2_CONTRAST_L1,
946 MSM_V4L2_CONTRAST_L2,
947 MSM_V4L2_CONTRAST_L3,
948 MSM_V4L2_CONTRAST_L4,
949 MSM_V4L2_CONTRAST_L5,
950 MSM_V4L2_CONTRAST_L6,
951 MSM_V4L2_CONTRAST_L7,
952 MSM_V4L2_CONTRAST_L8,
953 MSM_V4L2_CONTRAST_L9,
954 MSM_V4L2_CONTRAST_L10,
955};
956
957
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800958enum msm_v4l2_exposure_level {
959 MSM_V4L2_EXPOSURE_N2,
960 MSM_V4L2_EXPOSURE_N1,
961 MSM_V4L2_EXPOSURE_D,
962 MSM_V4L2_EXPOSURE_P1,
963 MSM_V4L2_EXPOSURE_P2,
964};
965
966enum msm_v4l2_sharpness_level {
967 MSM_V4L2_SHARPNESS_L0,
968 MSM_V4L2_SHARPNESS_L1,
969 MSM_V4L2_SHARPNESS_L2,
970 MSM_V4L2_SHARPNESS_L3,
971 MSM_V4L2_SHARPNESS_L4,
972 MSM_V4L2_SHARPNESS_L5,
973 MSM_V4L2_SHARPNESS_L6,
974};
975
976enum msm_v4l2_expo_metering_mode {
977 MSM_V4L2_EXP_FRAME_AVERAGE,
978 MSM_V4L2_EXP_CENTER_WEIGHTED,
979 MSM_V4L2_EXP_SPOT_METERING,
980};
981
982enum msm_v4l2_iso_mode {
983 MSM_V4L2_ISO_AUTO = 0,
984 MSM_V4L2_ISO_DEBLUR,
985 MSM_V4L2_ISO_100,
986 MSM_V4L2_ISO_200,
987 MSM_V4L2_ISO_400,
988 MSM_V4L2_ISO_800,
989 MSM_V4L2_ISO_1600,
990};
991
992enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +0530993 MSM_V4L2_WB_OFF,
994 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800995 MSM_V4L2_WB_CUSTOM,
996 MSM_V4L2_WB_INCANDESCENT,
997 MSM_V4L2_WB_FLUORESCENT,
998 MSM_V4L2_WB_DAYLIGHT,
999 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301000};
1001
1002enum msm_v4l2_special_effect {
1003 MSM_V4L2_EFFECT_OFF,
1004 MSM_V4L2_EFFECT_MONO,
1005 MSM_V4L2_EFFECT_NEGATIVE,
1006 MSM_V4L2_EFFECT_SOLARIZE,
1007 MSM_V4L2_EFFECT_SEPIA,
1008 MSM_V4L2_EFFECT_POSTERAIZE,
1009 MSM_V4L2_EFFECT_WHITEBOARD,
1010 MSM_V4L2_EFFECT_BLACKBOARD,
1011 MSM_V4L2_EFFECT_AQUA,
1012 MSM_V4L2_EFFECT_EMBOSS,
1013 MSM_V4L2_EFFECT_SKETCH,
1014 MSM_V4L2_EFFECT_NEON,
1015 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001016};
1017
1018enum msm_v4l2_power_line_frequency {
1019 MSM_V4L2_POWER_LINE_OFF,
1020 MSM_V4L2_POWER_LINE_60HZ,
1021 MSM_V4L2_POWER_LINE_50HZ,
1022 MSM_V4L2_POWER_LINE_AUTO,
1023};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301024
Su Liu6c3bb322012-02-14 02:15:05 +05301025#define CAMERA_ISO_TYPE_AUTO 0
1026#define CAMEAR_ISO_TYPE_HJR 1
1027#define CAMEAR_ISO_TYPE_100 2
1028#define CAMERA_ISO_TYPE_200 3
1029#define CAMERA_ISO_TYPE_400 4
1030#define CAMEAR_ISO_TYPE_800 5
1031#define CAMERA_ISO_TYPE_1600 6
1032
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001033struct sensor_pict_fps {
1034 uint16_t prevfps;
1035 uint16_t pictfps;
1036};
1037
1038struct exp_gain_cfg {
1039 uint16_t gain;
1040 uint32_t line;
1041};
1042
1043struct focus_cfg {
1044 int32_t steps;
1045 int dir;
1046};
1047
1048struct fps_cfg {
1049 uint16_t f_mult;
1050 uint16_t fps_div;
1051 uint32_t pict_fps_div;
1052};
1053struct wb_info_cfg {
1054 uint16_t red_gain;
1055 uint16_t green_gain;
1056 uint16_t blue_gain;
1057};
1058struct sensor_3d_exp_cfg {
1059 uint16_t gain;
1060 uint32_t line;
1061 uint16_t r_gain;
1062 uint16_t b_gain;
1063 uint16_t gr_gain;
1064 uint16_t gb_gain;
1065 uint16_t gain_adjust;
1066};
1067struct sensor_3d_cali_data_t{
1068 unsigned char left_p_matrix[3][4][8];
1069 unsigned char right_p_matrix[3][4][8];
1070 unsigned char square_len[8];
1071 unsigned char focal_len[8];
1072 unsigned char pixel_pitch[8];
1073 uint16_t left_r;
1074 uint16_t left_b;
1075 uint16_t left_gb;
1076 uint16_t left_af_far;
1077 uint16_t left_af_mid;
1078 uint16_t left_af_short;
1079 uint16_t left_af_5um;
1080 uint16_t left_af_50up;
1081 uint16_t left_af_50down;
1082 uint16_t right_r;
1083 uint16_t right_b;
1084 uint16_t right_gb;
1085 uint16_t right_af_far;
1086 uint16_t right_af_mid;
1087 uint16_t right_af_short;
1088 uint16_t right_af_5um;
1089 uint16_t right_af_50up;
1090 uint16_t right_af_50down;
1091};
1092struct sensor_init_cfg {
1093 uint8_t prev_res;
1094 uint8_t pict_res;
1095};
1096
1097struct sensor_calib_data {
1098 /* Color Related Measurements */
1099 uint16_t r_over_g;
1100 uint16_t b_over_g;
1101 uint16_t gr_over_gb;
1102
1103 /* Lens Related Measurements */
1104 uint16_t macro_2_inf;
1105 uint16_t inf_2_macro;
1106 uint16_t stroke_amt;
1107 uint16_t af_pos_1m;
1108 uint16_t af_pos_inf;
1109};
1110
Kevin Chana980f392011-08-01 20:55:00 -07001111enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001112 MSM_SENSOR_RES_FULL,
1113 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001114 MSM_SENSOR_RES_2,
1115 MSM_SENSOR_RES_3,
1116 MSM_SENSOR_RES_4,
1117 MSM_SENSOR_RES_5,
1118 MSM_SENSOR_RES_6,
1119 MSM_SENSOR_RES_7,
1120 MSM_SENSOR_INVALID_RES,
1121};
1122
1123struct msm_sensor_output_info_t {
1124 uint16_t x_output;
1125 uint16_t y_output;
1126 uint16_t line_length_pclk;
1127 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001128 uint32_t vt_pixel_clk;
1129 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001130 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001131};
1132
1133struct sensor_output_info_t {
1134 struct msm_sensor_output_info_t *output_info;
1135 uint16_t num_info;
1136};
1137
Taniya Dasa9bdb012011-09-08 11:21:33 +05301138struct mirror_flip {
1139 int32_t x_mirror;
1140 int32_t y_flip;
1141};
1142
1143struct cord {
1144 uint32_t x;
1145 uint32_t y;
1146};
1147
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001148struct msm_eeprom_data_t {
1149 void *eeprom_data;
1150 uint16_t index;
1151};
1152
Nishant Panditb2157c92012-04-25 01:09:28 +05301153struct msm_camera_csid_vc_cfg {
1154 uint8_t cid;
1155 uint8_t dt;
1156 uint8_t decode_format;
1157};
1158
1159struct csi_lane_params_t {
1160 uint8_t csi_lane_assign;
1161 uint8_t csi_lane_mask;
1162 uint8_t csi_if;
1163 uint8_t csid_core;
1164 uint32_t csid_version;
1165};
1166
1167#define CSI_EMBED_DATA 0x12
1168#define CSI_RESERVED_DATA_0 0x13
1169#define CSI_YUV422_8 0x1E
1170#define CSI_RAW8 0x2A
1171#define CSI_RAW10 0x2B
1172#define CSI_RAW12 0x2C
1173
1174#define CSI_DECODE_6BIT 0
1175#define CSI_DECODE_8BIT 1
1176#define CSI_DECODE_10BIT 2
1177#define CSI_DECODE_DPCM_10_8_10 5
1178
1179#define ISPIF_STREAM(intf, action) (((intf)<<ISPIF_S_STREAM_SHIFT)+(action))
1180#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1181#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1182#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1183#define ISPIF_S_STREAM_SHIFT 4
1184
1185
1186#define PIX_0 (0x01 << 0)
1187#define RDI_0 (0x01 << 1)
1188#define PIX_1 (0x01 << 2)
1189#define RDI_1 (0x01 << 3)
1190#define PIX_2 (0x01 << 4)
1191#define RDI_2 (0x01 << 5)
1192
1193
1194enum msm_ispif_intftype {
1195 PIX0,
1196 RDI0,
1197 PIX1,
1198 RDI1,
1199 PIX2,
1200 RDI2,
1201 INTF_MAX,
1202};
1203
1204enum msm_ispif_vc {
1205 VC0,
1206 VC1,
1207 VC2,
1208 VC3,
1209};
1210
1211enum msm_ispif_cid {
1212 CID0,
1213 CID1,
1214 CID2,
1215 CID3,
1216 CID4,
1217 CID5,
1218 CID6,
1219 CID7,
1220 CID8,
1221 CID9,
1222 CID10,
1223 CID11,
1224 CID12,
1225 CID13,
1226 CID14,
1227 CID15,
1228};
1229
1230struct msm_ispif_params {
1231 uint8_t intftype;
1232 uint16_t cid_mask;
1233 uint8_t csid;
1234};
1235
1236struct msm_ispif_params_list {
1237 uint32_t len;
1238 struct msm_ispif_params params[4];
1239};
1240
1241enum ispif_cfg_type_t {
1242 ISPIF_INIT,
1243 ISPIF_SET_CFG,
1244 ISPIF_SET_ON_FRAME_BOUNDARY,
1245 ISPIF_SET_OFF_FRAME_BOUNDARY,
1246 ISPIF_SET_OFF_IMMEDIATELY,
1247 ISPIF_RELEASE,
1248};
1249
1250struct ispif_cfg_data {
1251 enum ispif_cfg_type_t cfgtype;
1252 union {
1253 uint32_t csid_version;
1254 int cmd;
1255 struct msm_ispif_params_list ispif_params;
1256 } cfg;
1257};
1258
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001259struct sensor_cfg_data {
1260 int cfgtype;
1261 int mode;
1262 int rs;
1263 uint8_t max_steps;
1264
1265 union {
1266 int8_t effect;
1267 uint8_t lens_shading;
1268 uint16_t prevl_pf;
1269 uint16_t prevp_pl;
1270 uint16_t pictl_pf;
1271 uint16_t pictp_pl;
1272 uint32_t pict_max_exp_lc;
1273 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301274 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001275 struct sensor_init_cfg init_info;
1276 struct sensor_pict_fps gfps;
1277 struct exp_gain_cfg exp_gain;
1278 struct focus_cfg focus;
1279 struct fps_cfg fps;
1280 struct wb_info_cfg wb_info;
1281 struct sensor_3d_exp_cfg sensor_3d_exp;
1282 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001283 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001284 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301285 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301286 /* QRD */
1287 uint16_t antibanding;
1288 uint8_t contrast;
1289 uint8_t saturation;
1290 uint8_t sharpness;
1291 int8_t brightness;
1292 int ae_mode;
1293 uint8_t wb_val;
1294 int8_t exp_compensation;
1295 struct cord aec_cord;
1296 int is_autoflash;
1297 struct mirror_flip mirror_flip;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001298 } cfg;
1299};
1300
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001301struct damping_params_t {
1302 uint32_t damping_step;
1303 uint32_t damping_delay;
1304 uint32_t hw_params;
1305};
1306
1307enum actuator_type {
1308 ACTUATOR_VCM,
1309 ACTUATOR_PIEZO,
1310};
1311
1312enum msm_actuator_data_type {
1313 MSM_ACTUATOR_BYTE_DATA = 1,
1314 MSM_ACTUATOR_WORD_DATA,
1315};
1316
1317enum msm_actuator_addr_type {
1318 MSM_ACTUATOR_BYTE_ADDR = 1,
1319 MSM_ACTUATOR_WORD_ADDR,
1320};
1321
1322enum msm_actuator_write_type {
1323 MSM_ACTUATOR_WRITE_HW_DAMP,
1324 MSM_ACTUATOR_WRITE_DAC,
1325};
1326
1327struct msm_actuator_reg_params_t {
1328 enum msm_actuator_write_type reg_write_type;
1329 uint32_t hw_mask;
1330 uint16_t reg_addr;
1331 uint16_t hw_shift;
1332 uint16_t data_shift;
1333};
1334
1335struct reg_settings_t {
1336 uint16_t reg_addr;
1337 uint16_t reg_data;
1338};
1339
1340struct region_params_t {
1341 /* [0] = ForwardDirection Macro boundary
1342 [1] = ReverseDirection Inf boundary
1343 */
1344 uint16_t step_bound[2];
1345 uint16_t code_per_step;
1346};
1347
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001348struct msm_actuator_move_params_t {
1349 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001350 int8_t sign_dir;
1351 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001352 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001353 struct damping_params_t *ringing_params;
1354};
1355
1356struct msm_actuator_tuning_params_t {
1357 int16_t initial_code;
1358 uint16_t pwd_step;
1359 uint16_t region_size;
1360 uint32_t total_steps;
1361 struct region_params_t *region_params;
1362};
1363
1364struct msm_actuator_params_t {
1365 enum actuator_type act_type;
1366 uint8_t reg_tbl_size;
1367 uint16_t data_size;
1368 uint16_t init_setting_size;
1369 uint32_t i2c_addr;
1370 enum msm_actuator_addr_type i2c_addr_type;
1371 enum msm_actuator_data_type i2c_data_type;
1372 struct msm_actuator_reg_params_t *reg_tbl_params;
1373 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001374};
1375
1376struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001377 struct msm_actuator_params_t actuator_params;
1378 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001379};
1380
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001381struct msm_actuator_get_info_t {
1382 uint32_t focal_length_num;
1383 uint32_t focal_length_den;
1384 uint32_t f_number_num;
1385 uint32_t f_number_den;
1386 uint32_t f_pix_num;
1387 uint32_t f_pix_den;
1388 uint32_t total_f_dist_num;
1389 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001390 uint32_t hor_view_angle_num;
1391 uint32_t hor_view_angle_den;
1392 uint32_t ver_view_angle_num;
1393 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001394};
1395
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001396enum af_camera_name {
1397 ACTUATOR_MAIN_CAM_0,
1398 ACTUATOR_MAIN_CAM_1,
1399 ACTUATOR_MAIN_CAM_2,
1400 ACTUATOR_MAIN_CAM_3,
1401 ACTUATOR_MAIN_CAM_4,
1402 ACTUATOR_MAIN_CAM_5,
1403 ACTUATOR_WEB_CAM_0,
1404 ACTUATOR_WEB_CAM_1,
1405 ACTUATOR_WEB_CAM_2,
1406};
1407
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001408struct msm_actuator_cfg_data {
1409 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001410 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001411 union {
1412 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001413 struct msm_actuator_set_info_t set_info;
1414 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001415 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001416 } cfg;
1417};
1418
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001419struct msm_eeprom_support {
1420 uint16_t is_supported;
1421 uint16_t size;
1422 uint16_t index;
1423 uint16_t qvalue;
1424};
1425
1426struct msm_calib_wb {
1427 uint16_t r_over_g;
1428 uint16_t b_over_g;
1429 uint16_t gr_over_gb;
1430};
1431
1432struct msm_calib_af {
1433 uint16_t macro_dac;
1434 uint16_t inf_dac;
1435 uint16_t start_dac;
1436};
1437
1438struct msm_calib_lsc {
1439 uint16_t r_gain[221];
1440 uint16_t b_gain[221];
1441 uint16_t gr_gain[221];
1442 uint16_t gb_gain[221];
1443};
1444
1445struct pixel_t {
1446 int x;
1447 int y;
1448};
1449
1450struct msm_calib_dpc {
1451 uint16_t validcount;
1452 struct pixel_t snapshot_coord[128];
1453 struct pixel_t preview_coord[128];
1454 struct pixel_t video_coord[128];
1455};
1456
1457struct msm_camera_eeprom_info_t {
1458 struct msm_eeprom_support af;
1459 struct msm_eeprom_support wb;
1460 struct msm_eeprom_support lsc;
1461 struct msm_eeprom_support dpc;
1462};
1463
1464struct msm_eeprom_cfg_data {
1465 int cfgtype;
1466 uint8_t is_eeprom_supported;
1467 union {
1468 struct msm_eeprom_data_t get_data;
1469 struct msm_camera_eeprom_info_t get_info;
1470 } cfg;
1471};
1472
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001473struct sensor_large_data {
1474 int cfgtype;
1475 union {
1476 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1477 } data;
1478};
1479
1480enum sensor_type_t {
1481 BAYER,
1482 YUV,
1483 JPEG_SOC,
1484};
1485
1486enum flash_type {
1487 LED_FLASH,
1488 STROBE_FLASH,
1489};
1490
1491enum strobe_flash_ctrl_type {
1492 STROBE_FLASH_CTRL_INIT,
1493 STROBE_FLASH_CTRL_CHARGE,
1494 STROBE_FLASH_CTRL_RELEASE
1495};
1496
1497struct strobe_flash_ctrl_data {
1498 enum strobe_flash_ctrl_type type;
1499 int charge_en;
1500};
1501
1502struct msm_camera_info {
1503 int num_cameras;
1504 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1505 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1506 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1507 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1508 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001509};
1510
1511struct msm_cam_config_dev_info {
1512 int num_config_nodes;
1513 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001514 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001515};
1516
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001517struct msm_mctl_node_info {
1518 int num_mctl_nodes;
1519 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1520};
1521
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001522struct flash_ctrl_data {
1523 int flashtype;
1524 union {
1525 int led_state;
1526 struct strobe_flash_ctrl_data strobe_ctrl;
1527 } ctrl_data;
1528};
1529
1530#define GET_NAME 0
1531#define GET_PREVIEW_LINE_PER_FRAME 1
1532#define GET_PREVIEW_PIXELS_PER_LINE 2
1533#define GET_SNAPSHOT_LINE_PER_FRAME 3
1534#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1535#define GET_SNAPSHOT_FPS 5
1536#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1537
1538struct msm_camsensor_info {
1539 char name[MAX_SENSOR_NAME];
1540 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001541 uint8_t strobe_flash_enabled;
1542 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301543 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001544 int8_t total_steps;
1545 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001546 enum flash_type flashtype;
1547 enum sensor_type_t sensor_type;
1548 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1549 uint32_t camera_type; /* msm_camera_type */
1550 int mount_angle;
1551 uint32_t max_width;
1552 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001553};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001554
1555#define V4L2_SINGLE_PLANE 0
1556#define V4L2_MULTI_PLANE_Y 0
1557#define V4L2_MULTI_PLANE_CBCR 1
1558#define V4L2_MULTI_PLANE_CB 1
1559#define V4L2_MULTI_PLANE_CR 2
1560
1561struct plane_data {
1562 int plane_id;
1563 uint32_t offset;
1564 unsigned long size;
1565};
1566
1567struct img_plane_info {
1568 uint32_t width;
1569 uint32_t height;
1570 uint32_t pixelformat;
1571 uint8_t buffer_type; /*Single/Multi planar*/
1572 uint8_t output_port;
1573 uint32_t ext_mode;
1574 uint8_t num_planes;
1575 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001576 uint32_t sp_y_offset;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001577 uint8_t vpe_can_use;
1578};
1579
Kevin Chan210061f2012-02-14 20:56:16 -08001580#define QCAMERA_NAME "qcamera"
1581#define QCAMERA_DEVICE_GROUP_ID 1
1582#define QCAMERA_VNODE_GROUP_ID 2
1583
Kevin Chan94b4c832012-03-02 21:27:16 -08001584#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001585 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001586
1587#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001588 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001589
1590#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001591 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001592
1593#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07001594 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001595
1596#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07001597 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001598
Sunid Wilson4584b5f2012-04-13 12:48:25 -07001599#define MSM_CAM_IOCTL_SEND_EVENT \
1600 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1601
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07001602#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1603 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1604
Kevin Chan41a38702012-06-06 22:25:41 -07001605#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1606 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1607
Kevin Chan94b4c832012-03-02 21:27:16 -08001608struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07001609 uint32_t id;
Kevin Chan94b4c832012-03-02 21:27:16 -08001610 void __user *ioctl_ptr;
Kevin Chan41a38702012-06-06 22:25:41 -07001611 uint32_t len;
Kevin Chan94b4c832012-03-02 21:27:16 -08001612};
1613
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07001614enum msm_camss_irq_idx {
1615 CAMERA_SS_IRQ_0,
1616 CAMERA_SS_IRQ_1,
1617 CAMERA_SS_IRQ_2,
1618 CAMERA_SS_IRQ_3,
1619 CAMERA_SS_IRQ_4,
1620 CAMERA_SS_IRQ_5,
1621 CAMERA_SS_IRQ_6,
1622 CAMERA_SS_IRQ_7,
1623 CAMERA_SS_IRQ_8,
1624 CAMERA_SS_IRQ_9,
1625 CAMERA_SS_IRQ_10,
1626 CAMERA_SS_IRQ_11,
1627 CAMERA_SS_IRQ_12,
1628 CAMERA_SS_IRQ_MAX
1629};
1630
1631enum msm_cam_hw_idx {
1632 MSM_CAM_HW_MICRO,
1633 MSM_CAM_HW_CCI,
1634 MSM_CAM_HW_CSI0,
1635 MSM_CAM_HW_CSI1,
1636 MSM_CAM_HW_CSI2,
1637 MSM_CAM_HW_CSI3,
1638 MSM_CAM_HW_ISPIF,
1639 MSM_CAM_HW_CPP,
1640 MSM_CAM_HW_VFE0,
1641 MSM_CAM_HW_VFE1,
1642 MSM_CAM_HW_JPEG0,
1643 MSM_CAM_HW_JPEG1,
1644 MSM_CAM_HW_JPEG2,
1645 MSM_CAM_HW_MAX
1646};
1647
1648struct msm_camera_irq_cfg {
1649 /* Bit mask of all the camera hardwares that needs to
1650 * be composited into a single IRQ to the MSM.
1651 * Current usage: (may be updated based on hw changes)
1652 * Bits 31:13 - Reserved.
1653 * Bits 12:0
1654 * 12 - MSM_CAM_HW_JPEG2
1655 * 11 - MSM_CAM_HW_JPEG1
1656 * 10 - MSM_CAM_HW_JPEG0
1657 * 9 - MSM_CAM_HW_VFE1
1658 * 8 - MSM_CAM_HW_VFE0
1659 * 7 - MSM_CAM_HW_CPP
1660 * 6 - MSM_CAM_HW_ISPIF
1661 * 5 - MSM_CAM_HW_CSI3
1662 * 4 - MSM_CAM_HW_CSI2
1663 * 3 - MSM_CAM_HW_CSI1
1664 * 2 - MSM_CAM_HW_CSI0
1665 * 1 - MSM_CAM_HW_CCI
1666 * 0 - MSM_CAM_HW_MICRO
1667 */
1668 uint32_t cam_hw_mask;
1669 uint8_t irq_idx;
1670 uint8_t num_hwcore;
1671};
1672
1673#define MSM_IRQROUTER_CFG_COMPIRQ \
1674 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
1675
Kevin Chan73ec7282012-06-07 01:32:00 -07001676#define MAX_NUM_CPP_STRIPS 8
1677
1678enum msm_cpp_frame_type {
1679 MSM_CPP_OFFLINE_FRAME,
1680 MSM_CPP_REALTIME_FRAME,
1681};
1682
1683struct msm_cpp_frame_strip_info {
1684 int scale_v_en;
1685 int scale_h_en;
1686
1687 int upscale_v_en;
1688 int upscale_h_en;
1689
1690 int src_start_x;
1691 int src_end_x;
1692 int src_start_y;
1693 int src_end_y;
1694
1695 /* Padding is required for upscaler because it does not
1696 * pad internally like other blocks, also needed for rotation
1697 * rotation expects all the blocks in the stripe to be the same size
1698 * Padding is done such that all the extra padded pixels
1699 * are on the right and bottom
1700 */
1701 int pad_bottom;
1702 int pad_top;
1703 int pad_right;
1704 int pad_left;
1705
1706 int v_init_phase;
1707 int h_init_phase;
1708 int h_phase_step;
1709 int v_phase_step;
1710
1711 int prescale_crop_width_first_pixel;
1712 int prescale_crop_width_last_pixel;
1713 int prescale_crop_height_first_line;
1714 int prescale_crop_height_last_line;
1715
1716 int postscale_crop_height_first_line;
1717 int postscale_crop_height_last_line;
1718 int postscale_crop_width_first_pixel;
1719 int postscale_crop_width_last_pixel;
1720
1721 int dst_start_x;
1722 int dst_end_x;
1723 int dst_start_y;
1724 int dst_end_y;
1725
1726 int bytes_per_pixel;
1727 unsigned int source_address;
1728 unsigned int destination_address;
1729 unsigned int src_stride;
1730 unsigned int dst_stride;
1731 int rotate_270;
1732 int horizontal_flip;
1733 int vertical_flip;
1734 int scale_output_width;
1735 int scale_output_height;
1736};
1737
1738struct msm_cpp_frame_info_t {
1739 int32_t frame_id;
1740 uint32_t inst_id;
1741 uint32_t client_id;
1742 enum msm_cpp_frame_type frame_type;
1743 uint32_t num_strips;
1744 struct msm_cpp_frame_strip_info *strip_info;
1745};
1746
1747#define VIDIOC_MSM_CPP_CFG \
1748 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
1749
1750#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
1751 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
1752
1753#define VIDIOC_MSM_CPP_GET_INST_INFO \
1754 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
1755
1756#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
1757
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001758#endif /* __LINUX_MSM_CAMERA_H */