blob: d5924142d9096fd5c050523cb695567fa53a7538 [file] [log] [blame]
Jim Pariscffb4add2009-01-06 11:32:10 +00001/**
2 * ps3vram - Use extra PS3 video ram as MTD block device.
3 *
4 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
5 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
6 */
7
8#include <linux/io.h>
9#include <linux/init.h>
10#include <linux/kernel.h>
11#include <linux/list.h>
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/slab.h>
15#include <linux/version.h>
16#include <linux/gfp.h>
17#include <linux/delay.h>
18#include <linux/mtd/mtd.h>
19
20#include <asm/lv1call.h>
21#include <asm/ps3.h>
22
23#define DEVICE_NAME "ps3vram"
24
25#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
26#define XDR_IOIF 0x0c000000
27
28#define FIFO_BASE XDR_IOIF
29#define FIFO_SIZE (64 * 1024)
30
31#define DMA_PAGE_SIZE (4 * 1024)
32
33#define CACHE_PAGE_SIZE (256 * 1024)
34#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
35
36#define CACHE_OFFSET CACHE_PAGE_SIZE
37#define FIFO_OFFSET 0
38
39#define CTRL_PUT 0x10
40#define CTRL_GET 0x11
41#define CTRL_TOP 0x15
42
43#define UPLOAD_SUBCH 1
44#define DOWNLOAD_SUBCH 2
45
46#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
47#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
48
49#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
50
51struct mtd_info ps3vram_mtd;
52
53#define CACHE_PAGE_PRESENT 1
54#define CACHE_PAGE_DIRTY 2
55
Jim Pariscffb4add2009-01-06 11:32:10 +000056struct ps3vram_tag {
57 unsigned int address;
58 unsigned int flags;
59};
60
61struct ps3vram_cache {
62 unsigned int page_count;
63 unsigned int page_size;
64 struct ps3vram_tag *tags;
65};
66
67struct ps3vram_priv {
Geoff Levand993e62e2009-01-06 11:32:28 +000068 u64 memory_handle;
69 u64 context_handle;
70 u32 *ctrl;
71 u32 *reports;
72 u8 *base;
73 u8 *xdr_buf;
Jim Pariscffb4add2009-01-06 11:32:10 +000074
Geoff Levand993e62e2009-01-06 11:32:28 +000075 u32 *fifo_base;
76 u32 *fifo_ptr;
Jim Pariscffb4add2009-01-06 11:32:10 +000077
Geoff Levandf259d74e2009-01-06 11:32:21 +000078 struct device *dev;
Jim Pariscffb4add2009-01-06 11:32:10 +000079 struct ps3vram_cache cache;
80
81 /* Used to serialize cache/DMA operations */
82 struct mutex lock;
83};
84
85#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
86#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
87#define DMA_NOTIFIER_SIZE 0x40
Jim Pariscffb4add2009-01-06 11:32:10 +000088#define NOTIFIER 7 /* notifier used for completion report */
89
90/* A trailing '-' means to subtract off ps3fb_videomemory.size */
91char *size = "256M-";
92module_param(size, charp, 0);
93MODULE_PARM_DESC(size, "memory size");
94
Geoff Levand993e62e2009-01-06 11:32:28 +000095static u32 *ps3vram_get_notifier(u32 *reports, int notifier)
Jim Pariscffb4add2009-01-06 11:32:10 +000096{
97 return (void *) reports +
98 DMA_NOTIFIER_OFFSET_BASE +
99 DMA_NOTIFIER_SIZE * notifier;
100}
101
102static void ps3vram_notifier_reset(struct mtd_info *mtd)
103{
104 int i;
Geoff Levand993e62e2009-01-06 11:32:28 +0000105
Jim Pariscffb4add2009-01-06 11:32:10 +0000106 struct ps3vram_priv *priv = mtd->priv;
Geoff Levand993e62e2009-01-06 11:32:28 +0000107 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
Jim Pariscffb4add2009-01-06 11:32:10 +0000108 for (i = 0; i < 4; i++)
109 notify[i] = 0xffffffff;
110}
111
Geoff Levand60c0c592009-01-07 17:22:02 -0800112static int ps3vram_notifier_wait(struct mtd_info *mtd, unsigned int timeout_ms)
Jim Pariscffb4add2009-01-06 11:32:10 +0000113{
114 struct ps3vram_priv *priv = mtd->priv;
Geoff Levand993e62e2009-01-06 11:32:28 +0000115 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
Geoff Levand60c0c592009-01-07 17:22:02 -0800116 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
Jim Pariscffb4add2009-01-06 11:32:10 +0000117
118 do {
Geoff Levand60c0c592009-01-07 17:22:02 -0800119 if (!notify[3])
Jim Pariscffb4add2009-01-06 11:32:10 +0000120 return 0;
Geoff Levand60c0c592009-01-07 17:22:02 -0800121 msleep(1);
122 } while (time_before(jiffies, timeout));
Jim Pariscffb4add2009-01-06 11:32:10 +0000123
Geoff Levand60c0c592009-01-07 17:22:02 -0800124 return -ETIMEDOUT;
Jim Pariscffb4add2009-01-06 11:32:10 +0000125}
126
Jim Pariscffb4add2009-01-06 11:32:10 +0000127static void ps3vram_init_ring(struct mtd_info *mtd)
128{
129 struct ps3vram_priv *priv = mtd->priv;
130
131 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
132 priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET;
133}
134
Geoff Levand60c0c592009-01-07 17:22:02 -0800135static int ps3vram_wait_ring(struct mtd_info *mtd, unsigned int timeout_ms)
Jim Pariscffb4add2009-01-06 11:32:10 +0000136{
137 struct ps3vram_priv *priv = mtd->priv;
Geoff Levand60c0c592009-01-07 17:22:02 -0800138 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
Jim Pariscffb4add2009-01-06 11:32:10 +0000139
Geoff Levand60c0c592009-01-07 17:22:02 -0800140 do {
Jim Pariscffb4add2009-01-06 11:32:10 +0000141 if (priv->ctrl[CTRL_PUT] == priv->ctrl[CTRL_GET])
Geoff Levand60c0c592009-01-07 17:22:02 -0800142 return 0;
143 msleep(1);
144 } while (time_before(jiffies, timeout));
Jim Pariscffb4add2009-01-06 11:32:10 +0000145
Geoff Levand60c0c592009-01-07 17:22:02 -0800146 dev_dbg(priv->dev, "%s:%d: FIFO timeout (%08x/%08x/%08x)\n", __func__,
147 __LINE__, priv->ctrl[CTRL_PUT], priv->ctrl[CTRL_GET],
148 priv->ctrl[CTRL_TOP]);
149
150 return -ETIMEDOUT;
Jim Pariscffb4add2009-01-06 11:32:10 +0000151}
152
Geoff Levand993e62e2009-01-06 11:32:28 +0000153static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
Jim Pariscffb4add2009-01-06 11:32:10 +0000154{
155 *(priv->fifo_ptr)++ = data;
156}
157
Geoff Levand993e62e2009-01-06 11:32:28 +0000158static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan,
159 u32 tag, u32 size)
Jim Pariscffb4add2009-01-06 11:32:10 +0000160{
161 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
162}
163
164static void ps3vram_rewind_ring(struct mtd_info *mtd)
165{
166 struct ps3vram_priv *priv = mtd->priv;
167 u64 status;
168
169 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
170
171 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
172
173 /* asking the HV for a blit will kick the fifo */
174 status = lv1_gpu_context_attribute(priv->context_handle,
175 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
176 0, 0, 0, 0);
177 if (status)
Geoff Levandf259d74e2009-01-06 11:32:21 +0000178 dev_err(priv->dev, "%s:%d: lv1_gpu_context_attribute failed\n",
179 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000180
181 priv->fifo_ptr = priv->fifo_base;
182}
183
184static void ps3vram_fire_ring(struct mtd_info *mtd)
185{
186 struct ps3vram_priv *priv = mtd->priv;
187 u64 status;
188
189 mutex_lock(&ps3_gpu_mutex);
190
191 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET +
Geoff Levand993e62e2009-01-06 11:32:28 +0000192 (priv->fifo_ptr - priv->fifo_base) * sizeof(u32);
Jim Pariscffb4add2009-01-06 11:32:10 +0000193
194 /* asking the HV for a blit will kick the fifo */
195 status = lv1_gpu_context_attribute(priv->context_handle,
196 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
197 0, 0, 0, 0);
198 if (status)
Geoff Levandf259d74e2009-01-06 11:32:21 +0000199 dev_err(priv->dev, "%s:%d: lv1_gpu_context_attribute failed\n",
200 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000201
Geoff Levand993e62e2009-01-06 11:32:28 +0000202 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
203 FIFO_SIZE - 1024) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000204 dev_dbg(priv->dev, "%s:%d: fifo full, rewinding\n", __func__,
205 __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000206 ps3vram_wait_ring(mtd, 200);
207 ps3vram_rewind_ring(mtd);
208 }
209
210 mutex_unlock(&ps3_gpu_mutex);
211}
212
213static void ps3vram_bind(struct mtd_info *mtd)
214{
215 struct ps3vram_priv *priv = mtd->priv;
216
217 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
218 ps3vram_out_ring(priv, 0x31337303);
219 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
220 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
221 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
222 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
223
224 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
225 ps3vram_out_ring(priv, 0x3137c0de);
226 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
227 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
228 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
229 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
230
231 ps3vram_fire_ring(mtd);
232}
233
234static int ps3vram_upload(struct mtd_info *mtd, unsigned int src_offset,
235 unsigned int dst_offset, int len, int count)
236{
237 struct ps3vram_priv *priv = mtd->priv;
238
239 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
240 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
241 ps3vram_out_ring(priv, XDR_IOIF + src_offset);
242 ps3vram_out_ring(priv, dst_offset);
243 ps3vram_out_ring(priv, len);
244 ps3vram_out_ring(priv, len);
245 ps3vram_out_ring(priv, len);
246 ps3vram_out_ring(priv, count);
247 ps3vram_out_ring(priv, (1 << 8) | 1);
248 ps3vram_out_ring(priv, 0);
249
250 ps3vram_notifier_reset(mtd);
251 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
252 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
253 ps3vram_out_ring(priv, 0);
254 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
255 ps3vram_out_ring(priv, 0);
256 ps3vram_fire_ring(mtd);
257 if (ps3vram_notifier_wait(mtd, 200) < 0) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000258 dev_dbg(priv->dev, "%s:%d: notifier timeout\n", __func__,
259 __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000260 return -1;
261 }
262
263 return 0;
264}
265
266static int ps3vram_download(struct mtd_info *mtd, unsigned int src_offset,
267 unsigned int dst_offset, int len, int count)
268{
269 struct ps3vram_priv *priv = mtd->priv;
270
271 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
272 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
273 ps3vram_out_ring(priv, src_offset);
274 ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
275 ps3vram_out_ring(priv, len);
276 ps3vram_out_ring(priv, len);
277 ps3vram_out_ring(priv, len);
278 ps3vram_out_ring(priv, count);
279 ps3vram_out_ring(priv, (1 << 8) | 1);
280 ps3vram_out_ring(priv, 0);
281
282 ps3vram_notifier_reset(mtd);
283 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
284 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
285 ps3vram_out_ring(priv, 0);
286 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
287 ps3vram_out_ring(priv, 0);
288 ps3vram_fire_ring(mtd);
289 if (ps3vram_notifier_wait(mtd, 200) < 0) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000290 dev_dbg(priv->dev, "%s:%d: notifier timeout\n", __func__,
291 __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000292 return -1;
293 }
294
295 return 0;
296}
297
298static void ps3vram_cache_evict(struct mtd_info *mtd, int entry)
299{
300 struct ps3vram_priv *priv = mtd->priv;
301 struct ps3vram_cache *cache = &priv->cache;
302
303 if (cache->tags[entry].flags & CACHE_PAGE_DIRTY) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000304 dev_dbg(priv->dev, "%s:%d: flushing %d : 0x%08x\n", __func__,
305 __LINE__, entry, cache->tags[entry].address);
Jim Pariscffb4add2009-01-06 11:32:10 +0000306 if (ps3vram_upload(mtd,
307 CACHE_OFFSET + entry * cache->page_size,
308 cache->tags[entry].address,
309 DMA_PAGE_SIZE,
310 cache->page_size / DMA_PAGE_SIZE) < 0) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000311 dev_dbg(priv->dev, "%s:%d: failed to upload from "
312 "0x%x to 0x%x size 0x%x\n", __func__, __LINE__,
313 entry * cache->page_size,
314 cache->tags[entry].address, cache->page_size);
Jim Pariscffb4add2009-01-06 11:32:10 +0000315 }
316 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
317 }
318}
319
320static void ps3vram_cache_load(struct mtd_info *mtd, int entry,
321 unsigned int address)
322{
323 struct ps3vram_priv *priv = mtd->priv;
324 struct ps3vram_cache *cache = &priv->cache;
325
Geoff Levandf259d74e2009-01-06 11:32:21 +0000326 dev_dbg(priv->dev, "%s:%d: fetching %d : 0x%08x\n", __func__, __LINE__,
327 entry, address);
Jim Pariscffb4add2009-01-06 11:32:10 +0000328 if (ps3vram_download(mtd,
329 address,
330 CACHE_OFFSET + entry * cache->page_size,
331 DMA_PAGE_SIZE,
332 cache->page_size / DMA_PAGE_SIZE) < 0) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000333 dev_err(priv->dev, "%s:%d: failed to download from "
334 "0x%x to 0x%x size 0x%x\n", __func__, __LINE__, address,
335 entry * cache->page_size, cache->page_size);
Jim Pariscffb4add2009-01-06 11:32:10 +0000336 }
337
338 cache->tags[entry].address = address;
339 cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
340}
341
342
343static void ps3vram_cache_flush(struct mtd_info *mtd)
344{
345 struct ps3vram_priv *priv = mtd->priv;
346 struct ps3vram_cache *cache = &priv->cache;
347 int i;
348
Geoff Levandf259d74e2009-01-06 11:32:21 +0000349 dev_dbg(priv->dev, "%s:%d: FLUSH\n", __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000350 for (i = 0; i < cache->page_count; i++) {
351 ps3vram_cache_evict(mtd, i);
352 cache->tags[i].flags = 0;
353 }
354}
355
356static unsigned int ps3vram_cache_match(struct mtd_info *mtd, loff_t address)
357{
358 struct ps3vram_priv *priv = mtd->priv;
359 struct ps3vram_cache *cache = &priv->cache;
360 unsigned int base;
361 unsigned int offset;
362 int i;
363 static int counter;
364
365 offset = (unsigned int) (address & (cache->page_size - 1));
366 base = (unsigned int) (address - offset);
367
368 /* fully associative check */
369 for (i = 0; i < cache->page_count; i++) {
370 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
371 cache->tags[i].address == base) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000372 dev_dbg(priv->dev, "%s:%d: found entry %d : 0x%08x\n",
373 __func__, __LINE__, i, cache->tags[i].address);
Jim Pariscffb4add2009-01-06 11:32:10 +0000374 return i;
375 }
376 }
377
378 /* choose a random entry */
379 i = (jiffies + (counter++)) % cache->page_count;
Geoff Levandf259d74e2009-01-06 11:32:21 +0000380 dev_dbg(priv->dev, "%s:%d: using entry %d\n", __func__, __LINE__, i);
Jim Pariscffb4add2009-01-06 11:32:10 +0000381
382 ps3vram_cache_evict(mtd, i);
383 ps3vram_cache_load(mtd, i, base);
384
385 return i;
386}
387
388static int ps3vram_cache_init(struct mtd_info *mtd)
389{
390 struct ps3vram_priv *priv = mtd->priv;
391
Jim Pariscffb4add2009-01-06 11:32:10 +0000392 priv->cache.page_count = CACHE_PAGE_COUNT;
393 priv->cache.page_size = CACHE_PAGE_SIZE;
394 priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) *
395 CACHE_PAGE_COUNT, GFP_KERNEL);
396 if (priv->cache.tags == NULL) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000397 dev_err(priv->dev, "%s:%d: could not allocate cache tags\n",
398 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000399 return -ENOMEM;
400 }
401
Geoff Levandf259d74e2009-01-06 11:32:21 +0000402 dev_info(priv->dev, "created ram cache: %d entries, %d KiB each\n",
403 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
404
Jim Pariscffb4add2009-01-06 11:32:10 +0000405 return 0;
406}
407
408static void ps3vram_cache_cleanup(struct mtd_info *mtd)
409{
410 struct ps3vram_priv *priv = mtd->priv;
411
412 ps3vram_cache_flush(mtd);
413 kfree(priv->cache.tags);
414}
415
416static int ps3vram_erase(struct mtd_info *mtd, struct erase_info *instr)
417{
418 struct ps3vram_priv *priv = mtd->priv;
419
420 if (instr->addr + instr->len > mtd->size)
421 return -EINVAL;
422
423 mutex_lock(&priv->lock);
424
425 ps3vram_cache_flush(mtd);
426
427 /* Set bytes to 0xFF */
428 memset(priv->base + instr->addr, 0xFF, instr->len);
429
430 mutex_unlock(&priv->lock);
431
432 instr->state = MTD_ERASE_DONE;
433 mtd_erase_callback(instr);
434
435 return 0;
436}
437
Jim Pariscffb4add2009-01-06 11:32:10 +0000438static int ps3vram_read(struct mtd_info *mtd, loff_t from, size_t len,
439 size_t *retlen, u_char *buf)
440{
441 struct ps3vram_priv *priv = mtd->priv;
442 unsigned int cached, count;
443
Geoff Levandf259d74e2009-01-06 11:32:21 +0000444 dev_dbg(priv->dev, "%s:%d: from=0x%08x len=0x%zx\n", __func__, __LINE__,
445 (unsigned int)from, len);
Jim Pariscffb4add2009-01-06 11:32:10 +0000446
447 if (from >= mtd->size)
448 return -EINVAL;
449
450 if (len > mtd->size - from)
451 len = mtd->size - from;
452
453 /* Copy from vram to buf */
454 count = len;
455 while (count) {
456 unsigned int offset, avail;
457 unsigned int entry;
458
459 offset = (unsigned int) (from & (priv->cache.page_size - 1));
460 avail = priv->cache.page_size - offset;
461
462 mutex_lock(&priv->lock);
463
464 entry = ps3vram_cache_match(mtd, from);
465 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
466
Geoff Levandf259d74e2009-01-06 11:32:21 +0000467 dev_dbg(priv->dev, "%s:%d: from=%08x cached=%08x offset=%08x "
468 "avail=%08x count=%08x\n", __func__, __LINE__,
469 (unsigned int)from, cached, offset, avail, count);
Jim Pariscffb4add2009-01-06 11:32:10 +0000470
471 if (avail > count)
472 avail = count;
473 memcpy(buf, priv->xdr_buf + cached, avail);
474
475 mutex_unlock(&priv->lock);
476
477 buf += avail;
478 count -= avail;
479 from += avail;
480 }
481
482 *retlen = len;
483 return 0;
484}
485
486static int ps3vram_write(struct mtd_info *mtd, loff_t to, size_t len,
487 size_t *retlen, const u_char *buf)
488{
489 struct ps3vram_priv *priv = mtd->priv;
490 unsigned int cached, count;
491
492 if (to >= mtd->size)
493 return -EINVAL;
494
495 if (len > mtd->size - to)
496 len = mtd->size - to;
497
498 /* Copy from buf to vram */
499 count = len;
500 while (count) {
501 unsigned int offset, avail;
502 unsigned int entry;
503
504 offset = (unsigned int) (to & (priv->cache.page_size - 1));
505 avail = priv->cache.page_size - offset;
506
507 mutex_lock(&priv->lock);
508
509 entry = ps3vram_cache_match(mtd, to);
510 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
511
Geoff Levandf259d74e2009-01-06 11:32:21 +0000512 dev_dbg(priv->dev, "%s:%d: to=%08x cached=%08x offset=%08x "
513 "avail=%08x count=%08x\n", __func__, __LINE__,
514 (unsigned int)to, cached, offset, avail, count);
Jim Pariscffb4add2009-01-06 11:32:10 +0000515
516 if (avail > count)
517 avail = count;
518 memcpy(priv->xdr_buf + cached, buf, avail);
519
520 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
521
522 mutex_unlock(&priv->lock);
523
524 buf += avail;
525 count -= avail;
526 to += avail;
527 }
528
529 *retlen = len;
530 return 0;
531}
532
533static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
534{
535 struct ps3vram_priv *priv;
Geoff Levand993e62e2009-01-06 11:32:28 +0000536 int status;
537 u64 ddr_lpar;
538 u64 ctrl_lpar;
539 u64 info_lpar;
540 u64 reports_lpar;
541 u64 ddr_size;
542 u64 reports_size;
Jim Pariscffb4add2009-01-06 11:32:10 +0000543 int ret = -ENOMEM;
544 char *rest;
545
546 ret = -EIO;
547 ps3vram_mtd.priv = kzalloc(sizeof(struct ps3vram_priv), GFP_KERNEL);
548 if (!ps3vram_mtd.priv)
549 goto out;
550 priv = ps3vram_mtd.priv;
551
552 mutex_init(&priv->lock);
Geoff Levandf259d74e2009-01-06 11:32:21 +0000553 priv->dev = &dev->core;
Jim Pariscffb4add2009-01-06 11:32:10 +0000554
555 /* Allocate XDR buffer (1MiB aligned) */
Geoff Levand993e62e2009-01-06 11:32:28 +0000556 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
557 get_order(XDR_BUF_SIZE));
Jim Pariscffb4add2009-01-06 11:32:10 +0000558 if (priv->xdr_buf == NULL) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000559 dev_dbg(&dev->core, "%s:%d: could not allocate XDR buffer\n",
560 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000561 ret = -ENOMEM;
562 goto out_free_priv;
563 }
564
565 /* Put FIFO at begginning of XDR buffer */
Geoff Levand993e62e2009-01-06 11:32:28 +0000566 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
Jim Pariscffb4add2009-01-06 11:32:10 +0000567 priv->fifo_ptr = priv->fifo_base;
568
569 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
570 if (ps3_open_hv_device(dev)) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000571 dev_err(&dev->core, "%s:%d: ps3_open_hv_device failed\n",
572 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000573 ret = -EAGAIN;
574 goto out_close_gpu;
575 }
576
577 /* Request memory */
578 status = -1;
579 ddr_size = memparse(size, &rest);
580 if (*rest == '-')
581 ddr_size -= ps3fb_videomemory.size;
582 ddr_size = ALIGN(ddr_size, 1024*1024);
583 if (ddr_size <= 0) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000584 dev_err(&dev->core, "%s:%d: specified size is too small\n",
585 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000586 ret = -EINVAL;
587 goto out_close_gpu;
588 }
589
590 while (ddr_size > 0) {
591 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
592 &priv->memory_handle,
593 &ddr_lpar);
Geoff Levand993e62e2009-01-06 11:32:28 +0000594 if (!status)
Jim Pariscffb4add2009-01-06 11:32:10 +0000595 break;
596 ddr_size -= 1024*1024;
597 }
Geoff Levand993e62e2009-01-06 11:32:28 +0000598 if (status || ddr_size <= 0) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000599 dev_err(&dev->core, "%s:%d: lv1_gpu_memory_allocate failed\n",
600 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000601 ret = -ENOMEM;
602 goto out_free_xdr_buf;
603 }
Jim Pariscffb4add2009-01-06 11:32:10 +0000604
605 /* Request context */
606 status = lv1_gpu_context_allocate(priv->memory_handle,
607 0,
608 &priv->context_handle,
609 &ctrl_lpar,
610 &info_lpar,
611 &reports_lpar,
612 &reports_size);
613 if (status) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000614 dev_err(&dev->core, "%s:%d: lv1_gpu_context_allocate failed\n",
615 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000616 ret = -ENOMEM;
617 goto out_free_memory;
618 }
619
620 /* Map XDR buffer to RSX */
621 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
622 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
623 XDR_BUF_SIZE, 0);
624 if (status) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000625 dev_err(&dev->core, "%s:%d: lv1_gpu_context_iomap failed\n",
626 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000627 ret = -ENOMEM;
628 goto out_free_context;
629 }
630
631 priv->base = ioremap(ddr_lpar, ddr_size);
632 if (!priv->base) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000633 dev_err(&dev->core, "%s:%d: ioremap failed\n", __func__,
634 __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000635 ret = -ENOMEM;
636 goto out_free_context;
637 }
638
639 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
640 if (!priv->ctrl) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000641 dev_err(&dev->core, "%s:%d: ioremap failed\n", __func__,
642 __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000643 ret = -ENOMEM;
644 goto out_unmap_vram;
645 }
646
647 priv->reports = ioremap(reports_lpar, reports_size);
648 if (!priv->reports) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000649 dev_err(&dev->core, "%s:%d: ioremap failed\n", __func__,
650 __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000651 ret = -ENOMEM;
652 goto out_unmap_ctrl;
653 }
654
655 mutex_lock(&ps3_gpu_mutex);
656 ps3vram_init_ring(&ps3vram_mtd);
657 mutex_unlock(&ps3_gpu_mutex);
658
659 ps3vram_mtd.name = "ps3vram";
660 ps3vram_mtd.size = ddr_size;
661 ps3vram_mtd.flags = MTD_CAP_RAM;
662 ps3vram_mtd.erase = ps3vram_erase;
663 ps3vram_mtd.point = NULL;
664 ps3vram_mtd.unpoint = NULL;
665 ps3vram_mtd.read = ps3vram_read;
666 ps3vram_mtd.write = ps3vram_write;
667 ps3vram_mtd.owner = THIS_MODULE;
668 ps3vram_mtd.type = MTD_RAM;
669 ps3vram_mtd.erasesize = CACHE_PAGE_SIZE;
670 ps3vram_mtd.writesize = 1;
671
672 ps3vram_bind(&ps3vram_mtd);
673
674 mutex_lock(&ps3_gpu_mutex);
675 ret = ps3vram_wait_ring(&ps3vram_mtd, 100);
676 mutex_unlock(&ps3_gpu_mutex);
677 if (ret < 0) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000678 dev_err(&dev->core, "%s:%d: failed to initialize channels\n",
679 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000680 ret = -ETIMEDOUT;
681 goto out_unmap_reports;
682 }
683
684 ps3vram_cache_init(&ps3vram_mtd);
685
686 if (add_mtd_device(&ps3vram_mtd)) {
Geoff Levandf259d74e2009-01-06 11:32:21 +0000687 dev_err(&dev->core, "%s:%d: add_mtd_device failed\n",
688 __func__, __LINE__);
Jim Pariscffb4add2009-01-06 11:32:10 +0000689 ret = -EAGAIN;
690 goto out_cache_cleanup;
691 }
692
Geoff Levandf259d74e2009-01-06 11:32:21 +0000693 dev_info(&dev->core, "reserved %u MiB of gpu memory\n",
694 (unsigned int)(ddr_size / 1024 / 1024));
695
Jim Pariscffb4add2009-01-06 11:32:10 +0000696 return 0;
697
698out_cache_cleanup:
699 ps3vram_cache_cleanup(&ps3vram_mtd);
700out_unmap_reports:
701 iounmap(priv->reports);
702out_unmap_ctrl:
703 iounmap(priv->ctrl);
704out_unmap_vram:
705 iounmap(priv->base);
706out_free_context:
707 lv1_gpu_context_free(priv->context_handle);
708out_free_memory:
709 lv1_gpu_memory_free(priv->memory_handle);
710out_close_gpu:
711 ps3_close_hv_device(dev);
712out_free_xdr_buf:
713 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
714out_free_priv:
715 kfree(ps3vram_mtd.priv);
716 ps3vram_mtd.priv = NULL;
717out:
718 return ret;
719}
720
721static int ps3vram_shutdown(struct ps3_system_bus_device *dev)
722{
723 struct ps3vram_priv *priv;
724
725 priv = ps3vram_mtd.priv;
726
727 del_mtd_device(&ps3vram_mtd);
728 ps3vram_cache_cleanup(&ps3vram_mtd);
729 iounmap(priv->reports);
730 iounmap(priv->ctrl);
731 iounmap(priv->base);
732 lv1_gpu_context_free(priv->context_handle);
733 lv1_gpu_memory_free(priv->memory_handle);
734 ps3_close_hv_device(dev);
735 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
736 kfree(priv);
737 return 0;
738}
739
740static struct ps3_system_bus_driver ps3vram_driver = {
741 .match_id = PS3_MATCH_ID_GPU,
742 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
743 .core.name = DEVICE_NAME,
744 .core.owner = THIS_MODULE,
745 .probe = ps3vram_probe,
746 .remove = ps3vram_shutdown,
747 .shutdown = ps3vram_shutdown,
748};
749
750static int __init ps3vram_init(void)
751{
752 return ps3_system_bus_driver_register(&ps3vram_driver);
753}
754
755static void __exit ps3vram_exit(void)
756{
757 ps3_system_bus_driver_unregister(&ps3vram_driver);
758}
759
760module_init(ps3vram_init);
761module_exit(ps3vram_exit);
762
763MODULE_LICENSE("GPL");
764MODULE_AUTHOR("Jim Paris <jim@jtan.com>");
765MODULE_DESCRIPTION("MTD driver for PS3 video RAM");
Geert Uytterhoeven0a2d15b2009-01-06 11:32:03 +0000766MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);