| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| Lennert Buytenhek | 3f7e581 | 2006-09-18 23:10:26 +0100 | [diff] [blame] | 2 | * linux/include/asm-arm/arch-iop33x/irqs.h |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
| 4 | * Author: Dave Jiang (dave.jiang@intel.com) |
| 5 | * Copyright: (C) 2003 Intel Corp. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | */ |
| Lennert Buytenhek | 3f7e581 | 2006-09-18 23:10:26 +0100 | [diff] [blame] | 12 | #ifndef _IRQS_H_ |
| 13 | #define _IRQS_H_ |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | |
| 15 | /* |
| 16 | * IOP80331 chipset interrupts |
| 17 | */ |
| Lennert Buytenhek | 610300e | 2006-09-18 23:22:24 +0100 | [diff] [blame^] | 18 | #define IRQ_IOP331_DMA0_EOT 0 |
| 19 | #define IRQ_IOP331_DMA0_EOC 1 |
| 20 | #define IRQ_IOP331_DMA1_EOT 2 |
| 21 | #define IRQ_IOP331_DMA1_EOC 3 |
| 22 | #define IRQ_IOP331_AA_EOT 6 |
| 23 | #define IRQ_IOP331_AA_EOC 7 |
| 24 | #define IRQ_IOP331_TIMER0 8 |
| 25 | #define IRQ_IOP331_TIMER1 9 |
| 26 | #define IRQ_IOP331_I2C_0 10 |
| 27 | #define IRQ_IOP331_I2C_1 11 |
| 28 | #define IRQ_IOP331_MSG 12 |
| 29 | #define IRQ_IOP331_MSGIBQ 13 |
| 30 | #define IRQ_IOP331_ATU_BIST 14 |
| 31 | #define IRQ_IOP331_PERFMON 15 |
| 32 | #define IRQ_IOP331_CORE_PMU 16 |
| 33 | #define IRQ_IOP331_XINT0 24 |
| 34 | #define IRQ_IOP331_XINT1 25 |
| 35 | #define IRQ_IOP331_XINT2 26 |
| 36 | #define IRQ_IOP331_XINT3 27 |
| 37 | #define IRQ_IOP331_XINT8 32 |
| 38 | #define IRQ_IOP331_XINT9 33 |
| 39 | #define IRQ_IOP331_XINT10 34 |
| 40 | #define IRQ_IOP331_XINT11 35 |
| 41 | #define IRQ_IOP331_XINT12 36 |
| 42 | #define IRQ_IOP331_XINT13 37 |
| 43 | #define IRQ_IOP331_XINT14 38 |
| 44 | #define IRQ_IOP331_XINT15 39 |
| 45 | #define IRQ_IOP331_UART0 51 |
| 46 | #define IRQ_IOP331_UART1 52 |
| 47 | #define IRQ_IOP331_PBIE 53 |
| 48 | #define IRQ_IOP331_ATU_CRW 54 |
| 49 | #define IRQ_IOP331_ATU_ERR 55 |
| 50 | #define IRQ_IOP331_MCU_ERR 56 |
| 51 | #define IRQ_IOP331_DMA0_ERR 57 |
| 52 | #define IRQ_IOP331_DMA1_ERR 58 |
| 53 | #define IRQ_IOP331_AA_ERR 60 |
| 54 | #define IRQ_IOP331_MSG_ERR 62 |
| 55 | #define IRQ_IOP331_HPI 63 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | |
| Lennert Buytenhek | 610300e | 2006-09-18 23:22:24 +0100 | [diff] [blame^] | 57 | #define NR_IRQS 64 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 58 | |
| 59 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | /* |
| 61 | * Interrupts available on the IQ80331 board |
| 62 | */ |
| 63 | |
| 64 | /* |
| 65 | * On board devices |
| 66 | */ |
| 67 | #define IRQ_IQ80331_I82544 IRQ_IOP331_XINT0 |
| 68 | #define IRQ_IQ80331_UART0 IRQ_IOP331_UART0 |
| 69 | #define IRQ_IQ80331_UART1 IRQ_IOP331_UART1 |
| 70 | |
| 71 | /* |
| 72 | * PCI interrupts |
| 73 | */ |
| 74 | #define IRQ_IQ80331_INTA IRQ_IOP331_XINT0 |
| 75 | #define IRQ_IQ80331_INTB IRQ_IOP331_XINT1 |
| 76 | #define IRQ_IQ80331_INTC IRQ_IOP331_XINT2 |
| 77 | #define IRQ_IQ80331_INTD IRQ_IOP331_XINT3 |
| 78 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | /* |
| 80 | * Interrupts available on the IQ80332 board |
| 81 | */ |
| 82 | |
| 83 | /* |
| 84 | * On board devices |
| 85 | */ |
| 86 | #define IRQ_IQ80332_I82544 IRQ_IOP331_XINT0 |
| 87 | #define IRQ_IQ80332_UART0 IRQ_IOP331_UART0 |
| 88 | #define IRQ_IQ80332_UART1 IRQ_IOP331_UART1 |
| 89 | |
| 90 | /* |
| 91 | * PCI interrupts |
| 92 | */ |
| 93 | #define IRQ_IQ80332_INTA IRQ_IOP331_XINT0 |
| 94 | #define IRQ_IQ80332_INTB IRQ_IOP331_XINT1 |
| 95 | #define IRQ_IQ80332_INTC IRQ_IOP331_XINT2 |
| 96 | #define IRQ_IQ80332_INTD IRQ_IOP331_XINT3 |
| 97 | |
| Lennert Buytenhek | 3f7e581 | 2006-09-18 23:10:26 +0100 | [diff] [blame] | 98 | #endif // _IRQ_H_ |