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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/gpio_event.h>
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/board.h>
18#include <mach/msm_iomap.h>
19#include <mach/msm_hsusb.h>
20#include <mach/rpc_hsusb.h>
21#include <mach/rpc_pmapp.h>
22#include <mach/usbdiag.h>
23#include <mach/msm_memtypes.h>
24#include <mach/msm_serial_hs.h>
25#include <linux/usb/android.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/gpio.h>
29#include <mach/vreg.h>
30#include <mach/pmic.h>
31#include <mach/socinfo.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/mach/mmc.h>
35#include <linux/i2c.h>
36#include <linux/i2c/sx150x.h>
37#include <linux/gpio.h>
38#include <linux/android_pmem.h>
39#include <linux/bootmem.h>
40#include <linux/mfd/marimba.h>
41#include <mach/vreg.h>
42#include <linux/power_supply.h>
43#include <mach/rpc_pmapp.h>
44
45#include <mach/msm_battery.h>
46#include <linux/smsc911x.h>
47#include <linux/atmel_maxtouch.h>
48#include "devices.h"
49#include "timer.h"
50#include "devices-msm7x2xa.h"
51#include "pm.h"
52#include <mach/rpc_server_handset.h>
53#include <mach/socinfo.h>
54
55#define PMEM_KERNEL_EBI1_SIZE 0x3A000
56#define MSM_PMEM_AUDIO_SIZE 0x5B000
57#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
58#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
Rahul Kashyap181d5552011-07-07 10:39:23 +053059#define BAHAMA_SLAVE_ID_FM_REG 0x02
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#define FM_GPIO 83
61
62enum {
63 GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
64 GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
65 /* SURF expander */
66 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
67 GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
68 GPIO_WLAN_EXT_POR_N,
69 GPIO_DISPLAY_PWR_EN,
70 GPIO_BACKLIGHT_EN,
71 GPIO_PRESSURE_XCLR,
72 GPIO_VREG_S3_EXP,
73 GPIO_UBM2M_PWRDWN,
74 GPIO_ETM_MODE_CS_N,
75 GPIO_HOST_VBUS_EN,
76 GPIO_SPI_MOSI,
77 GPIO_SPI_MISO,
78 GPIO_SPI_CLK,
79 GPIO_SPI_CS0_N,
80 GPIO_CORE_EXPANDER_IO13,
81 GPIO_CORE_EXPANDER_IO14,
82 GPIO_CORE_EXPANDER_IO15,
83 /* Camera expander */
84 GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
85 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
86 GPIO_CAM_GP_AFBUSY,
87 GPIO_CAM_GP_CAM_PWDN,
88 GPIO_CAM_GP_CAM1MP_XCLR,
89 GPIO_CAM_GP_CAMIF_RESET_N,
90 GPIO_CAM_GP_STROBE_CE,
91 GPIO_CAM_GP_LED_EN1,
92 GPIO_CAM_GP_LED_EN2,
93};
94
95#if defined(CONFIG_GPIO_SX150X)
96enum {
97 SX150X_CORE,
98 SX150X_CAM,
99};
100
101static struct sx150x_platform_data sx150x_data[] __initdata = {
102 [SX150X_CORE] = {
103 .gpio_base = GPIO_CORE_EXPANDER_BASE,
104 .oscio_is_gpo = false,
105 .io_pullup_ena = 0,
106 .io_pulldn_ena = 0,
107 .io_open_drain_ena = 0xfef8,
108 .irq_summary = -1,
109 },
110 [SX150X_CAM] = {
111 .gpio_base = GPIO_CAM_EXPANDER_BASE,
112 .oscio_is_gpo = false,
113 .io_pullup_ena = 0,
114 .io_pulldn_ena = 0,
115 .io_open_drain_ena = 0x23,
116 .irq_summary = -1,
117 },
118};
119#endif
120
121#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
122
123 /* FM Platform power and shutdown routines */
124#define FPGA_MSM_CNTRL_REG2 0x90008010
125static void config_pcm_i2s_mode(int mode)
126{
127 void __iomem *cfg_ptr;
128 u8 reg2;
129
130 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
131
132 if (!cfg_ptr)
133 return;
134 if (mode) {
135 /*enable the pcm mode in FPGA*/
136 reg2 = readb_relaxed(cfg_ptr);
137 if (reg2 == 0) {
138 reg2 = 1;
139 writeb_relaxed(reg2, cfg_ptr);
140 }
141 } else {
142 /*enable i2s mode in FPGA*/
143 reg2 = readb_relaxed(cfg_ptr);
144 if (reg2 == 1) {
145 reg2 = 0;
146 writeb_relaxed(reg2, cfg_ptr);
147 }
148 }
149 iounmap(cfg_ptr);
150}
151
152static unsigned fm_i2s_config_power_on[] = {
153 /*FM_I2S_SD*/
154 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
155 /*FM_I2S_WS*/
156 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
157 /*FM_I2S_SCK*/
158 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
159};
160
161static unsigned fm_i2s_config_power_off[] = {
162 /*FM_I2S_SD*/
163 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
164 /*FM_I2S_WS*/
165 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
166 /*FM_I2S_SCK*/
167 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
168};
169
170static unsigned bt_config_power_on[] = {
171 /*RFR*/
172 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
173 /*CTS*/
174 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
175 /*RX*/
176 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
177 /*TX*/
178 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
179};
180static unsigned bt_config_pcm_on[] = {
181 /*PCM_DOUT*/
182 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
183 /*PCM_DIN*/
184 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
185 /*PCM_SYNC*/
186 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
187 /*PCM_CLK*/
188 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
189};
190static unsigned bt_config_power_off[] = {
191 /*RFR*/
192 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
193 /*CTS*/
194 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
195 /*RX*/
196 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
197 /*TX*/
198 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
199};
200static unsigned bt_config_pcm_off[] = {
201 /*PCM_DOUT*/
202 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
203 /*PCM_DIN*/
204 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
205 /*PCM_SYNC*/
206 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
207 /*PCM_CLK*/
208 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
209};
210
211static int config_i2s(int mode)
212{
213 int pin, rc = 0;
214
215 if (mode == FM_I2S_ON) {
216 if (machine_is_msm7x27a_surf())
217 config_pcm_i2s_mode(0);
218 pr_err("%s mode = FM_I2S_ON", __func__);
219 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
220 pin++) {
221 rc = gpio_tlmm_config(
222 fm_i2s_config_power_on[pin],
223 GPIO_CFG_ENABLE
224 );
225 if (rc < 0)
226 return rc;
227 }
228 } else if (mode == FM_I2S_OFF) {
229 pr_err("%s mode = FM_I2S_OFF", __func__);
230 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
231 pin++) {
232 rc = gpio_tlmm_config(
233 fm_i2s_config_power_off[pin],
234 GPIO_CFG_ENABLE
235 );
236 if (rc < 0)
237 return rc;
238 }
239 }
240 return rc;
241}
242static int config_pcm(int mode)
243{
244 int pin, rc = 0;
245
246 if (mode == BT_PCM_ON) {
247 if (machine_is_msm7x27a_surf())
248 config_pcm_i2s_mode(1);
249 pr_err("%s mode =BT_PCM_ON", __func__);
250 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
251 pin++) {
252 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
253 GPIO_CFG_ENABLE);
254 if (rc < 0)
255 return rc;
256 }
257 } else if (mode == BT_PCM_OFF) {
258 pr_err("%s mode =BT_PCM_OFF", __func__);
259 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
260 pin++) {
261 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
262 GPIO_CFG_ENABLE);
263 if (rc < 0)
264 return rc;
265 }
266
267 }
268
269 return rc;
270}
271
272static int msm_bahama_setup_pcm_i2s(int mode)
273{
274 int fm_state = 0, bt_state = 0;
275 int rc = 0;
276 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
277
278 fm_state = marimba_get_fm_status(&config);
279 bt_state = marimba_get_bt_status(&config);
280
281 switch (mode) {
282 case BT_PCM_ON:
283 case BT_PCM_OFF:
284 if (!fm_state)
285 rc = config_pcm(mode);
286 break;
287 case FM_I2S_ON:
288 rc = config_i2s(mode);
289 break;
290 case FM_I2S_OFF:
291 if (bt_state)
292 rc = config_pcm(BT_PCM_ON);
293 else
294 rc = config_i2s(mode);
295 break;
296 default:
297 rc = -EIO;
298 pr_err("%s:Unsupported mode", __func__);
299 }
300 return rc;
301}
302
Rahul Kashyap181d5552011-07-07 10:39:23 +0530303static int bt_set_gpio(int on)
304{
305 int rc = 0;
306 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
307
308 if (on) {
309 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
310 msleep(100);
311 } else {
312 if (!marimba_get_fm_status(&config) &&
313 !marimba_get_bt_status(&config)) {
314 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
315 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
316 msleep(100);
317 }
318 }
319 if (rc)
320 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
321
322 return rc;
323}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700324static struct vreg *fm_regulator;
325static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
326{
327 int rc = 0;
328 const char *id = "FMPW";
329 uint32_t irqcfg;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530330 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
331 u8 value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700332
333 /* Voting for 1.8V Regulator */
334 fm_regulator = vreg_get(NULL , "msme1");
335 if (IS_ERR(fm_regulator)) {
336 pr_err("%s: vreg get failed with : (%ld)\n",
337 __func__, PTR_ERR(fm_regulator));
338 return -EINVAL;
339 }
340
341 /* Set the voltage level to 1.8V */
342 rc = vreg_set_level(fm_regulator, 1800);
343 if (rc < 0) {
344 pr_err("%s: set regulator level failed with :(%d)\n",
345 __func__, rc);
346 goto fm_vreg_fail;
347 }
348
349 /* Enabling the 1.8V regulator */
350 rc = vreg_enable(fm_regulator);
351 if (rc) {
352 pr_err("%s: enable regulator failed with :(%d)\n",
353 __func__, rc);
354 goto fm_vreg_fail;
355 }
356
357 /* Voting for 19.2MHz clock */
358 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
359 PMAPP_CLOCK_VOTE_ON);
360 if (rc < 0) {
361 pr_err("%s: clock vote failed with :(%d)\n",
362 __func__, rc);
363 goto fm_clock_vote_fail;
364 }
365
Rahul Kashyap181d5552011-07-07 10:39:23 +0530366 rc = bt_set_gpio(1);
367 if (rc) {
368 pr_err("%s: bt_set_gpio = %d", __func__, rc);
369 goto fm_gpio_config_fail;
370 }
371 /*re-write FM Slave Id, after reset*/
372 value = BAHAMA_SLAVE_ID_FM_ADDR;
373 rc = marimba_write_bit_mask(&config,
374 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
375 if (rc < 0) {
376 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
377 goto fm_gpio_config_fail;
378 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700379 /* Configuring the FM GPIO */
380 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
381 GPIO_CFG_2MA);
382
383 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
384 if (rc) {
385 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
386 __func__, irqcfg, rc);
387 goto fm_gpio_config_fail;
388 }
389
390 return 0;
391
392fm_gpio_config_fail:
393 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
394 PMAPP_CLOCK_VOTE_OFF);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530395 bt_set_gpio(0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700396fm_clock_vote_fail:
397 vreg_disable(fm_regulator);
398
399fm_vreg_fail:
400 vreg_put(fm_regulator);
401
402 return rc;
403};
404
405static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
406{
407 int rc;
408 const char *id = "FMPW";
409
410 /* Releasing the GPIO line used by FM */
411 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
412 GPIO_CFG_2MA);
413
414 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
415 if (rc)
416 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
417 __func__, irqcfg, rc);
418
419 /* Releasing the 1.8V Regulator */
420 if (fm_regulator != NULL) {
421 rc = vreg_disable(fm_regulator);
422
423 if (rc)
424 pr_err("%s: disable regulator failed:(%d)\n",
425 __func__, rc);
426 fm_regulator = NULL;
427 }
428
429 /* Voting off the clock */
430 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
431 PMAPP_CLOCK_VOTE_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700432 if (rc < 0)
433 pr_err("%s: voting off failed with :(%d)\n",
434 __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530435 rc = bt_set_gpio(0);
436 if (rc)
437 pr_err("%s: bt_set_gpio = %d", __func__, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700438}
439
440static struct marimba_fm_platform_data marimba_fm_pdata = {
441 .fm_setup = fm_radio_setup,
442 .fm_shutdown = fm_radio_shutdown,
443 .irq = MSM_GPIO_TO_INT(FM_GPIO),
444 .vreg_s2 = NULL,
445 .vreg_xo_out = NULL,
446 /* Configuring the FM SoC as I2S Master */
447 .is_fm_soc_i2s_master = true,
448 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
449};
450
Santosh Sajjan6822c682011-07-26 10:49:36 +0530451static struct platform_device msm_wlan_ar6000_pm_device = {
452 .name = "wlan_ar6000_pm_dev",
453 .id = -1,
454};
455
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700456static struct platform_device msm_bt_power_device = {
457 .name = "bt_power",
458};
459 struct bahama_config_register {
460 u8 reg;
461 u8 value;
462 u8 mask;
463 };
464static const char * const vregs_bahama_name[] = {
465 "msme1",
466 "bt",
467};
468static struct vreg *vregs_bahama[ARRAY_SIZE(vregs_bahama_name)];
469
470static int bahama_bt(int on)
471{
472
473 int rc = 0;
474 int i;
475
476 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
477
478 struct bahama_variant_register {
479 const size_t size;
480 const struct bahama_config_register *set;
481 };
482
483 const struct bahama_config_register *p;
484
485 u8 version;
486
487 const struct bahama_config_register v10_bt_on[] = {
488 { 0xE9, 0x00, 0xFF },
489 { 0xF4, 0x80, 0xFF },
490 { 0xE4, 0x00, 0xFF },
491 { 0xE5, 0x00, 0x0F },
492#ifdef CONFIG_WLAN
493 { 0xE6, 0x38, 0x7F },
494 { 0xE7, 0x06, 0xFF },
495#endif
496 { 0xE9, 0x21, 0xFF },
497 { 0x01, 0x0C, 0x1F },
498 { 0x01, 0x08, 0x1F },
499 };
500
501 const struct bahama_config_register v20_bt_on_fm_off[] = {
502 { 0x11, 0x0C, 0xFF },
503 { 0x13, 0x01, 0xFF },
504 { 0xF4, 0x80, 0xFF },
505 { 0xF0, 0x00, 0xFF },
506 { 0xE9, 0x00, 0xFF },
507#ifdef CONFIG_WLAN
508 { 0x81, 0x00, 0x7F },
509 { 0x82, 0x00, 0xFF },
510 { 0xE6, 0x38, 0x7F },
511 { 0xE7, 0x06, 0xFF },
512#endif
513 { 0x8E, 0x15, 0xFF },
514 { 0x8F, 0x15, 0xFF },
515 { 0x90, 0x15, 0xFF },
516
517 { 0xE9, 0x21, 0xFF },
518 };
519
520 const struct bahama_config_register v20_bt_on_fm_on[] = {
521 { 0x11, 0x0C, 0xFF },
522 { 0x13, 0x01, 0xFF },
523 { 0xF4, 0x86, 0xFF },
524 { 0xF0, 0x06, 0xFF },
525 { 0xE9, 0x00, 0xFF },
526#ifdef CONFIG_WLAN
527 { 0x81, 0x00, 0x7F },
528 { 0x82, 0x00, 0xFF },
529 { 0xE6, 0x38, 0x7F },
530 { 0xE7, 0x06, 0xFF },
531#endif
532 { 0xE9, 0x21, 0xFF },
533 };
534
535 const struct bahama_config_register v10_bt_off[] = {
536 { 0xE9, 0x00, 0xFF },
537 };
538
539 const struct bahama_config_register v20_bt_off_fm_off[] = {
540 { 0xF4, 0x84, 0xFF },
541 { 0xF0, 0x04, 0xFF },
542 { 0xE9, 0x00, 0xFF }
543 };
544
545 const struct bahama_config_register v20_bt_off_fm_on[] = {
546 { 0xF4, 0x86, 0xFF },
547 { 0xF0, 0x06, 0xFF },
548 { 0xE9, 0x00, 0xFF }
549 };
550 const struct bahama_variant_register bt_bahama[2][3] = {
551 {
552 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
553 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
554 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
555 },
556 {
557 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
558 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
559 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
560 }
561 };
562
563 u8 offset = 0; /* index into bahama configs */
564 on = on ? 1 : 0;
565 version = marimba_read_bahama_ver(&config);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530566 if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
567 dev_err(&msm_bt_power_device.dev, "%s: Bahama \
568 version read Error, version = %d \n",
569 __func__, version);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700570 return -EIO;
571 }
572
573 if (version == BAHAMA_VER_2_0) {
574 if (marimba_get_fm_status(&config))
575 offset = 0x01;
576 }
577
578 p = bt_bahama[on][version + offset].set;
579
580 dev_info(&msm_bt_power_device.dev,
581 "%s: found version %d\n", __func__, version);
582
583 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
584 u8 value = (p+i)->value;
585 rc = marimba_write_bit_mask(&config,
586 (p+i)->reg,
587 &value,
588 sizeof((p+i)->value),
589 (p+i)->mask);
590 if (rc < 0) {
591 dev_err(&msm_bt_power_device.dev,
592 "%s: reg %x write failed: %d\n",
593 __func__, (p+i)->reg, rc);
594 return rc;
595 }
Rahul Kashyap92497af2011-07-07 12:13:52 +0530596 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700597 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
598 __func__, (p+i)->reg,
599 value, (p+i)->mask);
600 value = 0;
601 rc = marimba_read_bit_mask(&config,
602 (p+i)->reg, &value,
603 sizeof((p+i)->value), (p+i)->mask);
604 if (rc < 0)
605 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
606 __func__);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530607 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700608 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
609 __func__, (p+i)->reg,
610 value, (p+i)->mask);
611 }
612 /* Update BT Status */
613 if (on)
614 marimba_set_bt_status(&config, true);
615 else
616 marimba_set_bt_status(&config, false);
617 return rc;
618}
619static int bluetooth_switch_regulators(int on)
620{
621 int i, rc = 0;
622
623 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
624 if (!vregs_bahama[i]) {
625 pr_err("%s: vreg_get %s failed(%d)\n",
626 __func__, vregs_bahama_name[i], rc);
627 goto vreg_fail;
628 }
629 rc = on ? vreg_set_level(vregs_bahama[i], i ? 2900 :
630 1800) : 0;
631
632 if (rc < 0) {
633 pr_err("%s: vreg set level failed (%d)\n",
634 __func__, rc);
635 goto vreg_set_level_fail;
636 }
637
638 rc = on ? vreg_enable(vregs_bahama[i]) :
639 vreg_disable(vregs_bahama[i]);
640
641 if (rc < 0) {
642 pr_err("%s: vreg %s %s failed(%d)\n",
643 __func__, vregs_bahama_name[i],
644 on ? "enable" : "disable", rc);
645 goto vreg_fail;
646 }
647 }
648 return rc;
649
650vreg_fail:
651 while (i) {
652 if (on)
653 vreg_disable(vregs_bahama[--i]);
654 }
655vreg_set_level_fail:
656 vreg_put(vregs_bahama[0]);
657 vreg_put(vregs_bahama[1]);
658 return rc;
659}
660
661static unsigned int msm_bahama_setup_power(void)
662{
663 int rc = 0;
664 struct vreg *vreg_s3 = NULL;
665
666 vreg_s3 = vreg_get(NULL, "msme1");
667 if (IS_ERR(vreg_s3)) {
668 pr_err("%s: vreg get failed (%ld)\n",
669 __func__, PTR_ERR(vreg_s3));
670 return PTR_ERR(vreg_s3);
671 }
672 rc = vreg_set_level(vreg_s3, 1800);
673 if (rc < 0) {
674 pr_err("%s: vreg set level failed (%d)\n",
675 __func__, rc);
676 goto vreg_fail;
677 }
678 rc = vreg_enable(vreg_s3);
679 if (rc < 0) {
680 pr_err("%s: vreg enable failed (%d)\n",
681 __func__, rc);
682 goto vreg_fail;
683 }
684
685 /*setup Bahama_sys_reset_n*/
686 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
687 if (rc < 0) {
688 pr_err("%s: gpio_request %d = %d\n", __func__,
689 GPIO_BT_SYS_REST_EN, rc);
690 goto vreg_fail;
691 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530692 rc = bt_set_gpio(1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700693 if (rc < 0) {
Rahul Kashyap181d5552011-07-07 10:39:23 +0530694 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700695 GPIO_BT_SYS_REST_EN, rc);
696 goto gpio_fail;
697 }
698 return rc;
699
700gpio_fail:
701 gpio_free(GPIO_BT_SYS_REST_EN);
702vreg_fail:
703 vreg_put(vreg_s3);
704 return rc;
705}
706
707static unsigned int msm_bahama_shutdown_power(int value)
708{
709 int rc = 0;
710 struct vreg *vreg_s3 = NULL;
711
712 vreg_s3 = vreg_get(NULL, "msme1");
713 if (IS_ERR(vreg_s3)) {
714 pr_err("%s: vreg get failed (%ld)\n",
715 __func__, PTR_ERR(vreg_s3));
716 return PTR_ERR(vreg_s3);
717 }
718 rc = vreg_disable(vreg_s3);
719 if (rc) {
720 pr_err("%s: vreg disable failed (%d)\n",
721 __func__, rc);
722 vreg_put(vreg_s3);
723 return rc;
724 }
Rahul Kashyape8698c62011-07-20 20:43:05 +0530725 if (value == BAHAMA_ID) {
726 rc = bt_set_gpio(0);
727 if (rc) {
728 pr_err("%s: bt_set_gpio = %d\n",
729 __func__, rc);
730 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530731 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700732 return rc;
733}
734
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700735static unsigned int msm_bahama_core_config(int type)
736{
737 int rc = 0;
738
739 if (type == BAHAMA_ID) {
740 int i;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530741 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700742 const struct bahama_config_register v20_init[] = {
743 /* reg, value, mask */
744 { 0xF4, 0x84, 0xFF }, /* AREG */
745 { 0xF0, 0x04, 0xFF } /* DREG */
746 };
747 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
748 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
749 u8 value = v20_init[i].value;
750 rc = marimba_write_bit_mask(&config,
751 v20_init[i].reg,
752 &value,
753 sizeof(v20_init[i].value),
754 v20_init[i].mask);
755 if (rc < 0) {
756 pr_err("%s: reg %d write failed: %d\n",
757 __func__, v20_init[i].reg, rc);
758 return rc;
759 }
760 pr_debug("%s: reg 0x%02x value 0x%02x"
761 " mask 0x%02x\n",
762 __func__, v20_init[i].reg,
763 v20_init[i].value, v20_init[i].mask);
764 }
765 }
766 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530767 rc = bt_set_gpio(0);
768 if (rc) {
769 pr_err("%s: bt_set_gpio = %d\n",
770 __func__, rc);
771 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700772 pr_debug("core type: %d\n", type);
773 return rc;
774}
775
776static int bluetooth_power(int on)
777{
778 int pin, rc = 0;
779 const char *id = "BTPW";
780 int cid = 0;
781
782 cid = adie_get_detected_connectivity_type();
783 if (cid != BAHAMA_ID) {
784 pr_err("%s: unexpected adie connectivity type: %d\n",
785 __func__, cid);
786 return -ENODEV;
787 }
788 if (on) {
789 /*setup power for BT SOC*/
Rahul Kashyap181d5552011-07-07 10:39:23 +0530790 rc = bt_set_gpio(on);
791 if (rc) {
792 pr_err("%s: bt_set_gpio = %d\n",
793 __func__, rc);
794 goto exit;
795 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700796 rc = bluetooth_switch_regulators(on);
797 if (rc < 0) {
798 pr_err("%s: bluetooth_switch_regulators rc = %d",
799 __func__, rc);
800 goto exit;
801 }
802 /*setup BT GPIO lines*/
803 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
804 pin++) {
805 rc = gpio_tlmm_config(bt_config_power_on[pin],
806 GPIO_CFG_ENABLE);
807 if (rc < 0) {
808 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
809 __func__,
810 bt_config_power_on[pin],
811 rc);
812 goto fail_power;
813 }
814 }
815 /*Setup BT clocks*/
816 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
817 PMAPP_CLOCK_VOTE_ON);
818 if (rc < 0) {
819 pr_err("Failed to vote for TCXO_D1 ON\n");
820 goto fail_clock;
821 }
822 msleep(20);
823
824 /*I2C config for Bahama*/
825 rc = bahama_bt(1);
826 if (rc < 0) {
827 pr_err("%s: bahama_bt rc = %d", __func__, rc);
828 goto fail_i2c;
829 }
830 msleep(20);
831
832 /*setup BT PCM lines*/
833 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
834 if (rc < 0) {
835 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
836 __func__, rc);
837 goto fail_power;
838 }
839 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
840 PMAPP_CLOCK_VOTE_PIN_CTRL);
841 if (rc < 0)
842 pr_err("%s:Pin Control Failed, rc = %d",
843 __func__, rc);
844
845 } else {
846 rc = bahama_bt(0);
847 if (rc < 0)
848 pr_err("%s: bahama_bt rc = %d", __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530849
850 rc = bt_set_gpio(on);
851 if (rc) {
852 pr_err("%s: bt_set_gpio = %d\n",
853 __func__, rc);
854 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700855fail_i2c:
856 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
857 PMAPP_CLOCK_VOTE_OFF);
858 if (rc < 0)
859 pr_err("%s: Failed to vote Off D1\n", __func__);
860fail_clock:
861 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
862 pin++) {
863 rc = gpio_tlmm_config(bt_config_power_off[pin],
864 GPIO_CFG_ENABLE);
865 if (rc < 0) {
866 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
867 __func__, bt_config_power_off[pin], rc);
868 }
869 }
870 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
871 if (rc < 0) {
872 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
873 __func__, rc);
874 }
875fail_power:
876 rc = bluetooth_switch_regulators(0);
877 if (rc < 0) {
878 pr_err("%s: switch_regulators : rc = %d",\
879 __func__, rc);
880 goto exit;
881 }
882 }
883 return rc;
884exit:
885 pr_err("%s: failed with rc = %d", __func__, rc);
886 return rc;
887}
888
889static int __init bt_power_init(void)
890{
891 int i, rc = 0;
892 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
893 vregs_bahama[i] = vreg_get(NULL,
894 vregs_bahama_name[i]);
895 if (IS_ERR(vregs_bahama[i])) {
896 pr_err("%s: vreg get %s failed (%ld)\n",
897 __func__, vregs_bahama_name[i],
898 PTR_ERR(vregs_bahama[i]));
899 rc = PTR_ERR(vregs_bahama[i]);
900 goto vreg_get_fail;
901 }
902 }
903
904 msm_bt_power_device.dev.platform_data = &bluetooth_power;
905
906 return rc;
907
908vreg_get_fail:
909 while (i)
910 vreg_put(vregs_bahama[--i]);
911 return rc;
912}
913
914static struct marimba_platform_data marimba_pdata = {
915 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
916 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
917 .bahama_setup = msm_bahama_setup_power,
918 .bahama_shutdown = msm_bahama_shutdown_power,
919 .bahama_core_config = msm_bahama_core_config,
920 .fm = &marimba_fm_pdata,
921};
922
923#endif
924
925#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
926static struct i2c_board_info core_exp_i2c_info[] __initdata = {
927 {
928 I2C_BOARD_INFO("sx1509q", 0x3e),
929 },
930};
931static struct i2c_board_info cam_exp_i2c_info[] __initdata = {
932 {
933 I2C_BOARD_INFO("sx1508q", 0x22),
934 .platform_data = &sx150x_data[SX150X_CAM],
935 },
936};
937#endif
938#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
939static struct i2c_board_info bahama_devices[] = {
940{
941 I2C_BOARD_INFO("marimba", 0xc),
942 .platform_data = &marimba_pdata,
943},
944};
945#endif
946
947#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
948static void __init register_i2c_devices(void)
949{
950
951 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
952 cam_exp_i2c_info,
953 ARRAY_SIZE(cam_exp_i2c_info));
954
955 if (machine_is_msm7x27a_surf())
956 sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
957
958 core_exp_i2c_info[0].platform_data =
959 &sx150x_data[SX150X_CORE];
960
961 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
962 core_exp_i2c_info,
963 ARRAY_SIZE(core_exp_i2c_info));
964#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
965 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
966 bahama_devices,
967 ARRAY_SIZE(bahama_devices));
968#endif
969}
970#endif
971
972static struct msm_gpio qup_i2c_gpios_io[] = {
973 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
974 "qup_scl" },
975 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
976 "qup_sda" },
977 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
978 "qup_scl" },
979 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
980 "qup_sda" },
981};
982
983static struct msm_gpio qup_i2c_gpios_hw[] = {
984 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
985 "qup_scl" },
986 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
987 "qup_sda" },
988 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
989 "qup_scl" },
990 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
991 "qup_sda" },
992};
993
994static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
995{
996 int rc;
997
998 if (adap_id < 0 || adap_id > 1)
999 return;
1000
1001 /* Each adapter gets 2 lines from the table */
1002 if (config_type)
1003 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
1004 else
1005 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
1006 if (rc < 0)
1007 pr_err("QUP GPIO request/enable failed: %d\n", rc);
1008}
1009
1010static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
1011 .clk_freq = 100000,
1012 .clk = "gsbi_qup_clk",
1013 .pclk = "gsbi_qup_pclk",
1014 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1015};
1016
1017static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
1018 .clk_freq = 100000,
1019 .clk = "gsbi_qup_clk",
1020 .pclk = "gsbi_qup_pclk",
1021 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1022};
1023
1024#ifdef CONFIG_ARCH_MSM7X27A
1025#define MSM_PMEM_MDP_SIZE 0x1DD1000
1026#define MSM_PMEM_ADSP_SIZE 0x1000000
1027
1028#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
1029#define MSM_FB_SIZE 0x260000
1030#else
1031#define MSM_FB_SIZE 0x195000
1032#endif
1033
1034#endif
1035
1036static struct android_usb_platform_data android_usb_pdata = {
1037 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1038};
1039
1040static struct platform_device android_usb_device = {
1041 .name = "android_usb",
1042 .id = -1,
1043 .dev = {
1044 .platform_data = &android_usb_pdata,
1045 },
1046};
1047
1048#ifdef CONFIG_USB_EHCI_MSM_72K
1049static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1050{
1051 int rc = 0;
1052 unsigned gpio;
1053
1054 gpio = GPIO_HOST_VBUS_EN;
1055
1056 rc = gpio_request(gpio, "i2c_host_vbus_en");
1057 if (rc < 0) {
1058 pr_err("failed to request %d GPIO\n", gpio);
1059 return;
1060 }
1061 gpio_direction_output(gpio, !!on);
1062 gpio_set_value_cansleep(gpio, !!on);
1063 gpio_free(gpio);
1064}
1065
1066static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1067 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1068};
1069
1070static void __init msm7x2x_init_host(void)
1071{
1072 msm_add_host(0, &msm_usb_host_pdata);
1073}
1074#endif
1075
1076#ifdef CONFIG_USB_MSM_OTG_72K
1077static int hsusb_rpc_connect(int connect)
1078{
1079 if (connect)
1080 return msm_hsusb_rpc_connect();
1081 else
1082 return msm_hsusb_rpc_close();
1083}
1084
1085static struct vreg *vreg_3p3;
1086static int msm_hsusb_ldo_init(int init)
1087{
1088 if (init) {
1089 vreg_3p3 = vreg_get(NULL, "usb");
1090 if (IS_ERR(vreg_3p3))
1091 return PTR_ERR(vreg_3p3);
1092 } else
1093 vreg_put(vreg_3p3);
1094
1095 return 0;
1096}
1097
1098static int msm_hsusb_ldo_enable(int enable)
1099{
1100 static int ldo_status;
1101
1102 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1103 return -ENODEV;
1104
1105 if (ldo_status == enable)
1106 return 0;
1107
1108 ldo_status = enable;
1109
1110 if (enable)
1111 return vreg_enable(vreg_3p3);
1112
1113 return vreg_disable(vreg_3p3);
1114}
1115
1116#ifndef CONFIG_USB_EHCI_MSM_72K
1117static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1118{
1119 int ret = 0;
1120
1121 if (init)
1122 ret = msm_pm_app_rpc_init(callback);
1123 else
1124 msm_pm_app_rpc_deinit(callback);
1125
1126 return ret;
1127}
1128#endif
1129
1130static struct msm_otg_platform_data msm_otg_pdata = {
1131#ifndef CONFIG_USB_EHCI_MSM_72K
1132 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1133#else
1134 .vbus_power = msm_hsusb_vbus_power,
1135#endif
1136 .rpc_connect = hsusb_rpc_connect,
1137 .core_clk = 1,
1138 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1139 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1140 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1141 .se1_gating = SE1_GATING_DISABLE,
1142 .ldo_init = msm_hsusb_ldo_init,
1143 .ldo_enable = msm_hsusb_ldo_enable,
1144 .chg_init = hsusb_chg_init,
1145 .chg_connected = hsusb_chg_connected,
1146 .chg_vbus_draw = hsusb_chg_vbus_draw,
1147};
1148#endif
1149
1150static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1151 .is_phy_status_timer_on = 1,
1152};
1153
1154static struct resource smc91x_resources[] = {
1155 [0] = {
1156 .start = 0x90000300,
1157 .end = 0x900003ff,
1158 .flags = IORESOURCE_MEM,
1159 },
1160 [1] = {
1161 .start = MSM_GPIO_TO_INT(4),
1162 .end = MSM_GPIO_TO_INT(4),
1163 .flags = IORESOURCE_IRQ,
1164 },
1165};
1166
1167static struct platform_device smc91x_device = {
1168 .name = "smc91x",
1169 .id = 0,
1170 .num_resources = ARRAY_SIZE(smc91x_resources),
1171 .resource = smc91x_resources,
1172};
1173
1174#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1175 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1176 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1177 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1178
1179static unsigned long vreg_sts, gpio_sts;
1180static struct vreg *vreg_mmc;
1181static struct vreg *vreg_emmc;
1182
1183struct sdcc_vreg {
1184 struct vreg *vreg_data;
1185 unsigned level;
1186};
1187
1188static struct sdcc_vreg sdcc_vreg_data[4];
1189
1190struct sdcc_gpio {
1191 struct msm_gpio *cfg_data;
1192 uint32_t size;
1193 struct msm_gpio *sleep_cfg_data;
1194};
1195
1196static struct msm_gpio sdc1_cfg_data[] = {
1197 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1198 "sdc1_dat_3"},
1199 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1200 "sdc1_dat_2"},
1201 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1202 "sdc1_dat_1"},
1203 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1204 "sdc1_dat_0"},
1205 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1206 "sdc1_cmd"},
1207 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1208 "sdc1_clk"},
1209};
1210
1211static struct msm_gpio sdc2_cfg_data[] = {
1212 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1213 "sdc2_clk"},
1214 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1215 "sdc2_cmd"},
1216 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1217 "sdc2_dat_3"},
1218 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1219 "sdc2_dat_2"},
1220 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1221 "sdc2_dat_1"},
1222 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1223 "sdc2_dat_0"},
1224};
1225
1226static struct msm_gpio sdc2_sleep_cfg_data[] = {
1227 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1228 "sdc2_clk"},
1229 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1230 "sdc2_cmd"},
1231 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1232 "sdc2_dat_3"},
1233 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1234 "sdc2_dat_2"},
1235 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1236 "sdc2_dat_1"},
1237 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1238 "sdc2_dat_0"},
1239};
1240static struct msm_gpio sdc3_cfg_data[] = {
1241 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1242 "sdc3_clk"},
1243 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1244 "sdc3_cmd"},
1245 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1246 "sdc3_dat_3"},
1247 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1248 "sdc3_dat_2"},
1249 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1250 "sdc3_dat_1"},
1251 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1252 "sdc3_dat_0"},
1253#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1254 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1255 "sdc3_dat_7"},
1256 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1257 "sdc3_dat_6"},
1258 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1259 "sdc3_dat_5"},
1260 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1261 "sdc3_dat_4"},
1262#endif
1263};
1264
1265static struct msm_gpio sdc4_cfg_data[] = {
1266 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1267 "sdc4_dat_3"},
1268 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1269 "sdc4_dat_2"},
1270 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1271 "sdc4_dat_1"},
1272 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1273 "sdc4_cmd"},
1274 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1275 "sdc4_dat_0"},
1276 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1277 "sdc4_clk"},
1278};
1279
1280static struct sdcc_gpio sdcc_cfg_data[] = {
1281 {
1282 .cfg_data = sdc1_cfg_data,
1283 .size = ARRAY_SIZE(sdc1_cfg_data),
1284 },
1285 {
1286 .cfg_data = sdc2_cfg_data,
1287 .size = ARRAY_SIZE(sdc2_cfg_data),
1288 .sleep_cfg_data = sdc2_sleep_cfg_data,
1289 },
1290 {
1291 .cfg_data = sdc3_cfg_data,
1292 .size = ARRAY_SIZE(sdc3_cfg_data),
1293 },
1294 {
1295 .cfg_data = sdc4_cfg_data,
1296 .size = ARRAY_SIZE(sdc4_cfg_data),
1297 },
1298};
1299
1300static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1301{
1302 int rc = 0;
1303 struct sdcc_gpio *curr;
1304
1305 curr = &sdcc_cfg_data[dev_id - 1];
1306 if (!(test_bit(dev_id, &gpio_sts)^enable))
1307 return rc;
1308
1309 if (enable) {
1310 set_bit(dev_id, &gpio_sts);
1311 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1312 if (rc)
1313 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1314 __func__, dev_id);
1315 } else {
1316 clear_bit(dev_id, &gpio_sts);
1317 if (curr->sleep_cfg_data) {
1318 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1319 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1320 return rc;
1321 }
1322 msm_gpios_disable_free(curr->cfg_data, curr->size);
1323 }
1324 return rc;
1325}
1326
1327static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1328{
1329 int rc = 0;
1330 struct sdcc_vreg *curr;
1331
1332 curr = &sdcc_vreg_data[dev_id - 1];
1333
1334 if (!(test_bit(dev_id, &vreg_sts)^enable))
1335 return rc;
1336
1337 if (enable) {
1338 set_bit(dev_id, &vreg_sts);
1339 rc = vreg_set_level(curr->vreg_data, curr->level);
1340 if (rc)
1341 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1342
1343 rc = vreg_enable(curr->vreg_data);
1344 if (rc)
1345 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1346 } else {
1347 clear_bit(dev_id, &vreg_sts);
1348 rc = vreg_disable(curr->vreg_data);
1349 if (rc)
1350 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1351 }
1352 return rc;
1353}
1354
1355static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1356{
1357 int rc = 0;
1358 struct platform_device *pdev;
1359
1360 pdev = container_of(dv, struct platform_device, dev);
1361
1362 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1363 if (rc)
1364 goto out;
1365
1366 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1367out:
1368 return rc;
1369}
1370
1371#define GPIO_SDC1_HW_DET 85
1372
1373#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1374 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1375static unsigned int msm7x2xa_sdcc_slot_status(struct device *dev)
1376{
1377 int status;
1378
1379 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1380 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1381 if (status)
1382 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1383 GPIO_SDC1_HW_DET);
1384
1385 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1386 if (status) {
1387 pr_err("%s:Failed to request GPIO %d\n", __func__,
1388 GPIO_SDC1_HW_DET);
1389 } else {
1390 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1391 if (!status)
1392 status = gpio_get_value(GPIO_SDC1_HW_DET);
1393 gpio_free(GPIO_SDC1_HW_DET);
1394 }
1395 return status;
1396}
1397#endif
1398
1399#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1400static struct mmc_platform_data sdc1_plat_data = {
1401 .ocr_mask = MMC_VDD_28_29,
1402 .translate_vdd = msm_sdcc_setup_power,
1403 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1404 .msmsdcc_fmin = 144000,
1405 .msmsdcc_fmid = 24576000,
1406 .msmsdcc_fmax = 49152000,
1407#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1408 .status = msm7x2xa_sdcc_slot_status,
1409 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1410 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1411#endif
1412};
1413#endif
1414
1415#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1416static struct mmc_platform_data sdc2_plat_data = {
1417 /*
1418 * SDC2 supports only 1.8V, claim for 2.85V range is just
1419 * for allowing buggy cards who advertise 2.8V even though
1420 * they can operate at 1.8V supply.
1421 */
1422 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1423 .translate_vdd = msm_sdcc_setup_power,
1424 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1425#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1426 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1427#endif
1428 .msmsdcc_fmin = 144000,
1429 .msmsdcc_fmid = 24576000,
1430 .msmsdcc_fmax = 49152000,
1431#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1432 .dummy52_required = 1,
1433#endif
1434};
1435#endif
1436
1437#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1438static struct mmc_platform_data sdc3_plat_data = {
1439 .ocr_mask = MMC_VDD_28_29,
1440 .translate_vdd = msm_sdcc_setup_power,
1441#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1442 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1443#else
1444 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1445#endif
1446 .msmsdcc_fmin = 144000,
1447 .msmsdcc_fmid = 24576000,
1448 .msmsdcc_fmax = 49152000,
1449 .nonremovable = 1,
1450};
1451#endif
1452
1453#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1454 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1455static struct mmc_platform_data sdc4_plat_data = {
1456 .ocr_mask = MMC_VDD_28_29,
1457 .translate_vdd = msm_sdcc_setup_power,
1458 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1459 .msmsdcc_fmin = 144000,
1460 .msmsdcc_fmid = 24576000,
1461 .msmsdcc_fmax = 49152000,
1462};
1463#endif
1464#endif
1465
1466#ifdef CONFIG_SERIAL_MSM_HS
1467static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1468 .inject_rx_on_wakeup = 1,
1469 .rx_to_inject = 0xFD,
1470};
1471#endif
1472static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1473 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1474 .idle_supported = 1,
1475 .suspend_supported = 1,
1476 .idle_enabled = 1,
1477 .suspend_enabled = 1,
1478 .latency = 16000,
1479 .residency = 20000,
1480 },
1481 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1482 .idle_supported = 1,
1483 .suspend_supported = 1,
1484 .idle_enabled = 1,
1485 .suspend_enabled = 1,
1486 .latency = 12000,
1487 .residency = 20000,
1488 },
1489 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1490 .idle_supported = 1,
1491 .suspend_supported = 1,
1492 .idle_enabled = 0,
1493 .suspend_enabled = 1,
1494 .latency = 2000,
1495 .residency = 0,
1496 },
1497 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1498 .idle_supported = 1,
1499 .suspend_supported = 1,
1500 .idle_enabled = 1,
1501 .suspend_enabled = 1,
1502 .latency = 2,
1503 .residency = 0,
1504 },
1505};
1506
1507static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1508 .name = "pmem_adsp",
1509 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1510 .cached = 0,
1511 .memory_type = MEMTYPE_EBI1,
1512};
1513
1514static struct platform_device android_pmem_adsp_device = {
1515 .name = "android_pmem",
1516 .id = 1,
1517 .dev = { .platform_data = &android_pmem_adsp_pdata },
1518};
1519
1520static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1521static int __init pmem_mdp_size_setup(char *p)
1522{
1523 pmem_mdp_size = memparse(p, NULL);
1524 return 0;
1525}
1526
1527early_param("pmem_mdp_size", pmem_mdp_size_setup);
1528
1529static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1530static int __init pmem_adsp_size_setup(char *p)
1531{
1532 pmem_adsp_size = memparse(p, NULL);
1533 return 0;
1534}
1535
1536early_param("pmem_adsp_size", pmem_adsp_size_setup);
1537
1538static unsigned fb_size = MSM_FB_SIZE;
1539static int __init fb_size_setup(char *p)
1540{
1541 fb_size = memparse(p, NULL);
1542 return 0;
1543}
1544
1545early_param("fb_size", fb_size_setup);
1546
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001547static const char * const msm_fb_lcdc_vreg[] = {
1548 "gp2",
1549 "msme1",
1550};
1551
1552static const int msm_fb_lcdc_vreg_mV[] = {
1553 2850,
1554 1800,
1555};
1556
1557struct vreg *lcdc_vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
1558
1559static uint32_t lcdc_gpio_initialized;
1560
1561static void lcdc_toshiba_gpio_init(void)
1562{
1563 int i, rc = 0;
1564 if (!lcdc_gpio_initialized) {
1565 if (gpio_request(GPIO_SPI_CLK, "spi_clk")) {
1566 pr_err("failed to request gpio spi_clk\n");
1567 return;
1568 }
1569 if (gpio_request(GPIO_SPI_CS0_N, "spi_cs")) {
1570 pr_err("failed to request gpio spi_cs0_N\n");
1571 goto fail_gpio6;
1572 }
1573 if (gpio_request(GPIO_SPI_MOSI, "spi_mosi")) {
1574 pr_err("failed to request gpio spi_mosi\n");
1575 goto fail_gpio5;
1576 }
1577 if (gpio_request(GPIO_SPI_MISO, "spi_miso")) {
1578 pr_err("failed to request gpio spi_miso\n");
1579 goto fail_gpio4;
1580 }
1581 if (gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr")) {
1582 pr_err("failed to request gpio_disp_pwr\n");
1583 goto fail_gpio3;
1584 }
1585 if (gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en")) {
1586 pr_err("failed to request gpio_bkl_en\n");
1587 goto fail_gpio2;
1588 }
1589 pmapp_disp_backlight_init();
1590
1591 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1592 lcdc_vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
1593
1594 rc = vreg_set_level(lcdc_vreg[i],
1595 msm_fb_lcdc_vreg_mV[i]);
1596
1597 if (rc < 0) {
1598 pr_err("%s: set regulator level failed "
1599 "with :(%d)\n", __func__, rc);
1600 goto fail_gpio1;
1601 }
1602 }
1603 lcdc_gpio_initialized = 1;
1604 }
1605 return;
1606
1607fail_gpio1:
1608 for (; i > 0; i--)
1609 vreg_put(lcdc_vreg[i - 1]);
1610
1611 gpio_free(GPIO_BACKLIGHT_EN);
1612fail_gpio2:
1613 gpio_free(GPIO_DISPLAY_PWR_EN);
1614fail_gpio3:
1615 gpio_free(GPIO_SPI_MISO);
1616fail_gpio4:
1617 gpio_free(GPIO_SPI_MOSI);
1618fail_gpio5:
1619 gpio_free(GPIO_SPI_CS0_N);
1620fail_gpio6:
1621 gpio_free(GPIO_SPI_CLK);
1622 lcdc_gpio_initialized = 0;
1623}
1624
1625static uint32_t lcdc_gpio_table[] = {
1626 GPIO_SPI_CLK,
1627 GPIO_SPI_CS0_N,
1628 GPIO_SPI_MOSI,
1629 GPIO_DISPLAY_PWR_EN,
1630 GPIO_BACKLIGHT_EN,
1631 GPIO_SPI_MISO,
1632};
1633
1634static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
1635{
1636 int n;
1637
1638 if (lcdc_gpio_initialized) {
1639 /* All are IO Expander GPIOs */
1640 for (n = 0; n < (len - 1); n++)
1641 gpio_direction_output(table[n], 1);
1642 }
1643}
1644
1645static void lcdc_toshiba_config_gpios(int enable)
1646{
1647 config_lcdc_gpio_table(lcdc_gpio_table,
1648 ARRAY_SIZE(lcdc_gpio_table), enable);
1649}
1650
1651static int msm_fb_lcdc_power_save(int on)
1652{
1653 int i, rc = 0;
1654 /* Doing the init of the LCDC GPIOs very late as they are from
1655 an I2C-controlled IO Expander */
1656 lcdc_toshiba_gpio_init();
1657
1658 if (lcdc_gpio_initialized) {
1659 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
1660 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
1661
1662 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1663 if (on) {
1664 rc = vreg_enable(lcdc_vreg[i]);
1665
1666 if (rc) {
1667 printk(KERN_ERR "vreg_enable: %s vreg"
1668 "operation failed\n",
1669 msm_fb_lcdc_vreg[i]);
1670 goto lcdc_vreg_fail;
1671 }
1672 } else {
1673 rc = vreg_disable(lcdc_vreg[i]);
1674
1675 if (rc) {
1676 printk(KERN_ERR "vreg_disable: %s vreg "
1677 "operation failed\n",
1678 msm_fb_lcdc_vreg[i]);
1679 goto lcdc_vreg_fail;
1680 }
1681 }
1682 }
1683 }
1684
1685 return rc;
1686
1687lcdc_vreg_fail:
1688 if (on) {
1689 for (; i > 0; i--)
1690 vreg_disable(lcdc_vreg[i - 1]);
1691 } else {
1692 for (; i > 0; i--)
1693 vreg_enable(lcdc_vreg[i - 1]);
1694 }
1695
1696return rc;
1697
1698}
1699
1700
1701static int lcdc_toshiba_set_bl(int level)
1702{
1703 int ret;
1704
1705 ret = pmapp_disp_backlight_set_brightness(level);
1706 if (ret)
1707 pr_err("%s: can't set lcd backlight!\n", __func__);
1708
1709 return ret;
1710}
1711
1712
1713static struct lcdc_platform_data lcdc_pdata = {
Jeevan Shriram15f2a5e2011-07-13 21:45:26 +05301714 .lcdc_gpio_config = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001715 .lcdc_power_save = msm_fb_lcdc_power_save,
1716};
1717
1718static int lcd_panel_spi_gpio_num[] = {
1719 GPIO_SPI_MOSI, /* spi_sdi */
1720 GPIO_SPI_MISO, /* spi_sdoi */
1721 GPIO_SPI_CLK, /* spi_clk */
1722 GPIO_SPI_CS0_N, /* spi_cs */
1723};
1724
1725static struct msm_panel_common_pdata lcdc_toshiba_panel_data = {
1726 .panel_config_gpio = lcdc_toshiba_config_gpios,
1727 .pmic_backlight = lcdc_toshiba_set_bl,
1728 .gpio_num = lcd_panel_spi_gpio_num,
1729};
1730
1731static struct platform_device lcdc_toshiba_panel_device = {
1732 .name = "lcdc_toshiba_fwvga_pt",
1733 .id = 0,
1734 .dev = {
1735 .platform_data = &lcdc_toshiba_panel_data,
1736 }
1737};
1738
1739static struct resource msm_fb_resources[] = {
1740 {
1741 .flags = IORESOURCE_DMA,
1742 }
1743};
1744
1745static int msm_fb_detect_panel(const char *name)
1746{
1747 int ret = -EPERM;
1748
1749 if (machine_is_msm7x27a_surf()) {
1750 if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21))
1751 ret = 0;
1752 } else {
1753 ret = -ENODEV;
1754 }
1755
1756 return ret;
1757}
1758
1759static struct msm_fb_platform_data msm_fb_pdata = {
1760 .detect_client = msm_fb_detect_panel,
1761};
1762
1763static struct platform_device msm_fb_device = {
1764 .name = "msm_fb",
1765 .id = 0,
1766 .num_resources = ARRAY_SIZE(msm_fb_resources),
1767 .resource = msm_fb_resources,
1768 .dev = {
1769 .platform_data = &msm_fb_pdata,
1770 }
1771};
1772
1773#ifdef CONFIG_FB_MSM_MIPI_DSI
1774static int mipi_renesas_set_bl(int level)
1775{
1776 int ret;
1777
1778 ret = pmapp_disp_backlight_set_brightness(level);
1779
1780 if (ret)
1781 pr_err("%s: can't set lcd backlight!\n", __func__);
1782
1783 return ret;
1784}
1785
1786static struct msm_panel_common_pdata mipi_renesas_pdata = {
1787 .pmic_backlight = mipi_renesas_set_bl,
1788};
1789
1790
1791static struct platform_device mipi_dsi_renesas_panel_device = {
1792 .name = "mipi_renesas",
1793 .id = 0,
1794 .dev = {
1795 .platform_data = &mipi_renesas_pdata,
1796 }
1797};
1798#endif
1799
1800static void __init msm7x27a_init_mmc(void)
1801{
1802 vreg_emmc = vreg_get(NULL, "emmc");
1803 if (IS_ERR(vreg_emmc)) {
1804 pr_err("%s: vreg get failed (%ld)\n",
1805 __func__, PTR_ERR(vreg_emmc));
1806 return;
1807 }
1808
1809 vreg_mmc = vreg_get(NULL, "mmc");
1810 if (IS_ERR(vreg_mmc)) {
1811 pr_err("%s: vreg get failed (%ld)\n",
1812 __func__, PTR_ERR(vreg_mmc));
1813 return;
1814 }
1815
1816 /* eMMC slot */
1817#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1818 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1819 sdcc_vreg_data[2].level = 3000;
1820 msm_add_sdcc(3, &sdc3_plat_data);
1821#endif
1822 /* Micro-SD slot */
1823#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1824 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1825 sdcc_vreg_data[0].level = 2850;
1826 msm_add_sdcc(1, &sdc1_plat_data);
1827#endif
1828 /* SDIO WLAN slot */
1829#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1830 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1831 sdcc_vreg_data[1].level = 2850;
1832 msm_add_sdcc(2, &sdc2_plat_data);
1833#endif
1834 /* Not Used */
1835#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1836 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1837 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1838 sdcc_vreg_data[3].level = 2850;
1839 msm_add_sdcc(4, &sdc4_plat_data);
1840#endif
1841}
1842#define SND(desc, num) { .name = #desc, .id = num }
1843static struct snd_endpoint snd_endpoints_list[] = {
1844 SND(HANDSET, 0),
1845 SND(MONO_HEADSET, 2),
1846 SND(HEADSET, 3),
1847 SND(SPEAKER, 6),
1848 SND(TTY_HEADSET, 8),
1849 SND(TTY_VCO, 9),
1850 SND(TTY_HCO, 10),
1851 SND(BT, 12),
1852 SND(IN_S_SADC_OUT_HANDSET, 16),
1853 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1854 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1855 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1856 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
1857 SND(CURRENT, 34),
1858 SND(FM_ANALOG_STEREO_HEADSET, 35),
1859 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1860};
1861#undef SND
1862
1863static struct msm_snd_endpoints msm_device_snd_endpoints = {
1864 .endpoints = snd_endpoints_list,
1865 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1866};
1867
1868static struct platform_device msm_device_snd = {
1869 .name = "msm_snd",
1870 .id = -1,
1871 .dev = {
1872 .platform_data = &msm_device_snd_endpoints
1873 },
1874};
1875
1876#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1877 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1878 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1879 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1880 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1881 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1882#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1883 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1884 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1885 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1886 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1887 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1888#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1889 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1890 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1891 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1892 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1893 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1894#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1895 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1896 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1897 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1898 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1899 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1900#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1901
1902static unsigned int dec_concurrency_table[] = {
1903 /* Audio LP */
1904 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1905 0, 0, 0,
1906
1907 /* Concurrency 1 */
1908 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1909 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1910 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1911 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1912 (DEC4_FORMAT),
1913
1914 /* Concurrency 2 */
1915 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1916 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1917 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1918 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1919 (DEC4_FORMAT),
1920
1921 /* Concurrency 3 */
1922 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1923 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1924 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1925 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1926 (DEC4_FORMAT),
1927
1928 /* Concurrency 4 */
1929 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1930 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1931 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1932 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1933 (DEC4_FORMAT),
1934
1935 /* Concurrency 5 */
1936 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1937 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1938 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1939 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1940 (DEC4_FORMAT),
1941
1942 /* Concurrency 6 */
1943 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1944 0, 0, 0, 0,
1945
1946 /* Concurrency 7 */
1947 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1948 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1949 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1950 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1951 (DEC4_FORMAT),
1952};
1953
1954#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1955 .module_queueid = queueid, .module_decid = decid, \
1956 .nr_codec_support = nr_codec}
1957
1958static struct msm_adspdec_info dec_info_list[] = {
1959 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1960 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1961 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1962 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1963 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1964};
1965
1966static struct msm_adspdec_database msm_device_adspdec_database = {
1967 .num_dec = ARRAY_SIZE(dec_info_list),
1968 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
1969 ARRAY_SIZE(dec_info_list)),
1970 .dec_concurrency_table = dec_concurrency_table,
1971 .dec_info_list = dec_info_list,
1972};
1973
1974static struct platform_device msm_device_adspdec = {
1975 .name = "msm_adspdec",
1976 .id = -1,
1977 .dev = {
1978 .platform_data = &msm_device_adspdec_database
1979 },
1980};
1981
1982static struct android_pmem_platform_data android_pmem_audio_pdata = {
1983 .name = "pmem_audio",
1984 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1985 .cached = 0,
1986 .memory_type = MEMTYPE_EBI1,
1987};
1988
1989static struct platform_device android_pmem_audio_device = {
1990 .name = "android_pmem",
1991 .id = 2,
1992 .dev = { .platform_data = &android_pmem_audio_pdata },
1993};
1994
1995static struct android_pmem_platform_data android_pmem_pdata = {
1996 .name = "pmem",
1997 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1998 .cached = 1,
1999 .memory_type = MEMTYPE_EBI1,
2000};
2001static struct platform_device android_pmem_device = {
2002 .name = "android_pmem",
2003 .id = 0,
2004 .dev = { .platform_data = &android_pmem_pdata },
2005};
2006
2007static u32 msm_calculate_batt_capacity(u32 current_voltage);
2008
2009static struct msm_psy_batt_pdata msm_psy_batt_data = {
2010 .voltage_min_design = 2800,
2011 .voltage_max_design = 4300,
2012 .avail_chg_sources = AC_CHG | USB_CHG ,
2013 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
2014 .calculate_capacity = &msm_calculate_batt_capacity,
2015};
2016
2017static u32 msm_calculate_batt_capacity(u32 current_voltage)
2018{
2019 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
2020 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
2021
2022 return (current_voltage - low_voltage) * 100
2023 / (high_voltage - low_voltage);
2024}
2025
2026static struct platform_device msm_batt_device = {
2027 .name = "msm-battery",
2028 .id = -1,
2029 .dev.platform_data = &msm_psy_batt_data,
2030};
2031
2032static struct smsc911x_platform_config smsc911x_config = {
2033 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
2034 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
2035 .flags = SMSC911X_USE_16BIT,
2036};
2037
2038static struct resource smsc911x_resources[] = {
2039 [0] = {
2040 .start = 0x90000000,
2041 .end = 0x90007fff,
2042 .flags = IORESOURCE_MEM,
2043 },
2044 [1] = {
2045 .start = MSM_GPIO_TO_INT(48),
2046 .end = MSM_GPIO_TO_INT(48),
2047 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
2048 },
2049};
2050
2051static struct platform_device smsc911x_device = {
2052 .name = "smsc911x",
2053 .id = 0,
2054 .num_resources = ARRAY_SIZE(smsc911x_resources),
2055 .resource = smsc911x_resources,
2056 .dev = {
2057 .platform_data = &smsc911x_config,
2058 },
2059};
2060
2061static struct msm_gpio smsc911x_gpios[] = {
2062 { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2063 "smsc911x_irq" },
2064 { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2065 "eth_fifo_sel" },
2066};
2067
2068#define ETH_FIFO_SEL_GPIO 49
2069static void msm7x27a_cfg_smsc911x(void)
2070{
2071 int res;
2072
2073 res = msm_gpios_request_enable(smsc911x_gpios,
2074 ARRAY_SIZE(smsc911x_gpios));
2075 if (res) {
2076 pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
2077 return;
2078 }
2079
2080 /* ETH_FIFO_SEL */
2081 res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
2082 if (res) {
2083 pr_err("%s: unable to get direction for gpio %d\n", __func__,
2084 ETH_FIFO_SEL_GPIO);
2085 msm_gpios_disable_free(smsc911x_gpios,
2086 ARRAY_SIZE(smsc911x_gpios));
2087 return;
2088 }
2089 gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
2090}
2091
2092#ifdef CONFIG_MSM_CAMERA
2093static uint32_t camera_off_gpio_table[] = {
2094 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2095};
2096
2097static uint32_t camera_on_gpio_table[] = {
2098 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2099};
2100
2101#ifdef CONFIG_MSM_CAMERA_FLASH
2102static struct msm_camera_sensor_flash_src msm_flash_src = {
2103 .flash_sr_type = MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER,
2104 ._fsrc.current_driver_src.led1 = GPIO_CAM_GP_LED_EN1,
2105 ._fsrc.current_driver_src.led2 = GPIO_CAM_GP_LED_EN2,
2106};
2107#endif
2108
2109static struct vreg *vreg_gp1;
2110static struct vreg *vreg_gp2;
2111static struct vreg *vreg_gp3;
2112static void msm_camera_vreg_config(int vreg_en)
2113{
2114 int rc;
2115
2116 if (vreg_gp1 == NULL) {
2117 vreg_gp1 = vreg_get(NULL, "msme1");
2118 if (IS_ERR(vreg_gp1)) {
2119 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2120 __func__, "msme1", PTR_ERR(vreg_gp1));
2121 return;
2122 }
2123
2124 rc = vreg_set_level(vreg_gp1, 1800);
2125 if (rc) {
2126 pr_err("%s: GP1 set_level failed (%d)\n",
2127 __func__, rc);
2128 return;
2129 }
2130 }
2131
2132 if (vreg_gp2 == NULL) {
2133 vreg_gp2 = vreg_get(NULL, "gp2");
2134 if (IS_ERR(vreg_gp2)) {
2135 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2136 __func__, "gp2", PTR_ERR(vreg_gp2));
2137 return;
2138 }
2139
2140 rc = vreg_set_level(vreg_gp2, 2850);
2141 if (rc) {
2142 pr_err("%s: GP2 set_level failed (%d)\n",
2143 __func__, rc);
2144 }
2145 }
2146
2147 if (vreg_gp3 == NULL) {
2148 vreg_gp3 = vreg_get(NULL, "usb2");
2149 if (IS_ERR(vreg_gp3)) {
2150 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2151 __func__, "gp3", PTR_ERR(vreg_gp3));
2152 return;
2153 }
2154
2155 rc = vreg_set_level(vreg_gp3, 1800);
2156 if (rc) {
2157 pr_err("%s: GP3 set level failed (%d)\n",
2158 __func__, rc);
2159 }
2160 }
2161
2162 if (vreg_en) {
2163 rc = vreg_enable(vreg_gp1);
2164 if (rc) {
2165 pr_err("%s: GP1 enable failed (%d)\n",
2166 __func__, rc);
2167 return;
2168 }
2169
2170 rc = vreg_enable(vreg_gp2);
2171 if (rc) {
2172 pr_err("%s: GP2 enable failed (%d)\n",
2173 __func__, rc);
2174 }
2175
2176 rc = vreg_enable(vreg_gp3);
2177 if (rc) {
2178 pr_err("%s: GP3 enable failed (%d)\n",
2179 __func__, rc);
2180 }
2181 } else {
2182 rc = vreg_disable(vreg_gp1);
2183 if (rc)
2184 pr_err("%s: GP1 disable failed (%d)\n",
2185 __func__, rc);
2186
2187 rc = vreg_disable(vreg_gp2);
2188 if (rc) {
2189 pr_err("%s: GP2 disable failed (%d)\n",
2190 __func__, rc);
2191 }
2192
2193 rc = vreg_disable(vreg_gp3);
2194 if (rc) {
2195 pr_err("%s: GP3 disable failed (%d)\n",
2196 __func__, rc);
2197 }
2198 }
2199}
2200
2201static int config_gpio_table(uint32_t *table, int len)
2202{
2203 int rc = 0, i = 0;
2204
2205 for (i = 0; i < len; i++) {
2206 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2207 if (rc) {
2208 pr_err("%s not able to get gpio\n", __func__);
2209 for (i--; i >= 0; i--)
2210 gpio_tlmm_config(camera_off_gpio_table[i],
2211 GPIO_CFG_ENABLE);
2212 break;
2213 }
2214 }
2215 return rc;
2216}
2217
2218static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
2219static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data;
2220static int config_camera_on_gpios_rear(void)
2221{
2222 int rc = 0;
2223
2224 if (machine_is_msm7x27a_ffa())
2225 msm_camera_vreg_config(1);
2226
2227 rc = config_gpio_table(camera_on_gpio_table,
2228 ARRAY_SIZE(camera_on_gpio_table));
2229 if (rc < 0) {
2230 pr_err("%s: CAMSENSOR gpio table request"
2231 "failed\n", __func__);
2232 return rc;
2233 }
2234
2235 return rc;
2236}
2237
2238static void config_camera_off_gpios_rear(void)
2239{
2240 if (machine_is_msm7x27a_ffa())
2241 msm_camera_vreg_config(0);
2242
2243 config_gpio_table(camera_off_gpio_table,
2244 ARRAY_SIZE(camera_off_gpio_table));
2245}
2246
2247static int config_camera_on_gpios_front(void)
2248{
2249 int rc = 0;
2250
2251 if (machine_is_msm7x27a_ffa())
2252 msm_camera_vreg_config(1);
2253
2254 rc = config_gpio_table(camera_on_gpio_table,
2255 ARRAY_SIZE(camera_on_gpio_table));
2256 if (rc < 0) {
2257 pr_err("%s: CAMSENSOR gpio table request"
2258 "failed\n", __func__);
2259 return rc;
2260 }
2261
2262 return rc;
2263}
2264
2265static void config_camera_off_gpios_front(void)
2266{
2267 if (machine_is_msm7x27a_ffa())
2268 msm_camera_vreg_config(0);
2269
2270 config_gpio_table(camera_off_gpio_table,
2271 ARRAY_SIZE(camera_off_gpio_table));
2272}
2273
2274struct msm_camera_device_platform_data msm_camera_device_data_rear = {
2275 .camera_gpio_on = config_camera_on_gpios_rear,
2276 .camera_gpio_off = config_camera_off_gpios_rear,
2277 .ioext.csiphy = 0xA1000000,
2278 .ioext.csisz = 0x00100000,
2279 .ioext.csiirq = INT_CSI_IRQ_1,
2280 .ioclk.mclk_clk_rate = 24000000,
2281 .ioclk.vfe_clk_rate = 192000000,
2282 .ioext.appphy = MSM_CLK_CTL_PHYS,
2283 .ioext.appsz = MSM_CLK_CTL_SIZE,
2284};
2285
2286struct msm_camera_device_platform_data msm_camera_device_data_front = {
2287 .camera_gpio_on = config_camera_on_gpios_front,
2288 .camera_gpio_off = config_camera_off_gpios_front,
2289 .ioext.csiphy = 0xA0F00000,
2290 .ioext.csisz = 0x00100000,
2291 .ioext.csiirq = INT_CSI_IRQ_0,
2292 .ioclk.mclk_clk_rate = 24000000,
2293 .ioclk.vfe_clk_rate = 192000000,
2294 .ioext.appphy = MSM_CLK_CTL_PHYS,
2295 .ioext.appsz = MSM_CLK_CTL_SIZE,
2296};
2297
2298#ifdef CONFIG_S5K4E1
2299static struct msm_camera_sensor_platform_info s5k4e1_sensor_7627a_info = {
2300 .mount_angle = 90
2301};
2302
2303static struct msm_camera_sensor_flash_data flash_s5k4e1 = {
2304 .flash_type = MSM_CAMERA_FLASH_LED,
2305 .flash_src = &msm_flash_src
2306};
2307
2308static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
2309 .sensor_name = "s5k4e1",
2310 .sensor_reset_enable = 1,
2311 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
2312 .sensor_pwd = 85,
2313 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2314 .vcm_enable = 1,
2315 .pdata = &msm_camera_device_data_rear,
2316 .flash_data = &flash_s5k4e1,
2317 .sensor_platform_info = &s5k4e1_sensor_7627a_info,
2318 .csi_if = 1
2319};
2320
2321static struct platform_device msm_camera_sensor_s5k4e1 = {
2322 .name = "msm_camera_s5k4e1",
2323 .dev = {
2324 .platform_data = &msm_camera_sensor_s5k4e1_data,
2325 },
2326};
2327#endif
2328
2329#ifdef CONFIG_IMX072
2330static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
2331 .mount_angle = 90
2332};
2333
2334static struct msm_camera_sensor_flash_data flash_imx072 = {
2335 .flash_type = MSM_CAMERA_FLASH_LED,
2336 .flash_src = &msm_flash_src
2337};
2338
2339static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
2340 .sensor_name = "imx072",
2341 .sensor_reset_enable = 1,
2342 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
2343 .sensor_pwd = 85,
2344 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2345 .vcm_enable = 1,
2346 .pdata = &msm_camera_device_data_rear,
2347 .flash_data = &flash_imx072,
2348 .sensor_platform_info = &imx072_sensor_7627a_info,
2349 .csi_if = 1
2350};
2351
2352static struct platform_device msm_camera_sensor_imx072 = {
2353 .name = "msm_camera_imx072",
2354 .dev = {
2355 .platform_data = &msm_camera_sensor_imx072_data,
2356 },
2357};
2358#endif
2359
2360#ifdef CONFIG_WEBCAM_OV9726
2361static struct msm_camera_sensor_platform_info ov9726_sensor_7627a_info = {
2362 .mount_angle = 90
2363};
2364
2365static struct msm_camera_sensor_flash_data flash_ov9726 = {
2366 .flash_type = MSM_CAMERA_FLASH_NONE,
2367 .flash_src = &msm_flash_src
2368};
2369
2370static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2371 .sensor_name = "ov9726",
2372 .sensor_reset_enable = 0,
2373 .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
2374 .sensor_pwd = 85,
2375 .vcm_pwd = 1,
2376 .vcm_enable = 0,
2377 .pdata = &msm_camera_device_data_front,
2378 .flash_data = &flash_ov9726,
2379 .sensor_platform_info = &ov9726_sensor_7627a_info,
2380 .csi_if = 1
2381};
2382
2383static struct platform_device msm_camera_sensor_ov9726 = {
2384 .name = "msm_camera_ov9726",
2385 .dev = {
2386 .platform_data = &msm_camera_sensor_ov9726_data,
2387 },
2388};
2389#endif
2390
2391#ifdef CONFIG_MT9E013
2392static struct msm_camera_sensor_platform_info mt9e013_sensor_7627a_info = {
2393 .mount_angle = 90
2394};
2395
2396static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2397 .flash_type = MSM_CAMERA_FLASH_LED,
2398 .flash_src = &msm_flash_src
2399};
2400
2401static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2402 .sensor_name = "mt9e013",
2403 .sensor_reset = 0,
2404 .sensor_reset_enable = 1,
2405 .sensor_pwd = 85,
2406 .vcm_pwd = 1,
2407 .vcm_enable = 0,
2408 .pdata = &msm_camera_device_data_rear,
2409 .flash_data = &flash_mt9e013,
2410 .sensor_platform_info = &mt9e013_sensor_7627a_info,
2411 .csi_if = 1
2412};
2413
2414static struct platform_device msm_camera_sensor_mt9e013 = {
2415 .name = "msm_camera_mt9e013",
2416 .dev = {
2417 .platform_data = &msm_camera_sensor_mt9e013_data,
2418 },
2419};
2420#endif
2421
2422static struct i2c_board_info i2c_camera_devices[] = {
2423 #ifdef CONFIG_S5K4E1
2424 {
2425 I2C_BOARD_INFO("s5k4e1", 0x36),
2426 },
2427 {
2428 I2C_BOARD_INFO("s5k4e1_af", 0x8c >> 1),
2429 },
2430 #endif
2431 #ifdef CONFIG_WEBCAM_OV9726
2432 {
2433 I2C_BOARD_INFO("ov9726", 0x10),
2434 },
2435 #endif
2436 #ifdef CONFIG_IMX072
2437 {
2438 I2C_BOARD_INFO("imx072", 0x34),
2439 },
2440 #endif
2441 #ifdef CONFIG_MT9E013
2442 {
2443 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2444 },
2445 #endif
2446 {
2447 I2C_BOARD_INFO("sc628a", 0x37),
2448 },
2449};
2450#endif
2451#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
2452 && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
2453static struct msm_gpio uart2dm_gpios[] = {
2454 {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2455 "uart2dm_rfr_n" },
2456 {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2457 "uart2dm_cts_n" },
2458 {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2459 "uart2dm_rx" },
2460 {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2461 "uart2dm_tx" },
2462};
2463
2464static void msm7x27a_cfg_uart2dm_serial(void)
2465{
2466 int ret;
2467 ret = msm_gpios_request_enable(uart2dm_gpios,
2468 ARRAY_SIZE(uart2dm_gpios));
2469 if (ret)
2470 pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
2471}
2472#else
2473static void msm7x27a_cfg_uart2dm_serial(void) { }
2474#endif
2475
2476static struct platform_device *rumi_sim_devices[] __initdata = {
2477 &msm_device_dmov,
2478 &msm_device_smd,
2479 &smc91x_device,
2480 &msm_device_uart1,
2481 &msm_device_nand,
2482 &msm_device_uart_dm1,
2483 &msm_gsbi0_qup_i2c_device,
2484 &msm_gsbi1_qup_i2c_device,
2485};
2486
2487static struct platform_device *surf_ffa_devices[] __initdata = {
2488 &msm_device_dmov,
2489 &msm_device_smd,
2490 &msm_device_uart1,
2491 &msm_device_uart_dm1,
2492 &msm_device_uart_dm2,
2493 &msm_device_nand,
2494 &msm_gsbi0_qup_i2c_device,
2495 &msm_gsbi1_qup_i2c_device,
2496 &msm_device_otg,
2497 &msm_device_gadget_peripheral,
2498 &android_usb_device,
2499 &android_pmem_device,
2500 &android_pmem_adsp_device,
2501 &android_pmem_audio_device,
2502 &msm_device_snd,
2503 &msm_device_adspdec,
2504 &msm_fb_device,
2505 &lcdc_toshiba_panel_device,
2506 &msm_batt_device,
2507 &smsc911x_device,
2508#ifdef CONFIG_S5K4E1
2509 &msm_camera_sensor_s5k4e1,
2510#endif
2511#ifdef CONFIG_IMX072
2512 &msm_camera_sensor_imx072,
2513#endif
2514#ifdef CONFIG_WEBCAM_OV9726
2515 &msm_camera_sensor_ov9726,
2516#endif
2517#ifdef CONFIG_MT9E013
2518 &msm_camera_sensor_mt9e013,
2519#endif
2520#ifdef CONFIG_FB_MSM_MIPI_DSI
2521 &mipi_dsi_renesas_panel_device,
2522#endif
2523 &msm_kgsl_3d0,
2524#ifdef CONFIG_BT
2525 &msm_bt_power_device,
2526#endif
Santosh Sajjan6822c682011-07-26 10:49:36 +05302527#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
2528 &msm_wlan_ar6000_pm_device,
2529#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002530};
2531
2532static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2533static int __init pmem_kernel_ebi1_size_setup(char *p)
2534{
2535 pmem_kernel_ebi1_size = memparse(p, NULL);
2536 return 0;
2537}
2538early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2539
2540static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2541static int __init pmem_audio_size_setup(char *p)
2542{
2543 pmem_audio_size = memparse(p, NULL);
2544 return 0;
2545}
2546early_param("pmem_audio_size", pmem_audio_size_setup);
2547
2548static void __init msm_msm7x2x_allocate_memory_regions(void)
2549{
2550 void *addr;
2551 unsigned long size;
2552
2553 size = fb_size ? : MSM_FB_SIZE;
2554 addr = alloc_bootmem_align(size, 0x1000);
2555 msm_fb_resources[0].start = __pa(addr);
2556 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2557 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2558 size, addr, __pa(addr));
2559}
2560
2561static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
2562 [MEMTYPE_SMI] = {
2563 },
2564 [MEMTYPE_EBI0] = {
2565 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2566 },
2567 [MEMTYPE_EBI1] = {
2568 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2569 },
2570};
2571
2572static void __init size_pmem_devices(void)
2573{
2574#ifdef CONFIG_ANDROID_PMEM
2575 android_pmem_adsp_pdata.size = pmem_adsp_size;
2576 android_pmem_pdata.size = pmem_mdp_size;
2577 android_pmem_audio_pdata.size = pmem_audio_size;
2578#endif
2579}
2580
2581static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2582{
2583 msm7x27a_reserve_table[p->memory_type].size += p->size;
2584}
2585
2586static void __init reserve_pmem_memory(void)
2587{
2588#ifdef CONFIG_ANDROID_PMEM
2589 reserve_memory_for(&android_pmem_adsp_pdata);
2590 reserve_memory_for(&android_pmem_pdata);
2591 reserve_memory_for(&android_pmem_audio_pdata);
2592 msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2593#endif
2594}
2595
2596static void __init msm7x27a_calculate_reserve_sizes(void)
2597{
2598 size_pmem_devices();
2599 reserve_pmem_memory();
2600}
2601
2602static int msm7x27a_paddr_to_memtype(unsigned int paddr)
2603{
2604 return MEMTYPE_EBI1;
2605}
2606
2607static struct reserve_info msm7x27a_reserve_info __initdata = {
2608 .memtype_reserve_table = msm7x27a_reserve_table,
2609 .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
2610 .paddr_to_memtype = msm7x27a_paddr_to_memtype,
2611};
2612
2613static void __init msm7x27a_reserve(void)
2614{
2615 reserve_info = &msm7x27a_reserve_info;
2616 msm_reserve();
2617}
2618
2619static void __init msm_device_i2c_init(void)
2620{
2621 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2622 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2623}
2624
2625static struct msm_panel_common_pdata mdp_pdata = {
2626 .gpio = 97,
2627 .mdp_rev = MDP_REV_303,
2628};
2629
2630#define GPIO_LCDC_BRDG_PD 128
2631#define GPIO_LCDC_BRDG_RESET_N 129
2632
2633#define LCDC_RESET_PHYS 0x90008014
2634static void __iomem *lcdc_reset_ptr;
2635
2636static unsigned mipi_dsi_gpio[] = {
2637 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2638 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2639 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2640 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2641};
2642
2643enum {
2644 DSI_SINGLE_LANE = 1,
2645 DSI_TWO_LANES,
2646};
2647
2648static int msm_fb_get_lane_config(void)
2649{
2650 int rc = DSI_TWO_LANES;
2651
2652 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
2653 rc = DSI_SINGLE_LANE;
2654 pr_info("DSI Single Lane\n");
2655 } else {
2656 pr_info("DSI Two Lanes\n");
2657 }
2658 return rc;
2659}
2660
2661static int msm_fb_dsi_client_reset(void)
2662{
2663 int rc = 0;
2664
2665 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2666 if (rc < 0) {
2667 pr_err("failed to request lcd brdg reset_n\n");
2668 return rc;
2669 }
2670
2671 rc = gpio_request(GPIO_LCDC_BRDG_PD, "lcdc_brdg_pd");
2672 if (rc < 0) {
2673 pr_err("failed to request lcd brdg pd\n");
2674 return rc;
2675 }
2676
2677 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2678 if (rc) {
2679 pr_err("Failed to enable LCDC Bridge reset enable\n");
2680 goto gpio_error;
2681 }
2682
2683 rc = gpio_tlmm_config(mipi_dsi_gpio[1], GPIO_CFG_ENABLE);
2684 if (rc) {
2685 pr_err("Failed to enable LCDC Bridge pd enable\n");
2686 goto gpio_error2;
2687 }
2688
2689 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2690 rc |= gpio_direction_output(GPIO_LCDC_BRDG_PD, 1);
2691 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2692
2693 if (!rc) {
2694 if (machine_is_msm7x27a_surf()) {
2695 lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
2696 sizeof(uint32_t));
2697
2698 if (!lcdc_reset_ptr)
2699 return 0;
2700 }
2701 return rc;
2702 } else {
2703 goto gpio_error;
2704 }
2705
2706gpio_error2:
2707 pr_err("Failed GPIO bridge pd\n");
2708 gpio_free(GPIO_LCDC_BRDG_PD);
2709
2710gpio_error:
2711 pr_err("Failed GPIO bridge reset\n");
2712 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2713 return rc;
2714}
2715
2716static const char * const msm_fb_dsi_vreg[] = {
2717 "gp2",
2718 "msme1",
2719};
2720
2721static const int msm_fb_dsi_vreg_mV[] = {
2722 2850,
2723 1800,
2724};
2725
2726static struct vreg *dsi_vreg[ARRAY_SIZE(msm_fb_dsi_vreg)];
2727static int dsi_gpio_initialized;
2728
2729static int mipi_dsi_panel_power(int on)
2730{
2731 int i, rc = 0;
2732 uint32_t lcdc_reset_cfg;
2733
2734 /* I2C-controlled GPIO Expander -init of the GPIOs very late */
2735 if (!dsi_gpio_initialized) {
2736 pmapp_disp_backlight_init();
2737
2738 rc = gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr");
2739 if (rc < 0) {
2740 pr_err("failed to request gpio_disp_pwr\n");
2741 return rc;
2742 }
2743
2744 if (machine_is_msm7x27a_surf()) {
2745 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
2746 if (rc < 0) {
2747 pr_err("failed to enable display pwr\n");
2748 goto fail_gpio1;
2749 }
2750
2751 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2752 if (rc < 0) {
2753 pr_err("failed to request gpio_bkl_en\n");
2754 goto fail_gpio1;
2755 }
2756
2757 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2758 if (rc < 0) {
2759 pr_err("failed to enable backlight\n");
2760 goto fail_gpio2;
2761 }
2762 }
2763
2764 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2765 dsi_vreg[i] = vreg_get(0, msm_fb_dsi_vreg[i]);
2766
2767 if (IS_ERR(dsi_vreg[i])) {
2768 pr_err("%s: vreg get failed with : (%ld)\n",
2769 __func__, PTR_ERR(dsi_vreg[i]));
2770 goto fail_gpio2;
2771 }
2772
2773 rc = vreg_set_level(dsi_vreg[i],
2774 msm_fb_dsi_vreg_mV[i]);
2775
2776 if (rc < 0) {
2777 pr_err("%s: set regulator level failed "
2778 "with :(%d)\n", __func__, rc);
2779 goto vreg_fail1;
2780 }
2781 }
2782 dsi_gpio_initialized = 1;
2783 }
2784
2785 if (machine_is_msm7x27a_surf()) {
2786 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
2787 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
2788 } else if (machine_is_msm7x27a_ffa()) {
2789 if (on) {
2790 /* This line drives an active low pin on FFA */
2791 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN,
2792 !on);
2793 if (rc < 0)
2794 pr_err("failed to set direction for "
2795 "display pwr\n");
2796 } else {
2797 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN,
2798 !on);
2799 rc = gpio_direction_input(GPIO_DISPLAY_PWR_EN);
2800 if (rc < 0)
2801 pr_err("failed to set direction for "
2802 "display pwr\n");
2803 }
2804 }
2805
2806 if (on) {
2807 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2808
2809 if (machine_is_msm7x27a_surf()) {
2810 lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
2811 rmb();
2812 lcdc_reset_cfg &= ~1;
2813
2814 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2815 msleep(20);
2816 wmb();
2817 lcdc_reset_cfg |= 1;
2818 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2819 } else {
2820 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2821 0);
2822 msleep(20);
2823 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2824 1);
2825 }
2826
2827 if (pmapp_disp_backlight_set_brightness(100))
2828 pr_err("backlight set brightness failed\n");
2829 } else {
2830 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 1);
2831
2832 if (pmapp_disp_backlight_set_brightness(0))
2833 pr_err("backlight set brightness failed\n");
2834 }
2835
2836 /*Configure vreg lines */
2837 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2838 if (on) {
2839 rc = vreg_enable(dsi_vreg[i]);
2840
2841 if (rc) {
2842 printk(KERN_ERR "vreg_enable: %s vreg"
2843 "operation failed\n",
2844 msm_fb_dsi_vreg[i]);
2845
2846 goto vreg_fail2;
2847 }
2848 } else {
2849 rc = vreg_disable(dsi_vreg[i]);
2850
2851 if (rc) {
2852 printk(KERN_ERR "vreg_disable: %s vreg "
2853 "operation failed\n",
2854 msm_fb_dsi_vreg[i]);
2855 goto vreg_fail2;
2856 }
2857 }
2858 }
2859
2860 return rc;
2861
2862vreg_fail2:
2863 if (on) {
2864 for (; i > 0; i--)
2865 vreg_disable(dsi_vreg[i - 1]);
2866 } else {
2867 for (; i > 0; i--)
2868 vreg_enable(dsi_vreg[i - 1]);
2869 }
2870
2871 return rc;
2872
2873vreg_fail1:
2874 for (; i > 0; i--)
2875 vreg_put(dsi_vreg[i - 1]);
2876
2877fail_gpio2:
2878 gpio_free(GPIO_BACKLIGHT_EN);
2879fail_gpio1:
2880 gpio_free(GPIO_DISPLAY_PWR_EN);
2881 dsi_gpio_initialized = 0;
2882 return rc;
2883}
2884
2885#define MDP_303_VSYNC_GPIO 97
2886
2887#ifdef CONFIG_FB_MSM_MDP303
2888static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2889 .vsync_gpio = MDP_303_VSYNC_GPIO,
2890 .dsi_power_save = mipi_dsi_panel_power,
2891 .dsi_client_reset = msm_fb_dsi_client_reset,
2892 .get_lane_config = msm_fb_get_lane_config,
2893};
2894#endif
2895
2896static void __init msm_fb_add_devices(void)
2897{
2898 msm_fb_register_device("mdp", &mdp_pdata);
2899 msm_fb_register_device("lcdc", &lcdc_pdata);
2900 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2901}
2902
2903#define MSM_EBI2_PHYS 0xa0d00000
2904#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
2905
2906static void __init msm7x27a_init_ebi2(void)
2907{
2908 uint32_t ebi2_cfg;
2909 void __iomem *ebi2_cfg_ptr;
2910
2911 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
2912 if (!ebi2_cfg_ptr)
2913 return;
2914
2915 ebi2_cfg = readl(ebi2_cfg_ptr);
2916 if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf())
2917 ebi2_cfg |= (1 << 4); /* CS2 */
2918
2919 writel(ebi2_cfg, ebi2_cfg_ptr);
2920 iounmap(ebi2_cfg_ptr);
2921
2922 /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
2923 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
2924 sizeof(uint32_t));
2925 if (!ebi2_cfg_ptr)
2926 return;
2927
2928 ebi2_cfg = readl(ebi2_cfg_ptr);
2929 if (machine_is_msm7x27a_surf())
2930 ebi2_cfg |= (1 << 31);
2931
2932 writel(ebi2_cfg, ebi2_cfg_ptr);
2933 iounmap(ebi2_cfg_ptr);
2934}
2935
2936#define ATMEL_TS_I2C_NAME "maXTouch"
2937static struct vreg *vreg_l12;
2938static struct vreg *vreg_s3;
2939
2940#define ATMEL_TS_GPIO_IRQ 82
2941
2942static int atmel_ts_power_on(bool on)
2943{
2944 int rc;
2945
2946 rc = on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2947 if (rc) {
2948 pr_err("%s: vreg %sable failed (%d)\n",
2949 __func__, on ? "en" : "dis", rc);
2950 return rc;
2951 }
2952
2953 rc = on ? vreg_enable(vreg_s3) : vreg_disable(vreg_s3);
2954 if (rc) {
2955 pr_err("%s: vreg %sable failed (%d) for S3\n",
2956 __func__, on ? "en" : "dis", rc);
2957 !on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2958 return rc;
2959 }
2960 /* vreg stabilization delay */
2961 msleep(50);
2962 return 0;
2963}
2964
2965static int atmel_ts_platform_init(struct i2c_client *client)
2966{
2967 int rc;
2968
2969 vreg_l12 = vreg_get(NULL, "gp2");
2970 if (IS_ERR(vreg_l12)) {
2971 pr_err("%s: vreg_get for L2 failed\n", __func__);
2972 return PTR_ERR(vreg_l12);
2973 }
2974
2975 rc = vreg_set_level(vreg_l12, 2850);
2976 if (rc) {
2977 pr_err("%s: vreg set level failed (%d) for l2\n",
2978 __func__, rc);
2979 goto vreg_put_l2;
2980 }
2981
2982 vreg_s3 = vreg_get(NULL, "msme1");
2983 if (IS_ERR(vreg_s3)) {
2984 pr_err("%s: vreg_get for S3 failed\n", __func__);
2985 rc = PTR_ERR(vreg_s3);
2986 goto vreg_put_l2;
2987 }
2988
2989 rc = vreg_set_level(vreg_s3, 1800);
2990 if (rc) {
2991 pr_err("%s: vreg set level failed (%d) for S3\n",
2992 __func__, rc);
2993 goto vreg_put_s3;
2994 }
2995
2996 rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
2997 GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
2998 GPIO_CFG_8MA), GPIO_CFG_ENABLE);
2999 if (rc) {
3000 pr_err("%s: gpio_tlmm_config for %d failed\n",
3001 __func__, ATMEL_TS_GPIO_IRQ);
3002 goto vreg_put_s3;
3003 }
3004
3005 /* configure touchscreen interrupt gpio */
3006 rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
3007 if (rc) {
3008 pr_err("%s: unable to request gpio %d\n",
3009 __func__, ATMEL_TS_GPIO_IRQ);
3010 goto ts_gpio_tlmm_unconfig;
3011 }
3012
3013 rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
3014 if (rc < 0) {
3015 pr_err("%s: unable to set the direction of gpio %d\n",
3016 __func__, ATMEL_TS_GPIO_IRQ);
3017 goto free_ts_gpio;
3018 }
3019 return 0;
3020
3021free_ts_gpio:
3022 gpio_free(ATMEL_TS_GPIO_IRQ);
3023ts_gpio_tlmm_unconfig:
3024 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3025 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3026 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3027vreg_put_s3:
3028 vreg_put(vreg_s3);
3029vreg_put_l2:
3030 vreg_put(vreg_l12);
3031 return rc;
3032}
3033
3034static int atmel_ts_platform_exit(struct i2c_client *client)
3035{
3036 gpio_free(ATMEL_TS_GPIO_IRQ);
3037 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3038 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3039 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3040 vreg_disable(vreg_s3);
3041 vreg_put(vreg_s3);
3042 vreg_disable(vreg_l12);
3043 vreg_put(vreg_l12);
3044 return 0;
3045}
3046
3047static u8 atmel_ts_read_chg(void)
3048{
3049 return gpio_get_value(ATMEL_TS_GPIO_IRQ);
3050}
3051
3052static u8 atmel_ts_valid_interrupt(void)
3053{
3054 return !atmel_ts_read_chg();
3055}
3056
3057#define ATMEL_X_OFFSET 13
3058#define ATMEL_Y_OFFSET 0
3059
3060static struct mxt_platform_data atmel_ts_pdata = {
3061 .numtouch = 4,
3062 .init_platform_hw = atmel_ts_platform_init,
3063 .exit_platform_hw = atmel_ts_platform_exit,
3064 .power_on = atmel_ts_power_on,
3065 .display_res_x = 480,
3066 .display_res_y = 864,
3067 .min_x = ATMEL_X_OFFSET,
3068 .max_x = (505 - ATMEL_X_OFFSET),
3069 .min_y = ATMEL_Y_OFFSET,
3070 .max_y = (863 - ATMEL_Y_OFFSET),
3071 .valid_interrupt = atmel_ts_valid_interrupt,
3072 .read_chg = atmel_ts_read_chg,
3073};
3074
3075static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
3076 {
3077 I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
3078 .platform_data = &atmel_ts_pdata,
3079 .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
3080 },
3081};
3082
3083#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
3084
3085static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
3086static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
3087
3088static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
3089 ARRAY_SIZE(kp_row_gpios)] = {
3090 [KP_INDEX(0, 0)] = KEY_7,
3091 [KP_INDEX(0, 1)] = KEY_DOWN,
3092 [KP_INDEX(0, 2)] = KEY_UP,
3093 [KP_INDEX(0, 3)] = KEY_RIGHT,
3094 [KP_INDEX(0, 4)] = KEY_ENTER,
3095
3096 [KP_INDEX(1, 0)] = KEY_LEFT,
3097 [KP_INDEX(1, 1)] = KEY_SEND,
3098 [KP_INDEX(1, 2)] = KEY_1,
3099 [KP_INDEX(1, 3)] = KEY_4,
3100 [KP_INDEX(1, 4)] = KEY_CLEAR,
3101
3102 [KP_INDEX(2, 0)] = KEY_6,
3103 [KP_INDEX(2, 1)] = KEY_5,
3104 [KP_INDEX(2, 2)] = KEY_8,
3105 [KP_INDEX(2, 3)] = KEY_3,
3106 [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
3107
3108 [KP_INDEX(3, 0)] = KEY_9,
3109 [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
3110 [KP_INDEX(3, 2)] = KEY_0,
3111 [KP_INDEX(3, 3)] = KEY_2,
3112 [KP_INDEX(3, 4)] = KEY_SLEEP,
3113
3114 [KP_INDEX(4, 0)] = KEY_BACK,
3115 [KP_INDEX(4, 1)] = KEY_HOME,
3116 [KP_INDEX(4, 2)] = KEY_MENU,
3117 [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
3118 [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
3119};
3120
3121/* SURF keypad platform device information */
3122static struct gpio_event_matrix_info kp_matrix_info = {
3123 .info.func = gpio_event_matrix_func,
3124 .keymap = keymap,
3125 .output_gpios = kp_row_gpios,
3126 .input_gpios = kp_col_gpios,
3127 .noutputs = ARRAY_SIZE(kp_row_gpios),
3128 .ninputs = ARRAY_SIZE(kp_col_gpios),
3129 .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
3130 .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
3131 .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
3132 GPIOKPF_PRINT_UNMAPPED_KEYS,
3133};
3134
3135static struct gpio_event_info *kp_info[] = {
3136 &kp_matrix_info.info
3137};
3138
3139static struct gpio_event_platform_data kp_pdata = {
3140 .name = "7x27a_kp",
3141 .info = kp_info,
3142 .info_count = ARRAY_SIZE(kp_info)
3143};
3144
3145static struct platform_device kp_pdev = {
3146 .name = GPIO_EVENT_DEV_NAME,
3147 .id = -1,
3148 .dev = {
3149 .platform_data = &kp_pdata,
3150 },
3151};
3152
3153static struct msm_handset_platform_data hs_platform_data = {
3154 .hs_name = "7k_handset",
3155 .pwr_key_delay_ms = 500, /* 0 will disable end key */
3156};
3157
3158static struct platform_device hs_pdev = {
3159 .name = "msm-handset",
3160 .id = -1,
3161 .dev = {
3162 .platform_data = &hs_platform_data,
3163 },
3164};
3165
3166#define LED_GPIO_PDM 96
3167#define UART1DM_RX_GPIO 45
3168static void __init msm7x2x_init(void)
3169{
Trilok Sonia416c492011-07-22 20:20:23 +05303170 msm7x2x_misc_init();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003171
3172 /* Common functions for SURF/FFA/RUMI3 */
3173 msm_device_i2c_init();
3174 msm7x27a_init_mmc();
3175 msm7x27a_init_ebi2();
3176 msm7x27a_cfg_uart2dm_serial();
3177#ifdef CONFIG_SERIAL_MSM_HS
3178 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
3179 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
3180#endif
3181
3182 if (machine_is_msm7x27a_rumi3()) {
3183 platform_add_devices(rumi_sim_devices,
3184 ARRAY_SIZE(rumi_sim_devices));
3185 }
3186 if (machine_is_msm7x27a_surf() || machine_is_msm7x27a_ffa()) {
3187#ifdef CONFIG_USB_MSM_OTG_72K
3188 msm_otg_pdata.swfi_latency =
3189 msm7x27a_pm_data
3190 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
3191 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3192#endif
3193 msm_device_gadget_peripheral.dev.platform_data =
3194 &msm_gadget_pdata;
3195 msm7x27a_cfg_smsc911x();
3196 platform_add_devices(msm_footswitch_devices,
3197 msm_num_footswitch_devices);
3198 platform_add_devices(surf_ffa_devices,
3199 ARRAY_SIZE(surf_ffa_devices));
3200 msm_fb_add_devices();
3201#ifdef CONFIG_USB_EHCI_MSM_72K
3202 msm7x2x_init_host();
3203#endif
3204 }
3205
3206 msm_pm_set_platform_data(msm7x27a_pm_data,
3207 ARRAY_SIZE(msm7x27a_pm_data));
3208
3209#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
3210 register_i2c_devices();
3211#endif
3212#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3213 bt_power_init();
3214#endif
3215 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
3216 atmel_ts_pdata.min_x = 0;
3217 atmel_ts_pdata.max_x = 480;
3218 atmel_ts_pdata.min_y = 0;
3219 atmel_ts_pdata.max_y = 320;
3220 }
3221
3222 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
3223 atmel_ts_i2c_info,
3224 ARRAY_SIZE(atmel_ts_i2c_info));
3225
3226 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
3227 i2c_camera_devices,
3228 ARRAY_SIZE(i2c_camera_devices));
3229 platform_device_register(&kp_pdev);
3230 platform_device_register(&hs_pdev);
3231
3232 /* configure it as a pdm function*/
3233 if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
3234 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
3235 GPIO_CFG_8MA), GPIO_CFG_ENABLE))
3236 pr_err("%s: gpio_tlmm_config for %d failed\n",
3237 __func__, LED_GPIO_PDM);
3238 else
3239 platform_device_register(&led_pdev);
3240
3241#ifdef CONFIG_MSM_RPC_VIBRATOR
3242 if (machine_is_msm7x27a_ffa())
3243 msm_init_pmic_vibrator();
3244#endif
3245 /*7x25a kgsl initializations*/
3246 msm7x25a_kgsl_3d0_init();
3247}
3248
3249static void __init msm7x2x_init_early(void)
3250{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003251 msm_msm7x2x_allocate_memory_regions();
3252}
3253
3254MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
3255 .boot_params = PHYS_OFFSET + 0x100,
3256 .map_io = msm_common_io_init,
3257 .reserve = msm7x27a_reserve,
3258 .init_irq = msm_init_irq,
3259 .init_machine = msm7x2x_init,
3260 .timer = &msm_timer,
3261 .init_early = msm7x2x_init_early,
3262MACHINE_END
3263MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
3264 .boot_params = PHYS_OFFSET + 0x100,
3265 .map_io = msm_common_io_init,
3266 .reserve = msm7x27a_reserve,
3267 .init_irq = msm_init_irq,
3268 .init_machine = msm7x2x_init,
3269 .timer = &msm_timer,
3270 .init_early = msm7x2x_init_early,
3271MACHINE_END
3272MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
3273 .boot_params = PHYS_OFFSET + 0x100,
3274 .map_io = msm_common_io_init,
3275 .reserve = msm7x27a_reserve,
3276 .init_irq = msm_init_irq,
3277 .init_machine = msm7x2x_init,
3278 .timer = &msm_timer,
3279 .init_early = msm7x2x_init_early,
3280MACHINE_END