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Brian Swetland30421022007-11-26 04:11:43 -08001/* arch/arm/mach-msm/io.c
2 *
Daniel Walkercf62ffa2010-05-04 15:12:27 -07003 * MSM7K, QSD io support
Brian Swetland30421022007-11-26 04:11:43 -08004 *
5 * Copyright (C) 2007 Google, Inc.
David Brown8c27e6f2011-01-07 10:20:49 -08006 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
Brian Swetland30421022007-11-26 04:11:43 -08007 * Author: Brian Swetland <swetland@google.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010022#include <linux/io.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023#include <linux/module.h>
Brian Swetland30421022007-11-26 04:11:43 -080024
Russell Kinga09e64f2008-08-05 16:14:15 +010025#include <mach/hardware.h>
Brian Swetland30421022007-11-26 04:11:43 -080026#include <asm/page.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010027#include <mach/msm_iomap.h>
Brian Swetland30421022007-11-26 04:11:43 -080028#include <asm/mach/map.h>
29
Russell Kinga09e64f2008-08-05 16:14:15 +010030#include <mach/board.h>
Brian Swetland30421022007-11-26 04:11:43 -080031
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070032#define MSM_CHIP_DEVICE(name, chip) { \
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070033 .virtual = (unsigned long) MSM_##name##_BASE, \
David Brown8c27e6f2011-01-07 10:20:49 -080034 .pfn = __phys_to_pfn(chip##_##name##_PHYS), \
35 .length = chip##_##name##_SIZE, \
Brian Swetland30421022007-11-26 04:11:43 -080036 .type = MT_DEVICE_NONSHARED, \
37 }
38
David Brown8c27e6f2011-01-07 10:20:49 -080039#define MSM_DEVICE(name) MSM_CHIP_DEVICE(name, MSM)
40
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070041/* msm_shared_ram_phys default value of 0x00100000 is the most common value
42 * and should work as-is for any target without stacked memory.
43 */
44unsigned int msm_shared_ram_phys = 0x00100000;
45
46static void msm_map_io(struct map_desc *io_desc, int size)
47{
48 int i;
49
50 BUG_ON(!size);
51 for (i = 0; i < size; i++)
52 if (io_desc[i].virtual == (unsigned long)MSM_SHARED_RAM_BASE)
53 io_desc[i].pfn = __phys_to_pfn(msm_shared_ram_phys);
54
55 iotable_init(io_desc, size);
56}
57
58#if defined(CONFIG_ARCH_MSM7X01A) || defined(CONFIG_ARCH_MSM7X27) \
Daniel Walkercf62ffa2010-05-04 15:12:27 -070059 || defined(CONFIG_ARCH_MSM7X25)
Brian Swetland30421022007-11-26 04:11:43 -080060static struct map_desc msm_io_desc[] __initdata = {
61 MSM_DEVICE(VIC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070062 MSM_DEVICE(CSR),
63 MSM_DEVICE(TMR),
Brian Swetland30421022007-11-26 04:11:43 -080064 MSM_DEVICE(GPIO1),
65 MSM_DEVICE(GPIO2),
Brian Swetland30421022007-11-26 04:11:43 -080066 MSM_DEVICE(CLK_CTL),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070067 MSM_DEVICE(AD5),
68 MSM_DEVICE(MDC),
Pavel Machek6339f662009-11-02 11:48:29 +010069#ifdef CONFIG_MSM_DEBUG_UART
70 MSM_DEVICE(DEBUG_UART),
71#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070072#ifdef CONFIG_CACHE_L2X0
73 {
74 .virtual = (unsigned long) MSM_L2CC_BASE,
75 .pfn = __phys_to_pfn(MSM_L2CC_PHYS),
76 .length = MSM_L2CC_SIZE,
77 .type = MT_DEVICE,
78 },
Dima Zavinb42dc442010-01-29 11:43:42 -080079#endif
Brian Swetland30421022007-11-26 04:11:43 -080080 {
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070081 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
Brian Swetland30421022007-11-26 04:11:43 -080082 .length = MSM_SHARED_RAM_SIZE,
83 .type = MT_DEVICE,
84 },
85};
86
87void __init msm_map_common_io(void)
88{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070089 /*Peripheral port memory remap, nothing looks to be there for
90 * cortex a5.
91 */
92#ifndef CONFIG_ARCH_MSM_CORTEX_A5
Brian Swetland30421022007-11-26 04:11:43 -080093 /* Make sure the peripheral register window is closed, since
94 * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
95 * pages are peripheral interface or not.
96 */
97 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070098#endif
99 msm_map_io(msm_io_desc, ARRAY_SIZE(msm_io_desc));
Brian Swetland30421022007-11-26 04:11:43 -0800100}
Daniel Walkercf62ffa2010-05-04 15:12:27 -0700101#endif
102
103#ifdef CONFIG_ARCH_QSD8X50
104static struct map_desc qsd8x50_io_desc[] __initdata = {
105 MSM_DEVICE(VIC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700106 MSM_DEVICE(CSR),
107 MSM_DEVICE(TMR),
Daniel Walkercf62ffa2010-05-04 15:12:27 -0700108 MSM_DEVICE(GPIO1),
109 MSM_DEVICE(GPIO2),
110 MSM_DEVICE(CLK_CTL),
111 MSM_DEVICE(SIRC),
112 MSM_DEVICE(SCPLL),
113 MSM_DEVICE(AD5),
114 MSM_DEVICE(MDC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700115 MSM_DEVICE(TCSR),
Daniel Walkercf62ffa2010-05-04 15:12:27 -0700116#ifdef CONFIG_MSM_DEBUG_UART
117 MSM_DEVICE(DEBUG_UART),
118#endif
119 {
120 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
Daniel Walkercf62ffa2010-05-04 15:12:27 -0700121 .length = MSM_SHARED_RAM_SIZE,
122 .type = MT_DEVICE,
123 },
124};
125
126void __init msm_map_qsd8x50_io(void)
127{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128 msm_map_io(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
Daniel Walkercf62ffa2010-05-04 15:12:27 -0700129}
130#endif /* CONFIG_ARCH_QSD8X50 */
Brian Swetland30421022007-11-26 04:11:43 -0800131
Steve Muckle6cf6dfe2010-01-06 14:55:24 -0800132#ifdef CONFIG_ARCH_MSM8X60
133static struct map_desc msm8x60_io_desc[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700134 MSM_DEVICE(QGIC_DIST),
135 MSM_DEVICE(QGIC_CPU),
136 MSM_DEVICE(TMR),
137 MSM_DEVICE(TMR0),
138 MSM_DEVICE(RPM_MPM),
Steve Muckle6cf6dfe2010-01-06 14:55:24 -0800139 MSM_DEVICE(ACC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700140 MSM_DEVICE(ACC0),
141 MSM_DEVICE(ACC1),
142 MSM_DEVICE(SAW0),
143 MSM_DEVICE(SAW1),
Steve Muckle6cf6dfe2010-01-06 14:55:24 -0800144 MSM_DEVICE(GCC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700145 MSM_DEVICE(TLMM),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700146 MSM_DEVICE(SCPLL),
147 MSM_DEVICE(RPM),
148 MSM_DEVICE(CLK_CTL),
149 MSM_DEVICE(MMSS_CLK_CTL),
150 MSM_DEVICE(LPASS_CLK_CTL),
151 MSM_DEVICE(TCSR),
152 MSM_DEVICE(IMEM),
153 MSM_DEVICE(HDMI),
154#ifdef CONFIG_MSM_DEBUG_UART
155 MSM_DEVICE(DEBUG_UART),
156#endif
157 MSM_DEVICE(SIC_NON_SECURE),
158 {
159 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
160 .length = MSM_SHARED_RAM_SIZE,
161 .type = MT_DEVICE,
162 },
163 MSM_DEVICE(QFPROM),
Steve Muckle6cf6dfe2010-01-06 14:55:24 -0800164};
165
166void __init msm_map_msm8x60_io(void)
167{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700168 msm_map_io(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc));
Steve Muckle6cf6dfe2010-01-06 14:55:24 -0800169}
170#endif /* CONFIG_ARCH_MSM8X60 */
171
Stepan Moskovchenko5d0afd72010-12-01 19:05:49 -0800172#ifdef CONFIG_ARCH_MSM8960
173static struct map_desc msm8960_io_desc[] __initdata = {
174 MSM_CHIP_DEVICE(QGIC_DIST, MSM8960),
175 MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700176 MSM_CHIP_DEVICE(ACC0, MSM8960),
177 MSM_CHIP_DEVICE(ACC1, MSM8960),
Stepan Moskovchenko5d0afd72010-12-01 19:05:49 -0800178 MSM_CHIP_DEVICE(TMR, MSM8960),
179 MSM_CHIP_DEVICE(TMR0, MSM8960),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700180 MSM_CHIP_DEVICE(RPM_MPM, MSM8960),
181 MSM_CHIP_DEVICE(CLK_CTL, MSM8960),
182 MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8960),
183 MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8960),
184 MSM_CHIP_DEVICE(RPM, MSM8960),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700185 MSM_CHIP_DEVICE(TLMM, MSM8960),
186 MSM_CHIP_DEVICE(HFPLL, MSM8960),
187 MSM_CHIP_DEVICE(SAW0, MSM8960),
188 MSM_CHIP_DEVICE(SAW1, MSM8960),
189 MSM_CHIP_DEVICE(SAW_L2, MSM8960),
190 MSM_CHIP_DEVICE(SIC_NON_SECURE, MSM8960),
191 MSM_CHIP_DEVICE(APCS_GCC, MSM8960),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700192 MSM_CHIP_DEVICE(IMEM, MSM8960),
193 MSM_CHIP_DEVICE(HDMI, MSM8960),
194 {
195 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
196 .length = MSM_SHARED_RAM_SIZE,
197 .type = MT_DEVICE,
198 },
199#ifdef CONFIG_MSM_DEBUG_UART
200 MSM_DEVICE(DEBUG_UART),
201#endif
Siddartha Mohanadossce1315a2011-04-21 15:25:55 -0700202 MSM_CHIP_DEVICE(QFPROM, MSM8960),
Stepan Moskovchenko5d0afd72010-12-01 19:05:49 -0800203};
204
205void __init msm_map_msm8960_io(void)
206{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700207 msm_map_io(msm8960_io_desc, ARRAY_SIZE(msm8960_io_desc));
Stepan Moskovchenko5d0afd72010-12-01 19:05:49 -0800208}
209#endif /* CONFIG_ARCH_MSM8960 */
210
Stepan Moskovchenko2b992ad2011-10-18 17:24:18 -0700211#ifdef CONFIG_ARCH_MSM8930
212static struct map_desc msm8930_io_desc[] __initdata = {
213 MSM_CHIP_DEVICE(QGIC_DIST, MSM8930),
214 MSM_CHIP_DEVICE(QGIC_CPU, MSM8930),
215 MSM_CHIP_DEVICE(ACC0, MSM8930),
216 MSM_CHIP_DEVICE(ACC1, MSM8930),
217 MSM_CHIP_DEVICE(TMR, MSM8930),
218 MSM_CHIP_DEVICE(TMR0, MSM8930),
219 MSM_CHIP_DEVICE(RPM_MPM, MSM8930),
220 MSM_CHIP_DEVICE(CLK_CTL, MSM8930),
221 MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8930),
222 MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8930),
223 MSM_CHIP_DEVICE(RPM, MSM8930),
224 MSM_CHIP_DEVICE(TLMM, MSM8930),
225 MSM_CHIP_DEVICE(HFPLL, MSM8930),
226 MSM_CHIP_DEVICE(SAW0, MSM8930),
227 MSM_CHIP_DEVICE(SAW1, MSM8930),
228 MSM_CHIP_DEVICE(SAW_L2, MSM8930),
229 MSM_CHIP_DEVICE(SIC_NON_SECURE, MSM8930),
230 MSM_CHIP_DEVICE(APCS_GCC, MSM8930),
231 MSM_CHIP_DEVICE(IMEM, MSM8930),
232 MSM_CHIP_DEVICE(HDMI, MSM8930),
233 {
234 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
235 .length = MSM_SHARED_RAM_SIZE,
236 .type = MT_DEVICE,
237 },
238#ifdef CONFIG_MSM_DEBUG_UART
239 MSM_DEVICE(DEBUG_UART),
240#endif
241 MSM_CHIP_DEVICE(QFPROM, MSM8930),
242};
243
244void __init msm_map_msm8930_io(void)
245{
246 msm_map_io(msm8930_io_desc, ARRAY_SIZE(msm8930_io_desc));
247}
248#endif /* CONFIG_ARCH_MSM8930 */
249
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700250#ifdef CONFIG_ARCH_APQ8064
251static struct map_desc apq8064_io_desc[] __initdata = {
252 MSM_CHIP_DEVICE(QGIC_DIST, APQ8064),
253 MSM_CHIP_DEVICE(QGIC_CPU, APQ8064),
254 MSM_CHIP_DEVICE(TMR, APQ8064),
255 MSM_CHIP_DEVICE(TMR0, APQ8064),
Joel King4ebccc62011-07-22 09:43:22 -0700256 MSM_CHIP_DEVICE(TLMM, APQ8064),
Vikram Mulukutlabb408eb2011-08-04 09:28:56 -0700257 MSM_CHIP_DEVICE(ACC0, APQ8064),
258 MSM_CHIP_DEVICE(ACC1, APQ8064),
259 MSM_CHIP_DEVICE(ACC2, APQ8064),
260 MSM_CHIP_DEVICE(ACC3, APQ8064),
261 MSM_CHIP_DEVICE(HFPLL, APQ8064),
Tianyi Gou33430412011-09-07 21:50:42 -0700262 MSM_CHIP_DEVICE(CLK_CTL, APQ8064),
263 MSM_CHIP_DEVICE(MMSS_CLK_CTL, APQ8064),
264 MSM_CHIP_DEVICE(LPASS_CLK_CTL, APQ8064),
Vikram Mulukutlabb408eb2011-08-04 09:28:56 -0700265 MSM_CHIP_DEVICE(APCS_GCC, APQ8064),
Stepan Moskovchenko3e444e52011-08-05 17:59:48 -0700266 MSM_CHIP_DEVICE(IMEM, APQ8064),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700267 {
268 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
269 .length = MSM_SHARED_RAM_SIZE,
270 .type = MT_DEVICE,
271 },
272};
273
274void __init msm_map_apq8064_io(void)
275{
276 msm_map_io(apq8064_io_desc, ARRAY_SIZE(apq8064_io_desc));
277}
278#endif /* CONFIG_ARCH_APQ8064 */
279
Sathish Ambley6829db12011-10-08 22:41:23 -0700280#ifdef CONFIG_ARCH_MSMCOPPER
281static struct map_desc msm_copper_io_desc[] __initdata = {
282 MSM_CHIP_DEVICE(QGIC_DIST, COPPER),
283 MSM_CHIP_DEVICE(QGIC_CPU, COPPER),
284 MSM_CHIP_DEVICE(TLMM, COPPER),
285};
286
287void __init msm_map_copper_io(void)
288{
289 msm_map_io(msm_copper_io_desc, ARRAY_SIZE(msm_copper_io_desc));
290}
291#endif /* CONFIG_ARCH_MSMCOPPER */
292
Daniel Walkerc83b2bf2010-05-04 15:26:13 -0700293#ifdef CONFIG_ARCH_MSM7X30
294static struct map_desc msm7x30_io_desc[] __initdata = {
295 MSM_DEVICE(VIC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700296 MSM_DEVICE(CSR),
297 MSM_DEVICE(TMR),
Daniel Walkerc83b2bf2010-05-04 15:26:13 -0700298 MSM_DEVICE(GPIO1),
299 MSM_DEVICE(GPIO2),
300 MSM_DEVICE(CLK_CTL),
301 MSM_DEVICE(CLK_CTL_SH2),
302 MSM_DEVICE(AD5),
303 MSM_DEVICE(MDC),
304 MSM_DEVICE(ACC),
305 MSM_DEVICE(SAW),
306 MSM_DEVICE(GCC),
307 MSM_DEVICE(TCSR),
308#ifdef CONFIG_MSM_DEBUG_UART
309 MSM_DEVICE(DEBUG_UART),
310#endif
311 {
312 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
Daniel Walkerc83b2bf2010-05-04 15:26:13 -0700313 .length = MSM_SHARED_RAM_SIZE,
314 .type = MT_DEVICE,
315 },
316};
317
318void __init msm_map_msm7x30_io(void)
319{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700320 msm_map_io(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
Daniel Walkerc83b2bf2010-05-04 15:26:13 -0700321}
322#endif /* CONFIG_ARCH_MSM7X30 */
323
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700324#ifdef CONFIG_ARCH_FSM9XXX
325static struct map_desc fsm9xxx_io_desc[] __initdata = {
326 MSM_DEVICE(VIC),
327 MSM_DEVICE(SIRC),
328 MSM_DEVICE(CSR),
329 MSM_DEVICE(TLMM),
330 MSM_DEVICE(TCSR),
331 MSM_DEVICE(CLK_CTL),
332 MSM_DEVICE(ACC),
333 MSM_DEVICE(SAW),
334 MSM_DEVICE(GCC),
335 MSM_DEVICE(GRFC),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700336 MSM_DEVICE(QFP_FUSE),
337 MSM_DEVICE(HH),
338#ifdef CONFIG_MSM_DEBUG_UART
339 MSM_DEVICE(DEBUG_UART),
340#endif
341 {
342 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
343 .length = MSM_SHARED_RAM_SIZE,
344 .type = MT_DEVICE,
345 },
346};
347
348void __init msm_map_fsm9xxx_io(void)
349{
350 msm_map_io(fsm9xxx_io_desc, ARRAY_SIZE(fsm9xxx_io_desc));
351}
352#endif /* CONFIG_ARCH_FSM9XXX */
353
Rohit Vaswani99fb6f22011-08-15 13:37:32 -0700354#ifdef CONFIG_ARCH_MSM9615
355static struct map_desc msm9615_io_desc[] __initdata = {
356 MSM_CHIP_DEVICE(QGIC_DIST, MSM9615),
357 MSM_CHIP_DEVICE(QGIC_CPU, MSM9615),
358 MSM_CHIP_DEVICE(ACC0, MSM9615),
359 MSM_CHIP_DEVICE(TMR, MSM9615),
Rohit Vaswani99fb6f22011-08-15 13:37:32 -0700360 MSM_CHIP_DEVICE(TLMM, MSM9615),
361 MSM_CHIP_DEVICE(SAW0, MSM9615),
362 MSM_CHIP_DEVICE(APCS_GCC, MSM9615),
363 MSM_CHIP_DEVICE(TCSR, MSM9615),
Vikram Mulukutla489e39e2011-08-31 18:04:05 -0700364 MSM_CHIP_DEVICE(L2CC, MSM9615),
365 MSM_CHIP_DEVICE(CLK_CTL, MSM9615),
366 MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM9615),
Rohit Vaswani71c86b72011-09-09 16:51:46 -0700367 MSM_CHIP_DEVICE(RPM, MSM9615),
368 MSM_CHIP_DEVICE(RPM_MPM, MSM9615),
369 MSM_CHIP_DEVICE(APCS_GLB, MSM9615),
Rohit Vaswani4f96570c2011-10-13 18:14:37 -0700370 MSM_CHIP_DEVICE(IMEM, MSM9615),
Rohit Vaswani99fb6f22011-08-15 13:37:32 -0700371 {
372 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
373 .length = MSM_SHARED_RAM_SIZE,
374 .type = MT_DEVICE,
375 },
Siddartha Mohanadoss5d49cec2011-09-21 10:26:15 -0700376 MSM_CHIP_DEVICE(QFPROM, MSM9615),
Rohit Vaswani99fb6f22011-08-15 13:37:32 -0700377};
378
379void __init msm_map_msm9615_io(void)
380{
381 msm_map_io(msm9615_io_desc, ARRAY_SIZE(msm9615_io_desc));
382}
383#endif /* CONFIG_ARCH_MSM9615 */
384
Brian Swetland30421022007-11-26 04:11:43 -0800385void __iomem *
386__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
387{
388 if (mtype == MT_DEVICE) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700389 /* The peripherals in the 88000000 - F0000000 range
390 * are only accessable by type MT_DEVICE_NONSHARED.
Brian Swetland30421022007-11-26 04:11:43 -0800391 * Adjust mtype as necessary to make this "just work."
392 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700393 if ((phys_addr >= 0x88000000) && (phys_addr < 0xF0000000))
Brian Swetland30421022007-11-26 04:11:43 -0800394 mtype = MT_DEVICE_NONSHARED;
395 }
396
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700397 return __arm_ioremap(phys_addr, size, mtype);
Brian Swetland30421022007-11-26 04:11:43 -0800398}
Pavankumar Kondeti4916a102010-11-09 15:41:29 +0530399EXPORT_SYMBOL(__msm_ioremap);