blob: c7f230954d68a84ba0e9554e4a20926ccb14c912 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* arch/arm/mach-msm/qdsp5/adsp.c
2 *
3 * Register/Interrupt access for userspace aDSP library.
4 *
5 * Copyright (C) 2008 Google, Inc.
Manish Dewangan8e87bc12012-02-09 20:25:15 +05306 * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007 * Author: Iliyan Malchev <ibm@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20/* TODO:
21 * - move shareable rpc code outside of adsp.c
22 * - general solution for virt->phys patchup
23 * - queue IDs should be relative to modules
24 * - disallow access to non-associated queues
25 */
26
27#include <linux/clk.h>
28#include <linux/delay.h>
29#include <linux/interrupt.h>
30#include <linux/kernel.h>
31#include <linux/kthread.h>
32#include <linux/module.h>
33#include <linux/uaccess.h>
34#include <linux/wait.h>
35#include <linux/wakelock.h>
36#include <linux/slab.h>
37#include <mach/debug_mm.h>
38#include <linux/debugfs.h>
39
40#ifdef CONFIG_DEBUG_FS
41static struct dentry *dentry_adsp;
42static struct dentry *dentry_wdata;
43static struct dentry *dentry_rdata;
44static int wdump, rdump;
45#endif /* CONFIG_DEBUG_FS */
46static struct wake_lock adsp_wake_lock;
47static inline void prevent_suspend(void)
48{
49 wake_lock(&adsp_wake_lock);
50}
51static inline void allow_suspend(void)
52{
53 wake_unlock(&adsp_wake_lock);
54}
55
56#include <linux/io.h>
57#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/msm_adsp.h>
59#include "adsp.h"
60
61#define INT_ADSP INT_ADSP_A9_A11
62
63static struct adsp_info adsp_info;
64static struct msm_rpc_endpoint *rpc_cb_server_client;
65static struct msm_adsp_module *adsp_modules;
66static int adsp_open_count;
67
68static uint32_t rpc_adsp_rtos_atom_prog;
69static uint32_t rpc_adsp_rtos_atom_vers;
70static uint32_t rpc_adsp_rtos_atom_vers_comp;
71static uint32_t rpc_adsp_rtos_mtoa_prog;
72static uint32_t rpc_adsp_rtos_mtoa_vers;
73static uint32_t rpc_adsp_rtos_mtoa_vers_comp;
74static DEFINE_MUTEX(adsp_open_lock);
75
76/* protect interactions with the ADSP command/message queue */
77static spinlock_t adsp_cmd_lock;
78static spinlock_t adsp_write_lock;
79
80static uint32_t current_image = -1;
81
82void adsp_set_image(struct adsp_info *info, uint32_t image)
83{
84 current_image = image;
85}
86
87/*
88 * Checks whether the module_id is available in the
89 * module_entries table.If module_id is available returns `0`.
90 * If module_id is not available returns `-ENXIO`.
91 */
92static int32_t adsp_validate_module(uint32_t module_id)
93{
94 uint32_t *ptr;
95 uint32_t module_index;
96 uint32_t num_mod_entries;
97
98 ptr = adsp_info.init_info_ptr->module_entries;
99 num_mod_entries = adsp_info.init_info_ptr->module_table_size;
100
101 for (module_index = 0; module_index < num_mod_entries; module_index++)
102 if (module_id == ptr[module_index])
103 return 0;
104
105 return -ENXIO;
106}
107
108static int32_t adsp_validate_queue(uint32_t mod_id, unsigned q_idx,
109 uint32_t size)
110{
111 int32_t i;
112 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
113
114 sptr = adsp_info.init_info_ptr;
115 for (i = 0; i < sptr->mod_to_q_entries; i++)
116 if (mod_id == sptr->mod_to_q_tbl[i].module)
117 if (q_idx == sptr->mod_to_q_tbl[i].q_type) {
118 if (size <= sptr->mod_to_q_tbl[i].q_max_len)
119 return 0;
120 MM_ERR("q_idx: %d is not a valid queue \
121 for module %x\n", q_idx, mod_id);
122 return -EINVAL;
123 }
124 MM_ERR("cmd_buf size is more than allowed size\n");
125 return -EINVAL;
126}
127
128uint32_t adsp_get_module(struct adsp_info *info, uint32_t task)
129{
130 return info->task_to_module[current_image][task];
131}
132
133uint32_t adsp_get_queue_offset(struct adsp_info *info, uint32_t queue_id)
134{
135 return info->queue_offset[current_image][queue_id];
136}
137
138static int rpc_adsp_rtos_app_to_modem(uint32_t cmd, uint32_t module,
139 struct msm_adsp_module *adsp_module)
140{
141 int rc;
142 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
143 struct rpc_reply_hdr rpc_rsp;
144
145 rpc_req.gotit = cpu_to_be32(1);
146 rpc_req.cmd = cpu_to_be32(cmd);
147 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
148 rpc_req.module = cpu_to_be32(module);
149 rc = msm_rpc_call_reply(adsp_module->rpc_client,
150 RPC_ADSP_RTOS_APP_TO_MODEM_PROC,
151 &rpc_req, sizeof(rpc_req),
152 &rpc_rsp, sizeof(rpc_rsp),
153 5 * HZ);
154
155 if (rc < 0) {
156 MM_ERR("error receiving RPC reply: %d (%d)\n",
157 rc, -ERESTARTSYS);
158 return rc;
159 }
160
161 if (be32_to_cpu(rpc_rsp.reply_stat) != RPCMSG_REPLYSTAT_ACCEPTED) {
162 MM_ERR("RPC call was denied!\n");
163 return -EPERM;
164 }
165
166 if (be32_to_cpu(rpc_rsp.data.acc_hdr.accept_stat) !=
167 RPC_ACCEPTSTAT_SUCCESS) {
168 MM_ERR("RPC call was not successful (%d)\n",
169 be32_to_cpu(rpc_rsp.data.acc_hdr.accept_stat));
170 return -EINVAL;
171 }
172
173 return 0;
174}
175
176static int get_module_index(uint32_t id)
177{
178 int mod_idx;
179 for (mod_idx = 0; mod_idx < adsp_info.module_count; mod_idx++)
180 if (adsp_info.module[mod_idx].id == id)
181 return mod_idx;
182
183 return -ENXIO;
184}
185
186static struct msm_adsp_module *find_adsp_module_by_id(
187 struct adsp_info *info, uint32_t id)
188{
189 int mod_idx;
190
191 if (id > info->max_module_id) {
192 return NULL;
193 } else {
194 mod_idx = get_module_index(id);
195 if (mod_idx < 0)
196 return NULL;
197 return info->id_to_module[mod_idx];
198 }
199}
200
201static struct msm_adsp_module *find_adsp_module_by_name(
202 struct adsp_info *info, const char *name)
203{
204 unsigned n;
205 for (n = 0; n < info->module_count; n++)
206 if (!strcmp(name, adsp_modules[n].name))
207 return adsp_modules + n;
208 return NULL;
209}
210
211static int adsp_rpc_init(struct msm_adsp_module *adsp_module)
212{
213 /* remove the original connect once compatible support is complete */
214 adsp_module->rpc_client = msm_rpc_connect(
215 rpc_adsp_rtos_atom_prog,
216 rpc_adsp_rtos_atom_vers,
217 MSM_RPC_UNINTERRUPTIBLE);
218 if (IS_ERR(adsp_module->rpc_client))
219 adsp_module->rpc_client = msm_rpc_connect_compatible(
220 rpc_adsp_rtos_atom_prog,
221 rpc_adsp_rtos_atom_vers_comp,
222 MSM_RPC_UNINTERRUPTIBLE);
223
224 if (IS_ERR(adsp_module->rpc_client)) {
225 int rc = PTR_ERR(adsp_module->rpc_client);
226 adsp_module->rpc_client = 0;
227 MM_ERR("could not open rpc client: %d\n", rc);
228 return rc;
229 }
230
231 return 0;
232}
233
234/*
235 * Send RPC_ADSP_RTOS_CMD_GET_INIT_INFO cmd to ARM9 and get
236 * queue offsets and module entries (init info) as part of the event.
237 */
238static void msm_get_init_info(void)
239{
240 int rc;
241 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
242 struct rpc_reply_hdr rpc_rsp;
243
244 adsp_info.init_info_rpc_client = msm_rpc_connect(
245 rpc_adsp_rtos_atom_prog,
246 rpc_adsp_rtos_atom_vers,
247 MSM_RPC_UNINTERRUPTIBLE);
248 if (IS_ERR(adsp_info.init_info_rpc_client)) {
249 adsp_info.init_info_rpc_client = msm_rpc_connect_compatible(
250 rpc_adsp_rtos_atom_prog,
251 rpc_adsp_rtos_atom_vers_comp,
252 MSM_RPC_UNINTERRUPTIBLE);
253 if (IS_ERR(adsp_info.init_info_rpc_client)) {
254 rc = PTR_ERR(adsp_info.init_info_rpc_client);
255 adsp_info.init_info_rpc_client = 0;
256 MM_ERR("could not open rpc client: %d\n", rc);
257 return;
258 }
259 }
260
261 rpc_req.gotit = cpu_to_be32(1);
262 rpc_req.cmd = cpu_to_be32(RPC_ADSP_RTOS_CMD_GET_INIT_INFO);
263 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
264 rpc_req.module = 0;
265
266 rc = msm_rpc_call_reply(adsp_info.init_info_rpc_client,
267 RPC_ADSP_RTOS_APP_TO_MODEM_PROC,
268 &rpc_req, sizeof(rpc_req),
269 &rpc_rsp, sizeof(rpc_rsp),
270 5 * HZ);
271
272 if (rc < 0)
273 MM_ERR("could not send RPC request: %d\n", rc);
274}
275
276int msm_adsp_get(const char *name, struct msm_adsp_module **out,
277 struct msm_adsp_ops *ops, void *driver_data)
278{
279 struct msm_adsp_module *module;
280 int rc = 0;
281 static uint32_t init_info_cmd_sent;
282
Manish Dewangan691f1c42012-02-10 12:50:14 +0530283 mutex_lock(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700284 if (!init_info_cmd_sent) {
285 init_waitqueue_head(&adsp_info.init_info_wait);
286 msm_get_init_info();
287 rc = wait_event_timeout(adsp_info.init_info_wait,
288 adsp_info.init_info_state == ADSP_STATE_INIT_INFO,
289 5 * HZ);
290 if (!rc) {
291 MM_ERR("INIT_INFO failed\n");
Manish Dewangan691f1c42012-02-10 12:50:14 +0530292 mutex_unlock(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700293 return -ETIMEDOUT;
Manish Dewangan691f1c42012-02-10 12:50:14 +0530294
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700295 }
296 init_info_cmd_sent++;
297 }
Manish Dewangan691f1c42012-02-10 12:50:14 +0530298 mutex_unlock(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700299
300 module = find_adsp_module_by_name(&adsp_info, name);
301 if (!module)
302 return -ENODEV;
303
304 mutex_lock(&module->lock);
305 MM_INFO("opening module %s\n", module->name);
306
307 if (module->ops) {
308 rc = -EBUSY;
309 goto done;
310 }
311
312 rc = adsp_rpc_init(module);
313 if (rc)
314 goto done;
315
316 module->ops = ops;
317 module->driver_data = driver_data;
318 *out = module;
319 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_REGISTER_APP,
320 module->id, module);
321 if (rc) {
322 module->ops = NULL;
323 module->driver_data = NULL;
324 *out = NULL;
325 MM_ERR("REGISTER_APP failed\n");
326 goto done;
327 }
328
329 MM_DBG("module %s has been registered\n", module->name);
330
331done:
332 mutex_unlock(&module->lock);
333 return rc;
334}
335EXPORT_SYMBOL(msm_adsp_get);
336
337static int msm_adsp_disable_locked(struct msm_adsp_module *module);
338
339void msm_adsp_put(struct msm_adsp_module *module)
340{
341 unsigned long flags;
342
343 mutex_lock(&module->lock);
344 if (module->ops) {
345 MM_INFO("closing module %s\n", module->name);
346
347 /* lock to ensure a dsp event cannot be delivered
348 * during or after removal of the ops and driver_data
349 */
350 spin_lock_irqsave(&adsp_cmd_lock, flags);
351 module->ops = NULL;
352 module->driver_data = NULL;
353 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
354
355 if (module->state != ADSP_STATE_DISABLED) {
356 MM_INFO("disabling module %s\n", module->name);
357 msm_adsp_disable_locked(module);
358 }
359
360 msm_rpc_close(module->rpc_client);
361 module->rpc_client = 0;
362 } else {
363 MM_INFO("module %s is already closed\n", module->name);
364 }
365 mutex_unlock(&module->lock);
366}
367EXPORT_SYMBOL(msm_adsp_put);
368
369/* this should be common code with rpc_servers.c */
370static int rpc_send_accepted_void_reply(struct msm_rpc_endpoint *client,
371 uint32_t xid, uint32_t accept_status)
372{
373 int rc = 0;
374 uint8_t reply_buf[sizeof(struct rpc_reply_hdr)];
375 struct rpc_reply_hdr *reply = (struct rpc_reply_hdr *)reply_buf;
376
377 reply->xid = cpu_to_be32(xid);
378 reply->type = cpu_to_be32(1); /* reply */
379 reply->reply_stat = cpu_to_be32(RPCMSG_REPLYSTAT_ACCEPTED);
380
381 reply->data.acc_hdr.accept_stat = cpu_to_be32(accept_status);
382 reply->data.acc_hdr.verf_flavor = 0;
383 reply->data.acc_hdr.verf_length = 0;
384
385 rc = msm_rpc_write(rpc_cb_server_client, reply_buf, sizeof(reply_buf));
386 if (rc < 0)
387 MM_ERR("could not write RPC response: %d\n", rc);
388 return rc;
389}
390
391int __msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
392 void *cmd_buf, size_t cmd_size)
393{
394 uint32_t ctrl_word;
395 uint32_t dsp_q_addr;
396 uint32_t dsp_addr;
397 uint32_t cmd_id = 0;
398 int cnt = 0;
399 int ret_status = 0;
400 unsigned long flags;
401 struct adsp_info *info;
402
403 if (!module || !cmd_buf) {
404 MM_ERR("Called with NULL parameters\n");
405 return -EINVAL;
406 }
407 info = module->info;
408 spin_lock_irqsave(&adsp_write_lock, flags);
409
410 if (module->state != ADSP_STATE_ENABLED) {
411 spin_unlock_irqrestore(&adsp_write_lock, flags);
412 MM_ERR("module %s not enabled before write\n", module->name);
413 return -ENODEV;
414 }
415 if (adsp_validate_module(module->id)) {
416 spin_unlock_irqrestore(&adsp_write_lock, flags);
417 MM_ERR("module id validation failed %s %d\n",
418 module->name, module->id);
419 return -ENXIO;
420 }
421 if (dsp_queue_addr >= QDSP_MAX_NUM_QUEUES) {
422 spin_unlock_irqrestore(&adsp_write_lock, flags);
423 MM_ERR("Invalid Queue Index: %d\n", dsp_queue_addr);
424 return -ENXIO;
425 }
426 if (adsp_validate_queue(module->id, dsp_queue_addr, cmd_size)) {
427 spin_unlock_irqrestore(&adsp_write_lock, flags);
428 return -EINVAL;
429 }
430 dsp_q_addr = adsp_get_queue_offset(info, dsp_queue_addr);
431 dsp_q_addr &= ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M;
432
433 /* Poll until the ADSP is ready to accept a command.
434 * Wait for 100us, return error if it's not responding.
435 * If this returns an error, we need to disable ALL modules and
436 * then retry.
437 */
438 while (((ctrl_word = readl(info->write_ctrl)) &
439 ADSP_RTOS_WRITE_CTRL_WORD_READY_M) !=
440 ADSP_RTOS_WRITE_CTRL_WORD_READY_V) {
441 if (cnt > 50) {
442 MM_ERR("timeout waiting for DSP write ready\n");
443 ret_status = -EIO;
444 goto fail;
445 }
446 MM_DBG("waiting for DSP write ready\n");
447 udelay(2);
448 cnt++;
449 }
450
451 /* Set the mutex bits */
452 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
453 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
454
455 /* Clear the command bits */
456 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
457
458 /* Set the queue address bits */
459 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
460 ctrl_word |= dsp_q_addr;
461
462 writel(ctrl_word, info->write_ctrl);
463
464 /* Generate an interrupt to the DSP. This notifies the DSP that
465 * we are about to send a command on this particular queue. The
466 * DSP will in response change its state.
467 */
468 writel(1, info->send_irq);
469
470 /* Poll until the adsp responds to the interrupt; this does not
471 * generate an interrupt from the adsp. This should happen within
472 * 5ms.
473 */
474 cnt = 0;
475 while ((readl(info->write_ctrl) &
476 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M) ==
477 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V) {
478 if (cnt > 2500) {
479 MM_ERR("timeout waiting for adsp ack\n");
480 ret_status = -EIO;
481 goto fail;
482 }
483 udelay(2);
484 cnt++;
485 }
486
487 /* Read the ctrl word */
488 ctrl_word = readl(info->write_ctrl);
489
490 if ((ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_STATUS_M) !=
491 ADSP_RTOS_WRITE_CTRL_WORD_NO_ERR_V) {
492 ret_status = -EAGAIN;
493 goto fail;
494 } else {
495 /* No error */
496 /* Get the DSP buffer address */
497 dsp_addr = (ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M) +
498 (uint32_t)MSM_AD5_BASE;
499
500 if (dsp_addr < (uint32_t)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
501 uint16_t *buf_ptr = (uint16_t *) cmd_buf;
502 uint16_t *dsp_addr16 = (uint16_t *)dsp_addr;
503 cmd_size /= sizeof(uint16_t);
504
505 /* Save the command ID */
506 cmd_id = (uint32_t) buf_ptr[0];
507
508 /* Copy the command to DSP memory */
509 cmd_size++;
510 while (--cmd_size)
511 *dsp_addr16++ = *buf_ptr++;
512 } else {
513 uint32_t *buf_ptr = (uint32_t *) cmd_buf;
514 uint32_t *dsp_addr32 = (uint32_t *)dsp_addr;
515 cmd_size /= sizeof(uint32_t);
516
517 /* Save the command ID */
518 cmd_id = buf_ptr[0];
519
520 cmd_size++;
521 while (--cmd_size)
522 *dsp_addr32++ = *buf_ptr++;
523 }
524
525 /* Set the mutex bits */
526 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
527 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
528
529 /* Set the command bits to write done */
530 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
531 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_CMD_WRITE_DONE_V;
532
533 /* Set the queue address bits */
534 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
535 ctrl_word |= dsp_q_addr;
536
537 writel(ctrl_word, info->write_ctrl);
538
539 /* Generate an interrupt to the DSP. It does not respond with
540 * an interrupt, and we do not need to wait for it to
541 * acknowledge, because it will hold the mutex lock until it's
542 * ready to receive more commands again.
543 */
544 writel(1, info->send_irq);
545
546 module->num_commands++;
547 } /* Ctrl word status bits were 00, no error in the ctrl word */
548
549fail:
550 spin_unlock_irqrestore(&adsp_write_lock, flags);
551 return ret_status;
552}
553EXPORT_SYMBOL(msm_adsp_write);
554
555int msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
556 void *cmd_buf, size_t cmd_size)
557{
558 int rc, retries = 0;
559#ifdef CONFIG_DEBUG_FS
560 uint16_t *ptr;
561 int ii;
562
563 if (wdump > 0) {
564 ptr = cmd_buf;
565 pr_info("A->D:%x\n", module->id);
566 pr_info("adsp: %x %d\n", dsp_queue_addr, cmd_size);
567 for (ii = 0; ii < cmd_size/2; ii++)
568 pr_info("%x ", ptr[ii]);
569 pr_info("\n");
570 }
571#endif /* CONFIG_DEBUG_FS */
572 do {
573 rc = __msm_adsp_write(module, dsp_queue_addr, cmd_buf,
574 cmd_size);
575 if (rc == -EAGAIN)
576 udelay(10);
577 } while (rc == -EAGAIN && retries++ < 300);
578 if (retries > 50)
579 MM_ERR("adsp: %s command took %d attempts: rc %d\n",
580 module->name, retries, rc);
581 return rc;
582}
583
584static void *event_addr;
585static void read_event(void *buf, size_t len)
586{
587 uint32_t dptr[3];
588 struct rpc_adsp_rtos_modem_to_app_args_t *sptr;
589 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
590
591 sptr = event_addr;
592 pkt_ptr = &sptr->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
593
594 dptr[0] = be32_to_cpu(sptr->mtoa_pkt.mp_mtoa_header.event);
595 dptr[1] = be32_to_cpu(pkt_ptr->module);
596 dptr[2] = be32_to_cpu(pkt_ptr->image);
597
598 if (len > EVENT_LEN)
599 len = EVENT_LEN;
600
601 memcpy(buf, dptr, len);
602}
603
604static void handle_adsp_rtos_mtoa_app(struct rpc_request_hdr *req)
605{
606 struct rpc_adsp_rtos_modem_to_app_args_t *args =
607 (struct rpc_adsp_rtos_modem_to_app_args_t *)req;
608 uint32_t event;
609 uint32_t proc_id;
610 uint32_t module_id;
611 uint32_t image;
612 struct msm_adsp_module *module;
613 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
614 struct queue_to_offset_type *qptr;
615 struct queue_to_offset_type *qtbl;
616 struct mod_to_queue_offsets *mqptr;
617 struct mod_to_queue_offsets *mqtbl;
618 uint32_t *mptr;
619 uint32_t *mtbl;
620 uint32_t q_idx;
621 uint32_t num_entries;
622 uint32_t entries_per_image;
623 struct adsp_rtos_mp_mtoa_init_info_type *iptr;
624 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
625 int32_t i_no, e_idx;
626
627 event = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.event);
628 proc_id = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.proc_id);
629
630 if (event == RPC_ADSP_RTOS_INIT_INFO) {
631 MM_INFO("INIT_INFO Event\n");
632 sptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_init_packet;
633
634 iptr = adsp_info.init_info_ptr;
635 iptr->image_count = be32_to_cpu(sptr->image_count);
636 if (iptr->image_count > IMG_MAX)
637 iptr->image_count = IMG_MAX;
638 iptr->num_queue_offsets = be32_to_cpu(sptr->num_queue_offsets);
639 num_entries = iptr->num_queue_offsets;
640 if (num_entries > ENTRIES_MAX) {
641 num_entries = ENTRIES_MAX;
642 iptr->num_queue_offsets = ENTRIES_MAX;
643 }
644 qptr = &sptr->queue_offsets_tbl[0][0];
645 for (i_no = 0; i_no < iptr->image_count; i_no++) {
646 qtbl = &iptr->queue_offsets_tbl[i_no][0];
647 for (e_idx = 0; e_idx < num_entries; e_idx++) {
648 qtbl[e_idx].offset = be32_to_cpu(qptr->offset);
649 qtbl[e_idx].queue = be32_to_cpu(qptr->queue);
650 q_idx = be32_to_cpu(qptr->queue);
651 iptr->queue_offsets[i_no][q_idx] = qtbl[e_idx].offset;
652 qptr++;
653 }
654 }
655
656 num_entries = be32_to_cpu(sptr->num_task_module_entries);
657 if (num_entries > ENTRIES_MAX)
658 num_entries = ENTRIES_MAX;
659 iptr->num_task_module_entries = num_entries;
660 entries_per_image = num_entries / iptr->image_count;
661 mptr = &sptr->task_to_module_tbl[0][0];
662 for (i_no = 0; i_no < iptr->image_count; i_no++) {
663 mtbl = &iptr->task_to_module_tbl[i_no][0];
664 for (e_idx = 0; e_idx < entries_per_image; e_idx++) {
665 mtbl[e_idx] = be32_to_cpu(*mptr);
666 mptr++;
667 }
668 }
669
670 iptr->module_table_size = be32_to_cpu(sptr->module_table_size);
671#if CONFIG_ADSP_RPC_VER > 0x30001
672 if (iptr->module_table_size > MODULES_MAX)
673 iptr->module_table_size = MODULES_MAX;
674#else
675 if (iptr->module_table_size > ENTRIES_MAX)
676 iptr->module_table_size = ENTRIES_MAX;
677#endif
678 mptr = &sptr->module_entries[0];
679 for (i_no = 0; i_no < iptr->module_table_size; i_no++)
680 iptr->module_entries[i_no] = be32_to_cpu(mptr[i_no]);
681
682 mqptr = &sptr->mod_to_q_tbl[0];
683 mqtbl = &iptr->mod_to_q_tbl[0];
684 iptr->mod_to_q_entries = be32_to_cpu(sptr->mod_to_q_entries);
685 if (iptr->mod_to_q_entries > ENTRIES_MAX)
686 iptr->mod_to_q_entries = ENTRIES_MAX;
687 for (e_idx = 0; e_idx < iptr->mod_to_q_entries; e_idx++) {
688 mqtbl[e_idx].module = be32_to_cpu(mqptr->module);
689 mqtbl[e_idx].q_type = be32_to_cpu(mqptr->q_type);
690 mqtbl[e_idx].q_max_len = be32_to_cpu(mqptr->q_max_len);
691 mqptr++;
692 }
693
694 adsp_info.init_info_state = ADSP_STATE_INIT_INFO;
695 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
696 RPC_ACCEPTSTAT_SUCCESS);
697 wake_up(&adsp_info.init_info_wait);
698
699 return;
700 }
701
702 pkt_ptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
703 module_id = be32_to_cpu(pkt_ptr->module);
704 image = be32_to_cpu(pkt_ptr->image);
705
706 MM_DBG("rpc event=%d, proc_id=%d, module=%d, image=%d\n",
707 event, proc_id, module_id, image);
708
709 module = find_adsp_module_by_id(&adsp_info, module_id);
710 if (!module) {
711 MM_ERR("module %d is not supported!\n", module_id);
712 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
713 RPC_ACCEPTSTAT_GARBAGE_ARGS);
714 return;
715 }
716
717 mutex_lock(&module->lock);
718 switch (event) {
719 case RPC_ADSP_RTOS_MOD_READY:
720 MM_INFO("module %s: READY\n", module->name);
721 module->state = ADSP_STATE_ENABLED;
722 wake_up(&module->state_wait);
723 adsp_set_image(module->info, image);
724 break;
725 case RPC_ADSP_RTOS_MOD_DISABLE:
726 MM_INFO("module %s: DISABLED\n", module->name);
727 module->state = ADSP_STATE_DISABLED;
728 wake_up(&module->state_wait);
729 break;
730 case RPC_ADSP_RTOS_SERVICE_RESET:
731 MM_INFO("module %s: SERVICE_RESET\n", module->name);
732 module->state = ADSP_STATE_DISABLED;
733 wake_up(&module->state_wait);
734 break;
735 case RPC_ADSP_RTOS_CMD_SUCCESS:
736 MM_INFO("module %s: CMD_SUCCESS\n", module->name);
737 break;
738 case RPC_ADSP_RTOS_CMD_FAIL:
739 MM_INFO("module %s: CMD_FAIL\n", module->name);
740 break;
741 case RPC_ADSP_RTOS_DISABLE_FAIL:
742 MM_INFO("module %s: DISABLE_FAIL\n", module->name);
743 break;
744 default:
745 MM_ERR("unknown event %d\n", event);
746 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
747 RPC_ACCEPTSTAT_GARBAGE_ARGS);
748 mutex_unlock(&module->lock);
749 return;
750 }
751 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
752 RPC_ACCEPTSTAT_SUCCESS);
753#ifdef CONFIG_MSM_ADSP_REPORT_EVENTS
754 event_addr = (uint32_t *)req;
755 module->ops->event(module->driver_data,
756 EVENT_MSG_ID,
757 EVENT_LEN,
758 read_event);
759#endif
760 mutex_unlock(&module->lock);
761}
762
763static int handle_adsp_rtos_mtoa(struct rpc_request_hdr *req)
764{
765 switch (req->procedure) {
766 case RPC_ADSP_RTOS_MTOA_NULL_PROC:
767 rpc_send_accepted_void_reply(rpc_cb_server_client,
768 req->xid,
769 RPC_ACCEPTSTAT_SUCCESS);
770 break;
771#if CONFIG_ADSP_RPC_VER > 0x30001
772 case RPC_ADSP_RTOS_MTOA_INIT_INFO_PROC:
773 case RPC_ADSP_RTOS_MTOA_EVENT_INFO_PROC:
774#else
775 case RPC_ADSP_RTOS_MODEM_TO_APP_PROC:
776#endif
777 handle_adsp_rtos_mtoa_app(req);
778 break;
779 default:
780 MM_ERR("unknowned proc %d\n", req->procedure);
781 rpc_send_accepted_void_reply(
782 rpc_cb_server_client, req->xid,
783 RPC_ACCEPTSTAT_PROC_UNAVAIL);
784 break;
785 }
786 return 0;
787}
788
789/* this should be common code with rpc_servers.c */
790static int adsp_rpc_thread(void *data)
791{
792 void *buffer;
793 struct rpc_request_hdr *req;
794 int rc, exit = 0;
795
796 do {
797 rc = msm_rpc_read(rpc_cb_server_client, &buffer, -1, -1);
798 if (rc < 0) {
799 MM_ERR("could not read rpc: %d\n", rc);
800 break;
801 }
802 req = (struct rpc_request_hdr *)buffer;
803
804 req->type = be32_to_cpu(req->type);
805 req->xid = be32_to_cpu(req->xid);
806 req->rpc_vers = be32_to_cpu(req->rpc_vers);
807 req->prog = be32_to_cpu(req->prog);
808 req->vers = be32_to_cpu(req->vers);
809 req->procedure = be32_to_cpu(req->procedure);
810
811 if (req->type != 0)
812 goto bad_rpc;
813 if (req->rpc_vers != 2)
814 goto bad_rpc;
815 if (req->prog != rpc_adsp_rtos_mtoa_prog)
816 goto bad_rpc;
817 if (!msm_rpc_is_compatible_version(rpc_adsp_rtos_mtoa_vers,
818 req->vers))
819 goto bad_rpc;
820
821 handle_adsp_rtos_mtoa(req);
822 kfree(buffer);
823 continue;
824
825bad_rpc:
826 MM_ERR("bogus rpc from modem\n");
827 kfree(buffer);
828 } while (!exit);
829 do_exit(0);
830}
831
832static size_t read_event_size;
833static void *read_event_addr;
834
835static void read_event_16(void *buf, size_t len)
836{
837 uint16_t *dst = buf;
838 uint16_t *src = read_event_addr;
839 len /= 2;
840 if (len > read_event_size)
841 len = read_event_size;
842 while (len--)
843 *dst++ = *src++;
844}
845
846static void read_event_32(void *buf, size_t len)
847{
848 uint32_t *dst = buf;
849 uint32_t *src = read_event_addr;
850 len /= 2;
851 if (len > read_event_size)
852 len = read_event_size;
853 while (len--)
854 *dst++ = *src++;
855}
856
857static int adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(
858 struct adsp_info *info, void *dsp_addr)
859{
860 struct msm_adsp_module *module;
861 unsigned rtos_task_id;
862 unsigned msg_id;
863 unsigned msg_length;
864#ifdef CONFIG_DEBUG_FS
865 uint16_t *ptr;
866 int ii;
867#endif /* CONFIG_DEBUG_FS */
868 void (*func)(void *, size_t);
869
870 if (dsp_addr >= (void *)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
871 uint32_t *dsp_addr32 = dsp_addr;
872 uint32_t tmp = *dsp_addr32++;
873 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
874 msg_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M);
875 read_event_size = tmp >> 16;
876 read_event_addr = dsp_addr32;
877 msg_length = read_event_size * sizeof(uint32_t);
878 func = read_event_32;
879 } else {
880 uint16_t *dsp_addr16 = dsp_addr;
881 uint16_t tmp = *dsp_addr16++;
882 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
883 msg_id = tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M;
884 read_event_size = *dsp_addr16++;
885 read_event_addr = dsp_addr16;
886 msg_length = read_event_size * sizeof(uint16_t);
887 func = read_event_16;
888 }
889
890 if (rtos_task_id > info->max_task_id) {
891 MM_ERR("bogus task id %d\n", rtos_task_id);
892 return 0;
893 }
894 module = find_adsp_module_by_id(info,
895 adsp_get_module(info, rtos_task_id));
896
897 if (!module) {
898 MM_ERR("no module for task id %d\n", rtos_task_id);
899 return 0;
900 }
901
902 module->num_events++;
903
904 if (!module->ops) {
905 MM_ERR("module %s is not open\n", module->name);
906 return 0;
907 }
908#ifdef CONFIG_DEBUG_FS
909 if (rdump > 0) {
910 ptr = read_event_addr;
911 pr_info("D->A\n");
912 pr_info("m_id = %x id = %x\n", module->id, msg_id);
913 for (ii = 0; ii < msg_length/2; ii++)
914 pr_info("%x ", ptr[ii]);
915 pr_info("\n");
916 }
917#endif /* CONFIG_DEBUG_FS */
918
919 module->ops->event(module->driver_data, msg_id, msg_length, func);
920 return 0;
921}
922
923static int adsp_get_event(struct adsp_info *info)
924{
925 uint32_t ctrl_word;
926 uint32_t ready;
927 void *dsp_addr;
928 uint32_t cmd_type;
929 int cnt;
930 unsigned long flags;
931 int rc = 0;
932
933 spin_lock_irqsave(&adsp_cmd_lock, flags);
934
935 /* Whenever the DSP has a message, it updates this control word
936 * and generates an interrupt. When we receive the interrupt, we
937 * read this register to find out what ADSP task the command is
938 * comming from.
939 *
940 * The ADSP should *always* be ready on the first call, but the
941 * irq handler calls us in a loop (to handle back-to-back command
942 * processing), so we give the DSP some time to return to the
943 * ready state. The DSP will not issue another IRQ for events
944 * pending between the first IRQ and the event queue being drained,
945 * unfortunately.
946 */
947
948 for (cnt = 0; cnt < 50; cnt++) {
949 ctrl_word = readl(info->read_ctrl);
950
951 if ((ctrl_word & ADSP_RTOS_READ_CTRL_WORD_FLAG_M) ==
952 ADSP_RTOS_READ_CTRL_WORD_FLAG_UP_CONT_V)
953 goto ready;
954
955 udelay(2);
956 }
957 MM_ERR("not ready after 100uS\n");
958 rc = -EBUSY;
959 goto done;
960
961ready:
962 /* Here we check to see if there are pending messages. If there are
963 * none, we siply return -EAGAIN to indicate that there are no more
964 * messages pending.
965 */
966 ready = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_READY_M;
967 if ((ready != ADSP_RTOS_READ_CTRL_WORD_READY_V) &&
968 (ready != ADSP_RTOS_READ_CTRL_WORD_CONT_V)) {
969 rc = -EAGAIN;
970 goto done;
971 }
972
973 /* DSP says that there are messages waiting for the host to read */
974
975 /* Get the Command Type */
976 cmd_type = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_CMD_TYPE_M;
977
978 /* Get the DSP buffer address */
979 dsp_addr = (void *)((ctrl_word &
980 ADSP_RTOS_READ_CTRL_WORD_DSP_ADDR_M) +
981 (uint32_t)MSM_AD5_BASE);
982
983 /* We can only handle Task-to-Host messages */
984 if (cmd_type != ADSP_RTOS_READ_CTRL_WORD_CMD_TASK_TO_H_V) {
985 MM_ERR("unknown dsp cmd_type %d\n", cmd_type);
986 rc = -EIO;
987 goto done;
988 }
989
990 adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(info, dsp_addr);
991
992 ctrl_word = readl(info->read_ctrl);
993 ctrl_word &= ~ADSP_RTOS_READ_CTRL_WORD_READY_M;
994
995 /* Write ctrl word to the DSP */
996 writel(ctrl_word, info->read_ctrl);
997
998 /* Generate an interrupt to the DSP */
999 writel(1, info->send_irq);
1000
1001done:
1002 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
1003 return rc;
1004}
1005
1006static irqreturn_t adsp_irq_handler(int irq, void *data)
1007{
1008 struct adsp_info *info = &adsp_info;
1009 int cnt = 0;
1010 for (cnt = 0; cnt < 15; cnt++)
1011 if (adsp_get_event(info) < 0)
1012 break;
1013 if (cnt > info->event_backlog_max)
1014 info->event_backlog_max = cnt;
1015 info->events_received += cnt;
1016 if (cnt == 15)
1017 MM_ERR("too many (%d) events for single irq!\n", cnt);
1018 return IRQ_HANDLED;
1019}
1020
1021int adsp_set_clkrate(struct msm_adsp_module *module, unsigned long clk_rate)
1022{
1023 if (module->clk && clk_rate)
Matt Wagantallf13bee62011-11-08 15:36:32 -08001024 return clk_set_rate(module->clk, clk_rate);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001025
1026 return -EINVAL;
1027}
1028
Manish Dewangan8e87bc12012-02-09 20:25:15 +05301029int msm_adsp_generate_event(void *data,
1030 struct msm_adsp_module *mod,
1031 unsigned event_id,
1032 unsigned event_length,
1033 unsigned event_size,
1034 void *msg)
1035{
1036 unsigned long flags;
1037 void (*func)(void *, size_t);
1038
1039 if (event_size == sizeof(uint32_t))
1040 func = read_event_32;
1041 else if (event_size == sizeof(uint16_t))
1042 func = read_event_16;
1043 else
1044 return -EINVAL;
1045
1046 spin_lock_irqsave(&adsp_cmd_lock, flags);
1047 read_event_addr = msg;
1048 mod->ops->event(data, event_id, event_length, func);
1049 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
1050 return 0;
1051}
1052
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001053int msm_adsp_enable(struct msm_adsp_module *module)
1054{
1055 int rc = 0;
1056
1057 MM_INFO("enable '%s'state[%d] id[%d]\n",
1058 module->name, module->state, module->id);
1059
1060 mutex_lock(&module->lock);
1061 switch (module->state) {
1062 case ADSP_STATE_DISABLED:
1063 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_ENABLE,
1064 module->id, module);
1065 if (rc)
1066 break;
1067 module->state = ADSP_STATE_ENABLING;
1068 mutex_unlock(&module->lock);
1069 rc = wait_event_timeout(module->state_wait,
1070 module->state != ADSP_STATE_ENABLING,
1071 1 * HZ);
1072 mutex_lock(&module->lock);
1073 if (module->state == ADSP_STATE_ENABLED) {
1074 rc = 0;
1075 } else {
1076 MM_ERR("module '%s' enable timed out\n", module->name);
1077 rc = -ETIMEDOUT;
1078 }
1079 if (module->open_count++ == 0 && module->clk)
1080 clk_enable(module->clk);
1081
1082 mutex_lock(&adsp_open_lock);
1083 if (adsp_open_count++ == 0) {
1084 enable_irq(INT_ADSP);
1085 prevent_suspend();
1086 }
1087 mutex_unlock(&adsp_open_lock);
1088 break;
1089 case ADSP_STATE_ENABLING:
1090 MM_DBG("module '%s' enable in progress\n", module->name);
1091 break;
1092 case ADSP_STATE_ENABLED:
1093 MM_DBG("module '%s' already enabled\n", module->name);
1094 break;
1095 case ADSP_STATE_DISABLING:
1096 MM_ERR("module '%s' disable in progress\n", module->name);
1097 rc = -EBUSY;
1098 break;
1099 }
1100 mutex_unlock(&module->lock);
1101 return rc;
1102}
1103EXPORT_SYMBOL(msm_adsp_enable);
1104
1105int msm_adsp_disable_event_rsp(struct msm_adsp_module *module)
1106{
1107 int rc = 0;
1108
1109 mutex_lock(&module->lock);
1110
1111 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE_EVENT_RSP,
1112 module->id, module);
1113 mutex_unlock(&module->lock);
1114
1115 return rc;
1116}
1117EXPORT_SYMBOL(msm_adsp_disable_event_rsp);
1118
1119static int msm_adsp_disable_locked(struct msm_adsp_module *module)
1120{
1121 int rc = 0;
1122
1123 switch (module->state) {
1124 case ADSP_STATE_DISABLED:
1125 MM_DBG("module '%s' already disabled\n", module->name);
1126 break;
1127 case ADSP_STATE_ENABLING:
1128 case ADSP_STATE_ENABLED:
1129 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE,
1130 module->id, module);
1131 module->state = ADSP_STATE_DISABLED;
1132 if (--module->open_count == 0 && module->clk)
1133 clk_disable(module->clk);
1134 mutex_lock(&adsp_open_lock);
1135 if (--adsp_open_count == 0) {
1136 disable_irq(INT_ADSP);
1137 allow_suspend();
1138 MM_DBG("disable interrupt\n");
1139 }
1140 mutex_unlock(&adsp_open_lock);
1141 }
1142 return rc;
1143}
1144
1145int msm_adsp_disable(struct msm_adsp_module *module)
1146{
1147 int rc;
1148 MM_INFO("disable '%s'\n", module->name);
1149 mutex_lock(&module->lock);
1150 rc = msm_adsp_disable_locked(module);
1151 mutex_unlock(&module->lock);
1152 return rc;
1153}
1154EXPORT_SYMBOL(msm_adsp_disable);
1155
1156static int msm_adsp_probe(struct platform_device *pdev)
1157{
1158 unsigned count;
1159 int rc, i;
1160
1161 if (pdev->id != (rpc_adsp_rtos_atom_vers & RPC_VERSION_MAJOR_MASK))
1162 return -EINVAL;
1163
1164 wake_lock_init(&adsp_wake_lock, WAKE_LOCK_SUSPEND, "adsp");
1165 adsp_info.init_info_ptr = kzalloc(
1166 (sizeof(struct adsp_rtos_mp_mtoa_init_info_type)), GFP_KERNEL);
1167 if (!adsp_info.init_info_ptr)
1168 return -ENOMEM;
1169
1170 rc = adsp_init_info(&adsp_info);
1171 if (rc)
1172 return rc;
1173 adsp_info.send_irq += (uint32_t) MSM_AD5_BASE;
1174 adsp_info.read_ctrl += (uint32_t) MSM_AD5_BASE;
1175 adsp_info.write_ctrl += (uint32_t) MSM_AD5_BASE;
1176 count = adsp_info.module_count;
1177
1178 adsp_modules = kzalloc(
1179 (sizeof(struct msm_adsp_module) + sizeof(void *)) *
1180 count, GFP_KERNEL);
1181 if (!adsp_modules)
1182 return -ENOMEM;
1183
1184 adsp_info.id_to_module = (void *) (adsp_modules + count);
1185
1186 spin_lock_init(&adsp_cmd_lock);
1187 spin_lock_init(&adsp_write_lock);
Manish Dewangan691f1c42012-02-10 12:50:14 +05301188 mutex_init(&adsp_info.lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001189
1190 rc = request_irq(INT_ADSP, adsp_irq_handler, IRQF_TRIGGER_RISING,
1191 "adsp", 0);
1192 if (rc < 0)
1193 goto fail_request_irq;
1194 disable_irq(INT_ADSP);
1195
1196 rpc_cb_server_client = msm_rpc_open();
1197 if (IS_ERR(rpc_cb_server_client)) {
1198 rpc_cb_server_client = NULL;
1199 rc = PTR_ERR(rpc_cb_server_client);
1200 MM_ERR("could not create rpc server (%d)\n", rc);
1201 goto fail_rpc_open;
1202 }
1203
1204 rc = msm_rpc_register_server(rpc_cb_server_client,
1205 rpc_adsp_rtos_mtoa_prog,
1206 rpc_adsp_rtos_mtoa_vers);
1207 if (rc) {
1208 MM_ERR("could not register callback server (%d)\n", rc);
1209 goto fail_rpc_register;
1210 }
1211
1212 /* start the kernel thread to process the callbacks */
1213 kthread_run(adsp_rpc_thread, NULL, "kadspd");
1214
1215 for (i = 0; i < count; i++) {
1216 struct msm_adsp_module *mod = adsp_modules + i;
1217 mutex_init(&mod->lock);
1218 init_waitqueue_head(&mod->state_wait);
1219 mod->info = &adsp_info;
1220 mod->name = adsp_info.module[i].name;
1221 mod->id = adsp_info.module[i].id;
1222 if (adsp_info.module[i].clk_name)
1223 mod->clk = clk_get(NULL, adsp_info.module[i].clk_name);
1224 else
1225 mod->clk = NULL;
1226 if (mod->clk && adsp_info.module[i].clk_rate)
Matt Wagantallf13bee62011-11-08 15:36:32 -08001227 clk_set_rate(mod->clk, adsp_info.module[i].clk_rate);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001228 mod->verify_cmd = adsp_info.module[i].verify_cmd;
1229 mod->patch_event = adsp_info.module[i].patch_event;
1230 INIT_HLIST_HEAD(&mod->pmem_regions);
1231 mod->pdev.name = adsp_info.module[i].pdev_name;
1232 mod->pdev.id = -1;
1233 adsp_info.id_to_module[i] = mod;
1234 platform_device_register(&mod->pdev);
1235 }
1236
1237 msm_adsp_publish_cdevs(adsp_modules, count);
1238 rmtask_init();
1239
1240 return 0;
1241
1242fail_rpc_register:
1243 msm_rpc_close(rpc_cb_server_client);
1244 rpc_cb_server_client = NULL;
1245fail_rpc_open:
1246 enable_irq(INT_ADSP);
1247 free_irq(INT_ADSP, 0);
1248fail_request_irq:
1249 kfree(adsp_modules);
1250 kfree(adsp_info.init_info_ptr);
1251 return rc;
1252}
1253#ifdef CONFIG_DEBUG_FS
1254static int get_parameters(char *buf, long int *param1, int num_of_par)
1255{
1256 char *token;
1257 int base, cnt;
1258
1259 token = strsep(&buf, " ");
1260
1261 for (cnt = 0; cnt < num_of_par; cnt++) {
1262 if (token != NULL) {
1263 if ((token[1] == 'x') || (token[1] == 'X'))
1264 base = 16;
1265 else
1266 base = 10;
1267
1268 if (strict_strtoul(token, base, &param1[cnt]) != 0)
1269 return -EINVAL;
1270
1271 token = strsep(&buf, " ");
1272 }
1273 else
1274 return -EINVAL;
1275 }
1276 return 0;
1277}
1278
1279
1280static ssize_t adsp_debug_open(struct inode *inode, struct file *file)
1281{
1282 file->private_data = inode->i_private;
1283 pr_debug("adsp debugfs opened\n");
1284 return 0;
1285}
1286static ssize_t adsp_debug_write(struct file *file, const char __user *buf,
1287 size_t cnt, loff_t *ppos)
1288{
1289 char *access_str = file->private_data;
1290 char lbuf[32];
1291 int rc;
1292 long int param[5];
1293
1294 if (cnt > sizeof(lbuf) - 1)
1295 return -EINVAL;
1296 rc = copy_from_user(lbuf, buf, cnt);
1297 if (rc) {
1298 pr_info("Unable to copy data from user space\n");
1299 return -EFAULT;
1300 }
1301 lbuf[cnt] = '\0';
1302
1303 if (!strcmp(access_str, "write_log")) {
1304 if (get_parameters(lbuf, param, 1) == 0) {
1305 switch (param[0]) {
1306 case 1:
1307 if (wdump <= 0)
1308 wdump = 1;
1309 pr_debug("write cmd to DSP(A->D) dump \
1310 started:%d\n", wdump);
1311 break;
1312 case 0:
1313 if (wdump > 0)
1314 wdump = 0;
1315 pr_debug("Stop write cmd to \
1316 DSP(A->D):%d\n", wdump);
1317 break;
1318 default:
1319 rc = -EINVAL;
1320 break;
1321 }
1322 } else
1323 rc = -EINVAL;
1324 } else if (!strcmp(access_str, "read_log")) {
1325 if (get_parameters(lbuf, param, 1) == 0) {
1326 switch (param[0]) {
1327 case 1:
1328 if (rdump <= 0)
1329 rdump = 1;
1330 pr_debug("write cmd from DSP(D->A) dump \
1331 started:%d\n", wdump);
1332 break;
1333 case 0:
1334 if (rdump > 0)
1335 rdump = 0;
1336 pr_debug("Stop write cmd from \
1337 DSP(D->A):%d\n", wdump);
1338 break;
1339 default:
1340 rc = -EINVAL;
1341 break;
1342 }
1343 } else
1344 rc = -EINVAL;
1345 } else {
1346 rc = -EINVAL;
1347 }
1348 if (rc == 0)
1349 rc = cnt;
1350 else {
1351 pr_err("%s: rc = %d\n", __func__, rc);
1352 pr_info("\nWrong command: Use =>\n");
1353 pr_info("-------------------------\n");
1354 pr_info("To Start A->D:: echo \"1\">/sys/kernel/debug/ \
1355 adsp_cmd/write_log\n");
1356 pr_info("To Start D->A:: echo \"1\">/sys/kernel/debug/ \
1357 adsp_cmd/read_log\n");
1358 pr_info("To Stop A->D:: echo \"0\">/sys/kernel/debug/ \
1359 adsp_cmd/write_log\n");
1360 pr_info("To Stop D->A:: echo \"0\">/sys/kernel/debug/ \
1361 adsp_cmd/read_log\n");
1362 pr_info("------------------------\n");
1363 }
1364
1365 return rc;
1366}
1367#endif
1368
1369static struct platform_driver msm_adsp_driver = {
1370 .probe = msm_adsp_probe,
1371 .driver = {
1372 .owner = THIS_MODULE,
1373 },
1374};
1375
1376static char msm_adsp_driver_name[] = "rs00000000";
1377
1378#ifdef CONFIG_DEBUG_FS
1379static const struct file_operations adsp_debug_fops = {
1380 .write = adsp_debug_write,
1381 .open = adsp_debug_open,
1382};
1383#endif
1384
1385static int __init adsp_init(void)
1386{
1387 int rc;
1388
1389#ifdef CONFIG_DEBUG_FS
1390 dentry_adsp = debugfs_create_dir("adsp_cmd", 0);
1391 if (!IS_ERR(dentry_adsp)) {
1392 dentry_wdata = debugfs_create_file("write_log", \
1393 S_IFREG | S_IRUGO, dentry_adsp,
1394 (void *) "write_log" , &adsp_debug_fops);
1395 dentry_rdata = debugfs_create_file("read_log", \
1396 S_IFREG | S_IRUGO, dentry_adsp,
1397 (void *) "read_log", &adsp_debug_fops);
1398 }
1399 rdump = 0;
1400 wdump = 0;
1401#endif /* CONFIG_DEBUG_FS */
1402
1403 rpc_adsp_rtos_atom_prog = 0x3000000a;
1404 rpc_adsp_rtos_atom_vers = 0x10001;
1405 rpc_adsp_rtos_atom_vers_comp = 0x00010001;
1406 rpc_adsp_rtos_mtoa_prog = 0x3000000b;
1407#if CONFIG_ADSP_RPC_VER > 0x30001
1408 rpc_adsp_rtos_mtoa_vers = 0x30002;
1409 rpc_adsp_rtos_mtoa_vers_comp = 0x00030002;
1410#else
1411 rpc_adsp_rtos_mtoa_vers = 0x30001;
1412 rpc_adsp_rtos_mtoa_vers_comp = 0x00030001;
1413#endif
1414
1415 snprintf(msm_adsp_driver_name, sizeof(msm_adsp_driver_name),
1416 "rs%08x",
1417 rpc_adsp_rtos_atom_prog);
1418 msm_adsp_driver.driver.name = msm_adsp_driver_name;
1419 rc = platform_driver_register(&msm_adsp_driver);
1420 MM_INFO("%s -- %d\n", msm_adsp_driver_name, rc);
1421 return rc;
1422}
1423
1424device_initcall(adsp_init);