blob: ce8a31103eeec900c2231f99da565cc07addbbf0 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatreeb7ae892008-03-11 16:17:17 -07003 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Zhu Yib481de92007-09-25 17:54:57 -070030#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
Zhu Yib481de92007-09-25 17:54:57 -070041#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
Tomas Winkler82b9a122008-03-04 18:09:30 -080049#include "iwl-3945-core.h"
Zhu Yib481de92007-09-25 17:54:57 -070050#include "iwl-3945.h"
51#include "iwl-helpers.h"
52
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080053#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080054u32 iwl3945_debug_level;
Zhu Yib481de92007-09-25 17:54:57 -070055#endif
56
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080057static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
58 struct iwl3945_tx_queue *txq);
Christoph Hellwig416e1432007-10-25 17:15:49 +080059
Zhu Yib481de92007-09-25 17:54:57 -070060/******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66/* module parameters */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080067static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
68static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
69static int iwl3945_param_disable; /* def: 0 = enable radio */
Ben Cahill9fbab512007-11-29 11:09:47 +080070static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080071int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
72static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
73int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
Zhu Yib481de92007-09-25 17:54:57 -070074
75/*
76 * module name, copyright, version, etc.
77 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
78 */
79
80#define DRV_DESCRIPTION \
81"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
82
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080083#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -070084#define VD "d"
85#else
86#define VD
87#endif
88
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080089#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -070090#define VS "s"
91#else
92#define VS
93#endif
94
Reinette Chatreb9e0b442008-02-08 16:39:11 -080095#define IWLWIFI_VERSION "1.2.26k" VD VS
Reinette Chatreeb7ae892008-03-11 16:17:17 -070096#define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
Zhu Yib481de92007-09-25 17:54:57 -070097#define DRV_VERSION IWLWIFI_VERSION
98
Zhu Yib481de92007-09-25 17:54:57 -070099
100MODULE_DESCRIPTION(DRV_DESCRIPTION);
101MODULE_VERSION(DRV_VERSION);
102MODULE_AUTHOR(DRV_COPYRIGHT);
103MODULE_LICENSE("GPL");
104
Christoph Hellwig416e1432007-10-25 17:15:49 +0800105static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -0700106{
107 u16 fc = le16_to_cpu(hdr->frame_control);
108 int hdr_len = ieee80211_get_hdrlen(fc);
109
110 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
111 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
112 return NULL;
113}
114
Johannes Berg8318d782008-01-24 19:38:38 +0100115static const struct ieee80211_supported_band *iwl3945_get_band(
116 struct iwl3945_priv *priv, enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -0700117{
Johannes Berg8318d782008-01-24 19:38:38 +0100118 return priv->hw->wiphy->bands[band];
Zhu Yib481de92007-09-25 17:54:57 -0700119}
120
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800121static int iwl3945_is_empty_essid(const char *essid, int essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700122{
123 /* Single white space is for Linksys APs */
124 if (essid_len == 1 && essid[0] == ' ')
125 return 1;
126
127 /* Otherwise, if the entire essid is 0, we assume it is hidden */
128 while (essid_len) {
129 essid_len--;
130 if (essid[essid_len] != '\0')
131 return 0;
132 }
133
134 return 1;
135}
136
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800137static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700138{
139 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
140 const char *s = essid;
141 char *d = escaped;
142
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800143 if (iwl3945_is_empty_essid(essid, essid_len)) {
Zhu Yib481de92007-09-25 17:54:57 -0700144 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
145 return escaped;
146 }
147
148 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
149 while (essid_len--) {
150 if (*s == '\0') {
151 *d++ = '\\';
152 *d++ = '0';
153 s++;
154 } else
155 *d++ = *s++;
156 }
157 *d = '\0';
158 return escaped;
159}
160
Zhu Yib481de92007-09-25 17:54:57 -0700161/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
162 * DMA services
163 *
164 * Theory of operation
165 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800166 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
167 * of buffer descriptors, each of which points to one or more data buffers for
168 * the device to read from or fill. Driver and device exchange status of each
169 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
170 * entries in each circular buffer, to protect against confusing empty and full
171 * queue states.
172 *
173 * The device reads or writes the data in the queues via the device's several
174 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
Zhu Yib481de92007-09-25 17:54:57 -0700175 *
176 * For Tx queue, there are low mark and high mark limits. If, after queuing
177 * the packet for Tx, free space become < low mark, Tx queue stopped. When
178 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
179 * Tx queue resumed.
180 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800181 * The 3945 operates with six queues: One receive queue, one transmit queue
182 * (#4) for sending commands to the device firmware, and four transmit queues
183 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
Zhu Yib481de92007-09-25 17:54:57 -0700184 ***************************************************/
185
Tomas Winklerc54b6792008-03-06 17:36:53 -0800186int iwl3945_queue_space(const struct iwl3945_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -0700187{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800188 int s = q->read_ptr - q->write_ptr;
Zhu Yib481de92007-09-25 17:54:57 -0700189
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800190 if (q->read_ptr > q->write_ptr)
Zhu Yib481de92007-09-25 17:54:57 -0700191 s -= q->n_bd;
192
193 if (s <= 0)
194 s += q->n_window;
195 /* keep some reserve to not confuse empty and full situations */
196 s -= 2;
197 if (s < 0)
198 s = 0;
199 return s;
200}
201
Tomas Winklerc54b6792008-03-06 17:36:53 -0800202int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
Zhu Yib481de92007-09-25 17:54:57 -0700203{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800204 return q->write_ptr > q->read_ptr ?
205 (i >= q->read_ptr && i < q->write_ptr) :
206 !(i < q->read_ptr && i >= q->write_ptr);
Zhu Yib481de92007-09-25 17:54:57 -0700207}
208
Tomas Winklerc54b6792008-03-06 17:36:53 -0800209
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800210static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
Zhu Yib481de92007-09-25 17:54:57 -0700211{
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800212 /* This is for scan command, the big buffer at end of command array */
Zhu Yib481de92007-09-25 17:54:57 -0700213 if (is_huge)
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800214 return q->n_window; /* must be power of 2 */
Zhu Yib481de92007-09-25 17:54:57 -0700215
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800216 /* Otherwise, use normal size buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700217 return index & (q->n_window - 1);
218}
219
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800220/**
221 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
222 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800223static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
Zhu Yib481de92007-09-25 17:54:57 -0700224 int count, int slots_num, u32 id)
225{
226 q->n_bd = count;
227 q->n_window = slots_num;
228 q->id = id;
229
Tomas Winklerc54b6792008-03-06 17:36:53 -0800230 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
231 * and iwl_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700232 BUG_ON(!is_power_of_2(count));
233
234 /* slots_num must be power-of-two size, otherwise
235 * get_cmd_index is broken. */
236 BUG_ON(!is_power_of_2(slots_num));
237
238 q->low_mark = q->n_window / 4;
239 if (q->low_mark < 4)
240 q->low_mark = 4;
241
242 q->high_mark = q->n_window / 8;
243 if (q->high_mark < 2)
244 q->high_mark = 2;
245
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800246 q->write_ptr = q->read_ptr = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700247
248 return 0;
249}
250
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800251/**
252 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
253 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800254static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
255 struct iwl3945_tx_queue *txq, u32 id)
Zhu Yib481de92007-09-25 17:54:57 -0700256{
257 struct pci_dev *dev = priv->pci_dev;
258
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800259 /* Driver private data, only for Tx (not command) queues,
260 * not shared with device. */
Zhu Yib481de92007-09-25 17:54:57 -0700261 if (id != IWL_CMD_QUEUE_NUM) {
262 txq->txb = kmalloc(sizeof(txq->txb[0]) *
263 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
264 if (!txq->txb) {
Ian Schram01ebd062007-10-25 17:15:22 +0800265 IWL_ERROR("kmalloc for auxiliary BD "
Zhu Yib481de92007-09-25 17:54:57 -0700266 "structures failed\n");
267 goto error;
268 }
269 } else
270 txq->txb = NULL;
271
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800272 /* Circular buffer of transmit frame descriptors (TFDs),
273 * shared with device */
Zhu Yib481de92007-09-25 17:54:57 -0700274 txq->bd = pci_alloc_consistent(dev,
275 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
276 &txq->q.dma_addr);
277
278 if (!txq->bd) {
279 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
280 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
281 goto error;
282 }
283 txq->q.id = id;
284
285 return 0;
286
287 error:
288 if (txq->txb) {
289 kfree(txq->txb);
290 txq->txb = NULL;
291 }
292
293 return -ENOMEM;
294}
295
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800296/**
297 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
298 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800299int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
300 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700301{
302 struct pci_dev *dev = priv->pci_dev;
303 int len;
304 int rc = 0;
305
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800306 /*
307 * Alloc buffer array for commands (Tx or other types of commands).
308 * For the command queue (#4), allocate command space + one big
309 * command for scan, since scan command is very huge; the system will
310 * not have two scans at the same time, so only one is needed.
311 * For data Tx queues (all other queues), no super-size command
312 * space is needed.
313 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800314 len = sizeof(struct iwl3945_cmd) * slots_num;
Zhu Yib481de92007-09-25 17:54:57 -0700315 if (txq_id == IWL_CMD_QUEUE_NUM)
316 len += IWL_MAX_SCAN_SIZE;
317 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
318 if (!txq->cmd)
319 return -ENOMEM;
320
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800321 /* Alloc driver data array and TFD circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800322 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700323 if (rc) {
324 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
325
326 return -ENOMEM;
327 }
328 txq->need_update = 0;
329
330 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
Tomas Winklerc54b6792008-03-06 17:36:53 -0800331 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700332 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800333
334 /* Initialize queue high/low-water, head/tail indexes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800335 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700336
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800337 /* Tell device where to find queue, enable DMA channel. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800338 iwl3945_hw_tx_queue_init(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700339
340 return 0;
341}
342
343/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800344 * iwl3945_tx_queue_free - Deallocate DMA queue.
Zhu Yib481de92007-09-25 17:54:57 -0700345 * @txq: Transmit queue to deallocate.
346 *
347 * Empty queue by removing and destroying all BD's.
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800348 * Free all buffers.
349 * 0-fill, but do not free "txq" descriptor structure.
Zhu Yib481de92007-09-25 17:54:57 -0700350 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800351void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -0700352{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800353 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -0700354 struct pci_dev *dev = priv->pci_dev;
355 int len;
356
357 if (q->n_bd == 0)
358 return;
359
360 /* first, empty all BD's */
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800361 for (; q->write_ptr != q->read_ptr;
Tomas Winklerc54b6792008-03-06 17:36:53 -0800362 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800363 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700364
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800365 len = sizeof(struct iwl3945_cmd) * q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -0700366 if (q->id == IWL_CMD_QUEUE_NUM)
367 len += IWL_MAX_SCAN_SIZE;
368
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800369 /* De-alloc array of command/tx buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700370 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
371
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800372 /* De-alloc circular buffer of TFDs */
Zhu Yib481de92007-09-25 17:54:57 -0700373 if (txq->q.n_bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800374 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
Zhu Yib481de92007-09-25 17:54:57 -0700375 txq->q.n_bd, txq->bd, txq->q.dma_addr);
376
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800377 /* De-alloc array of per-TFD driver data */
Zhu Yib481de92007-09-25 17:54:57 -0700378 if (txq->txb) {
379 kfree(txq->txb);
380 txq->txb = NULL;
381 }
382
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800383 /* 0-fill queue descriptor structure */
Zhu Yib481de92007-09-25 17:54:57 -0700384 memset(txq, 0, sizeof(*txq));
385}
386
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800387const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
Zhu Yib481de92007-09-25 17:54:57 -0700388
389/*************** STATION TABLE MANAGEMENT ****
Ben Cahill9fbab512007-11-29 11:09:47 +0800390 * mac80211 should be examined to determine if sta_info is duplicating
Zhu Yib481de92007-09-25 17:54:57 -0700391 * the functionality provided here
392 */
393
394/**************************************************************/
Ian Schram01ebd062007-10-25 17:15:22 +0800395#if 0 /* temporary disable till we add real remove station */
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800396/**
397 * iwl3945_remove_station - Remove driver's knowledge of station.
398 *
399 * NOTE: This does not remove station from device's station table.
400 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800401static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
Zhu Yib481de92007-09-25 17:54:57 -0700402{
403 int index = IWL_INVALID_STATION;
404 int i;
405 unsigned long flags;
406
407 spin_lock_irqsave(&priv->sta_lock, flags);
408
409 if (is_ap)
410 index = IWL_AP_ID;
411 else if (is_broadcast_ether_addr(addr))
412 index = priv->hw_setting.bcast_sta_id;
413 else
414 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
415 if (priv->stations[i].used &&
416 !compare_ether_addr(priv->stations[i].sta.sta.addr,
417 addr)) {
418 index = i;
419 break;
420 }
421
422 if (unlikely(index == IWL_INVALID_STATION))
423 goto out;
424
425 if (priv->stations[index].used) {
426 priv->stations[index].used = 0;
427 priv->num_stations--;
428 }
429
430 BUG_ON(priv->num_stations < 0);
431
432out:
433 spin_unlock_irqrestore(&priv->sta_lock, flags);
434 return 0;
435}
Zhu Yi556f8db2007-09-27 11:27:33 +0800436#endif
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800437
438/**
439 * iwl3945_clear_stations_table - Clear the driver's station table
440 *
441 * NOTE: This does not clear or otherwise alter the device's station table.
442 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800443static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700444{
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 priv->num_stations = 0;
450 memset(priv->stations, 0, sizeof(priv->stations));
451
452 spin_unlock_irqrestore(&priv->sta_lock, flags);
453}
454
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800455/**
456 * iwl3945_add_station - Add station to station tables in driver and device
457 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800458u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -0700459{
460 int i;
461 int index = IWL_INVALID_STATION;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800462 struct iwl3945_station_entry *station;
Zhu Yib481de92007-09-25 17:54:57 -0700463 unsigned long flags_spin;
Joe Perches0795af52007-10-03 17:59:30 -0700464 DECLARE_MAC_BUF(mac);
Zhu Yic14c5212007-09-27 11:27:35 +0800465 u8 rate;
Zhu Yib481de92007-09-25 17:54:57 -0700466
467 spin_lock_irqsave(&priv->sta_lock, flags_spin);
468 if (is_ap)
469 index = IWL_AP_ID;
470 else if (is_broadcast_ether_addr(addr))
471 index = priv->hw_setting.bcast_sta_id;
472 else
473 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
474 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
475 addr)) {
476 index = i;
477 break;
478 }
479
480 if (!priv->stations[i].used &&
481 index == IWL_INVALID_STATION)
482 index = i;
483 }
484
Ian Schram01ebd062007-10-25 17:15:22 +0800485 /* These two conditions has the same outcome but keep them separate
Zhu Yib481de92007-09-25 17:54:57 -0700486 since they have different meaning */
487 if (unlikely(index == IWL_INVALID_STATION)) {
488 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
489 return index;
490 }
491
492 if (priv->stations[index].used &&
493 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
494 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
495 return index;
496 }
497
Joe Perches0795af52007-10-03 17:59:30 -0700498 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -0700499 station = &priv->stations[index];
500 station->used = 1;
501 priv->num_stations++;
502
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800503 /* Set up the REPLY_ADD_STA command to send to device */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800504 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
Zhu Yib481de92007-09-25 17:54:57 -0700505 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
506 station->sta.mode = 0;
507 station->sta.sta.sta_id = index;
508 station->sta.station_flags = 0;
509
Johannes Berg8318d782008-01-24 19:38:38 +0100510 if (priv->band == IEEE80211_BAND_5GHZ)
Tomas Winkler69946332007-10-25 17:15:27 +0800511 rate = IWL_RATE_6M_PLCP;
512 else
513 rate = IWL_RATE_1M_PLCP;
Zhu Yic14c5212007-09-27 11:27:35 +0800514
515 /* Turn on both antennas for the station... */
516 station->sta.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800517 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
Zhu Yic14c5212007-09-27 11:27:35 +0800518 station->current_rate.rate_n_flags =
519 le16_to_cpu(station->sta.rate_n_flags);
520
Zhu Yib481de92007-09-25 17:54:57 -0700521 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800522
523 /* Add station to device's station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800524 iwl3945_send_add_station(priv, &station->sta, flags);
Zhu Yib481de92007-09-25 17:54:57 -0700525 return index;
526
527}
528
529/*************** DRIVER STATUS FUNCTIONS *****/
530
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800531static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700532{
533 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
534 * set but EXIT_PENDING is not */
535 return test_bit(STATUS_READY, &priv->status) &&
536 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
537 !test_bit(STATUS_EXIT_PENDING, &priv->status);
538}
539
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800540static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700541{
542 return test_bit(STATUS_ALIVE, &priv->status);
543}
544
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800545static inline int iwl3945_is_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700546{
547 return test_bit(STATUS_INIT, &priv->status);
548}
549
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800550static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700551{
552 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
553 test_bit(STATUS_RF_KILL_SW, &priv->status);
554}
555
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800556static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700557{
558
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800559 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -0700560 return 0;
561
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800562 return iwl3945_is_ready(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700563}
564
565/*************** HOST COMMAND QUEUE FUNCTIONS *****/
566
567#define IWL_CMD(x) case x : return #x
568
569static const char *get_cmd_string(u8 cmd)
570{
571 switch (cmd) {
572 IWL_CMD(REPLY_ALIVE);
573 IWL_CMD(REPLY_ERROR);
574 IWL_CMD(REPLY_RXON);
575 IWL_CMD(REPLY_RXON_ASSOC);
576 IWL_CMD(REPLY_QOS_PARAM);
577 IWL_CMD(REPLY_RXON_TIMING);
578 IWL_CMD(REPLY_ADD_STA);
579 IWL_CMD(REPLY_REMOVE_STA);
580 IWL_CMD(REPLY_REMOVE_ALL_STA);
581 IWL_CMD(REPLY_3945_RX);
582 IWL_CMD(REPLY_TX);
583 IWL_CMD(REPLY_RATE_SCALE);
584 IWL_CMD(REPLY_LEDS_CMD);
585 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
586 IWL_CMD(RADAR_NOTIFICATION);
587 IWL_CMD(REPLY_QUIET_CMD);
588 IWL_CMD(REPLY_CHANNEL_SWITCH);
589 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
590 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
591 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
592 IWL_CMD(POWER_TABLE_CMD);
593 IWL_CMD(PM_SLEEP_NOTIFICATION);
594 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
595 IWL_CMD(REPLY_SCAN_CMD);
596 IWL_CMD(REPLY_SCAN_ABORT_CMD);
597 IWL_CMD(SCAN_START_NOTIFICATION);
598 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
599 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
600 IWL_CMD(BEACON_NOTIFICATION);
601 IWL_CMD(REPLY_TX_BEACON);
602 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
603 IWL_CMD(QUIET_NOTIFICATION);
604 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
605 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
606 IWL_CMD(REPLY_BT_CONFIG);
607 IWL_CMD(REPLY_STATISTICS_CMD);
608 IWL_CMD(STATISTICS_NOTIFICATION);
609 IWL_CMD(REPLY_CARD_STATE_CMD);
610 IWL_CMD(CARD_STATE_NOTIFICATION);
611 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
612 default:
613 return "UNKNOWN";
614
615 }
616}
617
618#define HOST_COMPLETE_TIMEOUT (HZ / 2)
619
620/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800621 * iwl3945_enqueue_hcmd - enqueue a uCode command
Zhu Yib481de92007-09-25 17:54:57 -0700622 * @priv: device private data point
623 * @cmd: a point to the ucode command structure
624 *
625 * The function returns < 0 values to indicate the operation is
626 * failed. On success, it turns the index (> 0) of command in the
627 * command queue.
628 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800629static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700630{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800631 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
632 struct iwl3945_queue *q = &txq->q;
633 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -0700634 u32 *control_flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800635 struct iwl3945_cmd *out_cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700636 u32 idx;
637 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
638 dma_addr_t phys_addr;
639 int pad;
640 u16 count;
641 int ret;
642 unsigned long flags;
643
644 /* If any of the command structures end up being larger than
645 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
646 * we will need to increase the size of the TFD entries */
647 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
648 !(cmd->meta.flags & CMD_SIZE_HUGE));
649
Gregory Greenmanc342a1b2008-02-06 11:20:40 -0800650
651 if (iwl3945_is_rfkill(priv)) {
652 IWL_DEBUG_INFO("Not sending command - RF KILL");
653 return -EIO;
654 }
655
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800656 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
Zhu Yib481de92007-09-25 17:54:57 -0700657 IWL_ERROR("No space for Tx\n");
658 return -ENOSPC;
659 }
660
661 spin_lock_irqsave(&priv->hcmd_lock, flags);
662
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800663 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -0700664 memset(tfd, 0, sizeof(*tfd));
665
666 control_flags = (u32 *) tfd;
667
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800668 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
Zhu Yib481de92007-09-25 17:54:57 -0700669 out_cmd = &txq->cmd[idx];
670
671 out_cmd->hdr.cmd = cmd->id;
672 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
673 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
674
675 /* At this point, the out_cmd now has all of the incoming cmd
676 * information */
677
678 out_cmd->hdr.flags = 0;
679 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800680 INDEX_TO_SEQ(q->write_ptr));
Zhu Yib481de92007-09-25 17:54:57 -0700681 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
682 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
683
684 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800685 offsetof(struct iwl3945_cmd, hdr);
686 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
Zhu Yib481de92007-09-25 17:54:57 -0700687
688 pad = U32_PAD(cmd->len);
689 count = TFD_CTL_COUNT_GET(*control_flags);
690 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
691
692 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
693 "%d bytes at %d[%d]:%d\n",
694 get_cmd_string(out_cmd->hdr.cmd),
695 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800696 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
Zhu Yib481de92007-09-25 17:54:57 -0700697
698 txq->need_update = 1;
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800699
700 /* Increment and update queue's write index */
Tomas Winklerc54b6792008-03-06 17:36:53 -0800701 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800702 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700703
704 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
705 return ret ? ret : idx;
706}
707
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800708static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700709{
710 int ret;
711
712 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
713
714 /* An asynchronous command can not expect an SKB to be set. */
715 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
716
717 /* An asynchronous command MUST have a callback. */
718 BUG_ON(!cmd->meta.u.callback);
719
720 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
721 return -EBUSY;
722
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800723 ret = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700724 if (ret < 0) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800725 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700726 get_cmd_string(cmd->id), ret);
727 return ret;
728 }
729 return 0;
730}
731
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800732static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700733{
734 int cmd_idx;
735 int ret;
736 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
737
738 BUG_ON(cmd->meta.flags & CMD_ASYNC);
739
740 /* A synchronous command can not have a callback set. */
741 BUG_ON(cmd->meta.u.callback != NULL);
742
743 if (atomic_xchg(&entry, 1)) {
744 IWL_ERROR("Error sending %s: Already sending a host command\n",
745 get_cmd_string(cmd->id));
746 return -EBUSY;
747 }
748
749 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
750
751 if (cmd->meta.flags & CMD_WANT_SKB)
752 cmd->meta.source = &cmd->meta;
753
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800754 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700755 if (cmd_idx < 0) {
756 ret = cmd_idx;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800757 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700758 get_cmd_string(cmd->id), ret);
759 goto out;
760 }
761
762 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
763 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
764 HOST_COMPLETE_TIMEOUT);
765 if (!ret) {
766 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
767 IWL_ERROR("Error sending %s: time out after %dms.\n",
768 get_cmd_string(cmd->id),
769 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
770
771 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
772 ret = -ETIMEDOUT;
773 goto cancel;
774 }
775 }
776
777 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
778 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
779 get_cmd_string(cmd->id));
780 ret = -ECANCELED;
781 goto fail;
782 }
783 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
784 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
785 get_cmd_string(cmd->id));
786 ret = -EIO;
787 goto fail;
788 }
789 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
790 IWL_ERROR("Error: Response NULL in '%s'\n",
791 get_cmd_string(cmd->id));
792 ret = -EIO;
793 goto out;
794 }
795
796 ret = 0;
797 goto out;
798
799cancel:
800 if (cmd->meta.flags & CMD_WANT_SKB) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800801 struct iwl3945_cmd *qcmd;
Zhu Yib481de92007-09-25 17:54:57 -0700802
803 /* Cancel the CMD_WANT_SKB flag for the cmd in the
804 * TX cmd queue. Otherwise in case the cmd comes
805 * in later, it will possibly set an invalid
806 * address (cmd->meta.source). */
807 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
808 qcmd->meta.flags &= ~CMD_WANT_SKB;
809 }
810fail:
811 if (cmd->meta.u.skb) {
812 dev_kfree_skb_any(cmd->meta.u.skb);
813 cmd->meta.u.skb = NULL;
814 }
815out:
816 atomic_set(&entry, 0);
817 return ret;
818}
819
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800820int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700821{
Zhu Yib481de92007-09-25 17:54:57 -0700822 if (cmd->meta.flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800823 return iwl3945_send_cmd_async(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700824
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800825 return iwl3945_send_cmd_sync(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700826}
827
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800828int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
Zhu Yib481de92007-09-25 17:54:57 -0700829{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800830 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700831 .id = id,
832 .len = len,
833 .data = data,
834 };
835
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800836 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700837}
838
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800839static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
Zhu Yib481de92007-09-25 17:54:57 -0700840{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800841 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700842 .id = id,
843 .len = sizeof(val),
844 .data = &val,
845 };
846
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800847 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700848}
849
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800850int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700851{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800852 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700853}
854
855/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800856 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
Johannes Berg8318d782008-01-24 19:38:38 +0100857 * @band: 2.4 or 5 GHz band
858 * @channel: Any channel valid for the requested band
Zhu Yib481de92007-09-25 17:54:57 -0700859
Johannes Berg8318d782008-01-24 19:38:38 +0100860 * In addition to setting the staging RXON, priv->band is also set.
Zhu Yib481de92007-09-25 17:54:57 -0700861 *
862 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
Johannes Berg8318d782008-01-24 19:38:38 +0100863 * in the staging RXON flag structure based on the band
Zhu Yib481de92007-09-25 17:54:57 -0700864 */
Johannes Berg8318d782008-01-24 19:38:38 +0100865static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
866 enum ieee80211_band band,
867 u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700868{
Johannes Berg8318d782008-01-24 19:38:38 +0100869 if (!iwl3945_get_channel_info(priv, band, channel)) {
Zhu Yib481de92007-09-25 17:54:57 -0700870 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
Johannes Berg8318d782008-01-24 19:38:38 +0100871 channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700872 return -EINVAL;
873 }
874
875 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
Johannes Berg8318d782008-01-24 19:38:38 +0100876 (priv->band == band))
Zhu Yib481de92007-09-25 17:54:57 -0700877 return 0;
878
879 priv->staging_rxon.channel = cpu_to_le16(channel);
Johannes Berg8318d782008-01-24 19:38:38 +0100880 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -0700881 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
882 else
883 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
884
Johannes Berg8318d782008-01-24 19:38:38 +0100885 priv->band = band;
Zhu Yib481de92007-09-25 17:54:57 -0700886
Johannes Berg8318d782008-01-24 19:38:38 +0100887 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700888
889 return 0;
890}
891
892/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800893 * iwl3945_check_rxon_cmd - validate RXON structure is valid
Zhu Yib481de92007-09-25 17:54:57 -0700894 *
895 * NOTE: This is really only useful during development and can eventually
896 * be #ifdef'd out once the driver is stable and folks aren't actively
897 * making changes
898 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800899static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -0700900{
901 int error = 0;
902 int counter = 1;
903
904 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
905 error |= le32_to_cpu(rxon->flags &
906 (RXON_FLG_TGJ_NARROW_BAND_MSK |
907 RXON_FLG_RADAR_DETECT_MSK));
908 if (error)
909 IWL_WARNING("check 24G fields %d | %d\n",
910 counter++, error);
911 } else {
912 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
913 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
914 if (error)
915 IWL_WARNING("check 52 fields %d | %d\n",
916 counter++, error);
917 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
918 if (error)
919 IWL_WARNING("check 52 CCK %d | %d\n",
920 counter++, error);
921 }
922 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
923 if (error)
924 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
925
926 /* make sure basic rates 6Mbps and 1Mbps are supported */
927 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
928 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
929 if (error)
930 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
931
932 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
933 if (error)
934 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
935
936 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
937 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
938 if (error)
939 IWL_WARNING("check CCK and short slot %d | %d\n",
940 counter++, error);
941
942 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
943 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
944 if (error)
945 IWL_WARNING("check CCK & auto detect %d | %d\n",
946 counter++, error);
947
948 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
949 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
950 if (error)
951 IWL_WARNING("check TGG and auto detect %d | %d\n",
952 counter++, error);
953
954 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
955 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
956 RXON_FLG_ANT_A_MSK)) == 0);
957 if (error)
958 IWL_WARNING("check antenna %d %d\n", counter++, error);
959
960 if (error)
961 IWL_WARNING("Tuning to channel %d\n",
962 le16_to_cpu(rxon->channel));
963
964 if (error) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800965 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
Zhu Yib481de92007-09-25 17:54:57 -0700966 return -1;
967 }
968 return 0;
969}
970
971/**
Ben Cahill9fbab512007-11-29 11:09:47 +0800972 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
Ian Schram01ebd062007-10-25 17:15:22 +0800973 * @priv: staging_rxon is compared to active_rxon
Zhu Yib481de92007-09-25 17:54:57 -0700974 *
Ben Cahill9fbab512007-11-29 11:09:47 +0800975 * If the RXON structure is changing enough to require a new tune,
976 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
977 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
Zhu Yib481de92007-09-25 17:54:57 -0700978 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800979static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700980{
981
982 /* These items are only settable from the full RXON command */
983 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
984 compare_ether_addr(priv->staging_rxon.bssid_addr,
985 priv->active_rxon.bssid_addr) ||
986 compare_ether_addr(priv->staging_rxon.node_addr,
987 priv->active_rxon.node_addr) ||
988 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
989 priv->active_rxon.wlap_bssid_addr) ||
990 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
991 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
992 (priv->staging_rxon.air_propagation !=
993 priv->active_rxon.air_propagation) ||
994 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
995 return 1;
996
997 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
998 * be updated with the RXON_ASSOC command -- however only some
999 * flag transitions are allowed using RXON_ASSOC */
1000
1001 /* Check if we are not switching bands */
1002 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1003 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1004 return 1;
1005
1006 /* Check if we are switching association toggle */
1007 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1008 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1009 return 1;
1010
1011 return 0;
1012}
1013
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001014static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001015{
1016 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001017 struct iwl3945_rx_packet *res = NULL;
1018 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1019 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001020 .id = REPLY_RXON_ASSOC,
1021 .len = sizeof(rxon_assoc),
1022 .meta.flags = CMD_WANT_SKB,
1023 .data = &rxon_assoc,
1024 };
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001025 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1026 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001027
1028 if ((rxon1->flags == rxon2->flags) &&
1029 (rxon1->filter_flags == rxon2->filter_flags) &&
1030 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1031 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1032 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1033 return 0;
1034 }
1035
1036 rxon_assoc.flags = priv->staging_rxon.flags;
1037 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1038 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1039 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1040 rxon_assoc.reserved = 0;
1041
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001042 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001043 if (rc)
1044 return rc;
1045
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001046 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001047 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1048 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1049 rc = -EIO;
1050 }
1051
1052 priv->alloc_rxb_skb--;
1053 dev_kfree_skb_any(cmd.meta.u.skb);
1054
1055 return rc;
1056}
1057
1058/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001059 * iwl3945_commit_rxon - commit staging_rxon to hardware
Zhu Yib481de92007-09-25 17:54:57 -07001060 *
Ian Schram01ebd062007-10-25 17:15:22 +08001061 * The RXON command in staging_rxon is committed to the hardware and
Zhu Yib481de92007-09-25 17:54:57 -07001062 * the active_rxon structure is updated with the new data. This
1063 * function correctly transitions out of the RXON_ASSOC_MSK state if
1064 * a HW tune is required based on the RXON structure changes.
1065 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001066static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001067{
1068 /* cast away the const for active_rxon in this function */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001069 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001070 int rc = 0;
Joe Perches0795af52007-10-03 17:59:30 -07001071 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07001072
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001073 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001074 return -1;
1075
1076 /* always get timestamp with Rx frame */
1077 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1078
1079 /* select antenna */
1080 priv->staging_rxon.flags &=
1081 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1082 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1083
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001084 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001085 if (rc) {
1086 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1087 return -EINVAL;
1088 }
1089
1090 /* If we don't need to send a full RXON, we can use
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001091 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
Zhu Yib481de92007-09-25 17:54:57 -07001092 * and other flags for the current radio configuration. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001093 if (!iwl3945_full_rxon_required(priv)) {
1094 rc = iwl3945_send_rxon_assoc(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001095 if (rc) {
1096 IWL_ERROR("Error setting RXON_ASSOC "
1097 "configuration (%d).\n", rc);
1098 return rc;
1099 }
1100
1101 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1102
1103 return 0;
1104 }
1105
1106 /* If we are currently associated and the new config requires
1107 * an RXON_ASSOC and the new config wants the associated mask enabled,
1108 * we must clear the associated from the active configuration
1109 * before we apply the new config */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001110 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001111 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1112 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1113 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1114
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001115 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1116 sizeof(struct iwl3945_rxon_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001117 &priv->active_rxon);
1118
1119 /* If the mask clearing failed then we set
1120 * active_rxon back to what it was previously */
1121 if (rc) {
1122 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1123 IWL_ERROR("Error clearing ASSOC_MSK on current "
1124 "configuration (%d).\n", rc);
1125 return rc;
1126 }
Zhu Yib481de92007-09-25 17:54:57 -07001127 }
1128
1129 IWL_DEBUG_INFO("Sending RXON\n"
1130 "* with%s RXON_FILTER_ASSOC_MSK\n"
1131 "* channel = %d\n"
Joe Perches0795af52007-10-03 17:59:30 -07001132 "* bssid = %s\n",
Zhu Yib481de92007-09-25 17:54:57 -07001133 ((priv->staging_rxon.filter_flags &
1134 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1135 le16_to_cpu(priv->staging_rxon.channel),
Joe Perches0795af52007-10-03 17:59:30 -07001136 print_mac(mac, priv->staging_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07001137
1138 /* Apply the new configuration */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001139 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1140 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001141 if (rc) {
1142 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1143 return rc;
1144 }
1145
1146 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1147
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001148 iwl3945_clear_stations_table(priv);
Zhu Yi556f8db2007-09-27 11:27:33 +08001149
Zhu Yib481de92007-09-25 17:54:57 -07001150 /* If we issue a new RXON command which required a tune then we must
1151 * send a new TXPOWER command or we won't be able to Tx any frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001152 rc = iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001153 if (rc) {
1154 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1155 return rc;
1156 }
1157
1158 /* Add the broadcast address so we can send broadcast frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001159 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
Zhu Yib481de92007-09-25 17:54:57 -07001160 IWL_INVALID_STATION) {
1161 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1162 return -EIO;
1163 }
1164
1165 /* If we have set the ASSOC_MSK and we are in BSS mode then
1166 * add the IWL_AP_ID to the station rate table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001167 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001168 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001169 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
Zhu Yib481de92007-09-25 17:54:57 -07001170 == IWL_INVALID_STATION) {
1171 IWL_ERROR("Error adding AP address for transmit.\n");
1172 return -EIO;
1173 }
1174
Johannes Berg8318d782008-01-24 19:38:38 +01001175 /* Init the hardware's rate fallback order based on the band */
Zhu Yib481de92007-09-25 17:54:57 -07001176 rc = iwl3945_init_hw_rate_table(priv);
1177 if (rc) {
1178 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1179 return -EIO;
1180 }
1181
1182 return 0;
1183}
1184
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001185static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001186{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001187 struct iwl3945_bt_cmd bt_cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001188 .flags = 3,
1189 .lead_time = 0xAA,
1190 .max_kill = 1,
1191 .kill_ack_mask = 0,
1192 .kill_cts_mask = 0,
1193 };
1194
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001195 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1196 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001197}
1198
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001199static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001200{
1201 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001202 struct iwl3945_rx_packet *res;
1203 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001204 .id = REPLY_SCAN_ABORT_CMD,
1205 .meta.flags = CMD_WANT_SKB,
1206 };
1207
1208 /* If there isn't a scan actively going on in the hardware
1209 * then we are in between scan bands and not actually
1210 * actively scanning, so don't send the abort command */
1211 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1212 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1213 return 0;
1214 }
1215
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001216 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001217 if (rc) {
1218 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1219 return rc;
1220 }
1221
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001222 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001223 if (res->u.status != CAN_ABORT_STATUS) {
1224 /* The scan abort will return 1 for success or
1225 * 2 for "failure". A failure condition can be
1226 * due to simply not being in an active scan which
1227 * can occur if we send the scan abort before we
1228 * the microcode has notified us that a scan is
1229 * completed. */
1230 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1231 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1232 clear_bit(STATUS_SCAN_HW, &priv->status);
1233 }
1234
1235 dev_kfree_skb_any(cmd.meta.u.skb);
1236
1237 return rc;
1238}
1239
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001240static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1241 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07001242 struct sk_buff *skb)
1243{
1244 return 1;
1245}
1246
1247/*
1248 * CARD_STATE_CMD
1249 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001250 * Use: Sets the device's internal card state to enable, disable, or halt
Zhu Yib481de92007-09-25 17:54:57 -07001251 *
1252 * When in the 'enable' state the card operates as normal.
1253 * When in the 'disable' state, the card enters into a low power mode.
1254 * When in the 'halt' state, the card is shut down and must be fully
1255 * restarted to come back on.
1256 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001257static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
Zhu Yib481de92007-09-25 17:54:57 -07001258{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001259 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001260 .id = REPLY_CARD_STATE_CMD,
1261 .len = sizeof(u32),
1262 .data = &flags,
1263 .meta.flags = meta_flag,
1264 };
1265
1266 if (meta_flag & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001267 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001268
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001269 return iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001270}
1271
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001272static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1273 struct iwl3945_cmd *cmd, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07001274{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001275 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001276
1277 if (!skb) {
1278 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1279 return 1;
1280 }
1281
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001282 res = (struct iwl3945_rx_packet *)skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001283 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1284 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1285 res->hdr.flags);
1286 return 1;
1287 }
1288
1289 switch (res->u.add_sta.status) {
1290 case ADD_STA_SUCCESS_MSK:
1291 break;
1292 default:
1293 break;
1294 }
1295
1296 /* We didn't cache the SKB; let the caller free it */
1297 return 1;
1298}
1299
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001300int iwl3945_send_add_station(struct iwl3945_priv *priv,
1301 struct iwl3945_addsta_cmd *sta, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -07001302{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001303 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001304 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001305 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001306 .id = REPLY_ADD_STA,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001307 .len = sizeof(struct iwl3945_addsta_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001308 .meta.flags = flags,
1309 .data = sta,
1310 };
1311
1312 if (flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001313 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001314 else
1315 cmd.meta.flags |= CMD_WANT_SKB;
1316
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001317 rc = iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001318
1319 if (rc || (flags & CMD_ASYNC))
1320 return rc;
1321
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001322 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001323 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1324 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1325 res->hdr.flags);
1326 rc = -EIO;
1327 }
1328
1329 if (rc == 0) {
1330 switch (res->u.add_sta.status) {
1331 case ADD_STA_SUCCESS_MSK:
1332 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1333 break;
1334 default:
1335 rc = -EIO;
1336 IWL_WARNING("REPLY_ADD_STA failed\n");
1337 break;
1338 }
1339 }
1340
1341 priv->alloc_rxb_skb--;
1342 dev_kfree_skb_any(cmd.meta.u.skb);
1343
1344 return rc;
1345}
1346
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001347static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001348 struct ieee80211_key_conf *keyconf,
1349 u8 sta_id)
1350{
1351 unsigned long flags;
1352 __le16 key_flags = 0;
1353
1354 switch (keyconf->alg) {
1355 case ALG_CCMP:
1356 key_flags |= STA_KEY_FLG_CCMP;
1357 key_flags |= cpu_to_le16(
1358 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1359 key_flags &= ~STA_KEY_FLG_INVALID;
1360 break;
1361 case ALG_TKIP:
1362 case ALG_WEP:
Zhu Yib481de92007-09-25 17:54:57 -07001363 default:
1364 return -EINVAL;
1365 }
1366 spin_lock_irqsave(&priv->sta_lock, flags);
1367 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1368 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1369 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1370 keyconf->keylen);
1371
1372 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1373 keyconf->keylen);
1374 priv->stations[sta_id].sta.key.key_flags = key_flags;
1375 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1376 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1377
1378 spin_unlock_irqrestore(&priv->sta_lock, flags);
1379
1380 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001381 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001382 return 0;
1383}
1384
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001385static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07001386{
1387 unsigned long flags;
1388
1389 spin_lock_irqsave(&priv->sta_lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001390 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1391 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
Zhu Yib481de92007-09-25 17:54:57 -07001392 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1393 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1394 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1395 spin_unlock_irqrestore(&priv->sta_lock, flags);
1396
1397 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001398 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001399 return 0;
1400}
1401
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001402static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001403{
1404 struct list_head *element;
1405
1406 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1407 priv->frames_count);
1408
1409 while (!list_empty(&priv->free_frames)) {
1410 element = priv->free_frames.next;
1411 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001412 kfree(list_entry(element, struct iwl3945_frame, list));
Zhu Yib481de92007-09-25 17:54:57 -07001413 priv->frames_count--;
1414 }
1415
1416 if (priv->frames_count) {
1417 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1418 priv->frames_count);
1419 priv->frames_count = 0;
1420 }
1421}
1422
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001423static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001424{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001425 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001426 struct list_head *element;
1427 if (list_empty(&priv->free_frames)) {
1428 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1429 if (!frame) {
1430 IWL_ERROR("Could not allocate frame!\n");
1431 return NULL;
1432 }
1433
1434 priv->frames_count++;
1435 return frame;
1436 }
1437
1438 element = priv->free_frames.next;
1439 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001440 return list_entry(element, struct iwl3945_frame, list);
Zhu Yib481de92007-09-25 17:54:57 -07001441}
1442
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001443static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
Zhu Yib481de92007-09-25 17:54:57 -07001444{
1445 memset(frame, 0, sizeof(*frame));
1446 list_add(&frame->list, &priv->free_frames);
1447}
1448
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001449unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001450 struct ieee80211_hdr *hdr,
1451 const u8 *dest, int left)
1452{
1453
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001454 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
Zhu Yib481de92007-09-25 17:54:57 -07001455 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1456 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1457 return 0;
1458
1459 if (priv->ibss_beacon->len > left)
1460 return 0;
1461
1462 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1463
1464 return priv->ibss_beacon->len;
1465}
1466
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001467static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
Zhu Yib481de92007-09-25 17:54:57 -07001468{
1469 u8 i;
1470
1471 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001472 i = iwl3945_rates[i].next_ieee) {
Zhu Yib481de92007-09-25 17:54:57 -07001473 if (rate_mask & (1 << i))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001474 return iwl3945_rates[i].plcp;
Zhu Yib481de92007-09-25 17:54:57 -07001475 }
1476
1477 return IWL_RATE_INVALID;
1478}
1479
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001480static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001481{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001482 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001483 unsigned int frame_size;
1484 int rc;
1485 u8 rate;
1486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001487 frame = iwl3945_get_free_frame(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001488
1489 if (!frame) {
1490 IWL_ERROR("Could not obtain free frame buffer for beacon "
1491 "command.\n");
1492 return -ENOMEM;
1493 }
1494
1495 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001496 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
Zhu Yib481de92007-09-25 17:54:57 -07001497 0xFF0);
1498 if (rate == IWL_INVALID_RATE)
1499 rate = IWL_RATE_6M_PLCP;
1500 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001501 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
Zhu Yib481de92007-09-25 17:54:57 -07001502 if (rate == IWL_INVALID_RATE)
1503 rate = IWL_RATE_1M_PLCP;
1504 }
1505
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001506 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
Zhu Yib481de92007-09-25 17:54:57 -07001507
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001508 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
Zhu Yib481de92007-09-25 17:54:57 -07001509 &frame->u.cmd[0]);
1510
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001511 iwl3945_free_frame(priv, frame);
Zhu Yib481de92007-09-25 17:54:57 -07001512
1513 return rc;
1514}
1515
1516/******************************************************************************
1517 *
1518 * EEPROM related functions
1519 *
1520 ******************************************************************************/
1521
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001522static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
Zhu Yib481de92007-09-25 17:54:57 -07001523{
1524 memcpy(mac, priv->eeprom.mac_address, 6);
1525}
1526
Reinette Chatre74a3a252008-01-23 10:15:19 -08001527/*
1528 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1529 * embedded controller) as EEPROM reader; each read is a series of pulses
1530 * to/from the EEPROM chip, not a single event, so even reads could conflict
1531 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1532 * simply claims ownership, which should be safe when this function is called
1533 * (i.e. before loading uCode!).
1534 */
1535static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1536{
1537 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1538 return 0;
1539}
1540
Zhu Yib481de92007-09-25 17:54:57 -07001541/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001542 * iwl3945_eeprom_init - read EEPROM contents
Zhu Yib481de92007-09-25 17:54:57 -07001543 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001544 * Load the EEPROM contents from adapter into priv->eeprom
Zhu Yib481de92007-09-25 17:54:57 -07001545 *
1546 * NOTE: This routine uses the non-debug IO access functions.
1547 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001548int iwl3945_eeprom_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001549{
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001550 u16 *e = (u16 *)&priv->eeprom;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001551 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
Zhu Yib481de92007-09-25 17:54:57 -07001552 u32 r;
1553 int sz = sizeof(priv->eeprom);
1554 int rc;
1555 int i;
1556 u16 addr;
1557
1558 /* The EEPROM structure has several padding buffers within it
1559 * and when adding new EEPROM maps is subject to programmer errors
1560 * which may be very difficult to identify without explicitly
1561 * checking the resulting size of the eeprom map. */
1562 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1563
1564 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1565 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1566 return -ENOENT;
1567 }
1568
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001569 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001570 rc = iwl3945_eeprom_acquire_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001571 if (rc < 0) {
Ian Schram91e17472007-10-25 17:15:23 +08001572 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001573 return -ENOENT;
1574 }
1575
1576 /* eeprom is an array of 16bit values */
1577 for (addr = 0; addr < sz; addr += sizeof(u16)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001578 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1579 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
Zhu Yib481de92007-09-25 17:54:57 -07001580
1581 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1582 i += IWL_EEPROM_ACCESS_DELAY) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001583 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
Zhu Yib481de92007-09-25 17:54:57 -07001584 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1585 break;
1586 udelay(IWL_EEPROM_ACCESS_DELAY);
1587 }
1588
1589 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1590 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1591 return -ETIMEDOUT;
1592 }
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001593 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
Zhu Yib481de92007-09-25 17:54:57 -07001594 }
1595
1596 return 0;
1597}
1598
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001599static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001600{
1601 if (priv->hw_setting.shared_virt)
1602 pci_free_consistent(priv->pci_dev,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001603 sizeof(struct iwl3945_shared),
Zhu Yib481de92007-09-25 17:54:57 -07001604 priv->hw_setting.shared_virt,
1605 priv->hw_setting.shared_phys);
1606}
1607
1608/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001609 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
Zhu Yib481de92007-09-25 17:54:57 -07001610 *
1611 * return : set the bit for each supported rate insert in ie
1612 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001613static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001614 u16 basic_rate, int *left)
Zhu Yib481de92007-09-25 17:54:57 -07001615{
1616 u16 ret_rates = 0, bit;
1617 int i;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001618 u8 *cnt = ie;
1619 u8 *rates = ie + 1;
Zhu Yib481de92007-09-25 17:54:57 -07001620
1621 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1622 if (bit & supported_rate) {
1623 ret_rates |= bit;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001624 rates[*cnt] = iwl3945_rates[i].ieee |
Tomas Winklerc7c46672007-10-18 02:04:15 +02001625 ((bit & basic_rate) ? 0x80 : 0x00);
1626 (*cnt)++;
1627 (*left)--;
1628 if ((*left <= 0) ||
1629 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
Zhu Yib481de92007-09-25 17:54:57 -07001630 break;
1631 }
1632 }
1633
1634 return ret_rates;
1635}
1636
1637/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001638 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
Zhu Yib481de92007-09-25 17:54:57 -07001639 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001640static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001641 struct ieee80211_mgmt *frame,
1642 int left, int is_direct)
1643{
1644 int len = 0;
1645 u8 *pos = NULL;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001646 u16 active_rates, ret_rates, cck_rates;
Zhu Yib481de92007-09-25 17:54:57 -07001647
1648 /* Make sure there is enough space for the probe request,
1649 * two mandatory IEs and the data */
1650 left -= 24;
1651 if (left < 0)
1652 return 0;
1653 len += 24;
1654
1655 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001656 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001657 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001658 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001659 frame->seq_ctrl = 0;
1660
1661 /* fill in our indirect SSID IE */
1662 /* ...next IE... */
1663
1664 left -= 2;
1665 if (left < 0)
1666 return 0;
1667 len += 2;
1668 pos = &(frame->u.probe_req.variable[0]);
1669 *pos++ = WLAN_EID_SSID;
1670 *pos++ = 0;
1671
1672 /* fill in our direct SSID IE... */
1673 if (is_direct) {
1674 /* ...next IE... */
1675 left -= 2 + priv->essid_len;
1676 if (left < 0)
1677 return 0;
1678 /* ... fill it in... */
1679 *pos++ = WLAN_EID_SSID;
1680 *pos++ = priv->essid_len;
1681 memcpy(pos, priv->essid, priv->essid_len);
1682 pos += priv->essid_len;
1683 len += 2 + priv->essid_len;
1684 }
1685
1686 /* fill in supported rate */
1687 /* ...next IE... */
1688 left -= 2;
1689 if (left < 0)
1690 return 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001691
Zhu Yib481de92007-09-25 17:54:57 -07001692 /* ... fill it in... */
1693 *pos++ = WLAN_EID_SUPP_RATES;
1694 *pos = 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001695
1696 priv->active_rate = priv->rates_mask;
1697 active_rates = priv->active_rate;
Zhu Yib481de92007-09-25 17:54:57 -07001698 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1699
Tomas Winklerc7c46672007-10-18 02:04:15 +02001700 cck_rates = IWL_CCK_RATES_MASK & active_rates;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001701 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001702 priv->active_rate_basic, &left);
1703 active_rates &= ~ret_rates;
1704
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001705 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001706 priv->active_rate_basic, &left);
1707 active_rates &= ~ret_rates;
1708
Zhu Yib481de92007-09-25 17:54:57 -07001709 len += 2 + *pos;
1710 pos += (*pos) + 1;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001711 if (active_rates == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001712 goto fill_end;
1713
1714 /* fill in supported extended rate */
1715 /* ...next IE... */
1716 left -= 2;
1717 if (left < 0)
1718 return 0;
1719 /* ... fill it in... */
1720 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1721 *pos = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001722 iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001723 priv->active_rate_basic, &left);
Zhu Yib481de92007-09-25 17:54:57 -07001724 if (*pos > 0)
1725 len += 2 + *pos;
1726
1727 fill_end:
1728 return (u16)len;
1729}
1730
1731/*
1732 * QoS support
1733*/
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001734static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1735 struct iwl3945_qosparam_cmd *qos)
Zhu Yib481de92007-09-25 17:54:57 -07001736{
1737
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001738 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1739 sizeof(struct iwl3945_qosparam_cmd), qos);
Zhu Yib481de92007-09-25 17:54:57 -07001740}
1741
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001742static void iwl3945_reset_qos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001743{
1744 u16 cw_min = 15;
1745 u16 cw_max = 1023;
1746 u8 aifs = 2;
1747 u8 is_legacy = 0;
1748 unsigned long flags;
1749 int i;
1750
1751 spin_lock_irqsave(&priv->lock, flags);
1752 priv->qos_data.qos_active = 0;
1753
1754 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1755 if (priv->qos_data.qos_enable)
1756 priv->qos_data.qos_active = 1;
1757 if (!(priv->active_rate & 0xfff0)) {
1758 cw_min = 31;
1759 is_legacy = 1;
1760 }
1761 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1762 if (priv->qos_data.qos_enable)
1763 priv->qos_data.qos_active = 1;
1764 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1765 cw_min = 31;
1766 is_legacy = 1;
1767 }
1768
1769 if (priv->qos_data.qos_active)
1770 aifs = 3;
1771
1772 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1773 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1774 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1775 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1776 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1777
1778 if (priv->qos_data.qos_active) {
1779 i = 1;
1780 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1781 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1782 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1783 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1784 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1785
1786 i = 2;
1787 priv->qos_data.def_qos_parm.ac[i].cw_min =
1788 cpu_to_le16((cw_min + 1) / 2 - 1);
1789 priv->qos_data.def_qos_parm.ac[i].cw_max =
1790 cpu_to_le16(cw_max);
1791 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1792 if (is_legacy)
1793 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1794 cpu_to_le16(6016);
1795 else
1796 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1797 cpu_to_le16(3008);
1798 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1799
1800 i = 3;
1801 priv->qos_data.def_qos_parm.ac[i].cw_min =
1802 cpu_to_le16((cw_min + 1) / 4 - 1);
1803 priv->qos_data.def_qos_parm.ac[i].cw_max =
1804 cpu_to_le16((cw_max + 1) / 2 - 1);
1805 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1806 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1807 if (is_legacy)
1808 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1809 cpu_to_le16(3264);
1810 else
1811 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1812 cpu_to_le16(1504);
1813 } else {
1814 for (i = 1; i < 4; i++) {
1815 priv->qos_data.def_qos_parm.ac[i].cw_min =
1816 cpu_to_le16(cw_min);
1817 priv->qos_data.def_qos_parm.ac[i].cw_max =
1818 cpu_to_le16(cw_max);
1819 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1820 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1821 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1822 }
1823 }
1824 IWL_DEBUG_QOS("set QoS to default \n");
1825
1826 spin_unlock_irqrestore(&priv->lock, flags);
1827}
1828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001829static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
Zhu Yib481de92007-09-25 17:54:57 -07001830{
1831 unsigned long flags;
1832
Zhu Yib481de92007-09-25 17:54:57 -07001833 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1834 return;
1835
1836 if (!priv->qos_data.qos_enable)
1837 return;
1838
1839 spin_lock_irqsave(&priv->lock, flags);
1840 priv->qos_data.def_qos_parm.qos_flags = 0;
1841
1842 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1843 !priv->qos_data.qos_cap.q_AP.txop_request)
1844 priv->qos_data.def_qos_parm.qos_flags |=
1845 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1846
1847 if (priv->qos_data.qos_active)
1848 priv->qos_data.def_qos_parm.qos_flags |=
1849 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1850
1851 spin_unlock_irqrestore(&priv->lock, flags);
1852
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001853 if (force || iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07001854 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
1855 priv->qos_data.qos_active);
1856
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001857 iwl3945_send_qos_params_command(priv,
Zhu Yib481de92007-09-25 17:54:57 -07001858 &(priv->qos_data.def_qos_parm));
1859 }
1860}
1861
Zhu Yib481de92007-09-25 17:54:57 -07001862/*
1863 * Power management (not Tx power!) functions
1864 */
1865#define MSEC_TO_USEC 1024
1866
1867#define NOSLP __constant_cpu_to_le32(0)
1868#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
1869#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1870#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1871 __constant_cpu_to_le32(X1), \
1872 __constant_cpu_to_le32(X2), \
1873 __constant_cpu_to_le32(X3), \
1874 __constant_cpu_to_le32(X4)}
1875
1876
1877/* default power management (not Tx power) table values */
1878/* for tim 0-10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001879static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07001880 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1881 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1882 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1883 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1884 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1885 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1886};
1887
1888/* for tim > 10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001889static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07001890 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1891 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1892 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1893 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1894 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1895 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1896 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1897 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1898 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1899 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1900};
1901
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001902int iwl3945_power_init_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001903{
1904 int rc = 0, i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001905 struct iwl3945_power_mgr *pow_data;
1906 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
Zhu Yib481de92007-09-25 17:54:57 -07001907 u16 pci_pm;
1908
1909 IWL_DEBUG_POWER("Initialize power \n");
1910
1911 pow_data = &(priv->power_data);
1912
1913 memset(pow_data, 0, sizeof(*pow_data));
1914
1915 pow_data->active_index = IWL_POWER_RANGE_0;
1916 pow_data->dtim_val = 0xffff;
1917
1918 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1919 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1920
1921 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1922 if (rc != 0)
1923 return 0;
1924 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001925 struct iwl3945_powertable_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07001926
1927 IWL_DEBUG_POWER("adjust power command flags\n");
1928
1929 for (i = 0; i < IWL_POWER_AC; i++) {
1930 cmd = &pow_data->pwr_range_0[i].cmd;
1931
1932 if (pci_pm & 0x1)
1933 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1934 else
1935 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1936 }
1937 }
1938 return rc;
1939}
1940
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001941static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1942 struct iwl3945_powertable_cmd *cmd, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07001943{
1944 int rc = 0, i;
1945 u8 skip;
1946 u32 max_sleep = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001947 struct iwl3945_power_vec_entry *range;
Zhu Yib481de92007-09-25 17:54:57 -07001948 u8 period = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001949 struct iwl3945_power_mgr *pow_data;
Zhu Yib481de92007-09-25 17:54:57 -07001950
1951 if (mode > IWL_POWER_INDEX_5) {
1952 IWL_DEBUG_POWER("Error invalid power mode \n");
1953 return -1;
1954 }
1955 pow_data = &(priv->power_data);
1956
1957 if (pow_data->active_index == IWL_POWER_RANGE_0)
1958 range = &pow_data->pwr_range_0[0];
1959 else
1960 range = &pow_data->pwr_range_1[1];
1961
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001962 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
Zhu Yib481de92007-09-25 17:54:57 -07001963
1964#ifdef IWL_MAC80211_DISABLE
1965 if (priv->assoc_network != NULL) {
1966 unsigned long flags;
1967
1968 period = priv->assoc_network->tim.tim_period;
1969 }
1970#endif /*IWL_MAC80211_DISABLE */
1971 skip = range[mode].no_dtim;
1972
1973 if (period == 0) {
1974 period = 1;
1975 skip = 0;
1976 }
1977
1978 if (skip == 0) {
1979 max_sleep = period;
1980 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1981 } else {
1982 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1983 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1984 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1985 }
1986
1987 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1988 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1989 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1990 }
1991
1992 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1993 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1994 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1995 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1996 le32_to_cpu(cmd->sleep_interval[0]),
1997 le32_to_cpu(cmd->sleep_interval[1]),
1998 le32_to_cpu(cmd->sleep_interval[2]),
1999 le32_to_cpu(cmd->sleep_interval[3]),
2000 le32_to_cpu(cmd->sleep_interval[4]));
2001
2002 return rc;
2003}
2004
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002005static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002006{
John W. Linville9a62f732007-11-15 16:27:36 -05002007 u32 uninitialized_var(final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002008 int rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002009 struct iwl3945_powertable_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002010
2011 /* If on battery, set to 3,
Ian Schram01ebd062007-10-25 17:15:22 +08002012 * if plugged into AC power, set to CAM ("continuously aware mode"),
Zhu Yib481de92007-09-25 17:54:57 -07002013 * else user level */
2014 switch (mode) {
2015 case IWL_POWER_BATTERY:
2016 final_mode = IWL_POWER_INDEX_3;
2017 break;
2018 case IWL_POWER_AC:
2019 final_mode = IWL_POWER_MODE_CAM;
2020 break;
2021 default:
2022 final_mode = mode;
2023 break;
2024 }
2025
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002026 iwl3945_update_power_cmd(priv, &cmd, final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002027
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002028 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07002029
2030 if (final_mode == IWL_POWER_MODE_CAM)
2031 clear_bit(STATUS_POWER_PMI, &priv->status);
2032 else
2033 set_bit(STATUS_POWER_PMI, &priv->status);
2034
2035 return rc;
2036}
2037
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002038int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002039{
2040 /* Filter incoming packets to determine if they are targeted toward
2041 * this network, discarding packets coming from ourselves */
2042 switch (priv->iw_mode) {
2043 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2044 /* packets from our adapter are dropped (echo) */
2045 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2046 return 0;
2047 /* {broad,multi}cast packets to our IBSS go through */
2048 if (is_multicast_ether_addr(header->addr1))
2049 return !compare_ether_addr(header->addr3, priv->bssid);
2050 /* packets to our adapter go through */
2051 return !compare_ether_addr(header->addr1, priv->mac_addr);
2052 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2053 /* packets from our adapter are dropped (echo) */
2054 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2055 return 0;
2056 /* {broad,multi}cast packets to our BSS go through */
2057 if (is_multicast_ether_addr(header->addr1))
2058 return !compare_ether_addr(header->addr2, priv->bssid);
2059 /* packets to our adapter go through */
2060 return !compare_ether_addr(header->addr1, priv->mac_addr);
Tomas Winkler69dc5d92008-03-25 16:33:41 -07002061 default:
2062 return 1;
Zhu Yib481de92007-09-25 17:54:57 -07002063 }
2064
2065 return 1;
2066}
2067
Zhu Yib481de92007-09-25 17:54:57 -07002068/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002069 * iwl3945_scan_cancel - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002070 *
2071 * NOTE: priv->mutex is not required before calling this function
2072 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002073static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002074{
2075 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2076 clear_bit(STATUS_SCANNING, &priv->status);
2077 return 0;
2078 }
2079
2080 if (test_bit(STATUS_SCANNING, &priv->status)) {
2081 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2082 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2083 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2084 queue_work(priv->workqueue, &priv->abort_scan);
2085
2086 } else
2087 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2088
2089 return test_bit(STATUS_SCANNING, &priv->status);
2090 }
2091
2092 return 0;
2093}
2094
2095/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002096 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002097 * @ms: amount of time to wait (in milliseconds) for scan to abort
2098 *
2099 * NOTE: priv->mutex must be held before calling this function
2100 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002101static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
Zhu Yib481de92007-09-25 17:54:57 -07002102{
2103 unsigned long now = jiffies;
2104 int ret;
2105
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002106 ret = iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002107 if (ret && ms) {
2108 mutex_unlock(&priv->mutex);
2109 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2110 test_bit(STATUS_SCANNING, &priv->status))
2111 msleep(1);
2112 mutex_lock(&priv->mutex);
2113
2114 return test_bit(STATUS_SCANNING, &priv->status);
2115 }
2116
2117 return ret;
2118}
2119
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002120static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002121{
2122 /* Reset ieee stats */
2123
2124 /* We don't reset the net_device_stats (ieee->stats) on
2125 * re-association */
2126
2127 priv->last_seq_num = -1;
2128 priv->last_frag_num = -1;
2129 priv->last_packet_time = 0;
2130
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002131 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002132}
2133
2134#define MAX_UCODE_BEACON_INTERVAL 1024
2135#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2136
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002137static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
Zhu Yib481de92007-09-25 17:54:57 -07002138{
2139 u16 new_val = 0;
2140 u16 beacon_factor = 0;
2141
2142 beacon_factor =
2143 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2144 / MAX_UCODE_BEACON_INTERVAL;
2145 new_val = beacon_val / beacon_factor;
2146
2147 return cpu_to_le16(new_val);
2148}
2149
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002150static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002151{
2152 u64 interval_tm_unit;
2153 u64 tsf, result;
2154 unsigned long flags;
2155 struct ieee80211_conf *conf = NULL;
2156 u16 beacon_int = 0;
2157
2158 conf = ieee80211_get_hw_conf(priv->hw);
2159
2160 spin_lock_irqsave(&priv->lock, flags);
2161 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2162 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2163
2164 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2165
2166 tsf = priv->timestamp1;
2167 tsf = ((tsf << 32) | priv->timestamp0);
2168
2169 beacon_int = priv->beacon_int;
2170 spin_unlock_irqrestore(&priv->lock, flags);
2171
2172 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2173 if (beacon_int == 0) {
2174 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2175 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2176 } else {
2177 priv->rxon_timing.beacon_interval =
2178 cpu_to_le16(beacon_int);
2179 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002180 iwl3945_adjust_beacon_interval(
Zhu Yib481de92007-09-25 17:54:57 -07002181 le16_to_cpu(priv->rxon_timing.beacon_interval));
2182 }
2183
2184 priv->rxon_timing.atim_window = 0;
2185 } else {
2186 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002187 iwl3945_adjust_beacon_interval(conf->beacon_int);
Zhu Yib481de92007-09-25 17:54:57 -07002188 /* TODO: we need to get atim_window from upper stack
2189 * for now we set to 0 */
2190 priv->rxon_timing.atim_window = 0;
2191 }
2192
2193 interval_tm_unit =
2194 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2195 result = do_div(tsf, interval_tm_unit);
2196 priv->rxon_timing.beacon_init_val =
2197 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2198
2199 IWL_DEBUG_ASSOC
2200 ("beacon interval %d beacon timer %d beacon tim %d\n",
2201 le16_to_cpu(priv->rxon_timing.beacon_interval),
2202 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2203 le16_to_cpu(priv->rxon_timing.atim_window));
2204}
2205
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002206static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002207{
2208 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2209 IWL_ERROR("APs don't scan.\n");
2210 return 0;
2211 }
2212
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002213 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002214 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2215 return -EIO;
2216 }
2217
2218 if (test_bit(STATUS_SCANNING, &priv->status)) {
2219 IWL_DEBUG_SCAN("Scan already in progress.\n");
2220 return -EAGAIN;
2221 }
2222
2223 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2224 IWL_DEBUG_SCAN("Scan request while abort pending. "
2225 "Queuing.\n");
2226 return -EAGAIN;
2227 }
2228
2229 IWL_DEBUG_INFO("Starting scan...\n");
2230 priv->scan_bands = 2;
2231 set_bit(STATUS_SCANNING, &priv->status);
2232 priv->scan_start = jiffies;
2233 priv->scan_pass_start = priv->scan_start;
2234
2235 queue_work(priv->workqueue, &priv->request_scan);
2236
2237 return 0;
2238}
2239
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002240static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
Zhu Yib481de92007-09-25 17:54:57 -07002241{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002242 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07002243
2244 if (hw_decrypt)
2245 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2246 else
2247 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2248
2249 return 0;
2250}
2251
Johannes Berg8318d782008-01-24 19:38:38 +01002252static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2253 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07002254{
Johannes Berg8318d782008-01-24 19:38:38 +01002255 if (band == IEEE80211_BAND_5GHZ) {
Zhu Yib481de92007-09-25 17:54:57 -07002256 priv->staging_rxon.flags &=
2257 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2258 | RXON_FLG_CCK_MSK);
2259 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2260 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002261 /* Copied from iwl3945_bg_post_associate() */
Zhu Yib481de92007-09-25 17:54:57 -07002262 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2263 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2264 else
2265 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2266
2267 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2268 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2269
2270 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2271 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2272 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2273 }
2274}
2275
2276/*
Ian Schram01ebd062007-10-25 17:15:22 +08002277 * initialize rxon structure with default values from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07002278 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002279static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002280{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002281 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002282
2283 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2284
2285 switch (priv->iw_mode) {
2286 case IEEE80211_IF_TYPE_AP:
2287 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2288 break;
2289
2290 case IEEE80211_IF_TYPE_STA:
2291 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2292 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2293 break;
2294
2295 case IEEE80211_IF_TYPE_IBSS:
2296 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2297 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2298 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2299 RXON_FILTER_ACCEPT_GRP_MSK;
2300 break;
2301
2302 case IEEE80211_IF_TYPE_MNTR:
2303 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2304 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2305 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2306 break;
Tomas Winkler69dc5d92008-03-25 16:33:41 -07002307 default:
2308 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
2309 break;
Zhu Yib481de92007-09-25 17:54:57 -07002310 }
2311
2312#if 0
2313 /* TODO: Figure out when short_preamble would be set and cache from
2314 * that */
2315 if (!hw_to_local(priv->hw)->short_preamble)
2316 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2317 else
2318 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2319#endif
2320
Johannes Berg8318d782008-01-24 19:38:38 +01002321 ch_info = iwl3945_get_channel_info(priv, priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002322 le16_to_cpu(priv->staging_rxon.channel));
2323
2324 if (!ch_info)
2325 ch_info = &priv->channel_info[0];
2326
2327 /*
2328 * in some case A channels are all non IBSS
2329 * in this case force B/G channel
2330 */
2331 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2332 !(is_channel_ibss(ch_info)))
2333 ch_info = &priv->channel_info[0];
2334
2335 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2336 if (is_channel_a_band(ch_info))
Johannes Berg8318d782008-01-24 19:38:38 +01002337 priv->band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002338 else
Johannes Berg8318d782008-01-24 19:38:38 +01002339 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002340
Johannes Berg8318d782008-01-24 19:38:38 +01002341 iwl3945_set_flags_for_phymode(priv, priv->band);
Zhu Yib481de92007-09-25 17:54:57 -07002342
2343 priv->staging_rxon.ofdm_basic_rates =
2344 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2345 priv->staging_rxon.cck_basic_rates =
2346 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2347}
2348
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002349static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -07002350{
Zhu Yib481de92007-09-25 17:54:57 -07002351 if (mode == IEEE80211_IF_TYPE_IBSS) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002352 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002353
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002354 ch_info = iwl3945_get_channel_info(priv,
Johannes Berg8318d782008-01-24 19:38:38 +01002355 priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002356 le16_to_cpu(priv->staging_rxon.channel));
2357
2358 if (!ch_info || !is_channel_ibss(ch_info)) {
2359 IWL_ERROR("channel %d not IBSS channel\n",
2360 le16_to_cpu(priv->staging_rxon.channel));
2361 return -EINVAL;
2362 }
2363 }
2364
Zhu Yib481de92007-09-25 17:54:57 -07002365 priv->iw_mode = mode;
2366
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002367 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002368 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2369
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002370 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002371
Mohamed Abbasfde35712007-11-29 11:10:15 +08002372 /* dont commit rxon if rf-kill is on*/
2373 if (!iwl3945_is_ready_rf(priv))
2374 return -EAGAIN;
2375
2376 cancel_delayed_work(&priv->scan_check);
2377 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2378 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2379 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2380 return -EAGAIN;
2381 }
2382
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002383 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002384
2385 return 0;
2386}
2387
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002388static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002389 struct ieee80211_tx_control *ctl,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002390 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002391 struct sk_buff *skb_frag,
2392 int last_frag)
2393{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002394 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
Zhu Yib481de92007-09-25 17:54:57 -07002395
2396 switch (keyinfo->alg) {
2397 case ALG_CCMP:
2398 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2399 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2400 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2401 break;
2402
2403 case ALG_TKIP:
2404#if 0
2405 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2406
2407 if (last_frag)
2408 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2409 8);
2410 else
2411 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2412#endif
2413 break;
2414
2415 case ALG_WEP:
2416 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2417 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2418
2419 if (keyinfo->keylen == 13)
2420 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2421
2422 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2423
2424 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2425 "with key %d\n", ctl->key_idx);
2426 break;
2427
Zhu Yib481de92007-09-25 17:54:57 -07002428 default:
2429 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2430 break;
2431 }
2432}
2433
2434/*
2435 * handle build REPLY_TX command notification.
2436 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002437static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2438 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002439 struct ieee80211_tx_control *ctrl,
2440 struct ieee80211_hdr *hdr,
2441 int is_unicast, u8 std_id)
2442{
2443 __le16 *qc;
2444 u16 fc = le16_to_cpu(hdr->frame_control);
2445 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2446
2447 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2448 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2449 tx_flags |= TX_CMD_FLG_ACK_MSK;
2450 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2451 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2452 if (ieee80211_is_probe_response(fc) &&
2453 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2454 tx_flags |= TX_CMD_FLG_TSF_MSK;
2455 } else {
2456 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2457 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2458 }
2459
2460 cmd->cmd.tx.sta_id = std_id;
2461 if (ieee80211_get_morefrag(hdr))
2462 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2463
2464 qc = ieee80211_get_qos_ctrl(hdr);
2465 if (qc) {
2466 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2467 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2468 } else
2469 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2470
2471 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2472 tx_flags |= TX_CMD_FLG_RTS_MSK;
2473 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2474 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2475 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2476 tx_flags |= TX_CMD_FLG_CTS_MSK;
2477 }
2478
2479 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2480 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2481
2482 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2483 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2484 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2485 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
Ian Schrambc434dd2007-10-25 17:15:29 +08002486 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
Zhu Yib481de92007-09-25 17:54:57 -07002487 else
Ian Schrambc434dd2007-10-25 17:15:29 +08002488 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07002489 } else {
Zhu Yib481de92007-09-25 17:54:57 -07002490 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07002491#ifdef CONFIG_IWL3945_LEDS
2492 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2493#endif
2494 }
Zhu Yib481de92007-09-25 17:54:57 -07002495
2496 cmd->cmd.tx.driver_txop = 0;
2497 cmd->cmd.tx.tx_flags = tx_flags;
2498 cmd->cmd.tx.next_frame_len = 0;
2499}
2500
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002501/**
2502 * iwl3945_get_sta_id - Find station's index within station table
2503 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002504static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -07002505{
2506 int sta_id;
2507 u16 fc = le16_to_cpu(hdr->frame_control);
2508
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002509 /* If this frame is broadcast or management, use broadcast station id */
Zhu Yib481de92007-09-25 17:54:57 -07002510 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2511 is_multicast_ether_addr(hdr->addr1))
2512 return priv->hw_setting.bcast_sta_id;
2513
2514 switch (priv->iw_mode) {
2515
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002516 /* If we are a client station in a BSS network, use the special
2517 * AP station entry (that's the only station we communicate with) */
Zhu Yib481de92007-09-25 17:54:57 -07002518 case IEEE80211_IF_TYPE_STA:
2519 return IWL_AP_ID;
2520
2521 /* If we are an AP, then find the station, or use BCAST */
2522 case IEEE80211_IF_TYPE_AP:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002523 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002524 if (sta_id != IWL_INVALID_STATION)
2525 return sta_id;
2526 return priv->hw_setting.bcast_sta_id;
2527
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002528 /* If this frame is going out to an IBSS network, find the station,
2529 * or create a new station table entry */
Joe Perches0795af52007-10-03 17:59:30 -07002530 case IEEE80211_IF_TYPE_IBSS: {
2531 DECLARE_MAC_BUF(mac);
2532
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002533 /* Create new station table entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002534 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002535 if (sta_id != IWL_INVALID_STATION)
2536 return sta_id;
2537
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002538 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002539
2540 if (sta_id != IWL_INVALID_STATION)
2541 return sta_id;
2542
Joe Perches0795af52007-10-03 17:59:30 -07002543 IWL_DEBUG_DROP("Station %s not in station map. "
Zhu Yib481de92007-09-25 17:54:57 -07002544 "Defaulting to broadcast...\n",
Joe Perches0795af52007-10-03 17:59:30 -07002545 print_mac(mac, hdr->addr1));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002546 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
Zhu Yib481de92007-09-25 17:54:57 -07002547 return priv->hw_setting.bcast_sta_id;
Joe Perches0795af52007-10-03 17:59:30 -07002548 }
Zhu Yib481de92007-09-25 17:54:57 -07002549 default:
Ian Schram01ebd062007-10-25 17:15:22 +08002550 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002551 return priv->hw_setting.bcast_sta_id;
2552 }
2553}
2554
2555/*
2556 * start REPLY_TX command process
2557 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002558static int iwl3945_tx_skb(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002559 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2560{
2561 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002562 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -07002563 u32 *control_flags;
2564 int txq_id = ctl->queue;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002565 struct iwl3945_tx_queue *txq = NULL;
2566 struct iwl3945_queue *q = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002567 dma_addr_t phys_addr;
2568 dma_addr_t txcmd_phys;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002569 struct iwl3945_cmd *out_cmd = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002570 u16 len, idx, len_org;
2571 u8 id, hdr_len, unicast;
2572 u8 sta_id;
2573 u16 seq_number = 0;
2574 u16 fc;
2575 __le16 *qc;
2576 u8 wait_write_ptr = 0;
2577 unsigned long flags;
2578 int rc;
2579
2580 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002581 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002582 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2583 goto drop_unlock;
2584 }
2585
Johannes Berg32bfd352007-12-19 01:31:26 +01002586 if (!priv->vif) {
2587 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07002588 goto drop_unlock;
2589 }
2590
Johannes Berg8318d782008-01-24 19:38:38 +01002591 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
Zhu Yib481de92007-09-25 17:54:57 -07002592 IWL_ERROR("ERROR: No TX rate available.\n");
2593 goto drop_unlock;
2594 }
2595
2596 unicast = !is_multicast_ether_addr(hdr->addr1);
2597 id = 0;
2598
2599 fc = le16_to_cpu(hdr->frame_control);
2600
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002601#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07002602 if (ieee80211_is_auth(fc))
2603 IWL_DEBUG_TX("Sending AUTH frame\n");
2604 else if (ieee80211_is_assoc_request(fc))
2605 IWL_DEBUG_TX("Sending ASSOC frame\n");
2606 else if (ieee80211_is_reassoc_request(fc))
2607 IWL_DEBUG_TX("Sending REASSOC frame\n");
2608#endif
2609
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002610 /* drop all data frame if we are not associated */
Reinette Chatrea6477242008-02-14 10:40:28 -08002611 if ((!iwl3945_is_associated(priv) ||
2612 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id)) &&
Zhu Yib481de92007-09-25 17:54:57 -07002613 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002614 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
Zhu Yib481de92007-09-25 17:54:57 -07002615 goto drop_unlock;
2616 }
2617
2618 spin_unlock_irqrestore(&priv->lock, flags);
2619
2620 hdr_len = ieee80211_get_hdrlen(fc);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002621
2622 /* Find (or create) index into station table for destination station */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002623 sta_id = iwl3945_get_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002624 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07002625 DECLARE_MAC_BUF(mac);
2626
2627 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2628 print_mac(mac, hdr->addr1));
Zhu Yib481de92007-09-25 17:54:57 -07002629 goto drop;
2630 }
2631
2632 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2633
2634 qc = ieee80211_get_qos_ctrl(hdr);
2635 if (qc) {
2636 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2637 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2638 IEEE80211_SCTL_SEQ;
2639 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2640 (hdr->seq_ctrl &
2641 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2642 seq_number += 0x10;
2643 }
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002644
2645 /* Descriptor for chosen Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -07002646 txq = &priv->txq[txq_id];
2647 q = &txq->q;
2648
2649 spin_lock_irqsave(&priv->lock, flags);
2650
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002651 /* Set up first empty TFD within this queue's circular TFD buffer */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002652 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -07002653 memset(tfd, 0, sizeof(*tfd));
2654 control_flags = (u32 *) tfd;
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002655 idx = get_cmd_index(q, q->write_ptr, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002656
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002657 /* Set up driver data for this TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002658 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002659 txq->txb[q->write_ptr].skb[0] = skb;
2660 memcpy(&(txq->txb[q->write_ptr].status.control),
Zhu Yib481de92007-09-25 17:54:57 -07002661 ctl, sizeof(struct ieee80211_tx_control));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002662
2663 /* Init first empty entry in queue's array of Tx/cmd buffers */
Zhu Yib481de92007-09-25 17:54:57 -07002664 out_cmd = &txq->cmd[idx];
2665 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2666 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002667
2668 /*
2669 * Set up the Tx-command (not MAC!) header.
2670 * Store the chosen Tx queue and TFD index within the sequence field;
2671 * after Tx, uCode's Tx response will return this value so driver can
2672 * locate the frame within the tx queue and do post-tx processing.
2673 */
Zhu Yib481de92007-09-25 17:54:57 -07002674 out_cmd->hdr.cmd = REPLY_TX;
2675 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002676 INDEX_TO_SEQ(q->write_ptr)));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002677
2678 /* Copy MAC header from skb into command buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002679 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2680
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002681 /*
2682 * Use the first empty entry in this queue's command buffer array
2683 * to contain the Tx command and MAC header concatenated together
2684 * (payload data will be in another buffer).
2685 * Size of this varies, due to varying MAC header length.
2686 * If end is not dword aligned, we'll have 2 extra bytes at the end
2687 * of the MAC header (device reads on dword boundaries).
2688 * We'll tell device about this padding later.
2689 */
Zhu Yib481de92007-09-25 17:54:57 -07002690 len = priv->hw_setting.tx_cmd_len +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002691 sizeof(struct iwl3945_cmd_header) + hdr_len;
Zhu Yib481de92007-09-25 17:54:57 -07002692
2693 len_org = len;
2694 len = (len + 3) & ~3;
2695
2696 if (len_org != len)
2697 len_org = 1;
2698 else
2699 len_org = 0;
2700
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002701 /* Physical address of this Tx command's header (not MAC header!),
2702 * within command buffer array. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002703 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2704 offsetof(struct iwl3945_cmd, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002705
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002706 /* Add buffer containing Tx command and MAC(!) header to TFD's
2707 * first entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002708 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
Zhu Yib481de92007-09-25 17:54:57 -07002709
2710 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002711 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002712
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002713 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2714 * if any (802.11 null frames have no payload). */
Zhu Yib481de92007-09-25 17:54:57 -07002715 len = skb->len - hdr_len;
2716 if (len) {
2717 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2718 len, PCI_DMA_TODEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002719 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
Zhu Yib481de92007-09-25 17:54:57 -07002720 }
2721
Zhu Yib481de92007-09-25 17:54:57 -07002722 if (!len)
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002723 /* If there is no payload, then we use only one Tx buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002724 *control_flags = TFD_CTL_COUNT_SET(1);
2725 else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002726 /* Else use 2 buffers.
2727 * Tell 3945 about any padding after MAC header */
Zhu Yib481de92007-09-25 17:54:57 -07002728 *control_flags = TFD_CTL_COUNT_SET(2) |
2729 TFD_CTL_PAD_SET(U32_PAD(len));
2730
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002731 /* Total # bytes to be transmitted */
Zhu Yib481de92007-09-25 17:54:57 -07002732 len = (u16)skb->len;
2733 out_cmd->cmd.tx.len = cpu_to_le16(len);
2734
2735 /* TODO need this for burst mode later on */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002736 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07002737
2738 /* set is_hcca to 0; it probably will never be implemented */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002739 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002740
2741 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2742 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2743
2744 if (!ieee80211_get_morefrag(hdr)) {
2745 txq->need_update = 1;
2746 if (qc) {
2747 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2748 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2749 }
2750 } else {
2751 wait_write_ptr = 1;
2752 txq->need_update = 0;
2753 }
2754
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002755 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
Zhu Yib481de92007-09-25 17:54:57 -07002756 sizeof(out_cmd->cmd.tx));
2757
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002758 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
Zhu Yib481de92007-09-25 17:54:57 -07002759 ieee80211_get_hdrlen(fc));
2760
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002761 /* Tell device the write index *just past* this latest filled TFD */
Tomas Winklerc54b6792008-03-06 17:36:53 -08002762 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002763 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002764 spin_unlock_irqrestore(&priv->lock, flags);
2765
2766 if (rc)
2767 return rc;
2768
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002769 if ((iwl3945_queue_space(q) < q->high_mark)
Zhu Yib481de92007-09-25 17:54:57 -07002770 && priv->mac80211_registered) {
2771 if (wait_write_ptr) {
2772 spin_lock_irqsave(&priv->lock, flags);
2773 txq->need_update = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002774 iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002775 spin_unlock_irqrestore(&priv->lock, flags);
2776 }
2777
2778 ieee80211_stop_queue(priv->hw, ctl->queue);
2779 }
2780
2781 return 0;
2782
2783drop_unlock:
2784 spin_unlock_irqrestore(&priv->lock, flags);
2785drop:
2786 return -1;
2787}
2788
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002789static void iwl3945_set_rate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002790{
Johannes Berg8318d782008-01-24 19:38:38 +01002791 const struct ieee80211_supported_band *sband = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002792 struct ieee80211_rate *rate;
2793 int i;
2794
Johannes Berg8318d782008-01-24 19:38:38 +01002795 sband = iwl3945_get_band(priv, priv->band);
2796 if (!sband) {
Saleem Abdulrasoolc4ba9622007-11-18 23:59:08 -08002797 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2798 return;
2799 }
Zhu Yib481de92007-09-25 17:54:57 -07002800
2801 priv->active_rate = 0;
2802 priv->active_rate_basic = 0;
2803
Johannes Berg8318d782008-01-24 19:38:38 +01002804 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2805 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
Zhu Yib481de92007-09-25 17:54:57 -07002806
Johannes Berg8318d782008-01-24 19:38:38 +01002807 for (i = 0; i < sband->n_bitrates; i++) {
2808 rate = &sband->bitrates[i];
2809 if ((rate->hw_value < IWL_RATE_COUNT) &&
2810 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2811 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2812 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2813 priv->active_rate |= (1 << rate->hw_value);
2814 }
Zhu Yib481de92007-09-25 17:54:57 -07002815 }
2816
2817 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2818 priv->active_rate, priv->active_rate_basic);
2819
2820 /*
2821 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2822 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2823 * OFDM
2824 */
2825 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2826 priv->staging_rxon.cck_basic_rates =
2827 ((priv->active_rate_basic &
2828 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2829 else
2830 priv->staging_rxon.cck_basic_rates =
2831 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2832
2833 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2834 priv->staging_rxon.ofdm_basic_rates =
2835 ((priv->active_rate_basic &
2836 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2837 IWL_FIRST_OFDM_RATE) & 0xFF;
2838 else
2839 priv->staging_rxon.ofdm_basic_rates =
2840 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2841}
2842
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002843static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
Zhu Yib481de92007-09-25 17:54:57 -07002844{
2845 unsigned long flags;
2846
2847 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2848 return;
2849
2850 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2851 disable_radio ? "OFF" : "ON");
2852
2853 if (disable_radio) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002854 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002855 /* FIXME: This is a workaround for AP */
2856 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2857 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002858 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07002859 CSR_UCODE_SW_BIT_RFKILL);
2860 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002861 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002862 set_bit(STATUS_RF_KILL_SW, &priv->status);
2863 }
2864 return;
2865 }
2866
2867 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002868 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07002869
2870 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2871 spin_unlock_irqrestore(&priv->lock, flags);
2872
2873 /* wake up ucode */
2874 msleep(10);
2875
2876 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002877 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2878 if (!iwl3945_grab_nic_access(priv))
2879 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002880 spin_unlock_irqrestore(&priv->lock, flags);
2881
2882 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2883 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2884 "disabled by HW switch\n");
2885 return;
2886 }
2887
2888 queue_work(priv->workqueue, &priv->restart);
2889 return;
2890}
2891
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002892void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07002893 u32 decrypt_res, struct ieee80211_rx_status *stats)
2894{
2895 u16 fc =
2896 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2897
2898 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2899 return;
2900
2901 if (!(fc & IEEE80211_FCTL_PROTECTED))
2902 return;
2903
2904 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2905 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2906 case RX_RES_STATUS_SEC_TYPE_TKIP:
2907 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2908 RX_RES_STATUS_BAD_ICV_MIC)
2909 stats->flag |= RX_FLAG_MMIC_ERROR;
2910 case RX_RES_STATUS_SEC_TYPE_WEP:
2911 case RX_RES_STATUS_SEC_TYPE_CCMP:
2912 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2913 RX_RES_STATUS_DECRYPT_OK) {
2914 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2915 stats->flag |= RX_FLAG_DECRYPTED;
2916 }
2917 break;
2918
2919 default:
2920 break;
2921 }
2922}
2923
Zhu Yib481de92007-09-25 17:54:57 -07002924#define IWL_PACKET_RETRY_TIME HZ
2925
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002926int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002927{
2928 u16 sc = le16_to_cpu(header->seq_ctrl);
2929 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2930 u16 frag = sc & IEEE80211_SCTL_FRAG;
2931 u16 *last_seq, *last_frag;
2932 unsigned long *last_time;
2933
2934 switch (priv->iw_mode) {
2935 case IEEE80211_IF_TYPE_IBSS:{
2936 struct list_head *p;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002937 struct iwl3945_ibss_seq *entry = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002938 u8 *mac = header->addr2;
2939 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2940
2941 __list_for_each(p, &priv->ibss_mac_hash[index]) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002942 entry = list_entry(p, struct iwl3945_ibss_seq, list);
Zhu Yib481de92007-09-25 17:54:57 -07002943 if (!compare_ether_addr(entry->mac, mac))
2944 break;
2945 }
2946 if (p == &priv->ibss_mac_hash[index]) {
2947 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2948 if (!entry) {
Ian Schrambc434dd2007-10-25 17:15:29 +08002949 IWL_ERROR("Cannot malloc new mac entry\n");
Zhu Yib481de92007-09-25 17:54:57 -07002950 return 0;
2951 }
2952 memcpy(entry->mac, mac, ETH_ALEN);
2953 entry->seq_num = seq;
2954 entry->frag_num = frag;
2955 entry->packet_time = jiffies;
Ian Schrambc434dd2007-10-25 17:15:29 +08002956 list_add(&entry->list, &priv->ibss_mac_hash[index]);
Zhu Yib481de92007-09-25 17:54:57 -07002957 return 0;
2958 }
2959 last_seq = &entry->seq_num;
2960 last_frag = &entry->frag_num;
2961 last_time = &entry->packet_time;
2962 break;
2963 }
2964 case IEEE80211_IF_TYPE_STA:
2965 last_seq = &priv->last_seq_num;
2966 last_frag = &priv->last_frag_num;
2967 last_time = &priv->last_packet_time;
2968 break;
2969 default:
2970 return 0;
2971 }
2972 if ((*last_seq == seq) &&
2973 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2974 if (*last_frag == frag)
2975 goto drop;
2976 if (*last_frag + 1 != frag)
2977 /* out-of-order fragment */
2978 goto drop;
2979 } else
2980 *last_seq = seq;
2981
2982 *last_frag = frag;
2983 *last_time = jiffies;
2984 return 0;
2985
2986 drop:
2987 return 1;
2988}
2989
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002990#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07002991
2992#include "iwl-spectrum.h"
2993
2994#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2995#define BEACON_TIME_MASK_HIGH 0xFF000000
2996#define TIME_UNIT 1024
2997
2998/*
2999 * extended beacon time format
3000 * time in usec will be changed into a 32-bit value in 8:24 format
3001 * the high 1 byte is the beacon counts
3002 * the lower 3 bytes is the time in usec within one beacon interval
3003 */
3004
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003005static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003006{
3007 u32 quot;
3008 u32 rem;
3009 u32 interval = beacon_interval * 1024;
3010
3011 if (!interval || !usec)
3012 return 0;
3013
3014 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3015 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3016
3017 return (quot << 24) + rem;
3018}
3019
3020/* base is usually what we get from ucode with each received frame,
3021 * the same as HW timer counter counting down
3022 */
3023
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003024static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003025{
3026 u32 base_low = base & BEACON_TIME_MASK_LOW;
3027 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3028 u32 interval = beacon_interval * TIME_UNIT;
3029 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3030 (addon & BEACON_TIME_MASK_HIGH);
3031
3032 if (base_low > addon_low)
3033 res += base_low - addon_low;
3034 else if (base_low < addon_low) {
3035 res += interval + base_low - addon_low;
3036 res += (1 << 24);
3037 } else
3038 res += (1 << 24);
3039
3040 return cpu_to_le32(res);
3041}
3042
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003043static int iwl3945_get_measurement(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003044 struct ieee80211_measurement_params *params,
3045 u8 type)
3046{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003047 struct iwl3945_spectrum_cmd spectrum;
3048 struct iwl3945_rx_packet *res;
3049 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07003050 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3051 .data = (void *)&spectrum,
3052 .meta.flags = CMD_WANT_SKB,
3053 };
3054 u32 add_time = le64_to_cpu(params->start_time);
3055 int rc;
3056 int spectrum_resp_status;
3057 int duration = le16_to_cpu(params->duration);
3058
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003059 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003060 add_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003061 iwl3945_usecs_to_beacons(
Zhu Yib481de92007-09-25 17:54:57 -07003062 le64_to_cpu(params->start_time) - priv->last_tsf,
3063 le16_to_cpu(priv->rxon_timing.beacon_interval));
3064
3065 memset(&spectrum, 0, sizeof(spectrum));
3066
3067 spectrum.channel_count = cpu_to_le16(1);
3068 spectrum.flags =
3069 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3070 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3071 cmd.len = sizeof(spectrum);
3072 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3073
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003074 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003075 spectrum.start_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003076 iwl3945_add_beacon_time(priv->last_beacon_time,
Zhu Yib481de92007-09-25 17:54:57 -07003077 add_time,
3078 le16_to_cpu(priv->rxon_timing.beacon_interval));
3079 else
3080 spectrum.start_time = 0;
3081
3082 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3083 spectrum.channels[0].channel = params->channel;
3084 spectrum.channels[0].type = type;
3085 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3086 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3087 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3088
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003089 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07003090 if (rc)
3091 return rc;
3092
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003093 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003094 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3095 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3096 rc = -EIO;
3097 }
3098
3099 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3100 switch (spectrum_resp_status) {
3101 case 0: /* Command will be handled */
3102 if (res->u.spectrum.id != 0xff) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003103 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3104 res->u.spectrum.id);
Zhu Yib481de92007-09-25 17:54:57 -07003105 priv->measurement_status &= ~MEASUREMENT_READY;
3106 }
3107 priv->measurement_status |= MEASUREMENT_ACTIVE;
3108 rc = 0;
3109 break;
3110
3111 case 1: /* Command will not be handled */
3112 rc = -EAGAIN;
3113 break;
3114 }
3115
3116 dev_kfree_skb_any(cmd.meta.u.skb);
3117
3118 return rc;
3119}
3120#endif
3121
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003122static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3123 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003124{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003125 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3126 struct iwl3945_alive_resp *palive;
Zhu Yib481de92007-09-25 17:54:57 -07003127 struct delayed_work *pwork;
3128
3129 palive = &pkt->u.alive_frame;
3130
3131 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3132 "0x%01X 0x%01X\n",
3133 palive->is_valid, palive->ver_type,
3134 palive->ver_subtype);
3135
3136 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3137 IWL_DEBUG_INFO("Initialization Alive received.\n");
3138 memcpy(&priv->card_alive_init,
3139 &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003140 sizeof(struct iwl3945_init_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003141 pwork = &priv->init_alive_start;
3142 } else {
3143 IWL_DEBUG_INFO("Runtime Alive received.\n");
3144 memcpy(&priv->card_alive, &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003145 sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003146 pwork = &priv->alive_start;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003147 iwl3945_disable_events(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003148 }
3149
3150 /* We delay the ALIVE response by 5ms to
3151 * give the HW RF Kill time to activate... */
3152 if (palive->is_valid == UCODE_VALID_OK)
3153 queue_delayed_work(priv->workqueue, pwork,
3154 msecs_to_jiffies(5));
3155 else
3156 IWL_WARNING("uCode did not respond OK.\n");
3157}
3158
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003159static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3160 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003161{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003162 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003163
3164 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3165 return;
3166}
3167
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003168static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3169 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003170{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003171 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003172
3173 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3174 "seq 0x%04X ser 0x%08X\n",
3175 le32_to_cpu(pkt->u.err_resp.error_type),
3176 get_cmd_string(pkt->u.err_resp.cmd_id),
3177 pkt->u.err_resp.cmd_id,
3178 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3179 le32_to_cpu(pkt->u.err_resp.error_info));
3180}
3181
3182#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3183
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003184static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003185{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003186 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3187 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3188 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003189 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3190 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3191 rxon->channel = csa->channel;
3192 priv->staging_rxon.channel = csa->channel;
3193}
3194
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003195static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3196 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003197{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003198#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003199 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3200 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003201
3202 if (!report->state) {
3203 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3204 "Spectrum Measure Notification: Start\n");
3205 return;
3206 }
3207
3208 memcpy(&priv->measure_report, report, sizeof(*report));
3209 priv->measurement_status |= MEASUREMENT_READY;
3210#endif
3211}
3212
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003213static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3214 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003215{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003216#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003217 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3218 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003219 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3220 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3221#endif
3222}
3223
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003224static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3225 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003226{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003227 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003228 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3229 "notification for %s:\n",
3230 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003231 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
Zhu Yib481de92007-09-25 17:54:57 -07003232}
3233
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003234static void iwl3945_bg_beacon_update(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07003235{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003236 struct iwl3945_priv *priv =
3237 container_of(work, struct iwl3945_priv, beacon_update);
Zhu Yib481de92007-09-25 17:54:57 -07003238 struct sk_buff *beacon;
3239
3240 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
Johannes Berg32bfd352007-12-19 01:31:26 +01003241 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
Zhu Yib481de92007-09-25 17:54:57 -07003242
3243 if (!beacon) {
3244 IWL_ERROR("update beacon failed\n");
3245 return;
3246 }
3247
3248 mutex_lock(&priv->mutex);
3249 /* new beacon skb is allocated every time; dispose previous.*/
3250 if (priv->ibss_beacon)
3251 dev_kfree_skb(priv->ibss_beacon);
3252
3253 priv->ibss_beacon = beacon;
3254 mutex_unlock(&priv->mutex);
3255
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003256 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003257}
3258
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003259static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3260 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003261{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003262#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003263 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3264 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
Zhu Yib481de92007-09-25 17:54:57 -07003265 u8 rate = beacon->beacon_notify_hdr.rate;
3266
3267 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3268 "tsf %d %d rate %d\n",
3269 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3270 beacon->beacon_notify_hdr.failure_frame,
3271 le32_to_cpu(beacon->ibss_mgr_status),
3272 le32_to_cpu(beacon->high_tsf),
3273 le32_to_cpu(beacon->low_tsf), rate);
3274#endif
3275
3276 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3277 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3278 queue_work(priv->workqueue, &priv->beacon_update);
3279}
3280
3281/* Service response to REPLY_SCAN_CMD (0x80) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003282static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3283 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003284{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003285#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003286 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3287 struct iwl3945_scanreq_notification *notif =
3288 (struct iwl3945_scanreq_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003289
3290 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3291#endif
3292}
3293
3294/* Service SCAN_START_NOTIFICATION (0x82) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003295static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3296 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003297{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003298 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3299 struct iwl3945_scanstart_notification *notif =
3300 (struct iwl3945_scanstart_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003301 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3302 IWL_DEBUG_SCAN("Scan start: "
3303 "%d [802.11%s] "
3304 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3305 notif->channel,
3306 notif->band ? "bg" : "a",
3307 notif->tsf_high,
3308 notif->tsf_low, notif->status, notif->beacon_timer);
3309}
3310
3311/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003312static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3313 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003314{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003315 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3316 struct iwl3945_scanresults_notification *notif =
3317 (struct iwl3945_scanresults_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003318
3319 IWL_DEBUG_SCAN("Scan ch.res: "
3320 "%d [802.11%s] "
3321 "(TSF: 0x%08X:%08X) - %d "
3322 "elapsed=%lu usec (%dms since last)\n",
3323 notif->channel,
3324 notif->band ? "bg" : "a",
3325 le32_to_cpu(notif->tsf_high),
3326 le32_to_cpu(notif->tsf_low),
3327 le32_to_cpu(notif->statistics[0]),
3328 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3329 jiffies_to_msecs(elapsed_jiffies
3330 (priv->last_scan_jiffies, jiffies)));
3331
3332 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003333 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003334}
3335
3336/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003337static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3338 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003339{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003340 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3341 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003342
3343 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3344 scan_notif->scanned_channels,
3345 scan_notif->tsf_low,
3346 scan_notif->tsf_high, scan_notif->status);
3347
3348 /* The HW is no longer scanning */
3349 clear_bit(STATUS_SCAN_HW, &priv->status);
3350
3351 /* The scan completion notification came in, so kill that timer... */
3352 cancel_delayed_work(&priv->scan_check);
3353
3354 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3355 (priv->scan_bands == 2) ? "2.4" : "5.2",
3356 jiffies_to_msecs(elapsed_jiffies
3357 (priv->scan_pass_start, jiffies)));
3358
3359 /* Remove this scanned band from the list
3360 * of pending bands to scan */
3361 priv->scan_bands--;
3362
3363 /* If a request to abort was given, or the scan did not succeed
3364 * then we reset the scan state machine and terminate,
3365 * re-queuing another scan if one has been requested */
3366 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3367 IWL_DEBUG_INFO("Aborted scan completed.\n");
3368 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3369 } else {
3370 /* If there are more bands on this scan pass reschedule */
3371 if (priv->scan_bands > 0)
3372 goto reschedule;
3373 }
3374
3375 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003376 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003377 IWL_DEBUG_INFO("Setting scan to off\n");
3378
3379 clear_bit(STATUS_SCANNING, &priv->status);
3380
3381 IWL_DEBUG_INFO("Scan took %dms\n",
3382 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3383
3384 queue_work(priv->workqueue, &priv->scan_completed);
3385
3386 return;
3387
3388reschedule:
3389 priv->scan_pass_start = jiffies;
3390 queue_work(priv->workqueue, &priv->request_scan);
3391}
3392
3393/* Handle notification from uCode that card's power state is changing
3394 * due to software, hardware, or critical temperature RFKILL */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003395static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3396 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003397{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003398 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003399 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3400 unsigned long status = priv->status;
3401
3402 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3403 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3404 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3405
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003406 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003407 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3408
3409 if (flags & HW_CARD_DISABLED)
3410 set_bit(STATUS_RF_KILL_HW, &priv->status);
3411 else
3412 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3413
3414
3415 if (flags & SW_CARD_DISABLED)
3416 set_bit(STATUS_RF_KILL_SW, &priv->status);
3417 else
3418 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3419
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003420 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003421
3422 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3423 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3424 (test_bit(STATUS_RF_KILL_SW, &status) !=
3425 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3426 queue_work(priv->workqueue, &priv->rf_kill);
3427 else
3428 wake_up_interruptible(&priv->wait_command_queue);
3429}
3430
3431/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003432 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
Zhu Yib481de92007-09-25 17:54:57 -07003433 *
3434 * Setup the RX handlers for each of the reply types sent from the uCode
3435 * to the host.
3436 *
3437 * This function chains into the hardware specific files for them to setup
3438 * any hardware specific handlers as well.
3439 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003440static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003441{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003442 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3443 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3444 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3445 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
Zhu Yib481de92007-09-25 17:54:57 -07003446 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003447 iwl3945_rx_spectrum_measure_notif;
3448 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003449 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003450 iwl3945_rx_pm_debug_statistics_notif;
3451 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003452
Ben Cahill9fbab512007-11-29 11:09:47 +08003453 /*
3454 * The same handler is used for both the REPLY to a discrete
3455 * statistics request from the host as well as for the periodic
3456 * statistics notifications (after received beacons) from the uCode.
Zhu Yib481de92007-09-25 17:54:57 -07003457 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003458 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3459 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
Zhu Yib481de92007-09-25 17:54:57 -07003460
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003461 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3462 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003463 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003464 iwl3945_rx_scan_results_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003465 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003466 iwl3945_rx_scan_complete_notif;
3467 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003468
Ben Cahill9fbab512007-11-29 11:09:47 +08003469 /* Set up hardware specific Rx handlers */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003470 iwl3945_hw_rx_handler_setup(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003471}
3472
3473/**
Tomas Winkler91c066f2008-03-06 17:36:55 -08003474 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3475 * When FW advances 'R' index, all entries between old and new 'R' index
3476 * need to be reclaimed.
3477 */
3478static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3479 int txq_id, int index)
3480{
3481 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3482 struct iwl3945_queue *q = &txq->q;
3483 int nfreed = 0;
3484
3485 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3486 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3487 "is out of range [0-%d] %d %d.\n", txq_id,
3488 index, q->n_bd, q->write_ptr, q->read_ptr);
3489 return;
3490 }
3491
3492 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3493 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3494 if (nfreed > 1) {
3495 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3496 q->write_ptr, q->read_ptr);
3497 queue_work(priv->workqueue, &priv->restart);
3498 break;
3499 }
3500 nfreed++;
3501 }
3502}
3503
3504
3505/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003506 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
Zhu Yib481de92007-09-25 17:54:57 -07003507 * @rxb: Rx buffer to reclaim
3508 *
3509 * If an Rx buffer has an async callback associated with it the callback
3510 * will be executed. The attached skb (if present) will only be freed
3511 * if the callback returns 1
3512 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003513static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3514 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003515{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003516 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003517 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3518 int txq_id = SEQ_TO_QUEUE(sequence);
3519 int index = SEQ_TO_INDEX(sequence);
3520 int huge = sequence & SEQ_HUGE_FRAME;
3521 int cmd_index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003522 struct iwl3945_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07003523
Zhu Yib481de92007-09-25 17:54:57 -07003524 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3525
3526 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3527 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3528
3529 /* Input error checking is done when commands are added to queue. */
3530 if (cmd->meta.flags & CMD_WANT_SKB) {
3531 cmd->meta.source->u.skb = rxb->skb;
3532 rxb->skb = NULL;
3533 } else if (cmd->meta.u.callback &&
3534 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3535 rxb->skb = NULL;
3536
Tomas Winkler91c066f2008-03-06 17:36:55 -08003537 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003538
3539 if (!(cmd->meta.flags & CMD_ASYNC)) {
3540 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3541 wake_up_interruptible(&priv->wait_command_queue);
3542 }
3543}
3544
3545/************************** RX-FUNCTIONS ****************************/
3546/*
3547 * Rx theory of operation
3548 *
3549 * The host allocates 32 DMA target addresses and passes the host address
3550 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3551 * 0 to 31
3552 *
3553 * Rx Queue Indexes
3554 * The host/firmware share two index registers for managing the Rx buffers.
3555 *
3556 * The READ index maps to the first position that the firmware may be writing
3557 * to -- the driver can read up to (but not including) this position and get
3558 * good data.
3559 * The READ index is managed by the firmware once the card is enabled.
3560 *
3561 * The WRITE index maps to the last position the driver has read from -- the
3562 * position preceding WRITE is the last slot the firmware can place a packet.
3563 *
3564 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3565 * WRITE = READ.
3566 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003567 * During initialization, the host sets up the READ queue position to the first
Zhu Yib481de92007-09-25 17:54:57 -07003568 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3569 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003570 * When the firmware places a packet in a buffer, it will advance the READ index
Zhu Yib481de92007-09-25 17:54:57 -07003571 * and fire the RX interrupt. The driver can then query the READ index and
3572 * process as many packets as possible, moving the WRITE index forward as it
3573 * resets the Rx queue buffers with new memory.
3574 *
3575 * The management in the driver is as follows:
3576 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3577 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
Ian Schram01ebd062007-10-25 17:15:22 +08003578 * to replenish the iwl->rxq->rx_free.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003579 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
Zhu Yib481de92007-09-25 17:54:57 -07003580 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3581 * 'processed' and 'read' driver indexes as well)
3582 * + A received packet is processed and handed to the kernel network stack,
3583 * detached from the iwl->rxq. The driver 'processed' index is updated.
3584 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3585 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3586 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3587 * were enough free buffers and RX_STALLED is set it is cleared.
3588 *
3589 *
3590 * Driver sequence:
3591 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003592 * iwl3945_rx_queue_alloc() Allocates rx_free
3593 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003594 * iwl3945_rx_queue_restock
Ben Cahill9fbab512007-11-29 11:09:47 +08003595 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
Zhu Yib481de92007-09-25 17:54:57 -07003596 * queue, updates firmware pointers, and updates
3597 * the WRITE index. If insufficient rx_free buffers
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003598 * are available, schedules iwl3945_rx_replenish
Zhu Yib481de92007-09-25 17:54:57 -07003599 *
3600 * -- enable interrupts --
Ben Cahill9fbab512007-11-29 11:09:47 +08003601 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
Zhu Yib481de92007-09-25 17:54:57 -07003602 * READ INDEX, detaching the SKB from the pool.
3603 * Moves the packet buffer from queue to rx_used.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003604 * Calls iwl3945_rx_queue_restock to refill any empty
Zhu Yib481de92007-09-25 17:54:57 -07003605 * slots.
3606 * ...
3607 *
3608 */
3609
3610/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003611 * iwl3945_rx_queue_space - Return number of free slots available in queue.
Zhu Yib481de92007-09-25 17:54:57 -07003612 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003613static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003614{
3615 int s = q->read - q->write;
3616 if (s <= 0)
3617 s += RX_QUEUE_SIZE;
3618 /* keep some buffer to not confuse full and empty queue */
3619 s -= 2;
3620 if (s < 0)
3621 s = 0;
3622 return s;
3623}
3624
3625/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003626 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
Zhu Yib481de92007-09-25 17:54:57 -07003627 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003628int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003629{
3630 u32 reg = 0;
3631 int rc = 0;
3632 unsigned long flags;
3633
3634 spin_lock_irqsave(&q->lock, flags);
3635
3636 if (q->need_update == 0)
3637 goto exit_unlock;
3638
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003639 /* If power-saving is in use, make sure device is awake */
Zhu Yib481de92007-09-25 17:54:57 -07003640 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003641 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07003642
3643 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003644 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07003645 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3646 goto exit_unlock;
3647 }
3648
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003649 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003650 if (rc)
3651 goto exit_unlock;
3652
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003653 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003654 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
Zhu Yib481de92007-09-25 17:54:57 -07003655 q->write & ~0x7);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003656 iwl3945_release_nic_access(priv);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003657
3658 /* Else device is assumed to be awake */
Zhu Yib481de92007-09-25 17:54:57 -07003659 } else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003660 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003661 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
Zhu Yib481de92007-09-25 17:54:57 -07003662
3663
3664 q->need_update = 0;
3665
3666 exit_unlock:
3667 spin_unlock_irqrestore(&q->lock, flags);
3668 return rc;
3669}
3670
3671/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003672 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
Zhu Yib481de92007-09-25 17:54:57 -07003673 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003674static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003675 dma_addr_t dma_addr)
3676{
3677 return cpu_to_le32((u32)dma_addr);
3678}
3679
3680/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003681 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
Zhu Yib481de92007-09-25 17:54:57 -07003682 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003683 * If there are slots in the RX queue that need to be restocked,
Zhu Yib481de92007-09-25 17:54:57 -07003684 * and we have free pre-allocated buffers, fill the ranks as much
Ben Cahill9fbab512007-11-29 11:09:47 +08003685 * as we can, pulling from rx_free.
Zhu Yib481de92007-09-25 17:54:57 -07003686 *
3687 * This moves the 'write' index forward to catch up with 'processed', and
3688 * also updates the memory address in the firmware to reference the new
3689 * target buffer.
3690 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003691static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003692{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003693 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003694 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003695 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003696 unsigned long flags;
3697 int write, rc;
3698
3699 spin_lock_irqsave(&rxq->lock, flags);
3700 write = rxq->write & ~0x7;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003701 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003702 /* Get next free Rx buffer, remove from free list */
Zhu Yib481de92007-09-25 17:54:57 -07003703 element = rxq->rx_free.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003704 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Zhu Yib481de92007-09-25 17:54:57 -07003705 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003706
3707 /* Point to Rx buffer via next RBD in circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003708 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
Zhu Yib481de92007-09-25 17:54:57 -07003709 rxq->queue[rxq->write] = rxb;
3710 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3711 rxq->free_count--;
3712 }
3713 spin_unlock_irqrestore(&rxq->lock, flags);
3714 /* If the pre-allocated buffer pool is dropping low, schedule to
3715 * refill it */
3716 if (rxq->free_count <= RX_LOW_WATERMARK)
3717 queue_work(priv->workqueue, &priv->rx_replenish);
3718
3719
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003720 /* If we've added more space for the firmware to place data, tell it.
3721 * Increment device's write pointer in multiples of 8. */
Zhu Yib481de92007-09-25 17:54:57 -07003722 if ((write != (rxq->write & ~0x7))
3723 || (abs(rxq->write - rxq->read) > 7)) {
3724 spin_lock_irqsave(&rxq->lock, flags);
3725 rxq->need_update = 1;
3726 spin_unlock_irqrestore(&rxq->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003727 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
Zhu Yib481de92007-09-25 17:54:57 -07003728 if (rc)
3729 return rc;
3730 }
3731
3732 return 0;
3733}
3734
3735/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003736 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
Zhu Yib481de92007-09-25 17:54:57 -07003737 *
3738 * When moving to rx_free an SKB is allocated for the slot.
3739 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003740 * Also restock the Rx queue via iwl3945_rx_queue_restock.
Ian Schram01ebd062007-10-25 17:15:22 +08003741 * This is called as a scheduled work item (except for during initialization)
Zhu Yib481de92007-09-25 17:54:57 -07003742 */
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003743static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003744{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003745 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003746 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003747 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003748 unsigned long flags;
3749 spin_lock_irqsave(&rxq->lock, flags);
3750 while (!list_empty(&rxq->rx_used)) {
3751 element = rxq->rx_used.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003752 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003753
3754 /* Alloc a new receive buffer */
Zhu Yib481de92007-09-25 17:54:57 -07003755 rxb->skb =
3756 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3757 if (!rxb->skb) {
3758 if (net_ratelimit())
3759 printk(KERN_CRIT DRV_NAME
3760 ": Can not allocate SKB buffers\n");
3761 /* We don't reschedule replenish work here -- we will
3762 * call the restock method and if it still needs
3763 * more buffers it will schedule replenish */
3764 break;
3765 }
Zhu Yi12342c42007-12-20 11:27:32 +08003766
3767 /* If radiotap head is required, reserve some headroom here.
3768 * The physical head count is a variable rx_stats->phy_count.
3769 * We reserve 4 bytes here. Plus these extra bytes, the
3770 * headroom of the physical head should be enough for the
3771 * radiotap head that iwl3945 supported. See iwl3945_rt.
3772 */
3773 skb_reserve(rxb->skb, 4);
3774
Zhu Yib481de92007-09-25 17:54:57 -07003775 priv->alloc_rxb_skb++;
3776 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003777
3778 /* Get physical address of RB/SKB */
Zhu Yib481de92007-09-25 17:54:57 -07003779 rxb->dma_addr =
3780 pci_map_single(priv->pci_dev, rxb->skb->data,
3781 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3782 list_add_tail(&rxb->list, &rxq->rx_free);
3783 rxq->free_count++;
3784 }
3785 spin_unlock_irqrestore(&rxq->lock, flags);
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003786}
3787
3788/*
3789 * this should be called while priv->lock is locked
3790 */
Tomas Winkler4fd1f842007-12-05 20:59:58 +02003791static void __iwl3945_rx_replenish(void *data)
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003792{
3793 struct iwl3945_priv *priv = data;
3794
3795 iwl3945_rx_allocate(priv);
3796 iwl3945_rx_queue_restock(priv);
3797}
3798
3799
3800void iwl3945_rx_replenish(void *data)
3801{
3802 struct iwl3945_priv *priv = data;
3803 unsigned long flags;
3804
3805 iwl3945_rx_allocate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003806
3807 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003808 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003809 spin_unlock_irqrestore(&priv->lock, flags);
3810}
3811
3812/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
Ben Cahill9fbab512007-11-29 11:09:47 +08003813 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
Zhu Yib481de92007-09-25 17:54:57 -07003814 * This free routine walks the list of POOL entries and if SKB is set to
3815 * non NULL it is unmapped and freed
3816 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003817static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07003818{
3819 int i;
3820 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3821 if (rxq->pool[i].skb != NULL) {
3822 pci_unmap_single(priv->pci_dev,
3823 rxq->pool[i].dma_addr,
3824 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3825 dev_kfree_skb(rxq->pool[i].skb);
3826 }
3827 }
3828
3829 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3830 rxq->dma_addr);
3831 rxq->bd = NULL;
3832}
3833
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003834int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003835{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003836 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003837 struct pci_dev *dev = priv->pci_dev;
3838 int i;
3839
3840 spin_lock_init(&rxq->lock);
3841 INIT_LIST_HEAD(&rxq->rx_free);
3842 INIT_LIST_HEAD(&rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003843
3844 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
Zhu Yib481de92007-09-25 17:54:57 -07003845 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3846 if (!rxq->bd)
3847 return -ENOMEM;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003848
Zhu Yib481de92007-09-25 17:54:57 -07003849 /* Fill the rx_used queue with _all_ of the Rx buffers */
3850 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3851 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003852
Zhu Yib481de92007-09-25 17:54:57 -07003853 /* Set us so that we have processed and used all buffers, but have
3854 * not restocked the Rx queue with fresh buffers */
3855 rxq->read = rxq->write = 0;
3856 rxq->free_count = 0;
3857 rxq->need_update = 0;
3858 return 0;
3859}
3860
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003861void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07003862{
3863 unsigned long flags;
3864 int i;
3865 spin_lock_irqsave(&rxq->lock, flags);
3866 INIT_LIST_HEAD(&rxq->rx_free);
3867 INIT_LIST_HEAD(&rxq->rx_used);
3868 /* Fill the rx_used queue with _all_ of the Rx buffers */
3869 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3870 /* In the reset function, these buffers may have been allocated
3871 * to an SKB, so we need to unmap and free potential storage */
3872 if (rxq->pool[i].skb != NULL) {
3873 pci_unmap_single(priv->pci_dev,
3874 rxq->pool[i].dma_addr,
3875 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3876 priv->alloc_rxb_skb--;
3877 dev_kfree_skb(rxq->pool[i].skb);
3878 rxq->pool[i].skb = NULL;
3879 }
3880 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3881 }
3882
3883 /* Set us so that we have processed and used all buffers, but have
3884 * not restocked the Rx queue with fresh buffers */
3885 rxq->read = rxq->write = 0;
3886 rxq->free_count = 0;
3887 spin_unlock_irqrestore(&rxq->lock, flags);
3888}
3889
3890/* Convert linear signal-to-noise ratio into dB */
3891static u8 ratio2dB[100] = {
3892/* 0 1 2 3 4 5 6 7 8 9 */
3893 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3894 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3895 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3896 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3897 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3898 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3899 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3900 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3901 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3902 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3903};
3904
3905/* Calculates a relative dB value from a ratio of linear
3906 * (i.e. not dB) signal levels.
3907 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003908int iwl3945_calc_db_from_ratio(int sig_ratio)
Zhu Yib481de92007-09-25 17:54:57 -07003909{
Adrian Bunk221c80c2008-02-02 23:19:01 +02003910 /* 1000:1 or higher just report as 60 dB */
3911 if (sig_ratio >= 1000)
Zhu Yib481de92007-09-25 17:54:57 -07003912 return 60;
3913
Adrian Bunk221c80c2008-02-02 23:19:01 +02003914 /* 100:1 or higher, divide by 10 and use table,
Zhu Yib481de92007-09-25 17:54:57 -07003915 * add 20 dB to make up for divide by 10 */
Adrian Bunk221c80c2008-02-02 23:19:01 +02003916 if (sig_ratio >= 100)
Zhu Yib481de92007-09-25 17:54:57 -07003917 return (20 + (int)ratio2dB[sig_ratio/10]);
3918
3919 /* We shouldn't see this */
3920 if (sig_ratio < 1)
3921 return 0;
3922
3923 /* Use table for ratios 1:1 - 99:1 */
3924 return (int)ratio2dB[sig_ratio];
3925}
3926
3927#define PERFECT_RSSI (-20) /* dBm */
3928#define WORST_RSSI (-95) /* dBm */
3929#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3930
3931/* Calculate an indication of rx signal quality (a percentage, not dBm!).
3932 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3933 * about formulas used below. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003934int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
Zhu Yib481de92007-09-25 17:54:57 -07003935{
3936 int sig_qual;
3937 int degradation = PERFECT_RSSI - rssi_dbm;
3938
3939 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3940 * as indicator; formula is (signal dbm - noise dbm).
3941 * SNR at or above 40 is a great signal (100%).
3942 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3943 * Weakest usable signal is usually 10 - 15 dB SNR. */
3944 if (noise_dbm) {
3945 if (rssi_dbm - noise_dbm >= 40)
3946 return 100;
3947 else if (rssi_dbm < noise_dbm)
3948 return 0;
3949 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3950
3951 /* Else use just the signal level.
3952 * This formula is a least squares fit of data points collected and
3953 * compared with a reference system that had a percentage (%) display
3954 * for signal quality. */
3955 } else
3956 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3957 (15 * RSSI_RANGE + 62 * degradation)) /
3958 (RSSI_RANGE * RSSI_RANGE);
3959
3960 if (sig_qual > 100)
3961 sig_qual = 100;
3962 else if (sig_qual < 1)
3963 sig_qual = 0;
3964
3965 return sig_qual;
3966}
3967
3968/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003969 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
Zhu Yib481de92007-09-25 17:54:57 -07003970 *
3971 * Uses the priv->rx_handlers callback function array to invoke
3972 * the appropriate handlers, including command responses,
3973 * frame-received notifications, and other notifications.
3974 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003975static void iwl3945_rx_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003976{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003977 struct iwl3945_rx_mem_buffer *rxb;
3978 struct iwl3945_rx_packet *pkt;
3979 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003980 u32 r, i;
3981 int reclaim;
3982 unsigned long flags;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003983 u8 fill_rx = 0;
Mohamed Abbasd68ab682008-02-07 13:16:33 -08003984 u32 count = 8;
Zhu Yib481de92007-09-25 17:54:57 -07003985
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003986 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3987 * buffer that the driver may process (last buffer filled by ucode). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003988 r = iwl3945_hw_get_rx_read(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003989 i = rxq->read;
3990
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003991 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3992 fill_rx = 1;
Zhu Yib481de92007-09-25 17:54:57 -07003993 /* Rx interrupt, but nothing sent from uCode */
3994 if (i == r)
3995 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3996
3997 while (i != r) {
3998 rxb = rxq->queue[i];
3999
Ben Cahill9fbab512007-11-29 11:09:47 +08004000 /* If an RXB doesn't have a Rx queue slot associated with it,
Zhu Yib481de92007-09-25 17:54:57 -07004001 * then a bug has been introduced in the queue refilling
4002 * routines -- catch it here */
4003 BUG_ON(rxb == NULL);
4004
4005 rxq->queue[i] = NULL;
4006
4007 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4008 IWL_RX_BUF_SIZE,
4009 PCI_DMA_FROMDEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004010 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004011
4012 /* Reclaim a command buffer only if this packet is a response
4013 * to a (driver-originated) command.
4014 * If the packet (e.g. Rx frame) originated from uCode,
4015 * there is no command buffer to reclaim.
4016 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4017 * but apparently a few don't get set; catch them here. */
4018 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4019 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4020 (pkt->hdr.cmd != REPLY_TX);
4021
4022 /* Based on type of command response or notification,
4023 * handle those that need handling via function in
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004024 * rx_handlers table. See iwl3945_setup_rx_handlers() */
Zhu Yib481de92007-09-25 17:54:57 -07004025 if (priv->rx_handlers[pkt->hdr.cmd]) {
4026 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4027 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4028 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4029 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4030 } else {
4031 /* No handling needed */
4032 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4033 "r %d i %d No handler needed for %s, 0x%02x\n",
4034 r, i, get_cmd_string(pkt->hdr.cmd),
4035 pkt->hdr.cmd);
4036 }
4037
4038 if (reclaim) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004039 /* Invoke any callbacks, transfer the skb to caller, and
4040 * fire off the (possibly) blocking iwl3945_send_cmd()
Zhu Yib481de92007-09-25 17:54:57 -07004041 * as we reclaim the driver command queue */
4042 if (rxb && rxb->skb)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004043 iwl3945_tx_cmd_complete(priv, rxb);
Zhu Yib481de92007-09-25 17:54:57 -07004044 else
4045 IWL_WARNING("Claim null rxb?\n");
4046 }
4047
4048 /* For now we just don't re-use anything. We can tweak this
4049 * later to try and re-use notification packets and SKBs that
4050 * fail to Rx correctly */
4051 if (rxb->skb != NULL) {
4052 priv->alloc_rxb_skb--;
4053 dev_kfree_skb_any(rxb->skb);
4054 rxb->skb = NULL;
4055 }
4056
4057 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4058 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4059 spin_lock_irqsave(&rxq->lock, flags);
4060 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4061 spin_unlock_irqrestore(&rxq->lock, flags);
4062 i = (i + 1) & RX_QUEUE_MASK;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004063 /* If there are a lot of unused frames,
4064 * restock the Rx queue so ucode won't assert. */
4065 if (fill_rx) {
4066 count++;
4067 if (count >= 8) {
4068 priv->rxq.read = i;
4069 __iwl3945_rx_replenish(priv);
4070 count = 0;
4071 }
4072 }
Zhu Yib481de92007-09-25 17:54:57 -07004073 }
4074
4075 /* Backtrack one entry */
4076 priv->rxq.read = i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004077 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004078}
4079
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004080/**
4081 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4082 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004083static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4084 struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -07004085{
4086 u32 reg = 0;
4087 int rc = 0;
4088 int txq_id = txq->q.id;
4089
4090 if (txq->need_update == 0)
4091 return rc;
4092
4093 /* if we're trying to save power */
4094 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4095 /* wake up nic if it's powered down ...
4096 * uCode will wake up, and interrupt us again, so next
4097 * time we'll skip this part. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004098 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004099
4100 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4101 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004102 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004103 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4104 return rc;
4105 }
4106
4107 /* restore this queue's parameters in nic hardware. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004108 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004109 if (rc)
4110 return rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004111 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004112 txq->q.write_ptr | (txq_id << 8));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004113 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004114
4115 /* else not in power-save mode, uCode will never sleep when we're
4116 * trying to tx (during RFKILL, we're not trying to tx). */
4117 } else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004118 iwl3945_write32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004119 txq->q.write_ptr | (txq_id << 8));
Zhu Yib481de92007-09-25 17:54:57 -07004120
4121 txq->need_update = 0;
4122
4123 return rc;
4124}
4125
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004126#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004127static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -07004128{
Joe Perches0795af52007-10-03 17:59:30 -07004129 DECLARE_MAC_BUF(mac);
4130
Zhu Yib481de92007-09-25 17:54:57 -07004131 IWL_DEBUG_RADIO("RX CONFIG:\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004132 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
Zhu Yib481de92007-09-25 17:54:57 -07004133 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4134 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4135 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4136 le32_to_cpu(rxon->filter_flags));
4137 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4138 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4139 rxon->ofdm_basic_rates);
4140 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
Joe Perches0795af52007-10-03 17:59:30 -07004141 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4142 print_mac(mac, rxon->node_addr));
4143 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4144 print_mac(mac, rxon->bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07004145 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4146}
4147#endif
4148
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004149static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004150{
4151 IWL_DEBUG_ISR("Enabling interrupts\n");
4152 set_bit(STATUS_INT_ENABLED, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004153 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004154}
4155
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004156static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004157{
4158 clear_bit(STATUS_INT_ENABLED, &priv->status);
4159
4160 /* disable interrupts from uCode/NIC to host */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004161 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004162
4163 /* acknowledge/clear/reset any interrupts still pending
4164 * from uCode or flow handler (Rx/Tx DMA) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004165 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4166 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
Zhu Yib481de92007-09-25 17:54:57 -07004167 IWL_DEBUG_ISR("Disabled interrupts\n");
4168}
4169
4170static const char *desc_lookup(int i)
4171{
4172 switch (i) {
4173 case 1:
4174 return "FAIL";
4175 case 2:
4176 return "BAD_PARAM";
4177 case 3:
4178 return "BAD_CHECKSUM";
4179 case 4:
4180 return "NMI_INTERRUPT";
4181 case 5:
4182 return "SYSASSERT";
4183 case 6:
4184 return "FATAL_ERROR";
4185 }
4186
4187 return "UNKNOWN";
4188}
4189
4190#define ERROR_START_OFFSET (1 * sizeof(u32))
4191#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4192
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004193static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004194{
4195 u32 i;
4196 u32 desc, time, count, base, data1;
4197 u32 blink1, blink2, ilink1, ilink2;
4198 int rc;
4199
4200 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4201
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004202 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004203 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4204 return;
4205 }
4206
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004207 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004208 if (rc) {
4209 IWL_WARNING("Can not read from adapter at this time.\n");
4210 return;
4211 }
4212
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004213 count = iwl3945_read_targ_mem(priv, base);
Zhu Yib481de92007-09-25 17:54:57 -07004214
4215 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4216 IWL_ERROR("Start IWL Error Log Dump:\n");
Tomas Winkler2acae162008-03-02 01:25:59 +02004217 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
Zhu Yib481de92007-09-25 17:54:57 -07004218 }
4219
4220 IWL_ERROR("Desc Time asrtPC blink2 "
4221 "ilink1 nmiPC Line\n");
4222 for (i = ERROR_START_OFFSET;
4223 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4224 i += ERROR_ELEM_SIZE) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004225 desc = iwl3945_read_targ_mem(priv, base + i);
Zhu Yib481de92007-09-25 17:54:57 -07004226 time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004227 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004228 blink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004229 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004230 blink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004231 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004232 ilink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004233 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004234 ilink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004235 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004236 data1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004237 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004238
4239 IWL_ERROR
4240 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4241 desc_lookup(desc), desc, time, blink1, blink2,
4242 ilink1, ilink2, data1);
4243 }
4244
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004245 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004246
4247}
4248
Ben Cahillf58177b2007-11-29 11:09:43 +08004249#define EVENT_START_OFFSET (6 * sizeof(u32))
Zhu Yib481de92007-09-25 17:54:57 -07004250
4251/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004252 * iwl3945_print_event_log - Dump error event log to syslog
Zhu Yib481de92007-09-25 17:54:57 -07004253 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004254 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
Zhu Yib481de92007-09-25 17:54:57 -07004255 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004256static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
Zhu Yib481de92007-09-25 17:54:57 -07004257 u32 num_events, u32 mode)
4258{
4259 u32 i;
4260 u32 base; /* SRAM byte address of event log header */
4261 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4262 u32 ptr; /* SRAM byte address of log data */
4263 u32 ev, time, data; /* event log data */
4264
4265 if (num_events == 0)
4266 return;
4267
4268 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4269
4270 if (mode == 0)
4271 event_size = 2 * sizeof(u32);
4272 else
4273 event_size = 3 * sizeof(u32);
4274
4275 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4276
4277 /* "time" is actually "data" for mode 0 (no timestamp).
4278 * place event id # at far right for easier visual parsing. */
4279 for (i = 0; i < num_events; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004280 ev = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004281 ptr += sizeof(u32);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004282 time = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004283 ptr += sizeof(u32);
4284 if (mode == 0)
4285 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4286 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004287 data = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004288 ptr += sizeof(u32);
4289 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4290 }
4291 }
4292}
4293
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004294static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004295{
4296 int rc;
4297 u32 base; /* SRAM byte address of event log header */
4298 u32 capacity; /* event log capacity in # entries */
4299 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4300 u32 num_wraps; /* # times uCode wrapped to top of log */
4301 u32 next_entry; /* index of next entry to be written by uCode */
4302 u32 size; /* # entries that we'll print */
4303
4304 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004305 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004306 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4307 return;
4308 }
4309
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004310 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004311 if (rc) {
4312 IWL_WARNING("Can not read from adapter at this time.\n");
4313 return;
4314 }
4315
4316 /* event log header */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004317 capacity = iwl3945_read_targ_mem(priv, base);
4318 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4319 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4320 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
Zhu Yib481de92007-09-25 17:54:57 -07004321
4322 size = num_wraps ? capacity : next_entry;
4323
4324 /* bail out if nothing in log */
4325 if (size == 0) {
Zhu Yi583fab32007-09-27 11:27:30 +08004326 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004327 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004328 return;
4329 }
4330
Zhu Yi583fab32007-09-27 11:27:30 +08004331 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07004332 size, num_wraps);
4333
4334 /* if uCode has wrapped back to top of log, start at the oldest entry,
4335 * i.e the next one that uCode would fill. */
4336 if (num_wraps)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004337 iwl3945_print_event_log(priv, next_entry,
Zhu Yib481de92007-09-25 17:54:57 -07004338 capacity - next_entry, mode);
4339
4340 /* (then/else) start at top of log */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004341 iwl3945_print_event_log(priv, 0, next_entry, mode);
Zhu Yib481de92007-09-25 17:54:57 -07004342
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004343 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004344}
4345
4346/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004347 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
Zhu Yib481de92007-09-25 17:54:57 -07004348 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004349static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004350{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004351 /* Set the FW error flag -- cleared on iwl3945_down */
Zhu Yib481de92007-09-25 17:54:57 -07004352 set_bit(STATUS_FW_ERROR, &priv->status);
4353
4354 /* Cancel currently queued command. */
4355 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4356
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004357#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004358 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4359 iwl3945_dump_nic_error_log(priv);
4360 iwl3945_dump_nic_event_log(priv);
4361 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07004362 }
4363#endif
4364
4365 wake_up_interruptible(&priv->wait_command_queue);
4366
4367 /* Keep the restart process from trying to send host
4368 * commands by clearing the INIT status bit */
4369 clear_bit(STATUS_READY, &priv->status);
4370
4371 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4372 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4373 "Restarting adapter due to uCode error.\n");
4374
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004375 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004376 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4377 sizeof(priv->recovery_rxon));
4378 priv->error_recovering = 1;
4379 }
4380 queue_work(priv->workqueue, &priv->restart);
4381 }
4382}
4383
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004384static void iwl3945_error_recovery(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004385{
4386 unsigned long flags;
4387
4388 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4389 sizeof(priv->staging_rxon));
4390 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004391 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004392
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004393 iwl3945_add_station(priv, priv->bssid, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07004394
4395 spin_lock_irqsave(&priv->lock, flags);
4396 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4397 priv->error_recovering = 0;
4398 spin_unlock_irqrestore(&priv->lock, flags);
4399}
4400
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004401static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004402{
4403 u32 inta, handled = 0;
4404 u32 inta_fh;
4405 unsigned long flags;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004406#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07004407 u32 inta_mask;
4408#endif
4409
4410 spin_lock_irqsave(&priv->lock, flags);
4411
4412 /* Ack/clear/reset pending uCode interrupts.
4413 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4414 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004415 inta = iwl3945_read32(priv, CSR_INT);
4416 iwl3945_write32(priv, CSR_INT, inta);
Zhu Yib481de92007-09-25 17:54:57 -07004417
4418 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4419 * Any new interrupts that happen after this, either while we're
4420 * in this tasklet, or later, will show up in next ISR/tasklet. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004421 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4422 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
Zhu Yib481de92007-09-25 17:54:57 -07004423
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004424#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004425 if (iwl3945_debug_level & IWL_DL_ISR) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004426 /* just for debug */
4427 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004428 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4429 inta, inta_mask, inta_fh);
4430 }
4431#endif
4432
4433 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4434 * atomic, make sure that inta covers all the interrupts that
4435 * we've discovered, even if FH interrupt came in just after
4436 * reading CSR_INT. */
Tomas Winkler6f83eaa2008-03-04 18:09:28 -08004437 if (inta_fh & CSR39_FH_INT_RX_MASK)
Zhu Yib481de92007-09-25 17:54:57 -07004438 inta |= CSR_INT_BIT_FH_RX;
Tomas Winkler6f83eaa2008-03-04 18:09:28 -08004439 if (inta_fh & CSR39_FH_INT_TX_MASK)
Zhu Yib481de92007-09-25 17:54:57 -07004440 inta |= CSR_INT_BIT_FH_TX;
4441
4442 /* Now service all interrupt bits discovered above. */
4443 if (inta & CSR_INT_BIT_HW_ERR) {
4444 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4445
4446 /* Tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004447 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004448
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004449 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004450
4451 handled |= CSR_INT_BIT_HW_ERR;
4452
4453 spin_unlock_irqrestore(&priv->lock, flags);
4454
4455 return;
4456 }
4457
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004458#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004459 if (iwl3945_debug_level & (IWL_DL_ISR)) {
Zhu Yib481de92007-09-25 17:54:57 -07004460 /* NIC fires this, but we don't use it, redundant with WAKEUP */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004461 if (inta & CSR_INT_BIT_SCD)
4462 IWL_DEBUG_ISR("Scheduler finished to transmit "
4463 "the frame/frames.\n");
Zhu Yib481de92007-09-25 17:54:57 -07004464
4465 /* Alive notification via Rx interrupt will do the real work */
4466 if (inta & CSR_INT_BIT_ALIVE)
4467 IWL_DEBUG_ISR("Alive interrupt\n");
4468 }
4469#endif
4470 /* Safely ignore these bits for debug checks below */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004471 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
Zhu Yib481de92007-09-25 17:54:57 -07004472
4473 /* HW RF KILL switch toggled (4965 only) */
4474 if (inta & CSR_INT_BIT_RF_KILL) {
4475 int hw_rf_kill = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004476 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07004477 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4478 hw_rf_kill = 1;
4479
4480 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4481 "RF_KILL bit toggled to %s.\n",
4482 hw_rf_kill ? "disable radio":"enable radio");
4483
4484 /* Queue restart only if RF_KILL switch was set to "kill"
4485 * when we loaded driver, and is now set to "enable".
4486 * After we're Alive, RF_KILL gets handled by
Reinette Chatre32304552008-02-15 14:34:37 -08004487 * iwl3945_rx_card_state_notif() */
Zhu Yi53e49092007-12-06 16:08:44 +08004488 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4489 clear_bit(STATUS_RF_KILL_HW, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07004490 queue_work(priv->workqueue, &priv->restart);
Zhu Yi53e49092007-12-06 16:08:44 +08004491 }
Zhu Yib481de92007-09-25 17:54:57 -07004492
4493 handled |= CSR_INT_BIT_RF_KILL;
4494 }
4495
4496 /* Chip got too hot and stopped itself (4965 only) */
4497 if (inta & CSR_INT_BIT_CT_KILL) {
4498 IWL_ERROR("Microcode CT kill error detected.\n");
4499 handled |= CSR_INT_BIT_CT_KILL;
4500 }
4501
4502 /* Error detected by uCode */
4503 if (inta & CSR_INT_BIT_SW_ERR) {
4504 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4505 inta);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004506 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004507 handled |= CSR_INT_BIT_SW_ERR;
4508 }
4509
4510 /* uCode wakes up after power-down sleep */
4511 if (inta & CSR_INT_BIT_WAKEUP) {
4512 IWL_DEBUG_ISR("Wakeup interrupt\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004513 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4514 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4515 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4516 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4517 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4518 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4519 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
Zhu Yib481de92007-09-25 17:54:57 -07004520
4521 handled |= CSR_INT_BIT_WAKEUP;
4522 }
4523
4524 /* All uCode command responses, including Tx command responses,
4525 * Rx "responses" (frame-received notification), and other
4526 * notifications from uCode come through here*/
4527 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004528 iwl3945_rx_handle(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004529 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4530 }
4531
4532 if (inta & CSR_INT_BIT_FH_TX) {
4533 IWL_DEBUG_ISR("Tx interrupt\n");
4534
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004535 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4536 if (!iwl3945_grab_nic_access(priv)) {
4537 iwl3945_write_direct32(priv,
Zhu Yib481de92007-09-25 17:54:57 -07004538 FH_TCSR_CREDIT
4539 (ALM_FH_SRVC_CHNL), 0x0);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004540 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004541 }
4542 handled |= CSR_INT_BIT_FH_TX;
4543 }
4544
4545 if (inta & ~handled)
4546 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4547
4548 if (inta & ~CSR_INI_SET_MASK) {
4549 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4550 inta & ~CSR_INI_SET_MASK);
4551 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4552 }
4553
4554 /* Re-enable all interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004555 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004556
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004557#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004558 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4559 inta = iwl3945_read32(priv, CSR_INT);
4560 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4561 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004562 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4563 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4564 }
4565#endif
4566 spin_unlock_irqrestore(&priv->lock, flags);
4567}
4568
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004569static irqreturn_t iwl3945_isr(int irq, void *data)
Zhu Yib481de92007-09-25 17:54:57 -07004570{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004571 struct iwl3945_priv *priv = data;
Zhu Yib481de92007-09-25 17:54:57 -07004572 u32 inta, inta_mask;
4573 u32 inta_fh;
4574 if (!priv)
4575 return IRQ_NONE;
4576
4577 spin_lock(&priv->lock);
4578
4579 /* Disable (but don't clear!) interrupts here to avoid
4580 * back-to-back ISRs and sporadic interrupts from our NIC.
4581 * If we have something to service, the tasklet will re-enable ints.
4582 * If we *don't* have something, we'll re-enable before leaving here. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004583 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4584 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004585
4586 /* Discover which interrupts are active/pending */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004587 inta = iwl3945_read32(priv, CSR_INT);
4588 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004589
4590 /* Ignore interrupt if there's nothing in NIC to service.
4591 * This may be due to IRQ shared with another device,
4592 * or due to sporadic interrupts thrown from our NIC. */
4593 if (!inta && !inta_fh) {
4594 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4595 goto none;
4596 }
4597
4598 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4599 /* Hardware disappeared */
4600 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004601 goto unplugged;
Zhu Yib481de92007-09-25 17:54:57 -07004602 }
4603
4604 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4605 inta, inta_mask, inta_fh);
4606
Joonwoo Park25c03d82008-01-23 10:15:20 -08004607 inta &= ~CSR_INT_BIT_SCD;
4608
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004609 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004610 if (likely(inta || inta_fh))
4611 tasklet_schedule(&priv->irq_tasklet);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004612unplugged:
Zhu Yib481de92007-09-25 17:54:57 -07004613 spin_unlock(&priv->lock);
4614
4615 return IRQ_HANDLED;
4616
4617 none:
4618 /* re-enable interrupts here since we don't have anything to service. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004619 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004620 spin_unlock(&priv->lock);
4621 return IRQ_NONE;
4622}
4623
4624/************************** EEPROM BANDS ****************************
4625 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004626 * The iwl3945_eeprom_band definitions below provide the mapping from the
Zhu Yib481de92007-09-25 17:54:57 -07004627 * EEPROM contents to the specific channel number supported for each
4628 * band.
4629 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004630 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
Zhu Yib481de92007-09-25 17:54:57 -07004631 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4632 * The specific geography and calibration information for that channel
4633 * is contained in the eeprom map itself.
4634 *
4635 * During init, we copy the eeprom information and channel map
4636 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4637 *
4638 * channel_map_24/52 provides the index in the channel_info array for a
4639 * given channel. We have to have two separate maps as there is channel
4640 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4641 * band_2
4642 *
4643 * A value of 0xff stored in the channel_map indicates that the channel
4644 * is not supported by the hardware at all.
4645 *
4646 * A value of 0xfe in the channel_map indicates that the channel is not
4647 * valid for Tx with the current hardware. This means that
4648 * while the system can tune and receive on a given channel, it may not
4649 * be able to associate or transmit any frames on that
4650 * channel. There is no corresponding channel information for that
4651 * entry.
4652 *
4653 *********************************************************************/
4654
4655/* 2.4 GHz */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004656static const u8 iwl3945_eeprom_band_1[14] = {
Zhu Yib481de92007-09-25 17:54:57 -07004657 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4658};
4659
4660/* 5.2 GHz bands */
Ben Cahill9fbab512007-11-29 11:09:47 +08004661static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004662 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4663};
4664
Ben Cahill9fbab512007-11-29 11:09:47 +08004665static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004666 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4667};
4668
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004669static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004670 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4671};
4672
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004673static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004674 145, 149, 153, 157, 161, 165
4675};
4676
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004677static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
Zhu Yib481de92007-09-25 17:54:57 -07004678 int *eeprom_ch_count,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004679 const struct iwl3945_eeprom_channel
Zhu Yib481de92007-09-25 17:54:57 -07004680 **eeprom_ch_info,
4681 const u8 **eeprom_ch_index)
4682{
4683 switch (band) {
4684 case 1: /* 2.4GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004685 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
Zhu Yib481de92007-09-25 17:54:57 -07004686 *eeprom_ch_info = priv->eeprom.band_1_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004687 *eeprom_ch_index = iwl3945_eeprom_band_1;
Zhu Yib481de92007-09-25 17:54:57 -07004688 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004689 case 2: /* 4.9GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004690 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
Zhu Yib481de92007-09-25 17:54:57 -07004691 *eeprom_ch_info = priv->eeprom.band_2_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004692 *eeprom_ch_index = iwl3945_eeprom_band_2;
Zhu Yib481de92007-09-25 17:54:57 -07004693 break;
4694 case 3: /* 5.2GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004695 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
Zhu Yib481de92007-09-25 17:54:57 -07004696 *eeprom_ch_info = priv->eeprom.band_3_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004697 *eeprom_ch_index = iwl3945_eeprom_band_3;
Zhu Yib481de92007-09-25 17:54:57 -07004698 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004699 case 4: /* 5.5GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004700 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
Zhu Yib481de92007-09-25 17:54:57 -07004701 *eeprom_ch_info = priv->eeprom.band_4_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004702 *eeprom_ch_index = iwl3945_eeprom_band_4;
Zhu Yib481de92007-09-25 17:54:57 -07004703 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004704 case 5: /* 5.7GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004705 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004706 *eeprom_ch_info = priv->eeprom.band_5_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004707 *eeprom_ch_index = iwl3945_eeprom_band_5;
Zhu Yib481de92007-09-25 17:54:57 -07004708 break;
4709 default:
4710 BUG();
4711 return;
4712 }
4713}
4714
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004715/**
4716 * iwl3945_get_channel_info - Find driver's private channel info
4717 *
4718 * Based on band and channel number.
4719 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004720const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
Johannes Berg8318d782008-01-24 19:38:38 +01004721 enum ieee80211_band band, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07004722{
4723 int i;
4724
Johannes Berg8318d782008-01-24 19:38:38 +01004725 switch (band) {
4726 case IEEE80211_BAND_5GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07004727 for (i = 14; i < priv->channel_count; i++) {
4728 if (priv->channel_info[i].channel == channel)
4729 return &priv->channel_info[i];
4730 }
4731 break;
4732
Johannes Berg8318d782008-01-24 19:38:38 +01004733 case IEEE80211_BAND_2GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07004734 if (channel >= 1 && channel <= 14)
4735 return &priv->channel_info[channel - 1];
4736 break;
Johannes Berg8318d782008-01-24 19:38:38 +01004737 case IEEE80211_NUM_BANDS:
4738 WARN_ON(1);
Zhu Yib481de92007-09-25 17:54:57 -07004739 }
4740
4741 return NULL;
4742}
4743
4744#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4745 ? # x " " : "")
4746
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004747/**
4748 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4749 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004750static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004751{
4752 int eeprom_ch_count = 0;
4753 const u8 *eeprom_ch_index = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004754 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07004755 int band, ch;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004756 struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07004757
4758 if (priv->channel_count) {
4759 IWL_DEBUG_INFO("Channel map already initialized.\n");
4760 return 0;
4761 }
4762
4763 if (priv->eeprom.version < 0x2f) {
4764 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4765 priv->eeprom.version);
4766 return -EINVAL;
4767 }
4768
4769 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4770
4771 priv->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004772 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4773 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4774 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4775 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4776 ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004777
4778 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4779
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004780 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
Zhu Yib481de92007-09-25 17:54:57 -07004781 priv->channel_count, GFP_KERNEL);
4782 if (!priv->channel_info) {
4783 IWL_ERROR("Could not allocate channel_info\n");
4784 priv->channel_count = 0;
4785 return -ENOMEM;
4786 }
4787
4788 ch_info = priv->channel_info;
4789
4790 /* Loop through the 5 EEPROM bands adding them in order to the
4791 * channel map we maintain (that contains additional information than
4792 * what just in the EEPROM) */
4793 for (band = 1; band <= 5; band++) {
4794
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004795 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07004796 &eeprom_ch_info, &eeprom_ch_index);
4797
4798 /* Loop through each band adding each of the channels */
4799 for (ch = 0; ch < eeprom_ch_count; ch++) {
4800 ch_info->channel = eeprom_ch_index[ch];
Johannes Berg8318d782008-01-24 19:38:38 +01004801 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4802 IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07004803
4804 /* permanently store EEPROM's channel regulatory flags
4805 * and max power in channel info database. */
4806 ch_info->eeprom = eeprom_ch_info[ch];
4807
4808 /* Copy the run-time flags so they are there even on
4809 * invalid channels */
4810 ch_info->flags = eeprom_ch_info[ch].flags;
4811
4812 if (!(is_channel_valid(ch_info))) {
4813 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4814 "No traffic\n",
4815 ch_info->channel,
4816 ch_info->flags,
4817 is_channel_a_band(ch_info) ?
4818 "5.2" : "2.4");
4819 ch_info++;
4820 continue;
4821 }
4822
4823 /* Initialize regulatory-based run-time data */
4824 ch_info->max_power_avg = ch_info->curr_txpow =
4825 eeprom_ch_info[ch].max_power_avg;
4826 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4827 ch_info->min_power = 0;
4828
Tomas Winkler8211ef72008-03-02 01:36:04 +02004829 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
Zhu Yib481de92007-09-25 17:54:57 -07004830 " %ddBm): Ad-Hoc %ssupported\n",
4831 ch_info->channel,
4832 is_channel_a_band(ch_info) ?
4833 "5.2" : "2.4",
Tomas Winkler8211ef72008-03-02 01:36:04 +02004834 CHECK_AND_PRINT(VALID),
Zhu Yib481de92007-09-25 17:54:57 -07004835 CHECK_AND_PRINT(IBSS),
4836 CHECK_AND_PRINT(ACTIVE),
4837 CHECK_AND_PRINT(RADAR),
4838 CHECK_AND_PRINT(WIDE),
4839 CHECK_AND_PRINT(NARROW),
4840 CHECK_AND_PRINT(DFS),
4841 eeprom_ch_info[ch].flags,
4842 eeprom_ch_info[ch].max_power_avg,
4843 ((eeprom_ch_info[ch].
4844 flags & EEPROM_CHANNEL_IBSS)
4845 && !(eeprom_ch_info[ch].
4846 flags & EEPROM_CHANNEL_RADAR))
4847 ? "" : "not ");
4848
4849 /* Set the user_txpower_limit to the highest power
4850 * supported by any channel */
4851 if (eeprom_ch_info[ch].max_power_avg >
4852 priv->user_txpower_limit)
4853 priv->user_txpower_limit =
4854 eeprom_ch_info[ch].max_power_avg;
4855
4856 ch_info++;
4857 }
4858 }
4859
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004860 /* Set up txpower settings in driver for all channels */
Zhu Yib481de92007-09-25 17:54:57 -07004861 if (iwl3945_txpower_set_from_eeprom(priv))
4862 return -EIO;
4863
4864 return 0;
4865}
4866
Reinette Chatre849e0dc2008-01-23 10:15:18 -08004867/*
4868 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4869 */
4870static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4871{
4872 kfree(priv->channel_info);
4873 priv->channel_count = 0;
4874}
4875
Zhu Yib481de92007-09-25 17:54:57 -07004876/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4877 * sending probe req. This should be set long enough to hear probe responses
4878 * from more than one AP. */
4879#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4880#define IWL_ACTIVE_DWELL_TIME_52 (10)
4881
4882/* For faster active scanning, scan will move to the next channel if fewer than
4883 * PLCP_QUIET_THRESH packets are heard on this channel within
4884 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4885 * time if it's a quiet channel (nothing responded to our probe, and there's
4886 * no other traffic).
4887 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4888#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4889#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4890
4891/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4892 * Must be set longer than active dwell time.
4893 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4894#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4895#define IWL_PASSIVE_DWELL_TIME_52 (10)
4896#define IWL_PASSIVE_DWELL_BASE (100)
4897#define IWL_CHANNEL_TUNE_TIME 5
4898
Johannes Berg8318d782008-01-24 19:38:38 +01004899static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4900 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07004901{
Johannes Berg8318d782008-01-24 19:38:38 +01004902 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07004903 return IWL_ACTIVE_DWELL_TIME_52;
4904 else
4905 return IWL_ACTIVE_DWELL_TIME_24;
4906}
4907
Johannes Berg8318d782008-01-24 19:38:38 +01004908static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4909 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07004910{
Johannes Berg8318d782008-01-24 19:38:38 +01004911 u16 active = iwl3945_get_active_dwell_time(priv, band);
4912 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07004913 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4914 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4915
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004916 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004917 /* If we're associated, we clamp the maximum passive
4918 * dwell time to be 98% of the beacon interval (minus
4919 * 2 * channel tune time) */
4920 passive = priv->beacon_int;
4921 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4922 passive = IWL_PASSIVE_DWELL_BASE;
4923 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4924 }
4925
4926 if (passive <= active)
4927 passive = active + 1;
4928
4929 return passive;
4930}
4931
Johannes Berg8318d782008-01-24 19:38:38 +01004932static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4933 enum ieee80211_band band,
Zhu Yib481de92007-09-25 17:54:57 -07004934 u8 is_active, u8 direct_mask,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004935 struct iwl3945_scan_channel *scan_ch)
Zhu Yib481de92007-09-25 17:54:57 -07004936{
4937 const struct ieee80211_channel *channels = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01004938 const struct ieee80211_supported_band *sband;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004939 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07004940 u16 passive_dwell = 0;
4941 u16 active_dwell = 0;
4942 int added, i;
4943
Johannes Berg8318d782008-01-24 19:38:38 +01004944 sband = iwl3945_get_band(priv, band);
4945 if (!sband)
Zhu Yib481de92007-09-25 17:54:57 -07004946 return 0;
4947
Johannes Berg8318d782008-01-24 19:38:38 +01004948 channels = sband->channels;
Zhu Yib481de92007-09-25 17:54:57 -07004949
Johannes Berg8318d782008-01-24 19:38:38 +01004950 active_dwell = iwl3945_get_active_dwell_time(priv, band);
4951 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
Zhu Yib481de92007-09-25 17:54:57 -07004952
Johannes Berg8318d782008-01-24 19:38:38 +01004953 for (i = 0, added = 0; i < sband->n_channels; i++) {
4954 if (channels[i].hw_value ==
Zhu Yib481de92007-09-25 17:54:57 -07004955 le16_to_cpu(priv->active_rxon.channel)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004956 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004957 IWL_DEBUG_SCAN
4958 ("Skipping current channel %d\n",
4959 le16_to_cpu(priv->active_rxon.channel));
4960 continue;
4961 }
4962 } else if (priv->only_active_channel)
4963 continue;
4964
Johannes Berg8318d782008-01-24 19:38:38 +01004965 scan_ch->channel = channels[i].hw_value;
Zhu Yib481de92007-09-25 17:54:57 -07004966
Johannes Berg8318d782008-01-24 19:38:38 +01004967 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
Zhu Yib481de92007-09-25 17:54:57 -07004968 if (!is_channel_valid(ch_info)) {
4969 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4970 scan_ch->channel);
4971 continue;
4972 }
4973
4974 if (!is_active || is_channel_passive(ch_info) ||
Johannes Berg8318d782008-01-24 19:38:38 +01004975 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
Zhu Yib481de92007-09-25 17:54:57 -07004976 scan_ch->type = 0; /* passive */
4977 else
4978 scan_ch->type = 1; /* active */
4979
4980 if (scan_ch->type & 1)
4981 scan_ch->type |= (direct_mask << 1);
4982
4983 if (is_channel_narrow(ch_info))
4984 scan_ch->type |= (1 << 7);
4985
4986 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4987 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4988
Ben Cahill9fbab512007-11-29 11:09:47 +08004989 /* Set txpower levels to defaults */
Zhu Yib481de92007-09-25 17:54:57 -07004990 scan_ch->tpc.dsp_atten = 110;
4991 /* scan_pwr_info->tpc.dsp_atten; */
4992
4993 /*scan_pwr_info->tpc.tx_gain; */
Johannes Berg8318d782008-01-24 19:38:38 +01004994 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07004995 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4996 else {
4997 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4998 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
Ben Cahill9fbab512007-11-29 11:09:47 +08004999 * power level:
Reinette Chatre8a1b0242008-01-14 17:46:25 -08005000 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
Zhu Yib481de92007-09-25 17:54:57 -07005001 */
5002 }
5003
5004 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5005 scan_ch->channel,
5006 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5007 (scan_ch->type & 1) ?
5008 active_dwell : passive_dwell);
5009
5010 scan_ch++;
5011 added++;
5012 }
5013
5014 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5015 return added;
5016}
5017
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005018static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005019 struct ieee80211_rate *rates)
5020{
5021 int i;
5022
5023 for (i = 0; i < IWL_RATE_COUNT; i++) {
Johannes Berg8318d782008-01-24 19:38:38 +01005024 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
5025 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5026 rates[i].hw_value_short = i;
5027 rates[i].flags = 0;
5028 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
Zhu Yib481de92007-09-25 17:54:57 -07005029 /*
Johannes Berg8318d782008-01-24 19:38:38 +01005030 * If CCK != 1M then set short preamble rate flag.
Zhu Yib481de92007-09-25 17:54:57 -07005031 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005032 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
Johannes Berg8318d782008-01-24 19:38:38 +01005033 0 : IEEE80211_RATE_SHORT_PREAMBLE;
Zhu Yib481de92007-09-25 17:54:57 -07005034 }
Zhu Yib481de92007-09-25 17:54:57 -07005035 }
5036}
5037
5038/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005039 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07005040 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005041static int iwl3945_init_geos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005042{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005043 struct iwl3945_channel_info *ch;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005044 struct ieee80211_supported_band *sband;
Zhu Yib481de92007-09-25 17:54:57 -07005045 struct ieee80211_channel *channels;
5046 struct ieee80211_channel *geo_ch;
5047 struct ieee80211_rate *rates;
5048 int i = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005049
Johannes Berg8318d782008-01-24 19:38:38 +01005050 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5051 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
Zhu Yib481de92007-09-25 17:54:57 -07005052 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5053 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5054 return 0;
5055 }
5056
Zhu Yib481de92007-09-25 17:54:57 -07005057 channels = kzalloc(sizeof(struct ieee80211_channel) *
5058 priv->channel_count, GFP_KERNEL);
Johannes Berg8318d782008-01-24 19:38:38 +01005059 if (!channels)
Zhu Yib481de92007-09-25 17:54:57 -07005060 return -ENOMEM;
Zhu Yib481de92007-09-25 17:54:57 -07005061
Tomas Winkler8211ef72008-03-02 01:36:04 +02005062 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
Zhu Yib481de92007-09-25 17:54:57 -07005063 GFP_KERNEL);
5064 if (!rates) {
Zhu Yib481de92007-09-25 17:54:57 -07005065 kfree(channels);
5066 return -ENOMEM;
5067 }
5068
Zhu Yib481de92007-09-25 17:54:57 -07005069 /* 5.2GHz channels start after the 2.4GHz channels */
Tomas Winkler8211ef72008-03-02 01:36:04 +02005070 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5071 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5072 /* just OFDM */
5073 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5074 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
Zhu Yib481de92007-09-25 17:54:57 -07005075
Tomas Winkler8211ef72008-03-02 01:36:04 +02005076 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5077 sband->channels = channels;
5078 /* OFDM & CCK */
5079 sband->bitrates = rates;
5080 sband->n_bitrates = IWL_RATE_COUNT;
Zhu Yib481de92007-09-25 17:54:57 -07005081
5082 priv->ieee_channels = channels;
5083 priv->ieee_rates = rates;
5084
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005085 iwl3945_init_hw_rates(priv, rates);
Zhu Yib481de92007-09-25 17:54:57 -07005086
Tomas Winkler8211ef72008-03-02 01:36:04 +02005087 for (i = 0; i < priv->channel_count; i++) {
Zhu Yib481de92007-09-25 17:54:57 -07005088 ch = &priv->channel_info[i];
5089
Tomas Winkler8211ef72008-03-02 01:36:04 +02005090 /* FIXME: might be removed if scan is OK*/
5091 if (!is_channel_valid(ch))
Zhu Yib481de92007-09-25 17:54:57 -07005092 continue;
Zhu Yib481de92007-09-25 17:54:57 -07005093
5094 if (is_channel_a_band(ch))
Tomas Winkler8211ef72008-03-02 01:36:04 +02005095 sband = &priv->bands[IEEE80211_BAND_5GHZ];
Johannes Berg8318d782008-01-24 19:38:38 +01005096 else
Tomas Winkler8211ef72008-03-02 01:36:04 +02005097 sband = &priv->bands[IEEE80211_BAND_2GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005098
Tomas Winkler8211ef72008-03-02 01:36:04 +02005099 geo_ch = &sband->channels[sband->n_channels++];
5100
5101 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
Johannes Berg8318d782008-01-24 19:38:38 +01005102 geo_ch->max_power = ch->max_power_avg;
5103 geo_ch->max_antenna_gain = 0xff;
Mohamed Abbas7b723042008-01-31 21:46:40 -08005104 geo_ch->hw_value = ch->channel;
Zhu Yib481de92007-09-25 17:54:57 -07005105
5106 if (is_channel_valid(ch)) {
Johannes Berg8318d782008-01-24 19:38:38 +01005107 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5108 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
Zhu Yib481de92007-09-25 17:54:57 -07005109
Johannes Berg8318d782008-01-24 19:38:38 +01005110 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5111 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07005112
5113 if (ch->flags & EEPROM_CHANNEL_RADAR)
Johannes Berg8318d782008-01-24 19:38:38 +01005114 geo_ch->flags |= IEEE80211_CHAN_RADAR;
Zhu Yib481de92007-09-25 17:54:57 -07005115
5116 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5117 priv->max_channel_txpower_limit =
5118 ch->max_power_avg;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005119 } else {
Johannes Berg8318d782008-01-24 19:38:38 +01005120 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005121 }
5122
5123 /* Save flags for reg domain usage */
5124 geo_ch->orig_flags = geo_ch->flags;
5125
5126 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5127 ch->channel, geo_ch->center_freq,
5128 is_channel_a_band(ch) ? "5.2" : "2.4",
5129 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5130 "restricted" : "valid",
5131 geo_ch->flags);
Zhu Yib481de92007-09-25 17:54:57 -07005132 }
5133
Tomas Winkler82b9a122008-03-04 18:09:30 -08005134 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5135 priv->cfg->sku & IWL_SKU_A) {
Zhu Yib481de92007-09-25 17:54:57 -07005136 printk(KERN_INFO DRV_NAME
5137 ": Incorrectly detected BG card as ABG. Please send "
5138 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5139 priv->pci_dev->device, priv->pci_dev->subsystem_device);
Tomas Winkler82b9a122008-03-04 18:09:30 -08005140 priv->cfg->sku &= ~IWL_SKU_A;
Zhu Yib481de92007-09-25 17:54:57 -07005141 }
5142
5143 printk(KERN_INFO DRV_NAME
5144 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
Johannes Berg8318d782008-01-24 19:38:38 +01005145 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5146 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
Zhu Yib481de92007-09-25 17:54:57 -07005147
John W. Linvillee0e0a672008-03-25 15:58:40 -04005148 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5149 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5150 &priv->bands[IEEE80211_BAND_2GHZ];
5151 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5152 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5153 &priv->bands[IEEE80211_BAND_5GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005154
Zhu Yib481de92007-09-25 17:54:57 -07005155 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5156
5157 return 0;
5158}
5159
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005160/*
5161 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5162 */
5163static void iwl3945_free_geos(struct iwl3945_priv *priv)
5164{
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005165 kfree(priv->ieee_channels);
5166 kfree(priv->ieee_rates);
5167 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5168}
5169
Zhu Yib481de92007-09-25 17:54:57 -07005170/******************************************************************************
5171 *
5172 * uCode download functions
5173 *
5174 ******************************************************************************/
5175
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005176static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005177{
Tomas Winkler98c92212008-01-14 17:46:20 -08005178 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5179 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5180 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5181 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5182 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5183 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
Zhu Yib481de92007-09-25 17:54:57 -07005184}
5185
5186/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005187 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005188 * looking at all data.
5189 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005190static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005191{
5192 u32 val;
5193 u32 save_len = len;
5194 int rc = 0;
5195 u32 errcnt;
5196
5197 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5198
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005199 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005200 if (rc)
5201 return rc;
5202
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005203 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -07005204
5205 errcnt = 0;
5206 for (; len > 0; len -= sizeof(u32), image++) {
5207 /* read data comes through single port, auto-incr addr */
5208 /* NOTE: Use the debugless read so we don't flood kernel log
5209 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005210 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005211 if (val != le32_to_cpu(*image)) {
5212 IWL_ERROR("uCode INST section is invalid at "
5213 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5214 save_len - len, val, le32_to_cpu(*image));
5215 rc = -EIO;
5216 errcnt++;
5217 if (errcnt >= 20)
5218 break;
5219 }
5220 }
5221
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005222 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005223
5224 if (!errcnt)
Ian Schrambc434dd2007-10-25 17:15:29 +08005225 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
Zhu Yib481de92007-09-25 17:54:57 -07005226
5227 return rc;
5228}
5229
5230
5231/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005232 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005233 * using sample data 100 bytes apart. If these sample points are good,
5234 * it's a pretty good bet that everything between them is good, too.
5235 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005236static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005237{
5238 u32 val;
5239 int rc = 0;
5240 u32 errcnt = 0;
5241 u32 i;
5242
5243 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5244
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005245 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005246 if (rc)
5247 return rc;
5248
5249 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5250 /* read data comes through single port, auto-incr addr */
5251 /* NOTE: Use the debugless read so we don't flood kernel log
5252 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005253 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
Zhu Yib481de92007-09-25 17:54:57 -07005254 i + RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005255 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005256 if (val != le32_to_cpu(*image)) {
5257#if 0 /* Enable this if you want to see details */
5258 IWL_ERROR("uCode INST section is invalid at "
5259 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5260 i, val, *image);
5261#endif
5262 rc = -EIO;
5263 errcnt++;
5264 if (errcnt >= 3)
5265 break;
5266 }
5267 }
5268
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005269 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005270
5271 return rc;
5272}
5273
5274
5275/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005276 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
Zhu Yib481de92007-09-25 17:54:57 -07005277 * and verify its contents
5278 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005279static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005280{
5281 __le32 *image;
5282 u32 len;
5283 int rc = 0;
5284
5285 /* Try bootstrap */
5286 image = (__le32 *)priv->ucode_boot.v_addr;
5287 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005288 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005289 if (rc == 0) {
5290 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5291 return 0;
5292 }
5293
5294 /* Try initialize */
5295 image = (__le32 *)priv->ucode_init.v_addr;
5296 len = priv->ucode_init.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005297 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005298 if (rc == 0) {
5299 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5300 return 0;
5301 }
5302
5303 /* Try runtime/protocol */
5304 image = (__le32 *)priv->ucode_code.v_addr;
5305 len = priv->ucode_code.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005306 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005307 if (rc == 0) {
5308 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5309 return 0;
5310 }
5311
5312 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5313
Ben Cahill9fbab512007-11-29 11:09:47 +08005314 /* Since nothing seems to match, show first several data entries in
5315 * instruction SRAM, so maybe visual inspection will give a clue.
5316 * Selection of bootstrap image (vs. other images) is arbitrary. */
Zhu Yib481de92007-09-25 17:54:57 -07005317 image = (__le32 *)priv->ucode_boot.v_addr;
5318 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005319 rc = iwl3945_verify_inst_full(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005320
5321 return rc;
5322}
5323
5324
5325/* check contents of special bootstrap uCode SRAM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005326static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005327{
5328 __le32 *image = priv->ucode_boot.v_addr;
5329 u32 len = priv->ucode_boot.len;
5330 u32 reg;
5331 u32 val;
5332
5333 IWL_DEBUG_INFO("Begin verify bsm\n");
5334
5335 /* verify BSM SRAM contents */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005336 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005337 for (reg = BSM_SRAM_LOWER_BOUND;
5338 reg < BSM_SRAM_LOWER_BOUND + len;
5339 reg += sizeof(u32), image ++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005340 val = iwl3945_read_prph(priv, reg);
Zhu Yib481de92007-09-25 17:54:57 -07005341 if (val != le32_to_cpu(*image)) {
5342 IWL_ERROR("BSM uCode verification failed at "
5343 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5344 BSM_SRAM_LOWER_BOUND,
5345 reg - BSM_SRAM_LOWER_BOUND, len,
5346 val, le32_to_cpu(*image));
5347 return -EIO;
5348 }
5349 }
5350
5351 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5352
5353 return 0;
5354}
5355
5356/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005357 * iwl3945_load_bsm - Load bootstrap instructions
Zhu Yib481de92007-09-25 17:54:57 -07005358 *
5359 * BSM operation:
5360 *
5361 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5362 * in special SRAM that does not power down during RFKILL. When powering back
5363 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5364 * the bootstrap program into the on-board processor, and starts it.
5365 *
5366 * The bootstrap program loads (via DMA) instructions and data for a new
5367 * program from host DRAM locations indicated by the host driver in the
5368 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5369 * automatically.
5370 *
5371 * When initializing the NIC, the host driver points the BSM to the
5372 * "initialize" uCode image. This uCode sets up some internal data, then
5373 * notifies host via "initialize alive" that it is complete.
5374 *
5375 * The host then replaces the BSM_DRAM_* pointer values to point to the
5376 * normal runtime uCode instructions and a backup uCode data cache buffer
5377 * (filled initially with starting data values for the on-board processor),
5378 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5379 * which begins normal operation.
5380 *
5381 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5382 * the backup data cache in DRAM before SRAM is powered down.
5383 *
5384 * When powering back up, the BSM loads the bootstrap program. This reloads
5385 * the runtime uCode instructions and the backup data cache into SRAM,
5386 * and re-launches the runtime uCode from where it left off.
5387 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005388static int iwl3945_load_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005389{
5390 __le32 *image = priv->ucode_boot.v_addr;
5391 u32 len = priv->ucode_boot.len;
5392 dma_addr_t pinst;
5393 dma_addr_t pdata;
5394 u32 inst_len;
5395 u32 data_len;
5396 int rc;
5397 int i;
5398 u32 done;
5399 u32 reg_offset;
5400
5401 IWL_DEBUG_INFO("Begin load bsm\n");
5402
5403 /* make sure bootstrap program is no larger than BSM's SRAM size */
5404 if (len > IWL_MAX_BSM_SIZE)
5405 return -EINVAL;
5406
5407 /* Tell bootstrap uCode where to find the "Initialize" uCode
Ben Cahill9fbab512007-11-29 11:09:47 +08005408 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005409 * NOTE: iwl3945_initialize_alive_start() will replace these values,
Zhu Yib481de92007-09-25 17:54:57 -07005410 * after the "initialize" uCode has run, to point to
5411 * runtime/protocol instructions and backup data cache. */
5412 pinst = priv->ucode_init.p_addr;
5413 pdata = priv->ucode_init_data.p_addr;
5414 inst_len = priv->ucode_init.len;
5415 data_len = priv->ucode_init_data.len;
5416
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005417 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005418 if (rc)
5419 return rc;
5420
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005421 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5422 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5423 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5424 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
Zhu Yib481de92007-09-25 17:54:57 -07005425
5426 /* Fill BSM memory with bootstrap instructions */
5427 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5428 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5429 reg_offset += sizeof(u32), image++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005430 _iwl3945_write_prph(priv, reg_offset,
Zhu Yib481de92007-09-25 17:54:57 -07005431 le32_to_cpu(*image));
5432
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005433 rc = iwl3945_verify_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005434 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005435 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005436 return rc;
5437 }
5438
5439 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005440 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5441 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005442 RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005443 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07005444
5445 /* Load bootstrap code into instruction SRAM now,
5446 * to prepare to load "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005447 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005448 BSM_WR_CTRL_REG_BIT_START);
5449
5450 /* Wait for load of bootstrap uCode to finish */
5451 for (i = 0; i < 100; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005452 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005453 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5454 break;
5455 udelay(10);
5456 }
5457 if (i < 100)
5458 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5459 else {
5460 IWL_ERROR("BSM write did not complete!\n");
5461 return -EIO;
5462 }
5463
5464 /* Enable future boot loads whenever power management unit triggers it
5465 * (e.g. when powering back up after power-save shutdown) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005466 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005467 BSM_WR_CTRL_REG_BIT_START_EN);
5468
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005469 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005470
5471 return 0;
5472}
5473
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005474static void iwl3945_nic_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005475{
5476 /* Remove all resets to allow NIC to operate */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005477 iwl3945_write32(priv, CSR_RESET, 0);
Zhu Yib481de92007-09-25 17:54:57 -07005478}
5479
5480/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005481 * iwl3945_read_ucode - Read uCode images from disk file.
Zhu Yib481de92007-09-25 17:54:57 -07005482 *
5483 * Copy into buffers for card to fetch via bus-mastering
5484 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005485static int iwl3945_read_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005486{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005487 struct iwl3945_ucode *ucode;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005488 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005489 const struct firmware *ucode_raw;
5490 /* firmware file name contains uCode/driver compatibility version */
Tomas Winkler4bf775c2008-03-04 18:09:31 -08005491 const char *name = priv->cfg->fw_name;
Zhu Yib481de92007-09-25 17:54:57 -07005492 u8 *src;
5493 size_t len;
5494 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5495
5496 /* Ask kernel firmware_class module to get the boot firmware off disk.
5497 * request_firmware() is synchronous, file is in memory on return. */
Tomas Winkler90e759d2007-11-29 11:09:41 +08005498 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5499 if (ret < 0) {
5500 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5501 name, ret);
Zhu Yib481de92007-09-25 17:54:57 -07005502 goto error;
5503 }
5504
5505 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5506 name, ucode_raw->size);
5507
5508 /* Make sure that we got at least our header! */
5509 if (ucode_raw->size < sizeof(*ucode)) {
5510 IWL_ERROR("File size way too small!\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005511 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005512 goto err_release;
5513 }
5514
5515 /* Data from ucode file: header followed by uCode images */
5516 ucode = (void *)ucode_raw->data;
5517
5518 ver = le32_to_cpu(ucode->ver);
5519 inst_size = le32_to_cpu(ucode->inst_size);
5520 data_size = le32_to_cpu(ucode->data_size);
5521 init_size = le32_to_cpu(ucode->init_size);
5522 init_data_size = le32_to_cpu(ucode->init_data_size);
5523 boot_size = le32_to_cpu(ucode->boot_size);
5524
5525 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
Ian Schrambc434dd2007-10-25 17:15:29 +08005526 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5527 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5528 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5529 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5530 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
Zhu Yib481de92007-09-25 17:54:57 -07005531
5532 /* Verify size of file vs. image size info in file's header */
5533 if (ucode_raw->size < sizeof(*ucode) +
5534 inst_size + data_size + init_size +
5535 init_data_size + boot_size) {
5536
5537 IWL_DEBUG_INFO("uCode file size %d too small\n",
5538 (int)ucode_raw->size);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005539 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005540 goto err_release;
5541 }
5542
5543 /* Verify that uCode images will fit in card's SRAM */
5544 if (inst_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005545 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5546 inst_size);
5547 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005548 goto err_release;
5549 }
5550
5551 if (data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005552 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5553 data_size);
5554 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005555 goto err_release;
5556 }
5557 if (init_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005558 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5559 init_size);
5560 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005561 goto err_release;
5562 }
5563 if (init_data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005564 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5565 init_data_size);
5566 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005567 goto err_release;
5568 }
5569 if (boot_size > IWL_MAX_BSM_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005570 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5571 boot_size);
5572 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005573 goto err_release;
5574 }
5575
5576 /* Allocate ucode buffers for card's bus-master loading ... */
5577
5578 /* Runtime instructions and 2 copies of data:
5579 * 1) unmodified from disk
5580 * 2) backup cache for save/restore during power-downs */
5581 priv->ucode_code.len = inst_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005582 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
Zhu Yib481de92007-09-25 17:54:57 -07005583
5584 priv->ucode_data.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005585 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
Zhu Yib481de92007-09-25 17:54:57 -07005586
5587 priv->ucode_data_backup.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005588 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
Zhu Yib481de92007-09-25 17:54:57 -07005589
5590 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
Tomas Winkler90e759d2007-11-29 11:09:41 +08005591 !priv->ucode_data_backup.v_addr)
Zhu Yib481de92007-09-25 17:54:57 -07005592 goto err_pci_alloc;
5593
Tomas Winkler90e759d2007-11-29 11:09:41 +08005594 /* Initialization instructions and data */
5595 if (init_size && init_data_size) {
5596 priv->ucode_init.len = init_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005597 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005598
5599 priv->ucode_init_data.len = init_data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005600 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005601
5602 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5603 goto err_pci_alloc;
5604 }
5605
5606 /* Bootstrap (instructions only, no data) */
5607 if (boot_size) {
5608 priv->ucode_boot.len = boot_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005609 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005610
5611 if (!priv->ucode_boot.v_addr)
5612 goto err_pci_alloc;
5613 }
5614
Zhu Yib481de92007-09-25 17:54:57 -07005615 /* Copy images into buffers for card's bus-master reads ... */
5616
5617 /* Runtime instructions (first block of data in file) */
5618 src = &ucode->data[0];
5619 len = priv->ucode_code.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005620 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005621 memcpy(priv->ucode_code.v_addr, src, len);
5622 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5623 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5624
5625 /* Runtime data (2nd block)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005626 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
Zhu Yib481de92007-09-25 17:54:57 -07005627 src = &ucode->data[inst_size];
5628 len = priv->ucode_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005629 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005630 memcpy(priv->ucode_data.v_addr, src, len);
5631 memcpy(priv->ucode_data_backup.v_addr, src, len);
5632
5633 /* Initialization instructions (3rd block) */
5634 if (init_size) {
5635 src = &ucode->data[inst_size + data_size];
5636 len = priv->ucode_init.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005637 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5638 len);
Zhu Yib481de92007-09-25 17:54:57 -07005639 memcpy(priv->ucode_init.v_addr, src, len);
5640 }
5641
5642 /* Initialization data (4th block) */
5643 if (init_data_size) {
5644 src = &ucode->data[inst_size + data_size + init_size];
5645 len = priv->ucode_init_data.len;
5646 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5647 (int)len);
5648 memcpy(priv->ucode_init_data.v_addr, src, len);
5649 }
5650
5651 /* Bootstrap instructions (5th block) */
5652 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5653 len = priv->ucode_boot.len;
5654 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5655 (int)len);
5656 memcpy(priv->ucode_boot.v_addr, src, len);
5657
5658 /* We have our copies now, allow OS release its copies */
5659 release_firmware(ucode_raw);
5660 return 0;
5661
5662 err_pci_alloc:
5663 IWL_ERROR("failed to allocate pci memory\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005664 ret = -ENOMEM;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005665 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005666
5667 err_release:
5668 release_firmware(ucode_raw);
5669
5670 error:
Tomas Winkler90e759d2007-11-29 11:09:41 +08005671 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07005672}
5673
5674
5675/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005676 * iwl3945_set_ucode_ptrs - Set uCode address location
Zhu Yib481de92007-09-25 17:54:57 -07005677 *
5678 * Tell initialization uCode where to find runtime uCode.
5679 *
5680 * BSM registers initially contain pointers to initialization uCode.
5681 * We need to replace them to load runtime uCode inst and data,
5682 * and to save runtime data when powering down.
5683 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005684static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005685{
5686 dma_addr_t pinst;
5687 dma_addr_t pdata;
5688 int rc = 0;
5689 unsigned long flags;
5690
5691 /* bits 31:0 for 3945 */
5692 pinst = priv->ucode_code.p_addr;
5693 pdata = priv->ucode_data_backup.p_addr;
5694
5695 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005696 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005697 if (rc) {
5698 spin_unlock_irqrestore(&priv->lock, flags);
5699 return rc;
5700 }
5701
5702 /* Tell bootstrap uCode where to find image to load */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005703 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5704 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5705 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005706 priv->ucode_data.len);
5707
5708 /* Inst bytecount must be last to set up, bit 31 signals uCode
5709 * that all new ptr/size info is in place */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005710 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005711 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5712
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005713 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005714
5715 spin_unlock_irqrestore(&priv->lock, flags);
5716
5717 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5718
5719 return rc;
5720}
5721
5722/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005723 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07005724 *
5725 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5726 *
Zhu Yib481de92007-09-25 17:54:57 -07005727 * Tell "initialize" uCode to go ahead and load the runtime uCode.
Ben Cahill9fbab512007-11-29 11:09:47 +08005728 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005729static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005730{
5731 /* Check alive response for "valid" sign from uCode */
5732 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5733 /* We had an error bringing up the hardware, so take it
5734 * all the way back down so we can try again */
5735 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5736 goto restart;
5737 }
5738
5739 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5740 * This is a paranoid check, because we would not have gotten the
5741 * "initialize" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005742 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005743 /* Runtime instruction load was bad;
5744 * take it all the way back down so we can try again */
5745 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5746 goto restart;
5747 }
5748
5749 /* Send pointers to protocol/runtime uCode image ... init code will
5750 * load and launch runtime uCode, which will send us another "Alive"
5751 * notification. */
5752 IWL_DEBUG_INFO("Initialization Alive received.\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005753 if (iwl3945_set_ucode_ptrs(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005754 /* Runtime instruction load won't happen;
5755 * take it all the way back down so we can try again */
5756 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5757 goto restart;
5758 }
5759 return;
5760
5761 restart:
5762 queue_work(priv->workqueue, &priv->restart);
5763}
5764
5765
5766/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005767 * iwl3945_alive_start - called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07005768 * from protocol/runtime uCode (initialization uCode's
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005769 * Alive gets handled by iwl3945_init_alive_start()).
Zhu Yib481de92007-09-25 17:54:57 -07005770 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005771static void iwl3945_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005772{
5773 int rc = 0;
5774 int thermal_spin = 0;
5775 u32 rfkill;
5776
5777 IWL_DEBUG_INFO("Runtime Alive received.\n");
5778
5779 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5780 /* We had an error bringing up the hardware, so take it
5781 * all the way back down so we can try again */
5782 IWL_DEBUG_INFO("Alive failed.\n");
5783 goto restart;
5784 }
5785
5786 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5787 * This is a paranoid check, because we would not have gotten the
5788 * "runtime" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005789 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005790 /* Runtime instruction load was bad;
5791 * take it all the way back down so we can try again */
5792 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5793 goto restart;
5794 }
5795
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005796 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005797
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005798 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005799 if (rc) {
5800 IWL_WARNING("Can not read rfkill status from adapter\n");
5801 return;
5802 }
5803
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005804 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005805 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005806 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005807
5808 if (rfkill & 0x1) {
5809 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5810 /* if rfkill is not on, then wait for thermal
5811 * sensor in adapter to kick in */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005812 while (iwl3945_hw_get_temperature(priv) == 0) {
Zhu Yib481de92007-09-25 17:54:57 -07005813 thermal_spin++;
5814 udelay(10);
5815 }
5816
5817 if (thermal_spin)
5818 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5819 thermal_spin * 10);
5820 } else
5821 set_bit(STATUS_RF_KILL_HW, &priv->status);
5822
Ben Cahill9fbab512007-11-29 11:09:47 +08005823 /* After the ALIVE response, we can send commands to 3945 uCode */
Zhu Yib481de92007-09-25 17:54:57 -07005824 set_bit(STATUS_ALIVE, &priv->status);
5825
5826 /* Clear out the uCode error bit if it is set */
5827 clear_bit(STATUS_FW_ERROR, &priv->status);
5828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005829 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07005830 return;
5831
Zhu Yi5a669262008-01-14 17:46:18 -08005832 ieee80211_start_queues(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07005833
5834 priv->active_rate = priv->rates_mask;
5835 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5836
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005837 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
Zhu Yib481de92007-09-25 17:54:57 -07005838
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005839 if (iwl3945_is_associated(priv)) {
5840 struct iwl3945_rxon_cmd *active_rxon =
5841 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07005842
5843 memcpy(&priv->staging_rxon, &priv->active_rxon,
5844 sizeof(priv->staging_rxon));
5845 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5846 } else {
5847 /* Initialize our rx_config data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005848 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005849 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5850 }
5851
Ben Cahill9fbab512007-11-29 11:09:47 +08005852 /* Configure Bluetooth device coexistence support */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005853 iwl3945_send_bt_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005854
5855 /* Configure the adapter for unassociated operation */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005856 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005857
5858 /* At this point, the NIC is initialized and operational */
5859 priv->notif_missed_beacons = 0;
5860 set_bit(STATUS_READY, &priv->status);
5861
5862 iwl3945_reg_txpower_periodic(priv);
5863
5864 IWL_DEBUG_INFO("ALIVE processing complete.\n");
Zhu Yi5a669262008-01-14 17:46:18 -08005865 wake_up_interruptible(&priv->wait_command_queue);
Zhu Yib481de92007-09-25 17:54:57 -07005866
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07005867 iwl3945_led_register(priv);
5868
Zhu Yib481de92007-09-25 17:54:57 -07005869 if (priv->error_recovering)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005870 iwl3945_error_recovery(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005871
5872 return;
5873
5874 restart:
5875 queue_work(priv->workqueue, &priv->restart);
5876}
5877
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005878static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
Zhu Yib481de92007-09-25 17:54:57 -07005879
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005880static void __iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005881{
5882 unsigned long flags;
5883 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5884 struct ieee80211_conf *conf = NULL;
5885
5886 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5887
5888 conf = ieee80211_get_hw_conf(priv->hw);
5889
5890 if (!exit_pending)
5891 set_bit(STATUS_EXIT_PENDING, &priv->status);
5892
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07005893 iwl3945_led_unregister(priv);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005894 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005895
5896 /* Unblock any waiting calls */
5897 wake_up_interruptible_all(&priv->wait_command_queue);
5898
Zhu Yib481de92007-09-25 17:54:57 -07005899 /* Wipe out the EXIT_PENDING status bit if we are not actually
5900 * exiting the module */
5901 if (!exit_pending)
5902 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5903
5904 /* stop and reset the on-board processor */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005905 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
Zhu Yib481de92007-09-25 17:54:57 -07005906
5907 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005908 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005909
5910 if (priv->mac80211_registered)
5911 ieee80211_stop_queues(priv->hw);
5912
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005913 /* If we have not previously called iwl3945_init() then
Zhu Yib481de92007-09-25 17:54:57 -07005914 * clear all bits but the RF Kill and SUSPEND bits and return */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005915 if (!iwl3945_is_init(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005916 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5917 STATUS_RF_KILL_HW |
5918 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5919 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08005920 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5921 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07005922 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5923 STATUS_IN_SUSPEND;
5924 goto exit;
5925 }
5926
5927 /* ...otherwise clear out all the status bits but the RF Kill and
5928 * SUSPEND bits and continue taking the NIC down. */
5929 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5930 STATUS_RF_KILL_HW |
5931 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5932 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08005933 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5934 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07005935 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5936 STATUS_IN_SUSPEND |
5937 test_bit(STATUS_FW_ERROR, &priv->status) <<
5938 STATUS_FW_ERROR;
5939
5940 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005941 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07005942 spin_unlock_irqrestore(&priv->lock, flags);
5943
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005944 iwl3945_hw_txq_ctx_stop(priv);
5945 iwl3945_hw_rxq_stop(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005946
5947 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005948 if (!iwl3945_grab_nic_access(priv)) {
5949 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005950 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005951 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005952 }
5953 spin_unlock_irqrestore(&priv->lock, flags);
5954
5955 udelay(5);
5956
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005957 iwl3945_hw_nic_stop_master(priv);
5958 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5959 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005960
5961 exit:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005962 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07005963
5964 if (priv->ibss_beacon)
5965 dev_kfree_skb(priv->ibss_beacon);
5966 priv->ibss_beacon = NULL;
5967
5968 /* clear out any free frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005969 iwl3945_clear_free_frames(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005970}
5971
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005972static void iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005973{
5974 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005975 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005976 mutex_unlock(&priv->mutex);
Zhu Yib24d22b2007-12-19 13:59:52 +08005977
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005978 iwl3945_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005979}
5980
5981#define MAX_HW_RESTARTS 5
5982
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005983static int __iwl3945_up(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005984{
5985 int rc, i;
5986
5987 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5988 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5989 return -EIO;
5990 }
5991
5992 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5993 IWL_WARNING("Radio disabled by SW RF kill (module "
5994 "parameter)\n");
Zhu Yie655b9f2008-01-24 02:19:38 -08005995 return -ENODEV;
5996 }
5997
Reinette Chatree903fbd2008-01-30 22:05:15 -08005998 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5999 IWL_ERROR("ucode not available for device bringup\n");
6000 return -EIO;
6001 }
6002
Zhu Yie655b9f2008-01-24 02:19:38 -08006003 /* If platform's RF_KILL switch is NOT set to KILL */
6004 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6005 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6006 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6007 else {
6008 set_bit(STATUS_RF_KILL_HW, &priv->status);
6009 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6010 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6011 return -ENODEV;
6012 }
Zhu Yib481de92007-09-25 17:54:57 -07006013 }
6014
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006015 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07006016
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006017 rc = iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006018 if (rc) {
6019 IWL_ERROR("Unable to int nic\n");
6020 return rc;
6021 }
6022
6023 /* make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006024 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6025 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07006026 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6027
6028 /* clear (again), then enable host interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006029 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6030 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006031
6032 /* really make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006033 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6034 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07006035
6036 /* Copy original ucode data image from disk into backup cache.
6037 * This will be used to initialize the on-board processor's
6038 * data SRAM for a clean start when the runtime program first loads. */
6039 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
Zhu Yi5a669262008-01-14 17:46:18 -08006040 priv->ucode_data.len);
Zhu Yib481de92007-09-25 17:54:57 -07006041
Zhu Yie655b9f2008-01-24 02:19:38 -08006042 /* We return success when we resume from suspend and rf_kill is on. */
6043 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6044 return 0;
6045
Zhu Yib481de92007-09-25 17:54:57 -07006046 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6047
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006048 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006049
6050 /* load bootstrap state machine,
6051 * load bootstrap program into processor's memory,
6052 * prepare to load the "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006053 rc = iwl3945_load_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006054
6055 if (rc) {
6056 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6057 continue;
6058 }
6059
6060 /* start card; "initialize" will load runtime ucode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006061 iwl3945_nic_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006062
Zhu Yib481de92007-09-25 17:54:57 -07006063 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6064
6065 return 0;
6066 }
6067
6068 set_bit(STATUS_EXIT_PENDING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006069 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006070
6071 /* tried to restart and config the device for as long as our
6072 * patience could withstand */
6073 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6074 return -EIO;
6075}
6076
6077
6078/*****************************************************************************
6079 *
6080 * Workqueue callbacks
6081 *
6082 *****************************************************************************/
6083
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006084static void iwl3945_bg_init_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006085{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006086 struct iwl3945_priv *priv =
6087 container_of(data, struct iwl3945_priv, init_alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006088
6089 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6090 return;
6091
6092 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006093 iwl3945_init_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006094 mutex_unlock(&priv->mutex);
6095}
6096
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006097static void iwl3945_bg_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006098{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006099 struct iwl3945_priv *priv =
6100 container_of(data, struct iwl3945_priv, alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006101
6102 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6103 return;
6104
6105 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006106 iwl3945_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006107 mutex_unlock(&priv->mutex);
6108}
6109
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006110static void iwl3945_bg_rf_kill(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006111{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006112 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
Zhu Yib481de92007-09-25 17:54:57 -07006113
6114 wake_up_interruptible(&priv->wait_command_queue);
6115
6116 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6117 return;
6118
6119 mutex_lock(&priv->mutex);
6120
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006121 if (!iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006122 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6123 "HW and/or SW RF Kill no longer active, restarting "
6124 "device\n");
6125 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6126 queue_work(priv->workqueue, &priv->restart);
6127 } else {
6128
6129 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6130 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6131 "disabled by SW switch\n");
6132 else
6133 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6134 "Kill switch must be turned off for "
6135 "wireless networking to work.\n");
6136 }
6137 mutex_unlock(&priv->mutex);
6138}
6139
6140#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6141
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006142static void iwl3945_bg_scan_check(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006143{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006144 struct iwl3945_priv *priv =
6145 container_of(data, struct iwl3945_priv, scan_check.work);
Zhu Yib481de92007-09-25 17:54:57 -07006146
6147 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6148 return;
6149
6150 mutex_lock(&priv->mutex);
6151 if (test_bit(STATUS_SCANNING, &priv->status) ||
6152 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6153 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6154 "Scan completion watchdog resetting adapter (%dms)\n",
6155 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006156
Zhu Yib481de92007-09-25 17:54:57 -07006157 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006158 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006159 }
6160 mutex_unlock(&priv->mutex);
6161}
6162
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006163static void iwl3945_bg_request_scan(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006164{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006165 struct iwl3945_priv *priv =
6166 container_of(data, struct iwl3945_priv, request_scan);
6167 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07006168 .id = REPLY_SCAN_CMD,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006169 .len = sizeof(struct iwl3945_scan_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07006170 .meta.flags = CMD_SIZE_HUGE,
6171 };
6172 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006173 struct iwl3945_scan_cmd *scan;
Zhu Yib481de92007-09-25 17:54:57 -07006174 struct ieee80211_conf *conf = NULL;
6175 u8 direct_mask;
Johannes Berg8318d782008-01-24 19:38:38 +01006176 enum ieee80211_band band;
Zhu Yib481de92007-09-25 17:54:57 -07006177
6178 conf = ieee80211_get_hw_conf(priv->hw);
6179
6180 mutex_lock(&priv->mutex);
6181
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006182 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006183 IWL_WARNING("request scan called when driver not ready.\n");
6184 goto done;
6185 }
6186
6187 /* Make sure the scan wasn't cancelled before this queued work
6188 * was given the chance to run... */
6189 if (!test_bit(STATUS_SCANNING, &priv->status))
6190 goto done;
6191
6192 /* This should never be called or scheduled if there is currently
6193 * a scan active in the hardware. */
6194 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6195 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6196 "Ignoring second request.\n");
6197 rc = -EIO;
6198 goto done;
6199 }
6200
6201 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6202 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6203 goto done;
6204 }
6205
6206 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6207 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6208 goto done;
6209 }
6210
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006211 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006212 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6213 goto done;
6214 }
6215
6216 if (!test_bit(STATUS_READY, &priv->status)) {
6217 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6218 goto done;
6219 }
6220
6221 if (!priv->scan_bands) {
6222 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6223 goto done;
6224 }
6225
6226 if (!priv->scan) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006227 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
Zhu Yib481de92007-09-25 17:54:57 -07006228 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6229 if (!priv->scan) {
6230 rc = -ENOMEM;
6231 goto done;
6232 }
6233 }
6234 scan = priv->scan;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006235 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
Zhu Yib481de92007-09-25 17:54:57 -07006236
6237 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6238 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6239
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006240 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006241 u16 interval = 0;
6242 u32 extra;
6243 u32 suspend_time = 100;
6244 u32 scan_suspend_time = 100;
6245 unsigned long flags;
6246
6247 IWL_DEBUG_INFO("Scanning while associated...\n");
6248
6249 spin_lock_irqsave(&priv->lock, flags);
6250 interval = priv->beacon_int;
6251 spin_unlock_irqrestore(&priv->lock, flags);
6252
6253 scan->suspend_time = 0;
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006254 scan->max_out_time = cpu_to_le32(200 * 1024);
Zhu Yib481de92007-09-25 17:54:57 -07006255 if (!interval)
6256 interval = suspend_time;
6257 /*
6258 * suspend time format:
6259 * 0-19: beacon interval in usec (time before exec.)
6260 * 20-23: 0
6261 * 24-31: number of beacons (suspend between channels)
6262 */
6263
6264 extra = (suspend_time / interval) << 24;
6265 scan_suspend_time = 0xFF0FFFFF &
6266 (extra | ((suspend_time % interval) * 1024));
6267
6268 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6269 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6270 scan_suspend_time, interval);
6271 }
6272
6273 /* We should add the ability for user to lock to PASSIVE ONLY */
6274 if (priv->one_direct_scan) {
6275 IWL_DEBUG_SCAN
6276 ("Kicking off one direct scan for '%s'\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006277 iwl3945_escape_essid(priv->direct_ssid,
Zhu Yib481de92007-09-25 17:54:57 -07006278 priv->direct_ssid_len));
6279 scan->direct_scan[0].id = WLAN_EID_SSID;
6280 scan->direct_scan[0].len = priv->direct_ssid_len;
6281 memcpy(scan->direct_scan[0].ssid,
6282 priv->direct_ssid, priv->direct_ssid_len);
6283 direct_mask = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006284 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
Zhu Yib481de92007-09-25 17:54:57 -07006285 scan->direct_scan[0].id = WLAN_EID_SSID;
6286 scan->direct_scan[0].len = priv->essid_len;
6287 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6288 direct_mask = 1;
6289 } else
6290 direct_mask = 0;
6291
6292 /* We don't build a direct scan probe request; the uCode will do
6293 * that based on the direct_mask added to each channel entry */
6294 scan->tx_cmd.len = cpu_to_le16(
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006295 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
Cyrill Gorcunov18904f52008-01-26 19:09:36 +03006296 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
Zhu Yib481de92007-09-25 17:54:57 -07006297 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6298 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6299 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6300
6301 /* flags + rate selection */
6302
6303 switch (priv->scan_bands) {
6304 case 2:
6305 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6306 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6307 scan->good_CRC_th = 0;
Johannes Berg8318d782008-01-24 19:38:38 +01006308 band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07006309 break;
6310
6311 case 1:
6312 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6313 scan->good_CRC_th = IWL_GOOD_CRC_TH;
Johannes Berg8318d782008-01-24 19:38:38 +01006314 band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07006315 break;
6316
6317 default:
6318 IWL_WARNING("Invalid scan band count\n");
6319 goto done;
6320 }
6321
6322 /* select Rx antennas */
6323 scan->flags |= iwl3945_get_antenna_flags(priv);
6324
6325 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6326 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6327
Reinette Chatre26c0f032008-03-11 16:17:15 -07006328 if (direct_mask) {
Zhu Yib481de92007-09-25 17:54:57 -07006329 IWL_DEBUG_SCAN
6330 ("Initiating direct scan for %s.\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006331 iwl3945_escape_essid(priv->essid, priv->essid_len));
Reinette Chatre26c0f032008-03-11 16:17:15 -07006332 scan->channel_count =
6333 iwl3945_get_channels_for_scan(
6334 priv, band, 1, /* active */
6335 direct_mask,
6336 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6337 } else {
Zhu Yib481de92007-09-25 17:54:57 -07006338 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
Reinette Chatre26c0f032008-03-11 16:17:15 -07006339 scan->channel_count =
6340 iwl3945_get_channels_for_scan(
6341 priv, band, 0, /* passive */
6342 direct_mask,
6343 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6344 }
Zhu Yib481de92007-09-25 17:54:57 -07006345
6346 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006347 scan->channel_count * sizeof(struct iwl3945_scan_channel);
Zhu Yib481de92007-09-25 17:54:57 -07006348 cmd.data = scan;
6349 scan->len = cpu_to_le16(cmd.len);
6350
6351 set_bit(STATUS_SCAN_HW, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006352 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07006353 if (rc)
6354 goto done;
6355
6356 queue_delayed_work(priv->workqueue, &priv->scan_check,
6357 IWL_SCAN_CHECK_WATCHDOG);
6358
6359 mutex_unlock(&priv->mutex);
6360 return;
6361
6362 done:
Ian Schram01ebd062007-10-25 17:15:22 +08006363 /* inform mac80211 scan aborted */
Zhu Yib481de92007-09-25 17:54:57 -07006364 queue_work(priv->workqueue, &priv->scan_completed);
6365 mutex_unlock(&priv->mutex);
6366}
6367
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006368static void iwl3945_bg_up(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006369{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006370 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
Zhu Yib481de92007-09-25 17:54:57 -07006371
6372 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6373 return;
6374
6375 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006376 __iwl3945_up(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006377 mutex_unlock(&priv->mutex);
6378}
6379
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006380static void iwl3945_bg_restart(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006381{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006382 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
Zhu Yib481de92007-09-25 17:54:57 -07006383
6384 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6385 return;
6386
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006387 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006388 queue_work(priv->workqueue, &priv->up);
6389}
6390
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006391static void iwl3945_bg_rx_replenish(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006392{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006393 struct iwl3945_priv *priv =
6394 container_of(data, struct iwl3945_priv, rx_replenish);
Zhu Yib481de92007-09-25 17:54:57 -07006395
6396 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6397 return;
6398
6399 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006400 iwl3945_rx_replenish(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006401 mutex_unlock(&priv->mutex);
6402}
6403
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006404#define IWL_DELAY_NEXT_SCAN (HZ*2)
6405
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006406static void iwl3945_bg_post_associate(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006407{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006408 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
Zhu Yib481de92007-09-25 17:54:57 -07006409 post_associate.work);
6410
6411 int rc = 0;
6412 struct ieee80211_conf *conf = NULL;
Joe Perches0795af52007-10-03 17:59:30 -07006413 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006414
6415 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6416 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6417 return;
6418 }
6419
6420
Joe Perches0795af52007-10-03 17:59:30 -07006421 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6422 priv->assoc_id,
6423 print_mac(mac, priv->active_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006424
6425 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6426 return;
6427
6428 mutex_lock(&priv->mutex);
6429
Johannes Berg32bfd352007-12-19 01:31:26 +01006430 if (!priv->vif || !priv->is_open) {
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006431 mutex_unlock(&priv->mutex);
6432 return;
6433 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006434 iwl3945_scan_cancel_timeout(priv, 200);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006435
Zhu Yib481de92007-09-25 17:54:57 -07006436 conf = ieee80211_get_hw_conf(priv->hw);
6437
6438 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006439 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006440
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006441 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6442 iwl3945_setup_rxon_timing(priv);
6443 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006444 sizeof(priv->rxon_timing), &priv->rxon_timing);
6445 if (rc)
6446 IWL_WARNING("REPLY_RXON_TIMING failed - "
6447 "Attempting to continue.\n");
6448
6449 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6450
6451 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6452
6453 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6454 priv->assoc_id, priv->beacon_int);
6455
6456 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6457 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6458 else
6459 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6460
6461 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6462 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6463 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6464 else
6465 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6466
6467 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6468 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6469
6470 }
6471
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006472 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006473
6474 switch (priv->iw_mode) {
6475 case IEEE80211_IF_TYPE_STA:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006476 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07006477 break;
6478
6479 case IEEE80211_IF_TYPE_IBSS:
6480
6481 /* clear out the station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006482 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006483
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006484 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6485 iwl3945_add_station(priv, priv->bssid, 0, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006486 iwl3945_sync_sta(priv, IWL_STA_ID,
Johannes Berg8318d782008-01-24 19:38:38 +01006487 (priv->band == IEEE80211_BAND_5GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07006488 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6489 CMD_ASYNC);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006490 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6491 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006492
6493 break;
6494
6495 default:
6496 IWL_ERROR("%s Should not be called in %d mode\n",
Ian Schrambc434dd2007-10-25 17:15:29 +08006497 __FUNCTION__, priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07006498 break;
6499 }
6500
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006501 iwl3945_sequence_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006502
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006503 iwl3945_activate_qos(priv, 0);
Ron Rindjunsky292ae172008-02-06 11:20:39 -08006504
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006505 /* we have just associated, don't start scan too early */
6506 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07006507 mutex_unlock(&priv->mutex);
6508}
6509
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006510static void iwl3945_bg_abort_scan(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006511{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006512 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
Zhu Yib481de92007-09-25 17:54:57 -07006513
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006514 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006515 return;
6516
6517 mutex_lock(&priv->mutex);
6518
6519 set_bit(STATUS_SCAN_ABORTING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006520 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006521
6522 mutex_unlock(&priv->mutex);
6523}
6524
Zhu Yi76bb77e2007-11-22 10:53:22 +08006525static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6526
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006527static void iwl3945_bg_scan_completed(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006528{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006529 struct iwl3945_priv *priv =
6530 container_of(work, struct iwl3945_priv, scan_completed);
Zhu Yib481de92007-09-25 17:54:57 -07006531
6532 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6533
6534 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6535 return;
6536
Zhu Yia0646472007-12-20 14:10:01 +08006537 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6538 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
Zhu Yi76bb77e2007-11-22 10:53:22 +08006539
Zhu Yib481de92007-09-25 17:54:57 -07006540 ieee80211_scan_completed(priv->hw);
6541
6542 /* Since setting the TXPOWER may have been deferred while
6543 * performing the scan, fire one off */
6544 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006545 iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006546 mutex_unlock(&priv->mutex);
6547}
6548
6549/*****************************************************************************
6550 *
6551 * mac80211 entry point functions
6552 *
6553 *****************************************************************************/
6554
Zhu Yi5a669262008-01-14 17:46:18 -08006555#define UCODE_READY_TIMEOUT (2 * HZ)
6556
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006557static int iwl3945_mac_start(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006558{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006559 struct iwl3945_priv *priv = hw->priv;
Zhu Yi5a669262008-01-14 17:46:18 -08006560 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07006561
6562 IWL_DEBUG_MAC80211("enter\n");
6563
Zhu Yi5a669262008-01-14 17:46:18 -08006564 if (pci_enable_device(priv->pci_dev)) {
6565 IWL_ERROR("Fail to pci_enable_device\n");
6566 return -ENODEV;
6567 }
6568 pci_restore_state(priv->pci_dev);
6569 pci_enable_msi(priv->pci_dev);
6570
6571 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6572 DRV_NAME, priv);
6573 if (ret) {
6574 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6575 goto out_disable_msi;
6576 }
6577
Zhu Yib481de92007-09-25 17:54:57 -07006578 /* we should be verifying the device is ready to be opened */
6579 mutex_lock(&priv->mutex);
6580
Zhu Yi5a669262008-01-14 17:46:18 -08006581 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6582 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6583 * ucode filename and max sizes are card-specific. */
6584
6585 if (!priv->ucode_code.len) {
6586 ret = iwl3945_read_ucode(priv);
6587 if (ret) {
6588 IWL_ERROR("Could not read microcode: %d\n", ret);
6589 mutex_unlock(&priv->mutex);
6590 goto out_release_irq;
6591 }
6592 }
6593
Zhu Yie655b9f2008-01-24 02:19:38 -08006594 ret = __iwl3945_up(priv);
Zhu Yi5a669262008-01-14 17:46:18 -08006595
Zhu Yib481de92007-09-25 17:54:57 -07006596 mutex_unlock(&priv->mutex);
Zhu Yi5a669262008-01-14 17:46:18 -08006597
Zhu Yie655b9f2008-01-24 02:19:38 -08006598 if (ret)
6599 goto out_release_irq;
6600
6601 IWL_DEBUG_INFO("Start UP work.\n");
6602
6603 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6604 return 0;
6605
Zhu Yi5a669262008-01-14 17:46:18 -08006606 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6607 * mac80211 will not be run successfully. */
6608 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6609 test_bit(STATUS_READY, &priv->status),
6610 UCODE_READY_TIMEOUT);
6611 if (!ret) {
6612 if (!test_bit(STATUS_READY, &priv->status)) {
6613 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6614 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6615 ret = -ETIMEDOUT;
6616 goto out_release_irq;
6617 }
6618 }
6619
Zhu Yie655b9f2008-01-24 02:19:38 -08006620 priv->is_open = 1;
Zhu Yib481de92007-09-25 17:54:57 -07006621 IWL_DEBUG_MAC80211("leave\n");
6622 return 0;
Zhu Yi5a669262008-01-14 17:46:18 -08006623
6624out_release_irq:
6625 free_irq(priv->pci_dev->irq, priv);
6626out_disable_msi:
6627 pci_disable_msi(priv->pci_dev);
Zhu Yie655b9f2008-01-24 02:19:38 -08006628 pci_disable_device(priv->pci_dev);
6629 priv->is_open = 0;
6630 IWL_DEBUG_MAC80211("leave - failed\n");
Zhu Yi5a669262008-01-14 17:46:18 -08006631 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006632}
6633
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006634static void iwl3945_mac_stop(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006635{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006636 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006637
6638 IWL_DEBUG_MAC80211("enter\n");
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006639
Zhu Yie655b9f2008-01-24 02:19:38 -08006640 if (!priv->is_open) {
6641 IWL_DEBUG_MAC80211("leave - skip\n");
6642 return;
6643 }
6644
Zhu Yib481de92007-09-25 17:54:57 -07006645 priv->is_open = 0;
Zhu Yi5a669262008-01-14 17:46:18 -08006646
6647 if (iwl3945_is_ready_rf(priv)) {
Zhu Yie655b9f2008-01-24 02:19:38 -08006648 /* stop mac, cancel any scan request and clear
6649 * RXON_FILTER_ASSOC_MSK BIT
6650 */
Zhu Yi5a669262008-01-14 17:46:18 -08006651 mutex_lock(&priv->mutex);
6652 iwl3945_scan_cancel_timeout(priv, 100);
6653 cancel_delayed_work(&priv->post_associate);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006654 mutex_unlock(&priv->mutex);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006655 }
6656
Zhu Yi5a669262008-01-14 17:46:18 -08006657 iwl3945_down(priv);
6658
6659 flush_workqueue(priv->workqueue);
6660 free_irq(priv->pci_dev->irq, priv);
6661 pci_disable_msi(priv->pci_dev);
6662 pci_save_state(priv->pci_dev);
6663 pci_disable_device(priv->pci_dev);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006664
Zhu Yib481de92007-09-25 17:54:57 -07006665 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006666}
6667
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006668static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07006669 struct ieee80211_tx_control *ctl)
6670{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006671 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006672
6673 IWL_DEBUG_MAC80211("enter\n");
6674
6675 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6676 IWL_DEBUG_MAC80211("leave - monitor\n");
6677 return -1;
6678 }
6679
6680 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
Johannes Berg8318d782008-01-24 19:38:38 +01006681 ctl->tx_rate->bitrate);
Zhu Yib481de92007-09-25 17:54:57 -07006682
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006683 if (iwl3945_tx_skb(priv, skb, ctl))
Zhu Yib481de92007-09-25 17:54:57 -07006684 dev_kfree_skb_any(skb);
6685
6686 IWL_DEBUG_MAC80211("leave\n");
6687 return 0;
6688}
6689
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006690static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07006691 struct ieee80211_if_init_conf *conf)
6692{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006693 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006694 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07006695 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006696
Johannes Berg32bfd352007-12-19 01:31:26 +01006697 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006698
Johannes Berg32bfd352007-12-19 01:31:26 +01006699 if (priv->vif) {
6700 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
Tomas Winkler864792e2007-11-27 21:00:52 +02006701 return -EOPNOTSUPP;
Zhu Yib481de92007-09-25 17:54:57 -07006702 }
6703
6704 spin_lock_irqsave(&priv->lock, flags);
Johannes Berg32bfd352007-12-19 01:31:26 +01006705 priv->vif = conf->vif;
Zhu Yib481de92007-09-25 17:54:57 -07006706
6707 spin_unlock_irqrestore(&priv->lock, flags);
6708
6709 mutex_lock(&priv->mutex);
Tomas Winkler864792e2007-11-27 21:00:52 +02006710
6711 if (conf->mac_addr) {
6712 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
6713 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6714 }
6715
Zhu Yi5a669262008-01-14 17:46:18 -08006716 if (iwl3945_is_ready(priv))
6717 iwl3945_set_mode(priv, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006718
Zhu Yib481de92007-09-25 17:54:57 -07006719 mutex_unlock(&priv->mutex);
6720
Zhu Yi5a669262008-01-14 17:46:18 -08006721 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006722 return 0;
6723}
6724
6725/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006726 * iwl3945_mac_config - mac80211 config callback
Zhu Yib481de92007-09-25 17:54:57 -07006727 *
6728 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6729 * be set inappropriately and the driver currently sets the hardware up to
6730 * use it whenever needed.
6731 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006732static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07006733{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006734 struct iwl3945_priv *priv = hw->priv;
6735 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07006736 unsigned long flags;
Zhu Yi76bb77e2007-11-22 10:53:22 +08006737 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07006738
6739 mutex_lock(&priv->mutex);
Johannes Berg8318d782008-01-24 19:38:38 +01006740 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006741
Zhu Yi12342c42007-12-20 11:27:32 +08006742 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6743
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006744 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006745 IWL_DEBUG_MAC80211("leave - not ready\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006746 ret = -EIO;
6747 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006748 }
6749
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006750 if (unlikely(!iwl3945_param_disable_hw_scan &&
Zhu Yib481de92007-09-25 17:54:57 -07006751 test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yia0646472007-12-20 14:10:01 +08006752 IWL_DEBUG_MAC80211("leave - scanning\n");
6753 set_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07006754 mutex_unlock(&priv->mutex);
Zhu Yia0646472007-12-20 14:10:01 +08006755 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07006756 }
6757
6758 spin_lock_irqsave(&priv->lock, flags);
6759
Johannes Berg8318d782008-01-24 19:38:38 +01006760 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6761 conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006762 if (!is_channel_valid(ch_info)) {
6763 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
Johannes Berg8318d782008-01-24 19:38:38 +01006764 conf->channel->hw_value, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07006765 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6766 spin_unlock_irqrestore(&priv->lock, flags);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006767 ret = -EINVAL;
6768 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006769 }
6770
Johannes Berg8318d782008-01-24 19:38:38 +01006771 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006772
Johannes Berg8318d782008-01-24 19:38:38 +01006773 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07006774
6775 /* The list of supported rates and rate mask can be different
6776 * for each phymode; since the phymode may have changed, reset
6777 * the rate mask to what mac80211 lists */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006778 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006779
6780 spin_unlock_irqrestore(&priv->lock, flags);
6781
6782#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6783 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006784 iwl3945_hw_channel_switch(priv, conf->channel);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006785 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006786 }
6787#endif
6788
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006789 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
Zhu Yib481de92007-09-25 17:54:57 -07006790
6791 if (!conf->radio_enabled) {
6792 IWL_DEBUG_MAC80211("leave - radio disabled\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006793 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006794 }
6795
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006796 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006797 IWL_DEBUG_MAC80211("leave - RF kill\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006798 ret = -EIO;
6799 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006800 }
6801
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006802 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006803
6804 if (memcmp(&priv->active_rxon,
6805 &priv->staging_rxon, sizeof(priv->staging_rxon)))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006806 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006807 else
6808 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6809
6810 IWL_DEBUG_MAC80211("leave\n");
6811
Zhu Yi76bb77e2007-11-22 10:53:22 +08006812out:
Zhu Yia0646472007-12-20 14:10:01 +08006813 clear_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07006814 mutex_unlock(&priv->mutex);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006815 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006816}
6817
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006818static void iwl3945_config_ap(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006819{
6820 int rc = 0;
6821
Maarten Lankhorstd986bcd2008-01-23 10:15:16 -08006822 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
Zhu Yib481de92007-09-25 17:54:57 -07006823 return;
6824
6825 /* The following should be done only at AP bring up */
6826 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6827
6828 /* RXON - unassoc (to set timing command) */
6829 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006830 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006831
6832 /* RXON Timing */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006833 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6834 iwl3945_setup_rxon_timing(priv);
6835 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006836 sizeof(priv->rxon_timing), &priv->rxon_timing);
6837 if (rc)
6838 IWL_WARNING("REPLY_RXON_TIMING failed - "
6839 "Attempting to continue.\n");
6840
6841 /* FIXME: what should be the assoc_id for AP? */
6842 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6843 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6844 priv->staging_rxon.flags |=
6845 RXON_FLG_SHORT_PREAMBLE_MSK;
6846 else
6847 priv->staging_rxon.flags &=
6848 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6849
6850 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6851 if (priv->assoc_capability &
6852 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6853 priv->staging_rxon.flags |=
6854 RXON_FLG_SHORT_SLOT_MSK;
6855 else
6856 priv->staging_rxon.flags &=
6857 ~RXON_FLG_SHORT_SLOT_MSK;
6858
6859 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6860 priv->staging_rxon.flags &=
6861 ~RXON_FLG_SHORT_SLOT_MSK;
6862 }
6863 /* restore RXON assoc */
6864 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006865 iwl3945_commit_rxon(priv);
6866 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
Zhu Yi556f8db2007-09-27 11:27:33 +08006867 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006868 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006869
6870 /* FIXME - we need to add code here to detect a totally new
6871 * configuration, reset the AP, unassoc, rxon timing, assoc,
6872 * clear sta table, add BCAST sta... */
6873}
6874
Johannes Berg32bfd352007-12-19 01:31:26 +01006875static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6876 struct ieee80211_vif *vif,
Zhu Yib481de92007-09-25 17:54:57 -07006877 struct ieee80211_if_conf *conf)
6878{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006879 struct iwl3945_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07006880 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006881 unsigned long flags;
6882 int rc;
6883
6884 if (conf == NULL)
6885 return -EIO;
6886
Emmanuel Grumbachb716bb92008-03-04 18:09:32 -08006887 if (priv->vif != vif) {
6888 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6889 mutex_unlock(&priv->mutex);
6890 return 0;
6891 }
6892
Johannes Berg4150c572007-09-17 01:29:23 -04006893 /* XXX: this MUST use conf->mac_addr */
6894
Zhu Yib481de92007-09-25 17:54:57 -07006895 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6896 (!conf->beacon || !conf->ssid_len)) {
6897 IWL_DEBUG_MAC80211
6898 ("Leaving in AP mode because HostAPD is not ready.\n");
6899 return 0;
6900 }
6901
Zhu Yi5a669262008-01-14 17:46:18 -08006902 if (!iwl3945_is_alive(priv))
6903 return -EAGAIN;
6904
Zhu Yib481de92007-09-25 17:54:57 -07006905 mutex_lock(&priv->mutex);
6906
Zhu Yib481de92007-09-25 17:54:57 -07006907 if (conf->bssid)
Joe Perches0795af52007-10-03 17:59:30 -07006908 IWL_DEBUG_MAC80211("bssid: %s\n",
6909 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07006910
Johannes Berg4150c572007-09-17 01:29:23 -04006911/*
6912 * very dubious code was here; the probe filtering flag is never set:
6913 *
Zhu Yib481de92007-09-25 17:54:57 -07006914 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6915 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
Johannes Berg4150c572007-09-17 01:29:23 -04006916 */
Zhu Yib481de92007-09-25 17:54:57 -07006917
6918 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6919 if (!conf->bssid) {
6920 conf->bssid = priv->mac_addr;
6921 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
Joe Perches0795af52007-10-03 17:59:30 -07006922 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6923 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07006924 }
6925 if (priv->ibss_beacon)
6926 dev_kfree_skb(priv->ibss_beacon);
6927
6928 priv->ibss_beacon = conf->beacon;
6929 }
6930
Mohamed Abbasfde35712007-11-29 11:10:15 +08006931 if (iwl3945_is_rfkill(priv))
6932 goto done;
6933
Zhu Yib481de92007-09-25 17:54:57 -07006934 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6935 !is_multicast_ether_addr(conf->bssid)) {
6936 /* If there is currently a HW scan going on in the background
6937 * then we need to cancel it else the RXON below will fail. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006938 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07006939 IWL_WARNING("Aborted scan still in progress "
6940 "after 100ms\n");
6941 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6942 mutex_unlock(&priv->mutex);
6943 return -EAGAIN;
6944 }
6945 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6946
6947 /* TODO: Audit driver for usage of these members and see
6948 * if mac80211 deprecates them (priv->bssid looks like it
6949 * shouldn't be there, but I haven't scanned the IBSS code
6950 * to verify) - jpk */
6951 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6952
6953 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006954 iwl3945_config_ap(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006955 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006956 rc = iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006957 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006958 iwl3945_add_station(priv,
Zhu Yi556f8db2007-09-27 11:27:33 +08006959 priv->active_rxon.bssid_addr, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006960 }
6961
6962 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006963 iwl3945_scan_cancel_timeout(priv, 100);
Zhu Yib481de92007-09-25 17:54:57 -07006964 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006965 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006966 }
6967
Mohamed Abbasfde35712007-11-29 11:10:15 +08006968 done:
Zhu Yib481de92007-09-25 17:54:57 -07006969 spin_lock_irqsave(&priv->lock, flags);
6970 if (!conf->ssid_len)
6971 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6972 else
6973 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6974
6975 priv->essid_len = conf->ssid_len;
6976 spin_unlock_irqrestore(&priv->lock, flags);
6977
6978 IWL_DEBUG_MAC80211("leave\n");
6979 mutex_unlock(&priv->mutex);
6980
6981 return 0;
6982}
6983
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006984static void iwl3945_configure_filter(struct ieee80211_hw *hw,
Johannes Berg4150c572007-09-17 01:29:23 -04006985 unsigned int changed_flags,
6986 unsigned int *total_flags,
6987 int mc_count, struct dev_addr_list *mc_list)
6988{
6989 /*
6990 * XXX: dummy
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006991 * see also iwl3945_connection_init_rx_config
Johannes Berg4150c572007-09-17 01:29:23 -04006992 */
6993 *total_flags = 0;
6994}
6995
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006996static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07006997 struct ieee80211_if_init_conf *conf)
6998{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006999 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007000
7001 IWL_DEBUG_MAC80211("enter\n");
7002
7003 mutex_lock(&priv->mutex);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007004
Mohamed Abbasfde35712007-11-29 11:10:15 +08007005 if (iwl3945_is_ready_rf(priv)) {
7006 iwl3945_scan_cancel_timeout(priv, 100);
7007 cancel_delayed_work(&priv->post_associate);
7008 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7009 iwl3945_commit_rxon(priv);
7010 }
Johannes Berg32bfd352007-12-19 01:31:26 +01007011 if (priv->vif == conf->vif) {
7012 priv->vif = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007013 memset(priv->bssid, 0, ETH_ALEN);
7014 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7015 priv->essid_len = 0;
7016 }
7017 mutex_unlock(&priv->mutex);
7018
7019 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007020}
7021
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007022static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
Zhu Yib481de92007-09-25 17:54:57 -07007023{
7024 int rc = 0;
7025 unsigned long flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007026 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007027
7028 IWL_DEBUG_MAC80211("enter\n");
7029
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007030 mutex_lock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007031 spin_lock_irqsave(&priv->lock, flags);
7032
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007033 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007034 rc = -EIO;
7035 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7036 goto out_unlock;
7037 }
7038
7039 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7040 rc = -EIO;
7041 IWL_ERROR("ERROR: APs don't scan\n");
7042 goto out_unlock;
7043 }
7044
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007045 /* we don't schedule scan within next_scan_jiffies period */
7046 if (priv->next_scan_jiffies &&
7047 time_after(priv->next_scan_jiffies, jiffies)) {
7048 rc = -EAGAIN;
7049 goto out_unlock;
7050 }
Zhu Yib481de92007-09-25 17:54:57 -07007051 /* if we just finished scan ask for delay */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007052 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7053 IWL_DELAY_NEXT_SCAN, jiffies)) {
Zhu Yib481de92007-09-25 17:54:57 -07007054 rc = -EAGAIN;
7055 goto out_unlock;
7056 }
7057 if (len) {
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007058 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007059 iwl3945_escape_essid(ssid, len), (int)len);
Zhu Yib481de92007-09-25 17:54:57 -07007060
7061 priv->one_direct_scan = 1;
7062 priv->direct_ssid_len = (u8)
7063 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7064 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007065 } else
7066 priv->one_direct_scan = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007067
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007068 rc = iwl3945_scan_initiate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007069
7070 IWL_DEBUG_MAC80211("leave\n");
7071
7072out_unlock:
7073 spin_unlock_irqrestore(&priv->lock, flags);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007074 mutex_unlock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007075
7076 return rc;
7077}
7078
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007079static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Zhu Yib481de92007-09-25 17:54:57 -07007080 const u8 *local_addr, const u8 *addr,
7081 struct ieee80211_key_conf *key)
7082{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007083 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007084 int rc = 0;
7085 u8 sta_id;
7086
7087 IWL_DEBUG_MAC80211("enter\n");
7088
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007089 if (!iwl3945_param_hwcrypto) {
Zhu Yib481de92007-09-25 17:54:57 -07007090 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7091 return -EOPNOTSUPP;
7092 }
7093
7094 if (is_zero_ether_addr(addr))
7095 /* only support pairwise keys */
7096 return -EOPNOTSUPP;
7097
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007098 sta_id = iwl3945_hw_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07007099 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07007100 DECLARE_MAC_BUF(mac);
7101
7102 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7103 print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -07007104 return -EINVAL;
7105 }
7106
7107 mutex_lock(&priv->mutex);
7108
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007109 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007110
Zhu Yib481de92007-09-25 17:54:57 -07007111 switch (cmd) {
7112 case SET_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007113 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007114 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007115 iwl3945_set_rxon_hwcrypto(priv, 1);
7116 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007117 key->hw_key_idx = sta_id;
7118 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7119 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7120 }
7121 break;
7122 case DISABLE_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007123 rc = iwl3945_clear_sta_key_info(priv, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007124 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007125 iwl3945_set_rxon_hwcrypto(priv, 0);
7126 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007127 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7128 }
7129 break;
7130 default:
7131 rc = -EINVAL;
7132 }
7133
7134 IWL_DEBUG_MAC80211("leave\n");
7135 mutex_unlock(&priv->mutex);
7136
7137 return rc;
7138}
7139
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007140static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
Zhu Yib481de92007-09-25 17:54:57 -07007141 const struct ieee80211_tx_queue_params *params)
7142{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007143 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007144 unsigned long flags;
7145 int q;
Zhu Yib481de92007-09-25 17:54:57 -07007146
7147 IWL_DEBUG_MAC80211("enter\n");
7148
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007149 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007150 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7151 return -EIO;
7152 }
7153
7154 if (queue >= AC_NUM) {
7155 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7156 return 0;
7157 }
7158
Zhu Yib481de92007-09-25 17:54:57 -07007159 if (!priv->qos_data.qos_enable) {
7160 priv->qos_data.qos_active = 0;
7161 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7162 return 0;
7163 }
7164 q = AC_NUM - 1 - queue;
7165
7166 spin_lock_irqsave(&priv->lock, flags);
7167
7168 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7169 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7170 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7171 priv->qos_data.def_qos_parm.ac[q].edca_txop =
Johannes Berg3330d7be2008-02-10 16:49:38 +01007172 cpu_to_le16((params->txop * 32));
Zhu Yib481de92007-09-25 17:54:57 -07007173
7174 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7175 priv->qos_data.qos_active = 1;
7176
7177 spin_unlock_irqrestore(&priv->lock, flags);
7178
7179 mutex_lock(&priv->mutex);
7180 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007181 iwl3945_activate_qos(priv, 1);
7182 else if (priv->assoc_id && iwl3945_is_associated(priv))
7183 iwl3945_activate_qos(priv, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007184
7185 mutex_unlock(&priv->mutex);
7186
Zhu Yib481de92007-09-25 17:54:57 -07007187 IWL_DEBUG_MAC80211("leave\n");
7188 return 0;
7189}
7190
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007191static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007192 struct ieee80211_tx_queue_stats *stats)
7193{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007194 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007195 int i, avail;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007196 struct iwl3945_tx_queue *txq;
7197 struct iwl3945_queue *q;
Zhu Yib481de92007-09-25 17:54:57 -07007198 unsigned long flags;
7199
7200 IWL_DEBUG_MAC80211("enter\n");
7201
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007202 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007203 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7204 return -EIO;
7205 }
7206
7207 spin_lock_irqsave(&priv->lock, flags);
7208
7209 for (i = 0; i < AC_NUM; i++) {
7210 txq = &priv->txq[i];
7211 q = &txq->q;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007212 avail = iwl3945_queue_space(q);
Zhu Yib481de92007-09-25 17:54:57 -07007213
7214 stats->data[i].len = q->n_window - avail;
7215 stats->data[i].limit = q->n_window - q->high_mark;
7216 stats->data[i].count = q->n_window;
7217
7218 }
7219 spin_unlock_irqrestore(&priv->lock, flags);
7220
7221 IWL_DEBUG_MAC80211("leave\n");
7222
7223 return 0;
7224}
7225
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007226static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007227 struct ieee80211_low_level_stats *stats)
7228{
7229 IWL_DEBUG_MAC80211("enter\n");
7230 IWL_DEBUG_MAC80211("leave\n");
7231
7232 return 0;
7233}
7234
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007235static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007236{
7237 IWL_DEBUG_MAC80211("enter\n");
7238 IWL_DEBUG_MAC80211("leave\n");
7239
7240 return 0;
7241}
7242
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007243static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007244{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007245 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007246 unsigned long flags;
7247
7248 mutex_lock(&priv->mutex);
7249 IWL_DEBUG_MAC80211("enter\n");
7250
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007251 iwl3945_reset_qos(priv);
Ron Rindjunsky292ae172008-02-06 11:20:39 -08007252
Zhu Yib481de92007-09-25 17:54:57 -07007253 cancel_delayed_work(&priv->post_associate);
7254
7255 spin_lock_irqsave(&priv->lock, flags);
7256 priv->assoc_id = 0;
7257 priv->assoc_capability = 0;
7258 priv->call_post_assoc_from_beacon = 0;
7259
7260 /* new association get rid of ibss beacon skb */
7261 if (priv->ibss_beacon)
7262 dev_kfree_skb(priv->ibss_beacon);
7263
7264 priv->ibss_beacon = NULL;
7265
7266 priv->beacon_int = priv->hw->conf.beacon_int;
7267 priv->timestamp1 = 0;
7268 priv->timestamp0 = 0;
7269 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7270 priv->beacon_int = 0;
7271
7272 spin_unlock_irqrestore(&priv->lock, flags);
7273
Mohamed Abbasfde35712007-11-29 11:10:15 +08007274 if (!iwl3945_is_ready_rf(priv)) {
7275 IWL_DEBUG_MAC80211("leave - not ready\n");
7276 mutex_unlock(&priv->mutex);
7277 return;
7278 }
7279
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007280 /* we are restarting association process
7281 * clear RXON_FILTER_ASSOC_MSK bit
7282 */
7283 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007284 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007285 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007286 iwl3945_commit_rxon(priv);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007287 }
7288
Zhu Yib481de92007-09-25 17:54:57 -07007289 /* Per mac80211.h: This is only used in IBSS mode... */
7290 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007291
Zhu Yib481de92007-09-25 17:54:57 -07007292 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7293 mutex_unlock(&priv->mutex);
7294 return;
7295 }
7296
Zhu Yib481de92007-09-25 17:54:57 -07007297 priv->only_active_channel = 0;
7298
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007299 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007300
7301 mutex_unlock(&priv->mutex);
7302
7303 IWL_DEBUG_MAC80211("leave\n");
7304
7305}
7306
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007307static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07007308 struct ieee80211_tx_control *control)
7309{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007310 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007311 unsigned long flags;
7312
7313 mutex_lock(&priv->mutex);
7314 IWL_DEBUG_MAC80211("enter\n");
7315
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007316 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007317 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7318 mutex_unlock(&priv->mutex);
7319 return -EIO;
7320 }
7321
7322 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7323 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7324 mutex_unlock(&priv->mutex);
7325 return -EIO;
7326 }
7327
7328 spin_lock_irqsave(&priv->lock, flags);
7329
7330 if (priv->ibss_beacon)
7331 dev_kfree_skb(priv->ibss_beacon);
7332
7333 priv->ibss_beacon = skb;
7334
7335 priv->assoc_id = 0;
7336
7337 IWL_DEBUG_MAC80211("leave\n");
7338 spin_unlock_irqrestore(&priv->lock, flags);
7339
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007340 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007341
7342 queue_work(priv->workqueue, &priv->post_associate.work);
7343
7344 mutex_unlock(&priv->mutex);
7345
7346 return 0;
7347}
7348
7349/*****************************************************************************
7350 *
7351 * sysfs attributes
7352 *
7353 *****************************************************************************/
7354
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007355#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07007356
7357/*
7358 * The following adds a new attribute to the sysfs representation
7359 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7360 * used for controlling the debug level.
7361 *
7362 * See the level definitions in iwl for details.
7363 */
7364
7365static ssize_t show_debug_level(struct device_driver *d, char *buf)
7366{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007367 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07007368}
7369static ssize_t store_debug_level(struct device_driver *d,
7370 const char *buf, size_t count)
7371{
7372 char *p = (char *)buf;
7373 u32 val;
7374
7375 val = simple_strtoul(p, &p, 0);
7376 if (p == buf)
7377 printk(KERN_INFO DRV_NAME
7378 ": %s is not in hex or decimal form.\n", buf);
7379 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007380 iwl3945_debug_level = val;
Zhu Yib481de92007-09-25 17:54:57 -07007381
7382 return strnlen(buf, count);
7383}
7384
7385static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7386 show_debug_level, store_debug_level);
7387
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007388#endif /* CONFIG_IWL3945_DEBUG */
Zhu Yib481de92007-09-25 17:54:57 -07007389
7390static ssize_t show_rf_kill(struct device *d,
7391 struct device_attribute *attr, char *buf)
7392{
7393 /*
7394 * 0 - RF kill not enabled
7395 * 1 - SW based RF kill active (sysfs)
7396 * 2 - HW based RF kill active
7397 * 3 - Both HW and SW based RF kill active
7398 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007399 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007400 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7401 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7402
7403 return sprintf(buf, "%i\n", val);
7404}
7405
7406static ssize_t store_rf_kill(struct device *d,
7407 struct device_attribute *attr,
7408 const char *buf, size_t count)
7409{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007410 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007411
7412 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007413 iwl3945_radio_kill_sw(priv, buf[0] == '1');
Zhu Yib481de92007-09-25 17:54:57 -07007414 mutex_unlock(&priv->mutex);
7415
7416 return count;
7417}
7418
7419static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7420
7421static ssize_t show_temperature(struct device *d,
7422 struct device_attribute *attr, char *buf)
7423{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007424 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007425
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007426 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007427 return -EAGAIN;
7428
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007429 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
Zhu Yib481de92007-09-25 17:54:57 -07007430}
7431
7432static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7433
7434static ssize_t show_rs_window(struct device *d,
7435 struct device_attribute *attr,
7436 char *buf)
7437{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007438 struct iwl3945_priv *priv = d->driver_data;
7439 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07007440}
7441static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7442
7443static ssize_t show_tx_power(struct device *d,
7444 struct device_attribute *attr, char *buf)
7445{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007446 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007447 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7448}
7449
7450static ssize_t store_tx_power(struct device *d,
7451 struct device_attribute *attr,
7452 const char *buf, size_t count)
7453{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007454 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007455 char *p = (char *)buf;
7456 u32 val;
7457
7458 val = simple_strtoul(p, &p, 10);
7459 if (p == buf)
7460 printk(KERN_INFO DRV_NAME
7461 ": %s is not in decimal form.\n", buf);
7462 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007463 iwl3945_hw_reg_set_txpower(priv, val);
Zhu Yib481de92007-09-25 17:54:57 -07007464
7465 return count;
7466}
7467
7468static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7469
7470static ssize_t show_flags(struct device *d,
7471 struct device_attribute *attr, char *buf)
7472{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007473 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007474
7475 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7476}
7477
7478static ssize_t store_flags(struct device *d,
7479 struct device_attribute *attr,
7480 const char *buf, size_t count)
7481{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007482 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007483 u32 flags = simple_strtoul(buf, NULL, 0);
7484
7485 mutex_lock(&priv->mutex);
7486 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7487 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007488 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007489 IWL_WARNING("Could not cancel scan.\n");
7490 else {
7491 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7492 flags);
7493 priv->staging_rxon.flags = cpu_to_le32(flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007494 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007495 }
7496 }
7497 mutex_unlock(&priv->mutex);
7498
7499 return count;
7500}
7501
7502static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7503
7504static ssize_t show_filter_flags(struct device *d,
7505 struct device_attribute *attr, char *buf)
7506{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007507 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007508
7509 return sprintf(buf, "0x%04X\n",
7510 le32_to_cpu(priv->active_rxon.filter_flags));
7511}
7512
7513static ssize_t store_filter_flags(struct device *d,
7514 struct device_attribute *attr,
7515 const char *buf, size_t count)
7516{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007517 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007518 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7519
7520 mutex_lock(&priv->mutex);
7521 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7522 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007523 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007524 IWL_WARNING("Could not cancel scan.\n");
7525 else {
7526 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7527 "0x%04X\n", filter_flags);
7528 priv->staging_rxon.filter_flags =
7529 cpu_to_le32(filter_flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007530 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007531 }
7532 }
7533 mutex_unlock(&priv->mutex);
7534
7535 return count;
7536}
7537
7538static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7539 store_filter_flags);
7540
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007541#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007542
7543static ssize_t show_measurement(struct device *d,
7544 struct device_attribute *attr, char *buf)
7545{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007546 struct iwl3945_priv *priv = dev_get_drvdata(d);
7547 struct iwl3945_spectrum_notification measure_report;
Zhu Yib481de92007-09-25 17:54:57 -07007548 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7549 u8 *data = (u8 *) & measure_report;
7550 unsigned long flags;
7551
7552 spin_lock_irqsave(&priv->lock, flags);
7553 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7554 spin_unlock_irqrestore(&priv->lock, flags);
7555 return 0;
7556 }
7557 memcpy(&measure_report, &priv->measure_report, size);
7558 priv->measurement_status = 0;
7559 spin_unlock_irqrestore(&priv->lock, flags);
7560
7561 while (size && (PAGE_SIZE - len)) {
7562 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7563 PAGE_SIZE - len, 1);
7564 len = strlen(buf);
7565 if (PAGE_SIZE - len)
7566 buf[len++] = '\n';
7567
7568 ofs += 16;
7569 size -= min(size, 16U);
7570 }
7571
7572 return len;
7573}
7574
7575static ssize_t store_measurement(struct device *d,
7576 struct device_attribute *attr,
7577 const char *buf, size_t count)
7578{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007579 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007580 struct ieee80211_measurement_params params = {
7581 .channel = le16_to_cpu(priv->active_rxon.channel),
7582 .start_time = cpu_to_le64(priv->last_tsf),
7583 .duration = cpu_to_le16(1),
7584 };
7585 u8 type = IWL_MEASURE_BASIC;
7586 u8 buffer[32];
7587 u8 channel;
7588
7589 if (count) {
7590 char *p = buffer;
7591 strncpy(buffer, buf, min(sizeof(buffer), count));
7592 channel = simple_strtoul(p, NULL, 0);
7593 if (channel)
7594 params.channel = channel;
7595
7596 p = buffer;
7597 while (*p && *p != ' ')
7598 p++;
7599 if (*p)
7600 type = simple_strtoul(p + 1, NULL, 0);
7601 }
7602
7603 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7604 "channel %d (for '%s')\n", type, params.channel, buf);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007605 iwl3945_get_measurement(priv, &params, type);
Zhu Yib481de92007-09-25 17:54:57 -07007606
7607 return count;
7608}
7609
7610static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7611 show_measurement, store_measurement);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007612#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
Zhu Yib481de92007-09-25 17:54:57 -07007613
Zhu Yib481de92007-09-25 17:54:57 -07007614static ssize_t store_retry_rate(struct device *d,
7615 struct device_attribute *attr,
7616 const char *buf, size_t count)
7617{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007618 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007619
7620 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7621 if (priv->retry_rate <= 0)
7622 priv->retry_rate = 1;
7623
7624 return count;
7625}
7626
7627static ssize_t show_retry_rate(struct device *d,
7628 struct device_attribute *attr, char *buf)
7629{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007630 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007631 return sprintf(buf, "%d", priv->retry_rate);
7632}
7633
7634static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7635 store_retry_rate);
7636
7637static ssize_t store_power_level(struct device *d,
7638 struct device_attribute *attr,
7639 const char *buf, size_t count)
7640{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007641 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007642 int rc;
7643 int mode;
7644
7645 mode = simple_strtoul(buf, NULL, 0);
7646 mutex_lock(&priv->mutex);
7647
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007648 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007649 rc = -EAGAIN;
7650 goto out;
7651 }
7652
7653 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7654 mode = IWL_POWER_AC;
7655 else
7656 mode |= IWL_POWER_ENABLED;
7657
7658 if (mode != priv->power_mode) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007659 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
Zhu Yib481de92007-09-25 17:54:57 -07007660 if (rc) {
7661 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7662 goto out;
7663 }
7664 priv->power_mode = mode;
7665 }
7666
7667 rc = count;
7668
7669 out:
7670 mutex_unlock(&priv->mutex);
7671 return rc;
7672}
7673
7674#define MAX_WX_STRING 80
7675
7676/* Values are in microsecond */
7677static const s32 timeout_duration[] = {
7678 350000,
7679 250000,
7680 75000,
7681 37000,
7682 25000,
7683};
7684static const s32 period_duration[] = {
7685 400000,
7686 700000,
7687 1000000,
7688 1000000,
7689 1000000
7690};
7691
7692static ssize_t show_power_level(struct device *d,
7693 struct device_attribute *attr, char *buf)
7694{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007695 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007696 int level = IWL_POWER_LEVEL(priv->power_mode);
7697 char *p = buf;
7698
7699 p += sprintf(p, "%d ", level);
7700 switch (level) {
7701 case IWL_POWER_MODE_CAM:
7702 case IWL_POWER_AC:
7703 p += sprintf(p, "(AC)");
7704 break;
7705 case IWL_POWER_BATTERY:
7706 p += sprintf(p, "(BATTERY)");
7707 break;
7708 default:
7709 p += sprintf(p,
7710 "(Timeout %dms, Period %dms)",
7711 timeout_duration[level - 1] / 1000,
7712 period_duration[level - 1] / 1000);
7713 }
7714
7715 if (!(priv->power_mode & IWL_POWER_ENABLED))
7716 p += sprintf(p, " OFF\n");
7717 else
7718 p += sprintf(p, " \n");
7719
7720 return (p - buf + 1);
7721
7722}
7723
7724static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7725 store_power_level);
7726
7727static ssize_t show_channels(struct device *d,
7728 struct device_attribute *attr, char *buf)
7729{
Johannes Berg8318d782008-01-24 19:38:38 +01007730 /* all this shit doesn't belong into sysfs anyway */
7731 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07007732}
7733
7734static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7735
7736static ssize_t show_statistics(struct device *d,
7737 struct device_attribute *attr, char *buf)
7738{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007739 struct iwl3945_priv *priv = dev_get_drvdata(d);
7740 u32 size = sizeof(struct iwl3945_notif_statistics);
Zhu Yib481de92007-09-25 17:54:57 -07007741 u32 len = 0, ofs = 0;
7742 u8 *data = (u8 *) & priv->statistics;
7743 int rc = 0;
7744
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007745 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007746 return -EAGAIN;
7747
7748 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007749 rc = iwl3945_send_statistics_request(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007750 mutex_unlock(&priv->mutex);
7751
7752 if (rc) {
7753 len = sprintf(buf,
7754 "Error sending statistics request: 0x%08X\n", rc);
7755 return len;
7756 }
7757
7758 while (size && (PAGE_SIZE - len)) {
7759 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7760 PAGE_SIZE - len, 1);
7761 len = strlen(buf);
7762 if (PAGE_SIZE - len)
7763 buf[len++] = '\n';
7764
7765 ofs += 16;
7766 size -= min(size, 16U);
7767 }
7768
7769 return len;
7770}
7771
7772static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7773
7774static ssize_t show_antenna(struct device *d,
7775 struct device_attribute *attr, char *buf)
7776{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007777 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007778
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007779 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007780 return -EAGAIN;
7781
7782 return sprintf(buf, "%d\n", priv->antenna);
7783}
7784
7785static ssize_t store_antenna(struct device *d,
7786 struct device_attribute *attr,
7787 const char *buf, size_t count)
7788{
7789 int ant;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007790 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007791
7792 if (count == 0)
7793 return 0;
7794
7795 if (sscanf(buf, "%1i", &ant) != 1) {
7796 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7797 return count;
7798 }
7799
7800 if ((ant >= 0) && (ant <= 2)) {
7801 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007802 priv->antenna = (enum iwl3945_antenna)ant;
Zhu Yib481de92007-09-25 17:54:57 -07007803 } else
7804 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7805
7806
7807 return count;
7808}
7809
7810static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7811
7812static ssize_t show_status(struct device *d,
7813 struct device_attribute *attr, char *buf)
7814{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007815 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7816 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007817 return -EAGAIN;
7818 return sprintf(buf, "0x%08x\n", (int)priv->status);
7819}
7820
7821static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7822
7823static ssize_t dump_error_log(struct device *d,
7824 struct device_attribute *attr,
7825 const char *buf, size_t count)
7826{
7827 char *p = (char *)buf;
7828
7829 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007830 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007831
7832 return strnlen(buf, count);
7833}
7834
7835static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7836
7837static ssize_t dump_event_log(struct device *d,
7838 struct device_attribute *attr,
7839 const char *buf, size_t count)
7840{
7841 char *p = (char *)buf;
7842
7843 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007844 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007845
7846 return strnlen(buf, count);
7847}
7848
7849static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7850
7851/*****************************************************************************
7852 *
7853 * driver setup and teardown
7854 *
7855 *****************************************************************************/
7856
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007857static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007858{
7859 priv->workqueue = create_workqueue(DRV_NAME);
7860
7861 init_waitqueue_head(&priv->wait_command_queue);
7862
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007863 INIT_WORK(&priv->up, iwl3945_bg_up);
7864 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7865 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7866 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7867 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7868 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7869 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7870 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7871 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
7872 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7873 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7874 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
Zhu Yib481de92007-09-25 17:54:57 -07007875
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007876 iwl3945_hw_setup_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007877
7878 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007879 iwl3945_irq_tasklet, (unsigned long)priv);
Zhu Yib481de92007-09-25 17:54:57 -07007880}
7881
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007882static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007883{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007884 iwl3945_hw_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007885
Joonwoo Parke47eb6a2007-11-29 10:42:49 +09007886 cancel_delayed_work_sync(&priv->init_alive_start);
Zhu Yib481de92007-09-25 17:54:57 -07007887 cancel_delayed_work(&priv->scan_check);
7888 cancel_delayed_work(&priv->alive_start);
7889 cancel_delayed_work(&priv->post_associate);
7890 cancel_work_sync(&priv->beacon_update);
7891}
7892
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007893static struct attribute *iwl3945_sysfs_entries[] = {
Zhu Yib481de92007-09-25 17:54:57 -07007894 &dev_attr_antenna.attr,
7895 &dev_attr_channels.attr,
7896 &dev_attr_dump_errors.attr,
7897 &dev_attr_dump_events.attr,
7898 &dev_attr_flags.attr,
7899 &dev_attr_filter_flags.attr,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007900#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007901 &dev_attr_measurement.attr,
7902#endif
7903 &dev_attr_power_level.attr,
Zhu Yib481de92007-09-25 17:54:57 -07007904 &dev_attr_retry_rate.attr,
7905 &dev_attr_rf_kill.attr,
7906 &dev_attr_rs_window.attr,
7907 &dev_attr_statistics.attr,
7908 &dev_attr_status.attr,
7909 &dev_attr_temperature.attr,
Zhu Yib481de92007-09-25 17:54:57 -07007910 &dev_attr_tx_power.attr,
7911
7912 NULL
7913};
7914
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007915static struct attribute_group iwl3945_attribute_group = {
Zhu Yib481de92007-09-25 17:54:57 -07007916 .name = NULL, /* put in device directory */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007917 .attrs = iwl3945_sysfs_entries,
Zhu Yib481de92007-09-25 17:54:57 -07007918};
7919
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007920static struct ieee80211_ops iwl3945_hw_ops = {
7921 .tx = iwl3945_mac_tx,
7922 .start = iwl3945_mac_start,
7923 .stop = iwl3945_mac_stop,
7924 .add_interface = iwl3945_mac_add_interface,
7925 .remove_interface = iwl3945_mac_remove_interface,
7926 .config = iwl3945_mac_config,
7927 .config_interface = iwl3945_mac_config_interface,
7928 .configure_filter = iwl3945_configure_filter,
7929 .set_key = iwl3945_mac_set_key,
7930 .get_stats = iwl3945_mac_get_stats,
7931 .get_tx_stats = iwl3945_mac_get_tx_stats,
7932 .conf_tx = iwl3945_mac_conf_tx,
7933 .get_tsf = iwl3945_mac_get_tsf,
7934 .reset_tsf = iwl3945_mac_reset_tsf,
7935 .beacon_update = iwl3945_mac_beacon_update,
7936 .hw_scan = iwl3945_mac_hw_scan
Zhu Yib481de92007-09-25 17:54:57 -07007937};
7938
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007939static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Zhu Yib481de92007-09-25 17:54:57 -07007940{
7941 int err = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007942 struct iwl3945_priv *priv;
Zhu Yib481de92007-09-25 17:54:57 -07007943 struct ieee80211_hw *hw;
Tomas Winkler82b9a122008-03-04 18:09:30 -08007944 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007945 int i;
Zhu Yi5a669262008-01-14 17:46:18 -08007946 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007947
Cahill, Ben M6440adb2007-11-29 11:09:55 +08007948 /* Disabling hardware scan means that mac80211 will perform scans
7949 * "the hard way", rather than using device's scan. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007950 if (iwl3945_param_disable_hw_scan) {
Zhu Yib481de92007-09-25 17:54:57 -07007951 IWL_DEBUG_INFO("Disabling hw_scan\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007952 iwl3945_hw_ops.hw_scan = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007953 }
7954
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007955 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
7956 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
Zhu Yib481de92007-09-25 17:54:57 -07007957 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7958 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
7959 err = -EINVAL;
7960 goto out;
7961 }
7962
7963 /* mac80211 allocates memory for this device instance, including
7964 * space for this driver's private structure */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007965 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
Zhu Yib481de92007-09-25 17:54:57 -07007966 if (hw == NULL) {
7967 IWL_ERROR("Can not allocate network device\n");
7968 err = -ENOMEM;
7969 goto out;
7970 }
7971 SET_IEEE80211_DEV(hw, &pdev->dev);
7972
Johannes Bergf51359a2007-10-28 14:53:36 +01007973 hw->rate_control_algorithm = "iwl-3945-rs";
7974
Zhu Yib481de92007-09-25 17:54:57 -07007975 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7976 priv = hw->priv;
7977 priv->hw = hw;
7978
7979 priv->pci_dev = pdev;
Tomas Winkler82b9a122008-03-04 18:09:30 -08007980 priv->cfg = cfg;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08007981
7982 /* Select antenna (may be helpful if only one antenna is connected) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007983 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007984#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007985 iwl3945_debug_level = iwl3945_param_debug;
Zhu Yib481de92007-09-25 17:54:57 -07007986 atomic_set(&priv->restrict_refcnt, 0);
7987#endif
7988 priv->retry_rate = 1;
7989
7990 priv->ibss_beacon = NULL;
7991
7992 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
7993 * the range of signal quality values that we'll provide.
7994 * Negative values for level/noise indicate that we'll provide dBm.
7995 * For WE, at least, non-0 values here *enable* display of values
7996 * in app (iwconfig). */
7997 hw->max_rssi = -20; /* signal level, negative indicates dBm */
7998 hw->max_noise = -20; /* noise level, negative indicates dBm */
7999 hw->max_signal = 100; /* link quality indication (%) */
8000
8001 /* Tell mac80211 our Tx characteristics */
8002 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8003
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008004 /* 4 EDCA QOS priorities */
Zhu Yib481de92007-09-25 17:54:57 -07008005 hw->queues = 4;
8006
8007 spin_lock_init(&priv->lock);
8008 spin_lock_init(&priv->power_data.lock);
8009 spin_lock_init(&priv->sta_lock);
8010 spin_lock_init(&priv->hcmd_lock);
8011
8012 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8013 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8014
8015 INIT_LIST_HEAD(&priv->free_frames);
8016
8017 mutex_init(&priv->mutex);
8018 if (pci_enable_device(pdev)) {
8019 err = -ENODEV;
8020 goto out_ieee80211_free_hw;
8021 }
8022
8023 pci_set_master(pdev);
8024
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008025 /* Clear the driver's (not device's) station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008026 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008027
8028 priv->data_retry_limit = -1;
8029 priv->ieee_channels = NULL;
8030 priv->ieee_rates = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01008031 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07008032
8033 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8034 if (!err)
8035 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8036 if (err) {
8037 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8038 goto out_pci_disable_device;
8039 }
8040
8041 pci_set_drvdata(pdev, priv);
8042 err = pci_request_regions(pdev, DRV_NAME);
8043 if (err)
8044 goto out_pci_disable_device;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008045
Zhu Yib481de92007-09-25 17:54:57 -07008046 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8047 * PCI Tx retries from interfering with C3 CPU state */
8048 pci_write_config_byte(pdev, 0x41, 0x00);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008049
Zhu Yib481de92007-09-25 17:54:57 -07008050 priv->hw_base = pci_iomap(pdev, 0, 0);
8051 if (!priv->hw_base) {
8052 err = -ENODEV;
8053 goto out_pci_release_regions;
8054 }
8055
8056 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8057 (unsigned long long) pci_resource_len(pdev, 0));
8058 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8059
8060 /* Initialize module parameter values here */
8061
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008062 /* Disable radio (SW RF KILL) via parameter when loading driver */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008063 if (iwl3945_param_disable) {
Zhu Yib481de92007-09-25 17:54:57 -07008064 set_bit(STATUS_RF_KILL_SW, &priv->status);
8065 IWL_DEBUG_INFO("Radio disabled.\n");
8066 }
8067
8068 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8069
Zhu Yib481de92007-09-25 17:54:57 -07008070 printk(KERN_INFO DRV_NAME
Tomas Winkler82b9a122008-03-04 18:09:30 -08008071 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
Zhu Yib481de92007-09-25 17:54:57 -07008072
8073 /* Device-specific setup */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008074 if (iwl3945_hw_set_hw_setting(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008075 IWL_ERROR("failed to set hw settings\n");
Zhu Yib481de92007-09-25 17:54:57 -07008076 goto out_iounmap;
8077 }
8078
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008079 if (iwl3945_param_qos_enable)
Zhu Yib481de92007-09-25 17:54:57 -07008080 priv->qos_data.qos_enable = 1;
8081
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008082 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008083
8084 priv->qos_data.qos_active = 0;
8085 priv->qos_data.qos_cap.val = 0;
Zhu Yib481de92007-09-25 17:54:57 -07008086
Johannes Berg8318d782008-01-24 19:38:38 +01008087 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008088 iwl3945_setup_deferred_work(priv);
8089 iwl3945_setup_rx_handlers(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008090
8091 priv->rates_mask = IWL_RATES_MASK;
8092 /* If power management is turned on, default to AC mode */
8093 priv->power_mode = IWL_POWER_AC;
8094 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8095
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008096 iwl3945_disable_interrupts(priv);
Jes Sorensen49df2b32007-10-26 16:10:39 +02008097
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008098 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008099 if (err) {
8100 IWL_ERROR("failed to create sysfs device attributes\n");
Zhu Yib481de92007-09-25 17:54:57 -07008101 goto out_release_irq;
8102 }
8103
Zhu Yi5a669262008-01-14 17:46:18 -08008104 /* nic init */
8105 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8106 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8107
8108 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8109 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8110 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8111 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8112 if (err < 0) {
8113 IWL_DEBUG_INFO("Failed to init the card\n");
8114 goto out_remove_sysfs;
8115 }
8116 /* Read the EEPROM */
8117 err = iwl3945_eeprom_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008118 if (err) {
Zhu Yi5a669262008-01-14 17:46:18 -08008119 IWL_ERROR("Unable to init EEPROM\n");
8120 goto out_remove_sysfs;
8121 }
8122 /* MAC Address location in EEPROM same for 3945/4965 */
8123 get_eeprom_mac(priv, priv->mac_addr);
8124 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8125 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8126
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008127 err = iwl3945_init_channel_map(priv);
8128 if (err) {
8129 IWL_ERROR("initializing regulatory failed: %d\n", err);
8130 goto out_remove_sysfs;
8131 }
8132
8133 err = iwl3945_init_geos(priv);
8134 if (err) {
8135 IWL_ERROR("initializing geos failed: %d\n", err);
8136 goto out_free_channel_map;
8137 }
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008138
Zhu Yi5a669262008-01-14 17:46:18 -08008139 iwl3945_rate_control_register(priv->hw);
8140 err = ieee80211_register_hw(priv->hw);
8141 if (err) {
8142 IWL_ERROR("Failed to register network device (error %d)\n", err);
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008143 goto out_free_geos;
Zhu Yib481de92007-09-25 17:54:57 -07008144 }
8145
Zhu Yi5a669262008-01-14 17:46:18 -08008146 priv->hw->conf.beacon_int = 100;
8147 priv->mac80211_registered = 1;
8148 pci_save_state(pdev);
8149 pci_disable_device(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008150
8151 return 0;
8152
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008153 out_free_geos:
8154 iwl3945_free_geos(priv);
8155 out_free_channel_map:
8156 iwl3945_free_channel_map(priv);
Zhu Yi5a669262008-01-14 17:46:18 -08008157 out_remove_sysfs:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008158 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008159
8160 out_release_irq:
Zhu Yib481de92007-09-25 17:54:57 -07008161 destroy_workqueue(priv->workqueue);
8162 priv->workqueue = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008163 iwl3945_unset_hw_setting(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008164
8165 out_iounmap:
8166 pci_iounmap(pdev, priv->hw_base);
8167 out_pci_release_regions:
8168 pci_release_regions(pdev);
8169 out_pci_disable_device:
8170 pci_disable_device(pdev);
8171 pci_set_drvdata(pdev, NULL);
8172 out_ieee80211_free_hw:
8173 ieee80211_free_hw(priv->hw);
8174 out:
8175 return err;
8176}
8177
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008178static void iwl3945_pci_remove(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008179{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008180 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008181 struct list_head *p, *q;
8182 int i;
8183
8184 if (!priv)
8185 return;
8186
8187 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8188
Zhu Yib481de92007-09-25 17:54:57 -07008189 set_bit(STATUS_EXIT_PENDING, &priv->status);
Zhu Yib24d22b2007-12-19 13:59:52 +08008190
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008191 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008192
8193 /* Free MAC hash list for ADHOC */
8194 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8195 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8196 list_del(p);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008197 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
Zhu Yib481de92007-09-25 17:54:57 -07008198 }
8199 }
8200
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008201 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008202
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008203 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008204
8205 if (priv->rxq.bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008206 iwl3945_rx_queue_free(priv, &priv->rxq);
8207 iwl3945_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008208
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008209 iwl3945_unset_hw_setting(priv);
8210 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008211
8212 if (priv->mac80211_registered) {
8213 ieee80211_unregister_hw(priv->hw);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008214 iwl3945_rate_control_unregister(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008215 }
8216
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08008217 /*netif_stop_queue(dev); */
8218 flush_workqueue(priv->workqueue);
8219
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008220 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
Zhu Yib481de92007-09-25 17:54:57 -07008221 * priv->workqueue... so we can't take down the workqueue
8222 * until now... */
8223 destroy_workqueue(priv->workqueue);
8224 priv->workqueue = NULL;
8225
Zhu Yib481de92007-09-25 17:54:57 -07008226 pci_iounmap(pdev, priv->hw_base);
8227 pci_release_regions(pdev);
8228 pci_disable_device(pdev);
8229 pci_set_drvdata(pdev, NULL);
8230
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008231 iwl3945_free_channel_map(priv);
8232 iwl3945_free_geos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008233
8234 if (priv->ibss_beacon)
8235 dev_kfree_skb(priv->ibss_beacon);
8236
8237 ieee80211_free_hw(priv->hw);
8238}
8239
8240#ifdef CONFIG_PM
8241
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008242static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Zhu Yib481de92007-09-25 17:54:57 -07008243{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008244 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008245
Zhu Yie655b9f2008-01-24 02:19:38 -08008246 if (priv->is_open) {
8247 set_bit(STATUS_IN_SUSPEND, &priv->status);
8248 iwl3945_mac_stop(priv->hw);
8249 priv->is_open = 1;
8250 }
Zhu Yib481de92007-09-25 17:54:57 -07008251
Zhu Yib481de92007-09-25 17:54:57 -07008252 pci_set_power_state(pdev, PCI_D3hot);
8253
Zhu Yib481de92007-09-25 17:54:57 -07008254 return 0;
8255}
8256
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008257static int iwl3945_pci_resume(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008258{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008259 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008260
Zhu Yib481de92007-09-25 17:54:57 -07008261 pci_set_power_state(pdev, PCI_D0);
Zhu Yib481de92007-09-25 17:54:57 -07008262
Zhu Yie655b9f2008-01-24 02:19:38 -08008263 if (priv->is_open)
8264 iwl3945_mac_start(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008265
Zhu Yie655b9f2008-01-24 02:19:38 -08008266 clear_bit(STATUS_IN_SUSPEND, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07008267 return 0;
8268}
8269
8270#endif /* CONFIG_PM */
8271
8272/*****************************************************************************
8273 *
8274 * driver and module entry point
8275 *
8276 *****************************************************************************/
8277
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008278static struct pci_driver iwl3945_driver = {
Zhu Yib481de92007-09-25 17:54:57 -07008279 .name = DRV_NAME,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008280 .id_table = iwl3945_hw_card_ids,
8281 .probe = iwl3945_pci_probe,
8282 .remove = __devexit_p(iwl3945_pci_remove),
Zhu Yib481de92007-09-25 17:54:57 -07008283#ifdef CONFIG_PM
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008284 .suspend = iwl3945_pci_suspend,
8285 .resume = iwl3945_pci_resume,
Zhu Yib481de92007-09-25 17:54:57 -07008286#endif
8287};
8288
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008289static int __init iwl3945_init(void)
Zhu Yib481de92007-09-25 17:54:57 -07008290{
8291
8292 int ret;
8293 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8294 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008295 ret = pci_register_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008296 if (ret) {
8297 IWL_ERROR("Unable to initialize PCI module\n");
8298 return ret;
8299 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008300#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008301 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008302 if (ret) {
8303 IWL_ERROR("Unable to create driver sysfs file\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008304 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008305 return ret;
8306 }
8307#endif
8308
8309 return ret;
8310}
8311
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008312static void __exit iwl3945_exit(void)
Zhu Yib481de92007-09-25 17:54:57 -07008313{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008314#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008315 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008316#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008317 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008318}
8319
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008320module_param_named(antenna, iwl3945_param_antenna, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008321MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008322module_param_named(disable, iwl3945_param_disable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008323MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008324module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008325MODULE_PARM_DESC(hwcrypto,
8326 "using hardware crypto engine (default 0 [software])\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008327module_param_named(debug, iwl3945_param_debug, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008328MODULE_PARM_DESC(debug, "debug output mask");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008329module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008330MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8331
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008332module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008333MODULE_PARM_DESC(queues_num, "number of hw queues.");
8334
8335/* QoS */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008336module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008337MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8338
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008339module_exit(iwl3945_exit);
8340module_init(iwl3945_init);