blob: 8f317446eca49feb214dc0da7dab625f6e80100b [file] [log] [blame]
Ivo van Doornd53d9e62009-04-26 15:47:48 +02001/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2800usb
23 Abstract: Data structures and registers for the rt2800usb module.
24 Supported chipsets: RT2800U.
25 */
26
27#ifndef RT2800USB_H
28#define RT2800USB_H
29
30/*
Ivo van Doornd53d9e62009-04-26 15:47:48 +020031 * USB registers.
32 */
33
34/*
Ivo van Doornd53d9e62009-04-26 15:47:48 +020035 * USB_DMA_CFG
36 * RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns.
37 * RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes.
38 * PHY_CLEAR: phy watch dog enable.
39 * TX_CLEAR: Clear USB DMA TX path.
40 * TXOP_HALT: Halt TXOP count down when TX buffer is full.
41 * RX_BULK_AGG_EN: Enable Rx Bulk Aggregation.
42 * RX_BULK_EN: Enable USB DMA Rx.
43 * TX_BULK_EN: Enable USB DMA Tx.
44 * EP_OUT_VALID: OUT endpoint data valid.
45 * RX_BUSY: USB DMA RX FSM busy.
46 * TX_BUSY: USB DMA TX FSM busy.
47 */
48#define USB_DMA_CFG 0x02a0
49#define USB_DMA_CFG_RX_BULK_AGG_TIMEOUT FIELD32(0x000000ff)
50#define USB_DMA_CFG_RX_BULK_AGG_LIMIT FIELD32(0x0000ff00)
51#define USB_DMA_CFG_PHY_CLEAR FIELD32(0x00010000)
52#define USB_DMA_CFG_TX_CLEAR FIELD32(0x00080000)
53#define USB_DMA_CFG_TXOP_HALT FIELD32(0x00100000)
54#define USB_DMA_CFG_RX_BULK_AGG_EN FIELD32(0x00200000)
55#define USB_DMA_CFG_RX_BULK_EN FIELD32(0x00400000)
56#define USB_DMA_CFG_TX_BULK_EN FIELD32(0x00800000)
57#define USB_DMA_CFG_EP_OUT_VALID FIELD32(0x3f000000)
58#define USB_DMA_CFG_RX_BUSY FIELD32(0x40000000)
59#define USB_DMA_CFG_TX_BUSY FIELD32(0x80000000)
60
61/*
62 * USB_CYC_CFG
63 */
64#define USB_CYC_CFG 0x02a4
65#define USB_CYC_CFG_CLOCK_CYCLE FIELD32(0x000000ff)
66
67/*
Ivo van Doornd53d9e62009-04-26 15:47:48 +020068 * 8051 firmware image.
69 */
70#define FIRMWARE_RT2870 "rt2870.bin"
71#define FIRMWARE_IMAGE_BASE 0x3000
72
73/*
Ivo van Doornd53d9e62009-04-26 15:47:48 +020074 * DMA descriptor defines.
75 */
Ivo van Doornd53d9e62009-04-26 15:47:48 +020076#define TXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
Bartlomiej Zolnierkiewiczd42c8d82009-11-04 18:35:47 +010077#define RXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
Ivo van Doornd53d9e62009-04-26 15:47:48 +020078
79/*
80 * TX Info structure
81 */
82
83/*
84 * Word0
85 * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
86 * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
87 * 0:MGMT, 1:HCCA 2:EDCA
88 * USB_DMA_NEXT_VALID: Used ONLY in USB bulk Aggregation, NextValid
89 * DMA_TX_BURST: used ONLY in USB bulk Aggregation.
90 * Force USB DMA transmit frame from current selected endpoint
91 */
92#define TXINFO_W0_USB_DMA_TX_PKT_LEN FIELD32(0x0000ffff)
93#define TXINFO_W0_WIV FIELD32(0x01000000)
94#define TXINFO_W0_QSEL FIELD32(0x06000000)
95#define TXINFO_W0_SW_USE_LAST_ROUND FIELD32(0x08000000)
96#define TXINFO_W0_USB_DMA_NEXT_VALID FIELD32(0x40000000)
97#define TXINFO_W0_USB_DMA_TX_BURST FIELD32(0x80000000)
98
99/*
Ivo van Doornd53d9e62009-04-26 15:47:48 +0200100 * RX descriptor format for RX Ring.
101 */
102
103/*
104 * Word0
105 * UNICAST_TO_ME: This RX frame is unicast to me.
106 * MULTICAST: This is a multicast frame.
107 * BROADCAST: This is a broadcast frame.
108 * MY_BSS: this frame belongs to the same BSSID.
109 * CRC_ERROR: CRC error.
110 * CIPHER_ERROR: 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid.
111 * AMSDU: rx with 802.3 header, not 802.11 header.
112 */
113
Bartlomiej Zolnierkiewicz4116cb42009-11-08 14:39:40 +0100114#define RXINFO_W0_BA FIELD32(0x00000001)
115#define RXINFO_W0_DATA FIELD32(0x00000002)
116#define RXINFO_W0_NULLDATA FIELD32(0x00000004)
117#define RXINFO_W0_FRAG FIELD32(0x00000008)
118#define RXINFO_W0_UNICAST_TO_ME FIELD32(0x00000010)
119#define RXINFO_W0_MULTICAST FIELD32(0x00000020)
120#define RXINFO_W0_BROADCAST FIELD32(0x00000040)
121#define RXINFO_W0_MY_BSS FIELD32(0x00000080)
122#define RXINFO_W0_CRC_ERROR FIELD32(0x00000100)
123#define RXINFO_W0_CIPHER_ERROR FIELD32(0x00000600)
124#define RXINFO_W0_AMSDU FIELD32(0x00000800)
125#define RXINFO_W0_HTC FIELD32(0x00001000)
126#define RXINFO_W0_RSSI FIELD32(0x00002000)
127#define RXINFO_W0_L2PAD FIELD32(0x00004000)
128#define RXINFO_W0_AMPDU FIELD32(0x00008000)
129#define RXINFO_W0_DECRYPTED FIELD32(0x00010000)
130#define RXINFO_W0_PLCP_RSSI FIELD32(0x00020000)
131#define RXINFO_W0_CIPHER_ALG FIELD32(0x00040000)
132#define RXINFO_W0_LAST_AMSDU FIELD32(0x00080000)
133#define RXINFO_W0_PLCP_SIGNAL FIELD32(0xfff00000)
Ivo van Doornd53d9e62009-04-26 15:47:48 +0200134
Ivo van Doornd53d9e62009-04-26 15:47:48 +0200135#endif /* RT2800USB_H */