blob: 3f8769b7db54bc775a916d6829e515654b178706 [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
2 * File: arch/blackfin/kernel/entry.S
3 * Based on:
4 * Author:
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#include <linux/linkage.h>
31#include <asm/thread_info.h>
32#include <asm/errno.h>
Graf Yang8f658732008-11-18 17:48:22 +080033#include <asm/blackfin.h>
Bryan Wu1394f032007-05-06 14:50:22 -070034#include <asm/asm-offsets.h>
35
Bryan Wu639f6572008-08-27 10:51:02 +080036#include <asm/context.S>
Bryan Wu1394f032007-05-06 14:50:22 -070037
38#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
39.section .l1.text
40#else
41.text
42#endif
43
44ENTRY(_ret_from_fork)
Yi Li6a01f232009-01-07 23:14:39 +080045#ifdef CONFIG_IPIPE
Philippe Gerum6b8019c82009-06-22 18:23:32 +020046 /*
47 * Hw IRQs are off on entry, and we don't want the scheduling tail
48 * code to starve high priority domains from interrupts while it
49 * runs. Therefore we first stall the root stage to have the
50 * virtual interrupt state reflect IMASK.
51 */
52 p0.l = ___ipipe_root_status;
53 p0.h = ___ipipe_root_status;
54 r4 = [p0];
55 bitset(r4, 0);
56 [p0] = r4;
57 /*
58 * Then we may enable hw IRQs, allowing preemption from high
59 * priority domains. schedule_tail() will do local_irq_enable()
60 * since Blackfin does not define __ARCH_WANT_UNLOCKED_CTXSW, so
61 * there is no need to unstall the root domain by ourselves
62 * afterwards.
63 */
64 p0.l = _bfin_irq_flags;
65 p0.h = _bfin_irq_flags;
66 r4 = [p0];
67 sti r4;
Yi Li6a01f232009-01-07 23:14:39 +080068#endif /* CONFIG_IPIPE */
Bryan Wu1394f032007-05-06 14:50:22 -070069 SP += -12;
70 call _schedule_tail;
71 SP += 12;
72 r0 = [sp + PT_IPEND];
73 cc = bittst(r0,1);
74 if cc jump .Lin_kernel;
75 RESTORE_CONTEXT
76 rti;
77.Lin_kernel:
78 bitclr(r0,1);
79 [sp + PT_IPEND] = r0;
80 /* do a 'fake' RTI by jumping to [RETI]
81 * to avoid clearing supervisor mode in child
Robin Getzaa770aa2007-10-29 18:14:15 +080082 */
83 r0 = [sp + PT_PC];
84 [sp + PT_P0] = r0;
85
Bryan Wu1394f032007-05-06 14:50:22 -070086 RESTORE_ALL_SYS
Bryan Wu1394f032007-05-06 14:50:22 -070087 jump (p0);
Mike Frysinger51be24c2007-06-11 15:31:30 +080088ENDPROC(_ret_from_fork)
Bryan Wu1394f032007-05-06 14:50:22 -070089
90ENTRY(_sys_fork)
91 r0 = -EINVAL;
Michael Hennerich2cfebf22008-07-16 16:59:05 +080092#if (ANOMALY_05000371)
93 nop;
94 nop;
95 nop;
96#endif
Bryan Wu1394f032007-05-06 14:50:22 -070097 rts;
Mike Frysinger51be24c2007-06-11 15:31:30 +080098ENDPROC(_sys_fork)
Bryan Wu1394f032007-05-06 14:50:22 -070099
100ENTRY(_sys_vfork)
101 r0 = sp;
102 r0 += 24;
103 [--sp] = rets;
104 SP += -12;
105 call _bfin_vfork;
106 SP += 12;
107 rets = [sp++];
108 rts;
Mike Frysinger51be24c2007-06-11 15:31:30 +0800109ENDPROC(_sys_vfork)
Bryan Wu1394f032007-05-06 14:50:22 -0700110
111ENTRY(_sys_clone)
112 r0 = sp;
113 r0 += 24;
114 [--sp] = rets;
115 SP += -12;
116 call _bfin_clone;
117 SP += 12;
118 rets = [sp++];
119 rts;
Mike Frysinger51be24c2007-06-11 15:31:30 +0800120ENDPROC(_sys_clone)
Bryan Wu1394f032007-05-06 14:50:22 -0700121
122ENTRY(_sys_rt_sigreturn)
123 r0 = sp;
124 r0 += 24;
125 [--sp] = rets;
126 SP += -12;
127 call _do_rt_sigreturn;
128 SP += 12;
129 rets = [sp++];
130 rts;
Mike Frysinger51be24c2007-06-11 15:31:30 +0800131ENDPROC(_sys_rt_sigreturn)