| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * linux/kernel/irq/chip.c | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | 
|  | 5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | 
|  | 6 | * | 
|  | 7 | * This file contains the core interrupt handling code, for irq-chip | 
|  | 8 | * based architectures. | 
|  | 9 | * | 
|  | 10 | * Detailed information is available in Documentation/DocBook/genericirq | 
|  | 11 | */ | 
|  | 12 |  | 
|  | 13 | #include <linux/irq.h> | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 14 | #include <linux/msi.h> | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 15 | #include <linux/module.h> | 
|  | 16 | #include <linux/interrupt.h> | 
|  | 17 | #include <linux/kernel_stat.h> | 
|  | 18 |  | 
|  | 19 | #include "internals.h" | 
|  | 20 |  | 
|  | 21 | /** | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 22 | *	dynamic_irq_init - initialize a dynamically allocated irq | 
|  | 23 | *	@irq:	irq number to initialize | 
|  | 24 | */ | 
|  | 25 | void dynamic_irq_init(unsigned int irq) | 
|  | 26 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 27 | struct irq_desc *desc = irq_to_desc(irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 28 | unsigned long flags; | 
|  | 29 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 30 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 31 | WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 32 | return; | 
|  | 33 | } | 
|  | 34 |  | 
|  | 35 | /* Ensure we don't have left over values from a previous use of this irq */ | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 36 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 37 | desc->status = IRQ_DISABLED; | 
|  | 38 | desc->chip = &no_irq_chip; | 
|  | 39 | desc->handle_irq = handle_bad_irq; | 
|  | 40 | desc->depth = 1; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 41 | desc->msi_desc = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 42 | desc->handler_data = NULL; | 
|  | 43 | desc->chip_data = NULL; | 
|  | 44 | desc->action = NULL; | 
|  | 45 | desc->irq_count = 0; | 
|  | 46 | desc->irqs_unhandled = 0; | 
|  | 47 | #ifdef CONFIG_SMP | 
| Mike Travis | d366f8c | 2008-04-04 18:11:12 -0700 | [diff] [blame] | 48 | cpus_setall(desc->affinity); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 49 | #endif | 
|  | 50 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 51 | } | 
|  | 52 |  | 
|  | 53 | /** | 
|  | 54 | *	dynamic_irq_cleanup - cleanup a dynamically allocated irq | 
|  | 55 | *	@irq:	irq number to initialize | 
|  | 56 | */ | 
|  | 57 | void dynamic_irq_cleanup(unsigned int irq) | 
|  | 58 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 59 | struct irq_desc *desc = irq_to_desc(irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 60 | unsigned long flags; | 
|  | 61 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 62 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 63 | WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 64 | return; | 
|  | 65 | } | 
|  | 66 |  | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 67 | spin_lock_irqsave(&desc->lock, flags); | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 68 | if (desc->action) { | 
|  | 69 | spin_unlock_irqrestore(&desc->lock, flags); | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 70 | WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n", | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 71 | irq); | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 72 | return; | 
|  | 73 | } | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 74 | desc->msi_desc = NULL; | 
|  | 75 | desc->handler_data = NULL; | 
|  | 76 | desc->chip_data = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 77 | desc->handle_irq = handle_bad_irq; | 
|  | 78 | desc->chip = &no_irq_chip; | 
| Dean Nelson | b6f3b78 | 2008-10-18 16:06:56 -0700 | [diff] [blame] | 79 | desc->name = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 80 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 81 | } | 
|  | 82 |  | 
|  | 83 |  | 
|  | 84 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 85 | *	set_irq_chip - set the irq chip for an irq | 
|  | 86 | *	@irq:	irq number | 
|  | 87 | *	@chip:	pointer to irq chip description structure | 
|  | 88 | */ | 
|  | 89 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | 
|  | 90 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 91 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 92 | unsigned long flags; | 
|  | 93 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 94 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 95 | WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 96 | return -EINVAL; | 
|  | 97 | } | 
|  | 98 |  | 
|  | 99 | if (!chip) | 
|  | 100 | chip = &no_irq_chip; | 
|  | 101 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 102 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 103 | irq_chip_set_defaults(chip); | 
|  | 104 | desc->chip = chip; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 105 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 106 |  | 
|  | 107 | return 0; | 
|  | 108 | } | 
|  | 109 | EXPORT_SYMBOL(set_irq_chip); | 
|  | 110 |  | 
|  | 111 | /** | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 112 | *	set_irq_type - set the irq trigger type for an irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 113 | *	@irq:	irq number | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 114 | *	@type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 115 | */ | 
|  | 116 | int set_irq_type(unsigned int irq, unsigned int type) | 
|  | 117 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 118 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 119 | unsigned long flags; | 
|  | 120 | int ret = -ENXIO; | 
|  | 121 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 122 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 123 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); | 
|  | 124 | return -ENODEV; | 
|  | 125 | } | 
|  | 126 |  | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 127 | if (type == IRQ_TYPE_NONE) | 
|  | 128 | return 0; | 
|  | 129 |  | 
|  | 130 | spin_lock_irqsave(&desc->lock, flags); | 
| Chris Friesen | 0b3682b | 2008-10-20 12:41:58 -0600 | [diff] [blame] | 131 | ret = __irq_set_trigger(desc, irq, type); | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 132 | spin_unlock_irqrestore(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 133 | return ret; | 
|  | 134 | } | 
|  | 135 | EXPORT_SYMBOL(set_irq_type); | 
|  | 136 |  | 
|  | 137 | /** | 
|  | 138 | *	set_irq_data - set irq type data for an irq | 
|  | 139 | *	@irq:	Interrupt number | 
|  | 140 | *	@data:	Pointer to interrupt specific data | 
|  | 141 | * | 
|  | 142 | *	Set the hardware irq controller data for an irq | 
|  | 143 | */ | 
|  | 144 | int set_irq_data(unsigned int irq, void *data) | 
|  | 145 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 146 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 147 | unsigned long flags; | 
|  | 148 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 149 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 150 | printk(KERN_ERR | 
|  | 151 | "Trying to install controller data for IRQ%d\n", irq); | 
|  | 152 | return -EINVAL; | 
|  | 153 | } | 
|  | 154 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 155 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 156 | desc->handler_data = data; | 
|  | 157 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 158 | return 0; | 
|  | 159 | } | 
|  | 160 | EXPORT_SYMBOL(set_irq_data); | 
|  | 161 |  | 
|  | 162 | /** | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 163 | *	set_irq_data - set irq type data for an irq | 
|  | 164 | *	@irq:	Interrupt number | 
| Randy Dunlap | 472900b | 2007-02-16 01:28:25 -0800 | [diff] [blame] | 165 | *	@entry:	Pointer to MSI descriptor data | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 166 | * | 
|  | 167 | *	Set the hardware irq controller data for an irq | 
|  | 168 | */ | 
|  | 169 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | 
|  | 170 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 171 | struct irq_desc *desc = irq_to_desc(irq); | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 172 | unsigned long flags; | 
|  | 173 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 174 | if (!desc) { | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 175 | printk(KERN_ERR | 
|  | 176 | "Trying to install msi data for IRQ%d\n", irq); | 
|  | 177 | return -EINVAL; | 
|  | 178 | } | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 179 |  | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 180 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 181 | desc->msi_desc = entry; | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 182 | if (entry) | 
|  | 183 | entry->irq = irq; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 184 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 185 | return 0; | 
|  | 186 | } | 
|  | 187 |  | 
|  | 188 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 189 | *	set_irq_chip_data - set irq chip data for an irq | 
|  | 190 | *	@irq:	Interrupt number | 
|  | 191 | *	@data:	Pointer to chip specific data | 
|  | 192 | * | 
|  | 193 | *	Set the hardware irq chip data for an irq | 
|  | 194 | */ | 
|  | 195 | int set_irq_chip_data(unsigned int irq, void *data) | 
|  | 196 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 197 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 198 | unsigned long flags; | 
|  | 199 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 200 | if (!desc) { | 
|  | 201 | printk(KERN_ERR | 
|  | 202 | "Trying to install chip data for IRQ%d\n", irq); | 
|  | 203 | return -EINVAL; | 
|  | 204 | } | 
|  | 205 |  | 
|  | 206 | if (!desc->chip) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 207 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); | 
|  | 208 | return -EINVAL; | 
|  | 209 | } | 
|  | 210 |  | 
|  | 211 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 212 | desc->chip_data = data; | 
|  | 213 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 214 |  | 
|  | 215 | return 0; | 
|  | 216 | } | 
|  | 217 | EXPORT_SYMBOL(set_irq_chip_data); | 
|  | 218 |  | 
|  | 219 | /* | 
|  | 220 | * default enable function | 
|  | 221 | */ | 
|  | 222 | static void default_enable(unsigned int irq) | 
|  | 223 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 224 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 225 |  | 
|  | 226 | desc->chip->unmask(irq); | 
|  | 227 | desc->status &= ~IRQ_MASKED; | 
|  | 228 | } | 
|  | 229 |  | 
|  | 230 | /* | 
|  | 231 | * default disable function | 
|  | 232 | */ | 
|  | 233 | static void default_disable(unsigned int irq) | 
|  | 234 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 235 | } | 
|  | 236 |  | 
|  | 237 | /* | 
|  | 238 | * default startup function | 
|  | 239 | */ | 
|  | 240 | static unsigned int default_startup(unsigned int irq) | 
|  | 241 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 242 | struct irq_desc *desc = irq_to_desc(irq); | 
| Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 243 |  | 
| Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 244 | desc->chip->enable(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 245 | return 0; | 
|  | 246 | } | 
|  | 247 |  | 
|  | 248 | /* | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 249 | * default shutdown function | 
|  | 250 | */ | 
|  | 251 | static void default_shutdown(unsigned int irq) | 
|  | 252 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 253 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 254 |  | 
|  | 255 | desc->chip->mask(irq); | 
|  | 256 | desc->status |= IRQ_MASKED; | 
|  | 257 | } | 
|  | 258 |  | 
|  | 259 | /* | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 260 | * Fixup enable/disable function pointers | 
|  | 261 | */ | 
|  | 262 | void irq_chip_set_defaults(struct irq_chip *chip) | 
|  | 263 | { | 
|  | 264 | if (!chip->enable) | 
|  | 265 | chip->enable = default_enable; | 
|  | 266 | if (!chip->disable) | 
|  | 267 | chip->disable = default_disable; | 
|  | 268 | if (!chip->startup) | 
|  | 269 | chip->startup = default_startup; | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 270 | /* | 
|  | 271 | * We use chip->disable, when the user provided its own. When | 
|  | 272 | * we have default_disable set for chip->disable, then we need | 
|  | 273 | * to use default_shutdown, otherwise the irq line is not | 
|  | 274 | * disabled on free_irq(): | 
|  | 275 | */ | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 276 | if (!chip->shutdown) | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 277 | chip->shutdown = chip->disable != default_disable ? | 
|  | 278 | chip->disable : default_shutdown; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 279 | if (!chip->name) | 
|  | 280 | chip->name = chip->typename; | 
| Zhang, Yanmin | b86432b | 2006-11-16 01:19:10 -0800 | [diff] [blame] | 281 | if (!chip->end) | 
|  | 282 | chip->end = dummy_irq_chip.end; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 283 | } | 
|  | 284 |  | 
|  | 285 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | 
|  | 286 | { | 
|  | 287 | if (desc->chip->mask_ack) | 
|  | 288 | desc->chip->mask_ack(irq); | 
|  | 289 | else { | 
|  | 290 | desc->chip->mask(irq); | 
|  | 291 | desc->chip->ack(irq); | 
|  | 292 | } | 
|  | 293 | } | 
|  | 294 |  | 
|  | 295 | /** | 
|  | 296 | *	handle_simple_irq - Simple and software-decoded IRQs. | 
|  | 297 | *	@irq:	the interrupt number | 
|  | 298 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 299 | * | 
|  | 300 | *	Simple interrupts are either sent from a demultiplexing interrupt | 
|  | 301 | *	handler or come from hardware, where no interrupt hardware control | 
|  | 302 | *	is necessary. | 
|  | 303 | * | 
|  | 304 | *	Note: The caller is expected to handle the ack, clear, mask and | 
|  | 305 | *	unmask issues if necessary. | 
|  | 306 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 307 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 308 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 309 | { | 
|  | 310 | struct irqaction *action; | 
|  | 311 | irqreturn_t action_ret; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 312 |  | 
|  | 313 | spin_lock(&desc->lock); | 
|  | 314 |  | 
|  | 315 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
|  | 316 | goto out_unlock; | 
| Steven Rostedt | 971e5b35f | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 317 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 318 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 319 |  | 
|  | 320 | action = desc->action; | 
| Steven Rostedt | 971e5b35f | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 321 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 322 | goto out_unlock; | 
|  | 323 |  | 
|  | 324 | desc->status |= IRQ_INPROGRESS; | 
|  | 325 | spin_unlock(&desc->lock); | 
|  | 326 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 327 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 328 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 329 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 330 |  | 
|  | 331 | spin_lock(&desc->lock); | 
|  | 332 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 333 | out_unlock: | 
|  | 334 | spin_unlock(&desc->lock); | 
|  | 335 | } | 
|  | 336 |  | 
|  | 337 | /** | 
|  | 338 | *	handle_level_irq - Level type irq handler | 
|  | 339 | *	@irq:	the interrupt number | 
|  | 340 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 341 | * | 
|  | 342 | *	Level type interrupts are active as long as the hardware line has | 
|  | 343 | *	the active level. This may require to mask the interrupt and unmask | 
|  | 344 | *	it after the associated handler has acknowledged the device, so the | 
|  | 345 | *	interrupt line is back to inactive. | 
|  | 346 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 347 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 348 | handle_level_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 349 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 350 | struct irqaction *action; | 
|  | 351 | irqreturn_t action_ret; | 
|  | 352 |  | 
|  | 353 | spin_lock(&desc->lock); | 
|  | 354 | mask_ack_irq(desc, irq); | 
|  | 355 |  | 
|  | 356 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 357 | goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 358 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 359 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 360 |  | 
|  | 361 | /* | 
|  | 362 | * If its disabled or no action available | 
|  | 363 | * keep it masked and get out of here | 
|  | 364 | */ | 
|  | 365 | action = desc->action; | 
| Thomas Gleixner | 4966342 | 2007-08-12 15:46:34 +0000 | [diff] [blame] | 366 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 367 | goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 368 |  | 
|  | 369 | desc->status |= IRQ_INPROGRESS; | 
|  | 370 | spin_unlock(&desc->lock); | 
|  | 371 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 372 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 373 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 374 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 375 |  | 
|  | 376 | spin_lock(&desc->lock); | 
|  | 377 | desc->status &= ~IRQ_INPROGRESS; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 378 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) | 
|  | 379 | desc->chip->unmask(irq); | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 380 | out_unlock: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 381 | spin_unlock(&desc->lock); | 
|  | 382 | } | 
|  | 383 |  | 
|  | 384 | /** | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 385 | *	handle_fasteoi_irq - irq handler for transparent controllers | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 386 | *	@irq:	the interrupt number | 
|  | 387 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 388 | * | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 389 | *	Only a single callback will be issued to the chip: an ->eoi() | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 390 | *	call when the interrupt has been serviced. This enables support | 
|  | 391 | *	for modern forms of interrupt handlers, which handle the flow | 
|  | 392 | *	details in hardware, transparently. | 
|  | 393 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 394 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 395 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 396 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 397 | struct irqaction *action; | 
|  | 398 | irqreturn_t action_ret; | 
|  | 399 |  | 
|  | 400 | spin_lock(&desc->lock); | 
|  | 401 |  | 
|  | 402 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
|  | 403 | goto out; | 
|  | 404 |  | 
|  | 405 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 406 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 407 |  | 
|  | 408 | /* | 
|  | 409 | * If its disabled or no action available | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 410 | * then mask it and get out of here: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 411 | */ | 
|  | 412 | action = desc->action; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 413 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { | 
|  | 414 | desc->status |= IRQ_PENDING; | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 415 | if (desc->chip->mask) | 
|  | 416 | desc->chip->mask(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 417 | goto out; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 418 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 419 |  | 
|  | 420 | desc->status |= IRQ_INPROGRESS; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 421 | desc->status &= ~IRQ_PENDING; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 422 | spin_unlock(&desc->lock); | 
|  | 423 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 424 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 425 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 426 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 427 |  | 
|  | 428 | spin_lock(&desc->lock); | 
|  | 429 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 430 | out: | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 431 | desc->chip->eoi(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 432 |  | 
|  | 433 | spin_unlock(&desc->lock); | 
|  | 434 | } | 
|  | 435 |  | 
|  | 436 | /** | 
|  | 437 | *	handle_edge_irq - edge type IRQ handler | 
|  | 438 | *	@irq:	the interrupt number | 
|  | 439 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 440 | * | 
|  | 441 | *	Interrupt occures on the falling and/or rising edge of a hardware | 
|  | 442 | *	signal. The occurence is latched into the irq controller hardware | 
|  | 443 | *	and must be acked in order to be reenabled. After the ack another | 
|  | 444 | *	interrupt can happen on the same source even before the first one | 
|  | 445 | *	is handled by the assosiacted event handler. If this happens it | 
|  | 446 | *	might be necessary to disable (mask) the interrupt depending on the | 
|  | 447 | *	controller hardware. This requires to reenable the interrupt inside | 
|  | 448 | *	of the loop which handles the interrupts which have arrived while | 
|  | 449 | *	the handler was running. If all pending interrupts are handled, the | 
|  | 450 | *	loop is left. | 
|  | 451 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 452 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 453 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 454 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 455 | spin_lock(&desc->lock); | 
|  | 456 |  | 
|  | 457 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
|  | 458 |  | 
|  | 459 | /* | 
|  | 460 | * If we're currently running this IRQ, or its disabled, | 
|  | 461 | * we shouldn't process the IRQ. Mark it pending, handle | 
|  | 462 | * the necessary masking and go out | 
|  | 463 | */ | 
|  | 464 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | 
|  | 465 | !desc->action)) { | 
|  | 466 | desc->status |= (IRQ_PENDING | IRQ_MASKED); | 
|  | 467 | mask_ack_irq(desc, irq); | 
|  | 468 | goto out_unlock; | 
|  | 469 | } | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 470 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 471 |  | 
|  | 472 | /* Start handling the irq */ | 
|  | 473 | desc->chip->ack(irq); | 
|  | 474 |  | 
|  | 475 | /* Mark the IRQ currently in progress.*/ | 
|  | 476 | desc->status |= IRQ_INPROGRESS; | 
|  | 477 |  | 
|  | 478 | do { | 
|  | 479 | struct irqaction *action = desc->action; | 
|  | 480 | irqreturn_t action_ret; | 
|  | 481 |  | 
|  | 482 | if (unlikely(!action)) { | 
|  | 483 | desc->chip->mask(irq); | 
|  | 484 | goto out_unlock; | 
|  | 485 | } | 
|  | 486 |  | 
|  | 487 | /* | 
|  | 488 | * When another irq arrived while we were handling | 
|  | 489 | * one, we could have masked the irq. | 
|  | 490 | * Renable it, if it was not disabled in meantime. | 
|  | 491 | */ | 
|  | 492 | if (unlikely((desc->status & | 
|  | 493 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | 
|  | 494 | (IRQ_PENDING | IRQ_MASKED))) { | 
|  | 495 | desc->chip->unmask(irq); | 
|  | 496 | desc->status &= ~IRQ_MASKED; | 
|  | 497 | } | 
|  | 498 |  | 
|  | 499 | desc->status &= ~IRQ_PENDING; | 
|  | 500 | spin_unlock(&desc->lock); | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 501 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 502 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 503 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 504 | spin_lock(&desc->lock); | 
|  | 505 |  | 
|  | 506 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | 
|  | 507 |  | 
|  | 508 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 509 | out_unlock: | 
|  | 510 | spin_unlock(&desc->lock); | 
|  | 511 | } | 
|  | 512 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 513 | /** | 
|  | 514 | *	handle_percpu_IRQ - Per CPU local irq handler | 
|  | 515 | *	@irq:	the interrupt number | 
|  | 516 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 517 | * | 
|  | 518 | *	Per CPU interrupts on SMP machines without locking requirements | 
|  | 519 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 520 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 521 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 522 | { | 
|  | 523 | irqreturn_t action_ret; | 
|  | 524 |  | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 525 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 526 |  | 
|  | 527 | if (desc->chip->ack) | 
|  | 528 | desc->chip->ack(irq); | 
|  | 529 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 530 | action_ret = handle_IRQ_event(irq, desc->action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 531 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 532 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 533 |  | 
|  | 534 | if (desc->chip->eoi) | 
|  | 535 | desc->chip->eoi(irq); | 
|  | 536 | } | 
|  | 537 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 538 | void | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 539 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, | 
|  | 540 | const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 541 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 542 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 543 | unsigned long flags; | 
|  | 544 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 545 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 546 | printk(KERN_ERR | 
|  | 547 | "Trying to install type control for IRQ%d\n", irq); | 
|  | 548 | return; | 
|  | 549 | } | 
|  | 550 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 551 | if (!handle) | 
|  | 552 | handle = handle_bad_irq; | 
| Thomas Gleixner | 9d7ac8b | 2006-12-22 01:08:14 -0800 | [diff] [blame] | 553 | else if (desc->chip == &no_irq_chip) { | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 554 | printk(KERN_WARNING "Trying to install %sinterrupt handler " | 
| Geert Uytterhoeven | b039db8 | 2006-12-20 15:59:48 +0100 | [diff] [blame] | 555 | "for IRQ%d\n", is_chained ? "chained " : "", irq); | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 556 | /* | 
|  | 557 | * Some ARM implementations install a handler for really dumb | 
|  | 558 | * interrupt hardware without setting an irq_chip. This worked | 
|  | 559 | * with the ARM no_irq_chip but the check in setup_irq would | 
|  | 560 | * prevent us to setup the interrupt at all. Switch it to | 
|  | 561 | * dummy_irq_chip for easy transition. | 
|  | 562 | */ | 
|  | 563 | desc->chip = &dummy_irq_chip; | 
|  | 564 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 565 |  | 
|  | 566 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 567 |  | 
|  | 568 | /* Uninstall? */ | 
|  | 569 | if (handle == handle_bad_irq) { | 
| Jan Beulich | 5575ddf | 2007-02-16 01:28:26 -0800 | [diff] [blame] | 570 | if (desc->chip != &no_irq_chip) | 
|  | 571 | mask_ack_irq(desc, irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 572 | desc->status |= IRQ_DISABLED; | 
|  | 573 | desc->depth = 1; | 
|  | 574 | } | 
|  | 575 | desc->handle_irq = handle; | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 576 | desc->name = name; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 577 |  | 
|  | 578 | if (handle != handle_bad_irq && is_chained) { | 
|  | 579 | desc->status &= ~IRQ_DISABLED; | 
|  | 580 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | 
|  | 581 | desc->depth = 0; | 
| Pawel MOLL | 7e6e178 | 2008-09-01 10:12:11 +0100 | [diff] [blame] | 582 | desc->chip->startup(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 583 | } | 
|  | 584 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 585 | } | 
|  | 586 |  | 
|  | 587 | void | 
|  | 588 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | 
| David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 589 | irq_flow_handler_t handle) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 590 | { | 
|  | 591 | set_irq_chip(irq, chip); | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 592 | __set_irq_handler(irq, handle, 0, NULL); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 593 | } | 
|  | 594 |  | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 595 | void | 
|  | 596 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | 
|  | 597 | irq_flow_handler_t handle, const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 598 | { | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 599 | set_irq_chip(irq, chip); | 
|  | 600 | __set_irq_handler(irq, handle, 0, name); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 601 | } | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 602 |  | 
|  | 603 | void __init set_irq_noprobe(unsigned int irq) | 
|  | 604 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 605 | struct irq_desc *desc = irq_to_desc(irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 606 | unsigned long flags; | 
|  | 607 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 608 | if (!desc) { | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 609 | printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 610 | return; | 
|  | 611 | } | 
|  | 612 |  | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 613 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 614 | desc->status |= IRQ_NOPROBE; | 
|  | 615 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 616 | } | 
|  | 617 |  | 
|  | 618 | void __init set_irq_probe(unsigned int irq) | 
|  | 619 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 620 | struct irq_desc *desc = irq_to_desc(irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 621 | unsigned long flags; | 
|  | 622 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 623 | if (!desc) { | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 624 | printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 625 | return; | 
|  | 626 | } | 
|  | 627 |  | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 628 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 629 | desc->status &= ~IRQ_NOPROBE; | 
|  | 630 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 631 | } |