blob: fb72778dee48562499558319e80d250bcf3c9118 [file] [log] [blame]
Alan Hourihanedbe7e422007-05-08 00:39:25 -07001/*
2 * Copyright (c) Intel Corp. 2007.
3 * All Rights Reserved.
4 *
5 * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
6 * develop this driver.
7 *
8 * This file is part of the Vermilion Range fb driver.
9 * The Vermilion Range fb driver is free software;
10 * you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * The Vermilion Range fb driver is distributed
16 * in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this driver; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 *
25 * Authors:
Marcin Garskidb955172007-10-19 23:22:11 +020026 * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
27 * Michel Dänzer <michel-at-tungstengraphics-dot-com>
Alan Hourihanedbe7e422007-05-08 00:39:25 -070028 * Alan Hourihane <alanh-at-tungstengraphics-dot-com>
29 */
30
31#include <linux/module.h>
32#include <linux/kernel.h>
33#include <linux/errno.h>
34#include <linux/string.h>
35#include <linux/delay.h>
36#include <linux/mm.h>
37#include <linux/fb.h>
38#include <linux/pci.h>
39#include <asm/cacheflush.h>
40#include <asm/tlbflush.h>
41#include <linux/mmzone.h>
Alan Hourihanedbe7e422007-05-08 00:39:25 -070042
43/* #define VERMILION_DEBUG */
44
45#include "vermilion.h"
46
47#define MODULE_NAME "vmlfb"
48
49#define VML_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16)
50
51static struct mutex vml_mutex;
52static struct list_head global_no_mode;
53static struct list_head global_has_mode;
54static struct fb_ops vmlfb_ops;
55static struct vml_sys *subsys = NULL;
56static char *vml_default_mode = "1024x768@60";
57static struct fb_videomode defaultmode = {
58 NULL, 60, 1024, 768, 12896, 144, 24, 29, 3, 136, 6,
59 0, FB_VMODE_NONINTERLACED
60};
61
62static u32 vml_mem_requested = (10 * 1024 * 1024);
63static u32 vml_mem_contig = (4 * 1024 * 1024);
64static u32 vml_mem_min = (4 * 1024 * 1024);
65
66static u32 vml_clocks[] = {
67 6750,
68 13500,
69 27000,
70 29700,
71 37125,
72 54000,
73 59400,
74 74250,
75 120000,
76 148500
77};
78
79static u32 vml_num_clocks = ARRAY_SIZE(vml_clocks);
80
81/*
82 * Allocate a contiguous vram area and make its linear kernel map
83 * uncached.
84 */
85
86static int vmlfb_alloc_vram_area(struct vram_area *va, unsigned max_order,
87 unsigned min_order)
88{
89 gfp_t flags;
90 unsigned long i;
Alan Hourihanedbe7e422007-05-08 00:39:25 -070091
Alan Hourihanedbe7e422007-05-08 00:39:25 -070092 max_order++;
93 do {
94 /*
95 * Really try hard to get the needed memory.
96 * We need memory below the first 32MB, so we
97 * add the __GFP_DMA flag that guarantees that we are
98 * below the first 16MB.
99 */
100
101 flags = __GFP_DMA | __GFP_HIGH;
102 va->logical =
103 __get_free_pages(flags, --max_order);
104 } while (va->logical == 0 && max_order > min_order);
105
106 if (!va->logical)
107 return -ENOMEM;
108
109 va->phys = virt_to_phys((void *)va->logical);
110 va->size = PAGE_SIZE << max_order;
111 va->order = max_order;
112
113 /*
114 * It seems like __get_free_pages only ups the usage count
115 * of the first page. This doesn't work with nopage mapping, so
116 * up the usage count once more.
117 */
118
119 memset((void *)va->logical, 0x00, va->size);
120 for (i = va->logical; i < va->logical + va->size; i += PAGE_SIZE) {
121 get_page(virt_to_page(i));
122 }
123
124 /*
125 * Change caching policy of the linear kernel map to avoid
126 * mapping type conflicts with user-space mappings.
127 * The first global_flush_tlb() is really only there to do a global
128 * wbinvd().
129 */
130
131 global_flush_tlb();
Arjan van de Ven6d238cc2008-01-30 13:34:06 +0100132 set_pages_uc(virt_to_page(va->logical), va->size >> PAGE_SHIFT);
Alan Hourihanedbe7e422007-05-08 00:39:25 -0700133 global_flush_tlb();
134
135 printk(KERN_DEBUG MODULE_NAME
136 ": Allocated %ld bytes vram area at 0x%08lx\n",
137 va->size, va->phys);
138
139 return 0;
140}
141
142/*
143 * Free a contiguous vram area and reset its linear kernel map
144 * mapping type.
145 */
146
147static void vmlfb_free_vram_area(struct vram_area *va)
148{
149 unsigned long j;
150
151 if (va->logical) {
152
153 /*
154 * Reset the linear kernel map caching policy.
155 */
156
Arjan van de Ven6d238cc2008-01-30 13:34:06 +0100157 set_pages_wb(virt_to_page(va->logical),
158 va->size >> PAGE_SHIFT);
Alan Hourihanedbe7e422007-05-08 00:39:25 -0700159 global_flush_tlb();
160
161 /*
162 * Decrease the usage count on the pages we've used
163 * to compensate for upping when allocating.
164 */
165
166 for (j = va->logical; j < va->logical + va->size;
167 j += PAGE_SIZE) {
168 (void)put_page_testzero(virt_to_page(j));
169 }
170
171 printk(KERN_DEBUG MODULE_NAME
172 ": Freeing %ld bytes vram area at 0x%08lx\n",
173 va->size, va->phys);
174 free_pages(va->logical, va->order);
175
176 va->logical = 0;
177 }
178}
179
180/*
181 * Free allocated vram.
182 */
183
184static void vmlfb_free_vram(struct vml_info *vinfo)
185{
186 int i;
187
188 for (i = 0; i < vinfo->num_areas; ++i) {
189 vmlfb_free_vram_area(&vinfo->vram[i]);
190 }
191 vinfo->num_areas = 0;
192}
193
194/*
195 * Allocate vram. Currently we try to allocate contiguous areas from the
196 * __GFP_DMA zone and puzzle them together. A better approach would be to
197 * allocate one contiguous area for scanout and use one-page allocations for
198 * offscreen areas. This requires user-space and GPU virtual mappings.
199 */
200
201static int vmlfb_alloc_vram(struct vml_info *vinfo,
202 size_t requested,
203 size_t min_total, size_t min_contig)
204{
205 int i, j;
206 int order;
207 int contiguous;
208 int err;
209 struct vram_area *va;
210 struct vram_area *va2;
211
212 vinfo->num_areas = 0;
213 for (i = 0; i < VML_VRAM_AREAS; ++i) {
214 va = &vinfo->vram[i];
215 order = 0;
216
217 while (requested > (PAGE_SIZE << order) && order < MAX_ORDER)
218 order++;
219
220 err = vmlfb_alloc_vram_area(va, order, 0);
221
222 if (err)
223 break;
224
225 if (i == 0) {
226 vinfo->vram_start = va->phys;
227 vinfo->vram_logical = (void __iomem *) va->logical;
228 vinfo->vram_contig_size = va->size;
229 vinfo->num_areas = 1;
230 } else {
231 contiguous = 0;
232
233 for (j = 0; j < i; ++j) {
234 va2 = &vinfo->vram[j];
235 if (va->phys + va->size == va2->phys ||
236 va2->phys + va2->size == va->phys) {
237 contiguous = 1;
238 break;
239 }
240 }
241
242 if (contiguous) {
243 vinfo->num_areas++;
244 if (va->phys < vinfo->vram_start) {
245 vinfo->vram_start = va->phys;
246 vinfo->vram_logical =
247 (void __iomem *)va->logical;
248 }
249 vinfo->vram_contig_size += va->size;
250 } else {
251 vmlfb_free_vram_area(va);
252 break;
253 }
254 }
255
256 if (requested < va->size)
257 break;
258 else
259 requested -= va->size;
260 }
261
262 if (vinfo->vram_contig_size > min_total &&
263 vinfo->vram_contig_size > min_contig) {
264
265 printk(KERN_DEBUG MODULE_NAME
266 ": Contiguous vram: %ld bytes at physical 0x%08lx.\n",
267 (unsigned long)vinfo->vram_contig_size,
268 (unsigned long)vinfo->vram_start);
269
270 return 0;
271 }
272
273 printk(KERN_ERR MODULE_NAME
274 ": Could not allocate requested minimal amount of vram.\n");
275
276 vmlfb_free_vram(vinfo);
277
278 return -ENOMEM;
279}
280
281/*
282 * Find the GPU to use with our display controller.
283 */
284
285static int vmlfb_get_gpu(struct vml_par *par)
286{
287 mutex_lock(&vml_mutex);
288
289 par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL);
290
291 if (!par->gpu) {
292 mutex_unlock(&vml_mutex);
293 return -ENODEV;
294 }
295
296 mutex_unlock(&vml_mutex);
297
298 if (pci_enable_device(par->gpu) < 0)
299 return -ENODEV;
300
301 return 0;
302}
303
304/*
305 * Find a contiguous vram area that contains a given offset from vram start.
306 */
307static int vmlfb_vram_offset(struct vml_info *vinfo, unsigned long offset)
308{
309 unsigned long aoffset;
310 unsigned i;
311
312 for (i = 0; i < vinfo->num_areas; ++i) {
313 aoffset = offset - (vinfo->vram[i].phys - vinfo->vram_start);
314
315 if (aoffset < vinfo->vram[i].size) {
316 return 0;
317 }
318 }
319
320 return -EINVAL;
321}
322
323/*
324 * Remap the MMIO register spaces of the VDC and the GPU.
325 */
326
327static int vmlfb_enable_mmio(struct vml_par *par)
328{
329 int err;
330
331 par->vdc_mem_base = pci_resource_start(par->vdc, 0);
332 par->vdc_mem_size = pci_resource_len(par->vdc, 0);
333 if (!request_mem_region(par->vdc_mem_base, par->vdc_mem_size, "vmlfb")) {
334 printk(KERN_ERR MODULE_NAME
335 ": Could not claim display controller MMIO.\n");
336 return -EBUSY;
337 }
338 par->vdc_mem = ioremap_nocache(par->vdc_mem_base, par->vdc_mem_size);
339 if (par->vdc_mem == NULL) {
340 printk(KERN_ERR MODULE_NAME
341 ": Could not map display controller MMIO.\n");
342 err = -ENOMEM;
343 goto out_err_0;
344 }
345
346 par->gpu_mem_base = pci_resource_start(par->gpu, 0);
347 par->gpu_mem_size = pci_resource_len(par->gpu, 0);
348 if (!request_mem_region(par->gpu_mem_base, par->gpu_mem_size, "vmlfb")) {
349 printk(KERN_ERR MODULE_NAME ": Could not claim GPU MMIO.\n");
350 err = -EBUSY;
351 goto out_err_1;
352 }
353 par->gpu_mem = ioremap_nocache(par->gpu_mem_base, par->gpu_mem_size);
354 if (par->gpu_mem == NULL) {
355 printk(KERN_ERR MODULE_NAME ": Could not map GPU MMIO.\n");
356 err = -ENOMEM;
357 goto out_err_2;
358 }
359
360 return 0;
361
362out_err_2:
363 release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
364out_err_1:
365 iounmap(par->vdc_mem);
366out_err_0:
367 release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
368 return err;
369}
370
371/*
372 * Unmap the VDC and GPU register spaces.
373 */
374
375static void vmlfb_disable_mmio(struct vml_par *par)
376{
377 iounmap(par->gpu_mem);
378 release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
379 iounmap(par->vdc_mem);
380 release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
381}
382
383/*
384 * Release and uninit the VDC and GPU.
385 */
386
387static void vmlfb_release_devices(struct vml_par *par)
388{
389 if (atomic_dec_and_test(&par->refcount)) {
390 pci_set_drvdata(par->vdc, NULL);
391 pci_disable_device(par->gpu);
392 pci_disable_device(par->vdc);
393 }
394}
395
396/*
397 * Free up allocated resources for a device.
398 */
399
400static void __devexit vml_pci_remove(struct pci_dev *dev)
401{
402 struct fb_info *info;
403 struct vml_info *vinfo;
404 struct vml_par *par;
405
406 info = pci_get_drvdata(dev);
407 if (info) {
408 vinfo = container_of(info, struct vml_info, info);
409 par = vinfo->par;
410 mutex_lock(&vml_mutex);
411 unregister_framebuffer(info);
412 fb_dealloc_cmap(&info->cmap);
413 vmlfb_free_vram(vinfo);
414 vmlfb_disable_mmio(par);
415 vmlfb_release_devices(par);
416 kfree(vinfo);
417 kfree(par);
418 mutex_unlock(&vml_mutex);
419 }
420}
421
422static void vmlfb_set_pref_pixel_format(struct fb_var_screeninfo *var)
423{
424 switch (var->bits_per_pixel) {
425 case 16:
426 var->blue.offset = 0;
427 var->blue.length = 5;
428 var->green.offset = 5;
429 var->green.length = 5;
430 var->red.offset = 10;
431 var->red.length = 5;
432 var->transp.offset = 15;
433 var->transp.length = 1;
434 break;
435 case 32:
436 var->blue.offset = 0;
437 var->blue.length = 8;
438 var->green.offset = 8;
439 var->green.length = 8;
440 var->red.offset = 16;
441 var->red.length = 8;
442 var->transp.offset = 24;
443 var->transp.length = 0;
444 break;
445 default:
446 break;
447 }
448
449 var->blue.msb_right = var->green.msb_right =
450 var->red.msb_right = var->transp.msb_right = 0;
451}
452
453/*
454 * Device initialization.
455 * We initialize one vml_par struct per device and one vml_info
456 * struct per pipe. Currently we have only one pipe.
457 */
458
459static int __devinit vml_pci_probe(struct pci_dev *dev,
460 const struct pci_device_id *id)
461{
462 struct vml_info *vinfo;
463 struct fb_info *info;
464 struct vml_par *par;
465 int err = 0;
466
467 par = kzalloc(sizeof(*par), GFP_KERNEL);
468 if (par == NULL)
469 return -ENOMEM;
470
471 vinfo = kzalloc(sizeof(*vinfo), GFP_KERNEL);
472 if (vinfo == NULL) {
473 err = -ENOMEM;
474 goto out_err_0;
475 }
476
477 vinfo->par = par;
478 par->vdc = dev;
479 atomic_set(&par->refcount, 1);
480
481 switch (id->device) {
482 case VML_DEVICE_VDC:
483 if ((err = vmlfb_get_gpu(par)))
484 goto out_err_1;
485 pci_set_drvdata(dev, &vinfo->info);
486 break;
487 default:
488 err = -ENODEV;
489 goto out_err_1;
490 break;
491 }
492
493 info = &vinfo->info;
494 info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK;
495
496 err = vmlfb_enable_mmio(par);
497 if (err)
498 goto out_err_2;
499
500 err = vmlfb_alloc_vram(vinfo, vml_mem_requested,
501 vml_mem_contig, vml_mem_min);
502 if (err)
503 goto out_err_3;
504
505 strcpy(info->fix.id, "Vermilion Range");
506 info->fix.mmio_start = 0;
507 info->fix.mmio_len = 0;
508 info->fix.smem_start = vinfo->vram_start;
509 info->fix.smem_len = vinfo->vram_contig_size;
510 info->fix.type = FB_TYPE_PACKED_PIXELS;
511 info->fix.visual = FB_VISUAL_TRUECOLOR;
512 info->fix.ypanstep = 1;
513 info->fix.xpanstep = 1;
514 info->fix.ywrapstep = 0;
515 info->fix.accel = FB_ACCEL_NONE;
516 info->screen_base = vinfo->vram_logical;
517 info->pseudo_palette = vinfo->pseudo_palette;
518 info->par = par;
519 info->fbops = &vmlfb_ops;
520 info->device = &dev->dev;
521
522 INIT_LIST_HEAD(&vinfo->head);
523 vinfo->pipe_disabled = 1;
524 vinfo->cur_blank_mode = FB_BLANK_UNBLANK;
525
526 info->var.grayscale = 0;
527 info->var.bits_per_pixel = 16;
528 vmlfb_set_pref_pixel_format(&info->var);
529
530 if (!fb_find_mode
531 (&info->var, info, vml_default_mode, NULL, 0, &defaultmode, 16)) {
532 printk(KERN_ERR MODULE_NAME ": Could not find initial mode\n");
533 }
534
535 if (fb_alloc_cmap(&info->cmap, 256, 1) < 0) {
536 err = -ENOMEM;
537 goto out_err_4;
538 }
539
540 err = register_framebuffer(info);
541 if (err) {
542 printk(KERN_ERR MODULE_NAME ": Register framebuffer error.\n");
543 goto out_err_5;
544 }
545
546 printk("Initialized vmlfb\n");
547
548 return 0;
549
550out_err_5:
551 fb_dealloc_cmap(&info->cmap);
552out_err_4:
553 vmlfb_free_vram(vinfo);
554out_err_3:
555 vmlfb_disable_mmio(par);
556out_err_2:
557 vmlfb_release_devices(par);
558out_err_1:
559 kfree(vinfo);
560out_err_0:
561 kfree(par);
562 return err;
563}
564
565static int vmlfb_open(struct fb_info *info, int user)
566{
567 /*
568 * Save registers here?
569 */
570 return 0;
571}
572
573static int vmlfb_release(struct fb_info *info, int user)
574{
575 /*
576 * Restore registers here.
577 */
578
579 return 0;
580}
581
582static int vml_nearest_clock(int clock)
583{
584
585 int i;
586 int cur_index;
587 int cur_diff;
588 int diff;
589
590 cur_index = 0;
591 cur_diff = clock - vml_clocks[0];
592 cur_diff = (cur_diff < 0) ? -cur_diff : cur_diff;
593 for (i = 1; i < vml_num_clocks; ++i) {
594 diff = clock - vml_clocks[i];
595 diff = (diff < 0) ? -diff : diff;
596 if (diff < cur_diff) {
597 cur_index = i;
598 cur_diff = diff;
599 }
600 }
601 return vml_clocks[cur_index];
602}
603
604static int vmlfb_check_var_locked(struct fb_var_screeninfo *var,
605 struct vml_info *vinfo)
606{
607 u32 pitch;
608 u64 mem;
609 int nearest_clock;
610 int clock;
611 int clock_diff;
612 struct fb_var_screeninfo v;
613
614 v = *var;
615 clock = PICOS2KHZ(var->pixclock);
616
617 if (subsys && subsys->nearest_clock) {
618 nearest_clock = subsys->nearest_clock(subsys, clock);
619 } else {
620 nearest_clock = vml_nearest_clock(clock);
621 }
622
623 /*
624 * Accept a 20% diff.
625 */
626
627 clock_diff = nearest_clock - clock;
628 clock_diff = (clock_diff < 0) ? -clock_diff : clock_diff;
629 if (clock_diff > clock / 5) {
630#if 0
631 printk(KERN_DEBUG MODULE_NAME ": Diff failure. %d %d\n",clock_diff,clock);
632#endif
633 return -EINVAL;
634 }
635
636 v.pixclock = KHZ2PICOS(nearest_clock);
637
638 if (var->xres > VML_MAX_XRES || var->yres > VML_MAX_YRES) {
639 printk(KERN_DEBUG MODULE_NAME ": Resolution failure.\n");
640 return -EINVAL;
641 }
642 if (var->xres_virtual > VML_MAX_XRES_VIRTUAL) {
643 printk(KERN_DEBUG MODULE_NAME
644 ": Virtual resolution failure.\n");
645 return -EINVAL;
646 }
647 switch (v.bits_per_pixel) {
648 case 0 ... 16:
649 v.bits_per_pixel = 16;
650 break;
651 case 17 ... 32:
652 v.bits_per_pixel = 32;
653 break;
654 default:
655 printk(KERN_DEBUG MODULE_NAME ": Invalid bpp: %d.\n",
656 var->bits_per_pixel);
657 return -EINVAL;
658 }
659
660 pitch = __ALIGN_MASK((var->xres * var->bits_per_pixel) >> 3, 0x3F);
661 mem = pitch * var->yres_virtual;
662 if (mem > vinfo->vram_contig_size) {
663 return -ENOMEM;
664 }
665
666 switch (v.bits_per_pixel) {
667 case 16:
668 if (var->blue.offset != 0 ||
669 var->blue.length != 5 ||
670 var->green.offset != 5 ||
671 var->green.length != 5 ||
672 var->red.offset != 10 ||
673 var->red.length != 5 ||
674 var->transp.offset != 15 || var->transp.length != 1) {
675 vmlfb_set_pref_pixel_format(&v);
676 }
677 break;
678 case 32:
679 if (var->blue.offset != 0 ||
680 var->blue.length != 8 ||
681 var->green.offset != 8 ||
682 var->green.length != 8 ||
683 var->red.offset != 16 ||
684 var->red.length != 8 ||
685 (var->transp.length != 0 && var->transp.length != 8) ||
686 (var->transp.length == 8 && var->transp.offset != 24)) {
687 vmlfb_set_pref_pixel_format(&v);
688 }
689 break;
690 default:
691 return -EINVAL;
692 }
693
694 *var = v;
695
696 return 0;
697}
698
699static int vmlfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
700{
701 struct vml_info *vinfo = container_of(info, struct vml_info, info);
702 int ret;
703
704 mutex_lock(&vml_mutex);
705 ret = vmlfb_check_var_locked(var, vinfo);
706 mutex_unlock(&vml_mutex);
707
708 return ret;
709}
710
711static void vml_wait_vblank(struct vml_info *vinfo)
712{
713 /* Wait for vblank. For now, just wait for a 50Hz cycle (20ms)) */
714 mdelay(20);
715}
716
717static void vmlfb_disable_pipe(struct vml_info *vinfo)
718{
719 struct vml_par *par = vinfo->par;
720
721 /* Disable the MDVO pad */
722 VML_WRITE32(par, VML_RCOMPSTAT, 0);
723 while (!(VML_READ32(par, VML_RCOMPSTAT) & VML_MDVO_VDC_I_RCOMP)) ;
724
725 /* Disable display planes */
726 VML_WRITE32(par, VML_DSPCCNTR,
727 VML_READ32(par, VML_DSPCCNTR) & ~VML_GFX_ENABLE);
728 (void)VML_READ32(par, VML_DSPCCNTR);
729 /* Wait for vblank for the disable to take effect */
730 vml_wait_vblank(vinfo);
731
732 /* Next, disable display pipes */
733 VML_WRITE32(par, VML_PIPEACONF, 0);
734 (void)VML_READ32(par, VML_PIPEACONF);
735
736 vinfo->pipe_disabled = 1;
737}
738
739#ifdef VERMILION_DEBUG
740static void vml_dump_regs(struct vml_info *vinfo)
741{
742 struct vml_par *par = vinfo->par;
743
744 printk(KERN_DEBUG MODULE_NAME ": Modesetting register dump:\n");
745 printk(KERN_DEBUG MODULE_NAME ": \tHTOTAL_A : 0x%08x\n",
746 (unsigned)VML_READ32(par, VML_HTOTAL_A));
747 printk(KERN_DEBUG MODULE_NAME ": \tHBLANK_A : 0x%08x\n",
748 (unsigned)VML_READ32(par, VML_HBLANK_A));
749 printk(KERN_DEBUG MODULE_NAME ": \tHSYNC_A : 0x%08x\n",
750 (unsigned)VML_READ32(par, VML_HSYNC_A));
751 printk(KERN_DEBUG MODULE_NAME ": \tVTOTAL_A : 0x%08x\n",
752 (unsigned)VML_READ32(par, VML_VTOTAL_A));
753 printk(KERN_DEBUG MODULE_NAME ": \tVBLANK_A : 0x%08x\n",
754 (unsigned)VML_READ32(par, VML_VBLANK_A));
755 printk(KERN_DEBUG MODULE_NAME ": \tVSYNC_A : 0x%08x\n",
756 (unsigned)VML_READ32(par, VML_VSYNC_A));
757 printk(KERN_DEBUG MODULE_NAME ": \tDSPCSTRIDE : 0x%08x\n",
758 (unsigned)VML_READ32(par, VML_DSPCSTRIDE));
759 printk(KERN_DEBUG MODULE_NAME ": \tDSPCSIZE : 0x%08x\n",
760 (unsigned)VML_READ32(par, VML_DSPCSIZE));
761 printk(KERN_DEBUG MODULE_NAME ": \tDSPCPOS : 0x%08x\n",
762 (unsigned)VML_READ32(par, VML_DSPCPOS));
763 printk(KERN_DEBUG MODULE_NAME ": \tDSPARB : 0x%08x\n",
764 (unsigned)VML_READ32(par, VML_DSPARB));
765 printk(KERN_DEBUG MODULE_NAME ": \tDSPCADDR : 0x%08x\n",
766 (unsigned)VML_READ32(par, VML_DSPCADDR));
767 printk(KERN_DEBUG MODULE_NAME ": \tBCLRPAT_A : 0x%08x\n",
768 (unsigned)VML_READ32(par, VML_BCLRPAT_A));
769 printk(KERN_DEBUG MODULE_NAME ": \tCANVSCLR_A : 0x%08x\n",
770 (unsigned)VML_READ32(par, VML_CANVSCLR_A));
771 printk(KERN_DEBUG MODULE_NAME ": \tPIPEASRC : 0x%08x\n",
772 (unsigned)VML_READ32(par, VML_PIPEASRC));
773 printk(KERN_DEBUG MODULE_NAME ": \tPIPEACONF : 0x%08x\n",
774 (unsigned)VML_READ32(par, VML_PIPEACONF));
775 printk(KERN_DEBUG MODULE_NAME ": \tDSPCCNTR : 0x%08x\n",
776 (unsigned)VML_READ32(par, VML_DSPCCNTR));
777 printk(KERN_DEBUG MODULE_NAME ": \tRCOMPSTAT : 0x%08x\n",
778 (unsigned)VML_READ32(par, VML_RCOMPSTAT));
779 printk(KERN_DEBUG MODULE_NAME ": End of modesetting register dump.\n");
780}
781#endif
782
783static int vmlfb_set_par_locked(struct vml_info *vinfo)
784{
785 struct vml_par *par = vinfo->par;
786 struct fb_info *info = &vinfo->info;
787 struct fb_var_screeninfo *var = &info->var;
788 u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end;
789 u32 vtotal, vactive, vblank_start, vblank_end, vsync_start, vsync_end;
790 u32 dspcntr;
791 int clock;
792
793 vinfo->bytes_per_pixel = var->bits_per_pixel >> 3;
794 vinfo->stride =
795 __ALIGN_MASK(var->xres_virtual * vinfo->bytes_per_pixel, 0x3F);
796 info->fix.line_length = vinfo->stride;
797
798 if (!subsys)
799 return 0;
800
801 htotal =
802 var->xres + var->right_margin + var->hsync_len + var->left_margin;
803 hactive = var->xres;
804 hblank_start = var->xres;
805 hblank_end = htotal;
806 hsync_start = hactive + var->right_margin;
807 hsync_end = hsync_start + var->hsync_len;
808
809 vtotal =
810 var->yres + var->lower_margin + var->vsync_len + var->upper_margin;
811 vactive = var->yres;
812 vblank_start = var->yres;
813 vblank_end = vtotal;
814 vsync_start = vactive + var->lower_margin;
815 vsync_end = vsync_start + var->vsync_len;
816
817 dspcntr = VML_GFX_ENABLE | VML_GFX_GAMMABYPASS;
818 clock = PICOS2KHZ(var->pixclock);
819
820 if (subsys->nearest_clock) {
821 clock = subsys->nearest_clock(subsys, clock);
822 } else {
823 clock = vml_nearest_clock(clock);
824 }
825 printk(KERN_DEBUG MODULE_NAME
826 ": Set mode Hfreq : %d kHz, Vfreq : %d Hz.\n", clock / htotal,
827 ((clock / htotal) * 1000) / vtotal);
828
829 switch (var->bits_per_pixel) {
830 case 16:
831 dspcntr |= VML_GFX_ARGB1555;
832 break;
833 case 32:
834 if (var->transp.length == 8)
835 dspcntr |= VML_GFX_ARGB8888 | VML_GFX_ALPHAMULT;
836 else
837 dspcntr |= VML_GFX_RGB0888;
838 break;
839 default:
840 return -EINVAL;
841 }
842
843 vmlfb_disable_pipe(vinfo);
844 mb();
845
846 if (subsys->set_clock)
847 subsys->set_clock(subsys, clock);
848 else
849 return -EINVAL;
850
851 VML_WRITE32(par, VML_HTOTAL_A, ((htotal - 1) << 16) | (hactive - 1));
852 VML_WRITE32(par, VML_HBLANK_A,
853 ((hblank_end - 1) << 16) | (hblank_start - 1));
854 VML_WRITE32(par, VML_HSYNC_A,
855 ((hsync_end - 1) << 16) | (hsync_start - 1));
856 VML_WRITE32(par, VML_VTOTAL_A, ((vtotal - 1) << 16) | (vactive - 1));
857 VML_WRITE32(par, VML_VBLANK_A,
858 ((vblank_end - 1) << 16) | (vblank_start - 1));
859 VML_WRITE32(par, VML_VSYNC_A,
860 ((vsync_end - 1) << 16) | (vsync_start - 1));
861 VML_WRITE32(par, VML_DSPCSTRIDE, vinfo->stride);
862 VML_WRITE32(par, VML_DSPCSIZE,
863 ((var->yres - 1) << 16) | (var->xres - 1));
864 VML_WRITE32(par, VML_DSPCPOS, 0x00000000);
865 VML_WRITE32(par, VML_DSPARB, VML_FIFO_DEFAULT);
866 VML_WRITE32(par, VML_BCLRPAT_A, 0x00000000);
867 VML_WRITE32(par, VML_CANVSCLR_A, 0x00000000);
868 VML_WRITE32(par, VML_PIPEASRC,
869 ((var->xres - 1) << 16) | (var->yres - 1));
870
871 wmb();
872 VML_WRITE32(par, VML_PIPEACONF, VML_PIPE_ENABLE);
873 wmb();
874 VML_WRITE32(par, VML_DSPCCNTR, dspcntr);
875 wmb();
876 VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
877 var->yoffset * vinfo->stride +
878 var->xoffset * vinfo->bytes_per_pixel);
879
880 VML_WRITE32(par, VML_RCOMPSTAT, VML_MDVO_PAD_ENABLE);
881
882 while (!(VML_READ32(par, VML_RCOMPSTAT) &
883 (VML_MDVO_VDC_I_RCOMP | VML_MDVO_PAD_ENABLE))) ;
884
885 vinfo->pipe_disabled = 0;
886#ifdef VERMILION_DEBUG
887 vml_dump_regs(vinfo);
888#endif
889
890 return 0;
891}
892
893static int vmlfb_set_par(struct fb_info *info)
894{
895 struct vml_info *vinfo = container_of(info, struct vml_info, info);
896 int ret;
897
898 mutex_lock(&vml_mutex);
899 list_del(&vinfo->head);
900 list_add(&vinfo->head, (subsys) ? &global_has_mode : &global_no_mode);
901 ret = vmlfb_set_par_locked(vinfo);
902
903 mutex_unlock(&vml_mutex);
904 return ret;
905}
906
907static int vmlfb_blank_locked(struct vml_info *vinfo)
908{
909 struct vml_par *par = vinfo->par;
910 u32 cur = VML_READ32(par, VML_PIPEACONF);
911
912 switch (vinfo->cur_blank_mode) {
913 case FB_BLANK_UNBLANK:
914 if (vinfo->pipe_disabled) {
915 vmlfb_set_par_locked(vinfo);
916 }
917 VML_WRITE32(par, VML_PIPEACONF, cur & ~VML_PIPE_FORCE_BORDER);
918 (void)VML_READ32(par, VML_PIPEACONF);
919 break;
920 case FB_BLANK_NORMAL:
921 if (vinfo->pipe_disabled) {
922 vmlfb_set_par_locked(vinfo);
923 }
924 VML_WRITE32(par, VML_PIPEACONF, cur | VML_PIPE_FORCE_BORDER);
925 (void)VML_READ32(par, VML_PIPEACONF);
926 break;
927 case FB_BLANK_VSYNC_SUSPEND:
928 case FB_BLANK_HSYNC_SUSPEND:
929 if (!vinfo->pipe_disabled) {
930 vmlfb_disable_pipe(vinfo);
931 }
932 break;
933 case FB_BLANK_POWERDOWN:
934 if (!vinfo->pipe_disabled) {
935 vmlfb_disable_pipe(vinfo);
936 }
937 break;
938 default:
939 return -EINVAL;
940 }
941
942 return 0;
943}
944
945static int vmlfb_blank(int blank_mode, struct fb_info *info)
946{
947 struct vml_info *vinfo = container_of(info, struct vml_info, info);
948 int ret;
949
950 mutex_lock(&vml_mutex);
951 vinfo->cur_blank_mode = blank_mode;
952 ret = vmlfb_blank_locked(vinfo);
953 mutex_unlock(&vml_mutex);
954 return ret;
955}
956
957static int vmlfb_pan_display(struct fb_var_screeninfo *var,
958 struct fb_info *info)
959{
960 struct vml_info *vinfo = container_of(info, struct vml_info, info);
961 struct vml_par *par = vinfo->par;
962
963 mutex_lock(&vml_mutex);
964 VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
965 var->yoffset * vinfo->stride +
966 var->xoffset * vinfo->bytes_per_pixel);
967 (void)VML_READ32(par, VML_DSPCADDR);
968 mutex_unlock(&vml_mutex);
969
970 return 0;
971}
972
973static int vmlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
974 u_int transp, struct fb_info *info)
975{
976 u32 v;
977
978 if (regno >= 16)
979 return -EINVAL;
980
981 if (info->var.grayscale) {
982 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
983 }
984
985 if (info->fix.visual != FB_VISUAL_TRUECOLOR)
986 return -EINVAL;
987
988 red = VML_TOHW(red, info->var.red.length);
989 blue = VML_TOHW(blue, info->var.blue.length);
990 green = VML_TOHW(green, info->var.green.length);
991 transp = VML_TOHW(transp, info->var.transp.length);
992
993 v = (red << info->var.red.offset) |
994 (green << info->var.green.offset) |
995 (blue << info->var.blue.offset) |
996 (transp << info->var.transp.offset);
997
998 switch (info->var.bits_per_pixel) {
999 case 16:
1000 ((u32 *) info->pseudo_palette)[regno] = v;
1001 break;
1002 case 24:
1003 case 32:
1004 ((u32 *) info->pseudo_palette)[regno] = v;
1005 break;
1006 }
1007 return 0;
1008}
1009
1010static int vmlfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
1011{
1012 struct vml_info *vinfo = container_of(info, struct vml_info, info);
1013 unsigned long size = vma->vm_end - vma->vm_start;
1014 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
1015 int ret;
1016
1017 if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
1018 return -EINVAL;
1019 if (offset + size > vinfo->vram_contig_size)
1020 return -EINVAL;
1021 ret = vmlfb_vram_offset(vinfo, offset);
1022 if (ret)
1023 return -EINVAL;
1024 offset += vinfo->vram_start;
1025 pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
1026 pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT;
1027 vma->vm_flags |= VM_RESERVED | VM_IO;
1028 if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT,
1029 size, vma->vm_page_prot))
1030 return -EAGAIN;
1031 return 0;
1032}
1033
1034static int vmlfb_sync(struct fb_info *info)
1035{
1036 return 0;
1037}
1038
1039static int vmlfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1040{
1041 return -EINVAL; /* just to force soft_cursor() call */
1042}
1043
1044static struct fb_ops vmlfb_ops = {
1045 .owner = THIS_MODULE,
1046 .fb_open = vmlfb_open,
1047 .fb_release = vmlfb_release,
1048 .fb_check_var = vmlfb_check_var,
1049 .fb_set_par = vmlfb_set_par,
1050 .fb_blank = vmlfb_blank,
1051 .fb_pan_display = vmlfb_pan_display,
1052 .fb_fillrect = cfb_fillrect,
1053 .fb_copyarea = cfb_copyarea,
1054 .fb_imageblit = cfb_imageblit,
1055 .fb_cursor = vmlfb_cursor,
1056 .fb_sync = vmlfb_sync,
1057 .fb_mmap = vmlfb_mmap,
1058 .fb_setcolreg = vmlfb_setcolreg
1059};
1060
1061static struct pci_device_id vml_ids[] = {
1062 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, VML_DEVICE_VDC)},
1063 {0}
1064};
1065
1066static struct pci_driver vmlfb_pci_driver = {
1067 .name = "vmlfb",
1068 .id_table = vml_ids,
1069 .probe = vml_pci_probe,
1070 .remove = __devexit_p(vml_pci_remove)
1071};
1072
1073static void __exit vmlfb_cleanup(void)
1074{
1075 pci_unregister_driver(&vmlfb_pci_driver);
1076}
1077
1078static int __init vmlfb_init(void)
1079{
1080
1081#ifndef MODULE
1082 char *option = NULL;
1083
1084 if (fb_get_options(MODULE_NAME, &option))
1085 return -ENODEV;
1086#endif
1087
1088 printk(KERN_DEBUG MODULE_NAME ": initializing\n");
1089 mutex_init(&vml_mutex);
1090 INIT_LIST_HEAD(&global_no_mode);
1091 INIT_LIST_HEAD(&global_has_mode);
1092
1093 return pci_register_driver(&vmlfb_pci_driver);
1094}
1095
1096int vmlfb_register_subsys(struct vml_sys *sys)
1097{
1098 struct vml_info *entry;
1099 struct list_head *list;
1100 u32 save_activate;
1101
1102 mutex_lock(&vml_mutex);
1103 if (subsys != NULL) {
1104 subsys->restore(subsys);
1105 }
1106 subsys = sys;
1107 subsys->save(subsys);
1108
1109 /*
1110 * We need to restart list traversal for each item, since we
1111 * release the list mutex in the loop.
1112 */
1113
1114 list = global_no_mode.next;
1115 while (list != &global_no_mode) {
1116 list_del_init(list);
1117 entry = list_entry(list, struct vml_info, head);
1118
1119 /*
1120 * First, try the current mode which might not be
1121 * completely validated with respect to the pixel clock.
1122 */
1123
1124 if (!vmlfb_check_var_locked(&entry->info.var, entry)) {
1125 vmlfb_set_par_locked(entry);
1126 list_add_tail(list, &global_has_mode);
1127 } else {
1128
1129 /*
1130 * Didn't work. Try to find another mode,
1131 * that matches this subsys.
1132 */
1133
1134 mutex_unlock(&vml_mutex);
1135 save_activate = entry->info.var.activate;
1136 entry->info.var.bits_per_pixel = 16;
1137 vmlfb_set_pref_pixel_format(&entry->info.var);
1138 if (fb_find_mode(&entry->info.var,
1139 &entry->info,
1140 vml_default_mode, NULL, 0, NULL, 16)) {
1141 entry->info.var.activate |=
1142 FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
1143 fb_set_var(&entry->info, &entry->info.var);
1144 } else {
1145 printk(KERN_ERR MODULE_NAME
1146 ": Sorry. no mode found for this subsys.\n");
1147 }
1148 entry->info.var.activate = save_activate;
1149 mutex_lock(&vml_mutex);
1150 }
1151 vmlfb_blank_locked(entry);
1152 list = global_no_mode.next;
1153 }
1154 mutex_unlock(&vml_mutex);
1155
1156 printk(KERN_DEBUG MODULE_NAME ": Registered %s subsystem.\n",
1157 subsys->name ? subsys->name : "unknown");
1158 return 0;
1159}
1160
1161EXPORT_SYMBOL_GPL(vmlfb_register_subsys);
1162
1163void vmlfb_unregister_subsys(struct vml_sys *sys)
1164{
1165 struct vml_info *entry, *next;
1166
1167 mutex_lock(&vml_mutex);
1168 if (subsys != sys) {
1169 mutex_unlock(&vml_mutex);
1170 return;
1171 }
1172 subsys->restore(subsys);
1173 subsys = NULL;
1174 list_for_each_entry_safe(entry, next, &global_has_mode, head) {
1175 printk(KERN_DEBUG MODULE_NAME ": subsys disable pipe\n");
1176 vmlfb_disable_pipe(entry);
1177 list_del(&entry->head);
1178 list_add_tail(&entry->head, &global_no_mode);
1179 }
1180 mutex_unlock(&vml_mutex);
1181}
1182
1183EXPORT_SYMBOL_GPL(vmlfb_unregister_subsys);
1184
1185module_init(vmlfb_init);
1186module_exit(vmlfb_cleanup);
1187
1188MODULE_AUTHOR("Tungsten Graphics");
1189MODULE_DESCRIPTION("Initialization of the Vermilion display devices");
1190MODULE_VERSION("1.0.0");
1191MODULE_LICENSE("GPL");