blob: 818b6b15f9d973f0d5bcb9c7c0ef1f0b02f342d4 [file] [log] [blame]
Flemmard6ecd7072013-10-11 15:49:28 +02001/*
2 * drivers/user-pins.c
3 *
4 * Copyright (C) 2008 Palm, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/delay.h>
14#include <linux/slab.h>
15#include <linux/err.h>
16#include <linux/clk.h>
17#include <linux/ctype.h>
18#include <linux/debugfs.h>
19#include <linux/gpio.h>
20#include <linux/sysfs.h>
21#include <linux/device.h>
22#include <linux/interrupt.h>
23#include <linux/platform_device.h>
24#include <linux/spinlock.h>
25#include <linux/user-pins.h>
26#include <linux/module.h>
27#ifdef CONFIG_PINMUX
28#include <linux/pinmux.h>
29#endif
30
31#include <asm/io.h>
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35
36#undef MODDEBUG
37//#define MODDEBUG 1
38
39#ifdef MODDEBUG
40#define PDBG(args...) printk(args)
41#else
42#define PDBG(args...)
43#endif
44
45#define DRIVER_NAME "user-pins"
46
47enum event {
48 USER_PIN_EVENT_IRQ,
49 USER_PIN_EVENT_IRQ_READ,
50};
51
52struct user_pins_log_event {
53 ktime_t timestamp;
54 enum event event;
55 int gpio;
56};
57
58#if defined(CONFIG_DEBUG_FS)
59#define NR_LOG_ENTRIES 512
60
61static struct user_pins_log_event user_pins_log[NR_LOG_ENTRIES];
62static int user_pins_log_idx;
63
64static DEFINE_SPINLOCK(debug_lock);
65
66static char debug_buffer[PAGE_SIZE];
67
68static void user_pins_log_event(int gpio, enum event event)
69{
70 unsigned long flags;
71 spin_lock_irqsave(&debug_lock, flags);
72 user_pins_log[user_pins_log_idx].timestamp = ktime_get();
73 user_pins_log[user_pins_log_idx].event = event;
74 user_pins_log[user_pins_log_idx].gpio = gpio;
75 user_pins_log_idx += 1;
76 if (user_pins_log_idx == NR_LOG_ENTRIES) {
77 user_pins_log_idx = 0;
78 }
79 spin_unlock_irqrestore(&debug_lock, flags);
80}
81
82static int debug_open(struct inode *inode, struct file *file)
83{
84 file->private_data = inode->i_private;
85 return 0;
86}
87
88static ssize_t debug_show_log(struct file *file, char __user *ubuf,
89 size_t count, loff_t *ppos)
90{
91 char *buf = debug_buffer;
92 int i, n = 0;
93 const char *event;
94 unsigned long flags;
95
96 spin_lock_irqsave(&debug_lock, flags);
97
98 for (i = 0; i < user_pins_log_idx; i++) {
99 switch (user_pins_log[i].event) {
100 case USER_PIN_EVENT_IRQ:
101 event = "IRQ";
102 break;
103 case USER_PIN_EVENT_IRQ_READ:
104 event = "IRQ_READ";
105 break;
106 default:
107 event = "<null>";
108 break;
109 }
110 n += scnprintf(buf + n, PAGE_SIZE - n,
111 "%010llu: %-8d %s\n",
112 ktime_to_ns(user_pins_log[i].timestamp),
113 user_pins_log[i].gpio, event);
114 }
115
116 user_pins_log_idx = 0;
117
118 spin_unlock_irqrestore(&debug_lock, flags);
119
120 return simple_read_from_buffer(ubuf, count, ppos, buf, n);
121}
122
123static const struct file_operations debug_log_fops = {
124 .open = debug_open,
125 .read = debug_show_log,
126};
127
128static void user_pins_debug_init(void)
129{
130 struct dentry *dent;
131 dent = debugfs_create_dir(DRIVER_NAME, 0);
132 if (IS_ERR(dent)) {
133 return;
134 }
135 debugfs_create_file("log", 0444, dent, NULL, &debug_log_fops);
136 user_pins_log_idx = 0;
137}
138#else
139static void user_pins_log_event(int gpio, enum event event) { }
140static void user_pins_debug_init(void) { }
141#endif
142
143static struct kobject *user_hw_kobj;
144static struct kobject *pins_kobj;
145
146DEFINE_SPINLOCK(pins_lock);
147
148static int __init user_hw_init(void)
149{
150 user_hw_kobj = kobject_create_and_add("user_hw", NULL);
151 if (user_hw_kobj == NULL) {
152 return -ENOMEM;
153 }
154 return 0;
155}
156
157arch_initcall(user_hw_init);
158
159struct pin_attribute {
160 struct attribute attr;
161 ssize_t (*show) (struct pin_attribute *attr, char *buf);
162 ssize_t (*store)(struct pin_attribute *attr, const char *buf, size_t count);
163};
164
165#define to_pin_attr(_attr) container_of(_attr, struct pin_attribute, attr)
166
167static ssize_t
168pin_attr_show(struct kobject *kobj, struct attribute *attr, char *buf)
169{
170 struct pin_attribute * pin_attr = to_pin_attr(attr);
171 if (pin_attr->show) {
172 return pin_attr->show(pin_attr, buf);
173 } else {
174 return -EIO;
175 }
176 return 0;
177}
178
179static ssize_t
180pin_attr_store(struct kobject *kobj, struct attribute *attr, const char *buf,
181 size_t count)
182{
183 struct pin_attribute * pin_attr = to_pin_attr(attr);
184 if (pin_attr->store) {
185 return pin_attr->store (pin_attr, buf, count);
186 } else {
187 return -EIO;
188 }
189}
190
191static struct sysfs_ops pin_sysfs_ops = {
192 .show = pin_attr_show,
193 .store = pin_attr_store,
194};
195
196static struct kobj_type ktype_pin = {
197 .release = NULL,
198 .sysfs_ops = &pin_sysfs_ops,
199};
200
201struct gpio_pin {
202 int gpio;
203 int options;
204 int direction;
205 int act_level;
206 int def_level;
207 int active_power_collapse;
208 irqreturn_t (*irq_handler)(int irq, void *data);
209 int (*pinmux)(int gpio, int mode);
210 atomic_t irq_count;
211 int irq_config;
212 int irq_masked;
213 int irq_requested;
214 const char * name;
215 int irq_handle_mode;
216 atomic_t irqs_during_suspend;
217 struct sysfs_dirent *sd;
218 struct pin_attribute attr_gpio;
219 struct pin_attribute attr_level;
220 struct pin_attribute attr_active;
221 struct pin_attribute attr_direction;
222 struct pin_attribute attr_irq;
223 struct pin_attribute attr_irqconfig;
224 struct pin_attribute attr_irqrequest;
225 struct pin_attribute attr_irqmask;
226 struct pin_attribute attr_irq_handle_mode;
227 struct pin_attribute attr_active_power_collapse;
228 struct attribute *attr_ptr_arr[11];
229};
230
231struct gpio_pin_set_item {
232 struct attribute_group attr_grp;
233 struct gpio_pin pin;
234};
235
236struct gpio_pin_set {
237 const char *set_name;
238 struct kobject kobj;
239 int num_pins;
240 struct gpio_pin_set_item pins[];
241};
242
243struct gpio_pin_dev_ctxt {
244 int num_sets;
245 struct gpio_pin_set *sets[];
246};
247
248/*
249 * Show irq handle mode
250 *
251 * If AUTO, irq will be handled by irq_handler
252 */
253static int
254pin_show_irq_mode ( struct pin_attribute *attr, char *buf)
255{
256 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_irq_handle_mode );
257 return sprintf(buf, "%d\n", pin->irq_handle_mode );
258}
259
260/*
261 * Set irq handle mode for specified pin
262 *
263 */
264static ssize_t
265pin_store_irq_mode( struct pin_attribute *attr, const char * buf, size_t count)
266{
267 int irq_handle_mode;
268 unsigned long flags;
269 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_irq_handle_mode );
270 sscanf(buf, "%d", &irq_handle_mode);
271
272 spin_lock_irqsave(&pins_lock, flags);
273
274 // reset irq count to detect user suspend and kernel suspend
275 pin->irq_handle_mode = irq_handle_mode;
276 if(pin->irq_handle_mode == IRQ_HANDLE_OFF)
277 atomic_set(&pin->irqs_during_suspend, 0);
278
279 spin_unlock_irqrestore(&pins_lock, flags);
280
281 printk(KERN_INFO"USERPIN: setting irq handle mode of pin gpio %d to %d\n",
282 pin->gpio, irq_handle_mode);
283
284 return count;
285}
286
287static irqreturn_t user_pins_irq(int irq, void *data)
288{
289 unsigned long flags;
290 struct gpio_pin *pin = (struct gpio_pin *)data;
291
292 user_pins_log_event(pin->gpio, USER_PIN_EVENT_IRQ);
293
294 atomic_inc(&pin->irq_count);
295
296 spin_lock_irqsave(&pins_lock, flags);
297
298 if (pin->irq_handle_mode & IRQ_HANDLE_OFF)
299 atomic_inc(&pin->irqs_during_suspend);
300
301 spin_unlock_irqrestore(&pins_lock, flags);
302
303 if (pin->sd != NULL) {
304 sysfs_notify_dirent(pin->sd);
305 }
306
307 if (pin->irq_handler != NULL) {
308 pin->irq_handler(irq, NULL);
309 }
310
311 return IRQ_HANDLED;
312}
313
314static int user_pins_irq_request(struct gpio_pin *pin)
315{
316 int rc = 0;
317
318 printk("user-pins: configuring irq for gpio %d\n", pin->gpio);
319
320 rc = request_irq(gpio_to_irq(pin->gpio), user_pins_irq,
321 pin->irq_config, "userpins", pin);
322 if (rc) {
323 printk("user-pins: failed to request irq\n");
324 }
325
326 return rc;
327}
328
329/*
330 * Show gpio direction
331 */
332static int pin_show_direction(struct pin_attribute *attr, char *buf)
333{
334 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_direction);
335 return sprintf(buf, "%d\n", pin->direction);
336}
337
338/*
339 * Show active level for specified pin
340 */
341static int pin_show_active(struct pin_attribute *attr, char *buf)
342{
343 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_active);
344 return sprintf(buf, "%d\n", pin->act_level);
345}
346
347static int pin_show_active_power_collapse(struct pin_attribute *attr, char *buf)
348{
349 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_active_power_collapse);
350 return sprintf(buf, "%d\n", pin->active_power_collapse);
351}
352
353/*
354 * Show gpio number
355 */
356static int pin_show_gpio(struct pin_attribute *attr, char *buf)
357{
358 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_gpio);
359 return sprintf(buf, "%d\n", pin->gpio);
360}
361
362/*
363 * Show current for specified pin
364 */
365static int pin_show_level(struct pin_attribute *attr, char *buf)
366{
367 int val;
368 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_level);
369
370 val = gpio_get_value(pin->gpio);
371 PDBG("get: gpio[%d] = %d\n", pin->gpio, val);
372 if (val) {
373 return sprintf(buf, "1\n" );
374 } else {
375 return sprintf(buf, "0\n" );
376 }
377}
378
379/*
380 * Set level for specified pin
381 */
382static ssize_t
383pin_store_level(struct pin_attribute *attr, const char *buf, size_t count)
384{
385 int i = 0, len, val = -1;
386 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_level);
387
388 if (pin->options & PIN_READ_ONLY) {
389 return count; // just ignore writes
390 }
391
392 /* skip leading white spaces */
393 while (i < count && isspace(buf[i])) {
394 i++;
395 }
396
397 len = count - i;
398 if (len >= 1 && strncmp(buf+i, "1", 1) == 0) {
399 val = 1;
400 goto set;
401 }
402
403 if (len >= 1 && strncmp(buf+i, "0", 1) == 0) {
404 val = 0;
405 goto set;
406 }
407
408 if (len >= 4 && strncmp(buf+i, "high", 4) == 0) {
409 val = 1;
410 goto set;
411 }
412
413 if (len >= 3 && strncmp(buf+i, "low", 3) == 0) {
414 val = 0;
415 goto set;
416 }
417
418 return count;
419
420set:
421 PDBG("set: gpio[%d] = %d\n", pin->gpio, val);
422 gpio_set_value(pin->gpio, val);
423 return count;
424}
425
426
427static ssize_t
428pin_store_active_power_collapse(struct pin_attribute *attr, const char *buf, size_t count)
429{
430 int i = 0, len, val = -1;
431 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_active_power_collapse);
432
433 if (pin->options & PIN_READ_ONLY) {
434 return count; // just ignore writes
435 }
436
437 /* skip leading white spaces */
438 while (i < count && isspace(buf[i])) {
439 i++;
440 }
441
442 len = count - i;
443 if (len >= 1 && strncmp(buf+i, "1", 1) == 0) {
444 val = 1;
445 } else if (len >= 1 && strncmp(buf+i, "0", 1) == 0) {
446 val = 0;
447 } else { /* invalid input */
448 goto end;
449 }
450
451 PDBG("set: active_power_collapse[%d] = %d\n", pin->gpio, val);
452
453#ifdef CONFIG_PINMUX
454 // This is an old legacy mechanism for muxing pins, it's not that clean
455 // and creates dependency on pinmux driver that is not really
456 // used on some systems.
457 pinmux_set_power_collapse(pin->name, val);
458#endif
459
460 pin->active_power_collapse = val;
461
462end:
463 return count;
464
465}
466
467static int pin_show_irq(struct pin_attribute *attr, char *buf)
468{
469 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_irq);
470 int count = atomic_xchg(&pin->irq_count, 0);
471 user_pins_log_event(pin->gpio, USER_PIN_EVENT_IRQ_READ);
472 return sprintf(buf, "%d\n", count);
473}
474
475static int pin_show_irqconfig(struct pin_attribute *attr, char *buf)
476{
477 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_irqconfig);
478 return sprintf(buf, "%d\n", pin->irq_config);
479}
480
481static ssize_t
482pin_store_irqconfig(struct pin_attribute *attr, const char *buf, size_t count)
483{
484 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_irqconfig);
485 unsigned long flags;
486 int config;
487
488 config = simple_strtoul(buf, NULL, 10) & IRQF_TRIGGER_MASK;
489
490 spin_lock_irqsave(&pins_lock, flags);
491 pin->irq_config = config;
492 spin_unlock_irqrestore(&pins_lock, flags);
493
494 return count;
495}
496
497static int pin_show_irqrequest(struct pin_attribute *attr, char *buf)
498{
499 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_irqrequest);
500 return sprintf(buf, "%d\n", !!pin->irq_requested);
501}
502
503static ssize_t
504pin_store_irqrequest(struct pin_attribute *attr, const char *buf, size_t count)
505{
506 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_irqrequest);
507 unsigned long flags;
508 int request;
509 int rc = 0;
510
511 if ((count > 0) && (buf[0] == '1')) {
512 request = 1;
513 } else {
514 request = 0;
515 }
516
517 if (request != pin->irq_requested) {
518 if (request) {
519 rc = user_pins_irq_request(pin);
520 if (rc) {
521 goto fail;
522 }
523 } else {
524 free_irq(gpio_to_irq(pin->gpio), pin);
525 }
526
527 spin_lock_irqsave(&pins_lock, flags);
528 pin->irq_requested = request;
529 pin->irq_masked = 0;
530 spin_unlock_irqrestore(&pins_lock, flags);
531 }
532 return count;
533fail:
534 return rc;
535}
536
537static int pin_show_irqmask(struct pin_attribute *attr, char *buf)
538{
539 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_irqmask);
540 return sprintf(buf, "%d\n", !!pin->irq_masked);
541}
542
543static ssize_t
544pin_store_irqmask(struct pin_attribute *attr, const char *buf, size_t count)
545{
546 struct gpio_pin *pin = container_of(attr, struct gpio_pin, attr_irqmask);
547 unsigned long flags;
548 int mask;
549
550 if ((count > 0) && (buf[0] == '1')) {
551 mask = 1;
552 } else {
553 mask = 0;
554 }
555
556 spin_lock_irqsave(&pins_lock, flags);
557 if (mask != pin->irq_masked) {
558 if (mask) {
559 disable_irq(gpio_to_irq(pin->gpio));
560 } else {
561 enable_irq(gpio_to_irq(pin->gpio));
562 }
563 pin->irq_masked = mask;
564 }
565 spin_unlock_irqrestore(&pins_lock, flags);
566
567 return count;
568}
569
570static void
571pin_set_item_init(struct gpio_pin_set_item *psi, struct user_pin *up)
572{
573 psi->pin.name = up->name;
574 psi->pin.gpio = up->gpio;
575 psi->pin.options = up->options;
576 psi->pin.direction = up->direction;
577 psi->pin.act_level = up->act_level;
578 psi->pin.def_level = up->def_level;
579 psi->pin.irq_handler = up->irq_handler;
580 psi->pin.pinmux = up->pinmux;
581 psi->pin.irq_config = up->irq_config;
582 psi->pin.irq_handle_mode = up->irq_handle_mode;
583 atomic_set(&psi->pin.irqs_during_suspend, 0);
584 atomic_set(&psi->pin.irq_count, 0);
585 psi->pin.irq_requested = 0;
586 psi->pin.irq_masked = 0;
587
588 // gpio attr
589 psi->pin.attr_gpio.attr.name = "gpio";
590 psi->pin.attr_gpio.attr.mode = 0444;
591 psi->pin.attr_gpio.show = pin_show_gpio;
592
593 // level attr
594 psi->pin.attr_level.attr.name = "level";
595 psi->pin.attr_level.attr.mode = 0644;
596 psi->pin.attr_level.show = pin_show_level;
597 psi->pin.attr_level.store = pin_store_level;
598
599 // active attr
600 psi->pin.attr_active.attr.name = "active";
601 psi->pin.attr_active.attr.mode = 0444;
602 psi->pin.attr_active.show = pin_show_active;
603
604 // direction
605 psi->pin.attr_direction.attr.name = "direction";
606 psi->pin.attr_direction.attr.mode = 0444;
607 psi->pin.attr_direction.show = pin_show_direction;
608
609 psi->pin.attr_active_power_collapse.attr.name = "active_power_collapse";
610 psi->pin.attr_active_power_collapse.attr.mode = 0644;
611 psi->pin.attr_active_power_collapse.show = pin_show_active_power_collapse;
612 psi->pin.attr_active_power_collapse.store = pin_store_active_power_collapse;
613
614 if (psi->pin.options & PIN_IRQ) {
615 // irq
616 psi->pin.attr_irq.attr.name = "irq";
617 psi->pin.attr_irq.attr.mode = 0444;
618 psi->pin.attr_irq.show = pin_show_irq;
619
620 // irqconfig
621 psi->pin.attr_irqconfig.attr.name = "irqconfig";
622 psi->pin.attr_irqconfig.attr.mode = 0666;
623 psi->pin.attr_irqconfig.show = pin_show_irqconfig;
624 psi->pin.attr_irqconfig.store = pin_store_irqconfig;
625
626 // irqrequest
627 psi->pin.attr_irqrequest.attr.name = "irqrequest";
628 psi->pin.attr_irqrequest.attr.mode = 0666;
629 psi->pin.attr_irqrequest.show = pin_show_irqrequest;
630 psi->pin.attr_irqrequest.store = pin_store_irqrequest;
631
632 // irqmask
633 psi->pin.attr_irqmask.attr.name = "irqmask";
634 psi->pin.attr_irqmask.attr.mode = 0666;
635 psi->pin.attr_irqmask.show = pin_show_irqmask;
636 psi->pin.attr_irqmask.store = pin_store_irqmask;
637
638 // irq handle mode
639 psi->pin.attr_irq_handle_mode.attr.name = "irq_handle_mode";
640 psi->pin.attr_irq_handle_mode.attr.mode = 0644;
641 psi->pin.attr_irq_handle_mode.show = pin_show_irq_mode;
642 psi->pin.attr_irq_handle_mode.store = pin_store_irq_mode;
643 }
644
645 // setup attr pointer array
646 {
647 int i = 0;
648 psi->pin.attr_ptr_arr[i++] = &psi->pin.attr_gpio.attr;
649 psi->pin.attr_ptr_arr[i++] = &psi->pin.attr_level.attr;
650 psi->pin.attr_ptr_arr[i++] = &psi->pin.attr_active.attr;
651 psi->pin.attr_ptr_arr[i++] = &psi->pin.attr_direction.attr;
652 psi->pin.attr_ptr_arr[i++] = &psi->pin.attr_active_power_collapse.attr;
653 if (psi->pin.options & PIN_IRQ) {
654 psi->pin.attr_ptr_arr[i++] = &psi->pin.attr_irq.attr;
655 psi->pin.attr_ptr_arr[i++] = &psi->pin.attr_irqconfig.attr;
656 psi->pin.attr_ptr_arr[i++] = &psi->pin.attr_irqrequest.attr;
657 psi->pin.attr_ptr_arr[i++] = &psi->pin.attr_irqmask.attr;
658 psi->pin.attr_ptr_arr[i++] = &psi->pin.attr_irq_handle_mode.attr;
659 }
660 psi->pin.attr_ptr_arr[i++] = NULL;
661
662 /* if this is triggered, then we need a larger attr_ptr_arr array */
663 BUG_ON(i > ARRAY_SIZE(psi->pin.attr_ptr_arr));
664 }
665
666 // setup attribute group
667 psi->attr_grp.name = psi->pin.name;
668 psi->attr_grp.attrs = psi->pin.attr_ptr_arr;
669
670 return;
671}
672
673/*
674 *
675 */
676static struct gpio_pin_set * pin_set_alloc(struct user_pin_set *ups)
677{
678 int i;
679 struct gpio_pin_set *gps = NULL;
680
681 gps = kzalloc(sizeof(struct gpio_pin_set) +
682 ups->num_pins * sizeof(struct gpio_pin_set_item), GFP_KERNEL);
683 if (gps == NULL) {
684 return NULL;
685 }
686
687 gps->num_pins = ups->num_pins;
688 gps->set_name = ups->set_name;
689
690 for (i = 0; i < gps->num_pins; i++) {
691 pin_set_item_init(&gps->pins[i], &ups->pins[i]);
692 }
693
694 return gps;
695}
696
697/*
698 * Registers specified pin set
699 */
700static int pin_set_register(struct gpio_pin_set *s)
701{
702 int rc, i;
703 struct sysfs_dirent *grp_sd;
704
705 if (s == NULL) {
706 return -EINVAL;
707 }
708
709 rc = kobject_init_and_add(&s->kobj, &ktype_pin, pins_kobj, s->set_name);
710 if (rc) {
711 printk (KERN_ERR "Failed to register kobject (%s)\n", s->set_name);
712 return -ENODEV;
713 }
714
715 /* for all pins */
716 for (i = 0; i < s->num_pins; i++) {
717 rc = gpio_request(s->pins[i].pin.gpio, "gpio");
718 if (rc) {
719 printk(KERN_ERR "Failed to request gpio (%d)\n",
720 s->pins[i].pin.gpio);
721 continue;
722 }
723
724 if (s->pins[i].pin.direction != -1) { // direction is set
725 if (s->pins[i].pin.direction == 0) { // an output
726 /* A setting of def_level == -1 means that we
727 * keep the current level of the GPIO.
728 * Otherwise we set def_level.
729 */
730 int level = (-1 == s->pins[i].pin.def_level) ?
731 gpio_get_value(s->pins[i].pin.gpio) :
732 s->pins[i].pin.def_level;
733
734 gpio_direction_output(s->pins[i].pin.gpio, level);
735 } else { // an input
736 gpio_direction_input(s->pins[i].pin.gpio);
737 }
738 }
739
740 // create attribute group
741 rc = sysfs_create_group(&s->kobj, &s->pins[i].attr_grp);
742 if (rc) {
743 printk(KERN_ERR "Failed to create sysfs attr group (%s)\n",
744 s->pins[i].pin.name );
745 }
746
747 grp_sd = sysfs_get_dirent(s->kobj.sd, NULL, s->pins[i].attr_grp.name);
748 if (grp_sd == NULL) {
749 printk(KERN_ERR "user-pins: failed to get sd for %s\n",
750 s->pins[i].attr_grp.name);
751 } else {
752 s->pins[i].pin.sd = sysfs_get_dirent(grp_sd, NULL, "irq");
753 if ((s->pins[i].pin.sd == NULL) &&
754 (s->pins[i].pin.options & PIN_IRQ)) {
755 printk(KERN_ERR "user-pins: failed to get sd for %s/irq\n",
756 s->pins[i].attr_grp.name);
757 }
758 }
759 }
760
761 return 0;
762}
763
764static void pin_set_unregister(struct gpio_pin_set *s)
765{
766 int i;
767
768 if (s == NULL) {
769 return;
770 }
771
772 /* for all pins */
773 for (i = 0; s->num_pins; i++) {
774 if ((s->pins[i].pin.options & PIN_IRQ) &&
775 (s->pins[i].pin.irq_requested != 0)) {
776 free_irq(gpio_to_irq(s->pins[i].pin.gpio), &s->pins[i].pin);
777 }
778
779 sysfs_remove_group(&s->kobj, &s->pins[i].attr_grp);
780 gpio_free(s->pins[i].pin.gpio);
781 }
782 kobject_del(&s->kobj);
783 kfree(s);
784}
785
786static int user_pins_probe(struct platform_device *pdev)
787{
788 int i, rc;
789 struct user_pins_platform_data *pdata;
790 struct gpio_pin_dev_ctxt *dev_ctxt;
791
792 pdata = pdev->dev.platform_data;
793 if( pdata == NULL ) {
794 return -ENODEV;
795 }
796
797 dev_ctxt = kzalloc(sizeof (struct gpio_pin_dev_ctxt) +
798 pdata->num_sets * sizeof(struct gpio_pin_set *), GFP_KERNEL );
799 if (dev_ctxt == NULL) {
800 return -ENOMEM;
801 }
802 dev_ctxt->num_sets = pdata->num_sets;
803
804 for (i = 0; i < dev_ctxt->num_sets; i++) {
805 dev_ctxt->sets[i] = pin_set_alloc (pdata->sets + i);
806 if (dev_ctxt->sets[i] == NULL) {
807 printk(KERN_ERR "Failed to init pin set '%s'\n",
808 pdata->sets[i].set_name );
809 continue;
810 }
811 rc = pin_set_register(dev_ctxt->sets[i]);
812 if (rc) {
813 printk(KERN_ERR "Failed to register pin set '%s'\n",
814 pdata->sets[i].set_name );
815 }
816 }
817
818 dev_set_drvdata(&pdev->dev, dev_ctxt);
819
820 return 0;
821}
822
823/*
824 *
825 */
826static int user_pins_remove(struct platform_device *pdev)
827{
828 int i;
829 struct gpio_pin_dev_ctxt *dev_ctxt;
830
831 dev_ctxt = dev_get_drvdata(&pdev->dev);
832 if (dev_ctxt == NULL) {
833 return 0;
834 }
835
836 for (i = 0; i < dev_ctxt->num_sets; i++) {
837 pin_set_unregister(dev_ctxt->sets[i]);
838 }
839
840 dev_set_drvdata(&pdev->dev, NULL);
841 kfree(dev_ctxt);
842
843 return 0;
844}
845
846#ifdef CONFIG_PM
847
848static int user_pins_suspend(struct platform_device *pdev, pm_message_t state)
849{
850 int i, j;
851 struct gpio_pin_dev_ctxt *dev_ctxt;
852 struct gpio_pin_set *pset;
853 struct gpio_pin *pin;
854 unsigned long flags;
855
856 dev_ctxt = platform_get_drvdata(pdev);
857 if (dev_ctxt == NULL) {
858 return 0;
859 }
860
861 spin_lock_irqsave ( &pins_lock, flags );
862
863 /*
864 * The first loop is to check for any pending interrupts from
865 * the time starting IRQ_HANDLE_OFF is set (from user space).
866 * If so, fail the suspend, and let the system to go back up
867 * to userspace.
868 */
869
870 for( i = 0; i < dev_ctxt->num_sets; i++ ) {
871 pset = dev_ctxt->sets[i];
872 for( j = 0; j < pset->num_pins; j++ ) {
873 pin = &(pset->pins[j].pin);
874
875 if ((pin->options & PIN_IRQ) &&
876 (pin->irq_handle_mode & IRQ_HANDLE_OFF) &&
877 (atomic_read(&pin->irqs_during_suspend) != 0)) {
878
879 atomic_set(&pin->irqs_during_suspend, 0);
880 spin_unlock_irqrestore ( &pins_lock, flags );
881
882 printk(KERN_INFO"%s: not suspending due to pending irqs for gpio %d\n",
883 __func__, pin->gpio);
884
885 return -EBUSY;
886 }
887 }
888 }
889
890 for (i = 0; i < dev_ctxt->num_sets; i++) {
891 pset = dev_ctxt->sets[i];
892 for (j = 0; j < pset->num_pins; j++) {
893 pin = &(pset->pins[j].pin);
894
895 if (pin->options & PIN_WAKEUP_SOURCE) {
896 int irq = gpio_to_irq(pin->gpio);
897
898 if ((pin->options & PIN_IRQ) &&
899 pin->irq_requested &&
900 !pin->irq_masked) {
901 disable_irq(gpio_to_irq(pin->gpio));
902 }
903 enable_irq_wake(irq);
904 }
905
906 // If machine installed pinmux hook for the pin, call it
907 // to mux it into suspended mode. Exception is made for
908 // pins that are specifically configured to stay active
909 // even during suspend periods.
910 if (pin->pinmux && !pin->active_power_collapse)
911 pin->pinmux(pin->gpio, PIN_MODE_SUSPENDED);
912 }
913 }
914
915 spin_unlock_irqrestore ( &pins_lock, flags );
916
917
918 return 0;
919}
920
921static int user_pins_resume(struct platform_device *pdev)
922{
923 int i, j;
924 unsigned long flags;
925 struct gpio_pin_dev_ctxt *dev_ctxt;
926 struct gpio_pin_set *pset;
927 struct gpio_pin *pin;
928
929 dev_ctxt = platform_get_drvdata(pdev);
930 if (dev_ctxt == NULL) {
931 return 0;
932 }
933
934 spin_lock_irqsave(&pins_lock, flags);
935
936 for (i = 0; i < dev_ctxt->num_sets; i++) {
937 pset = dev_ctxt->sets[i];
938 for (j = 0; j < pset->num_pins; j++) {
939 pin = &(pset->pins[j].pin);
940
941 // If machine installed pinmux hook for the pin, call it
942 // to mux it into active mode. If the pin is configured
943 // to be active during suspend periods we assume we don't
944 // need to remux it into active state again.
945 if (pin->pinmux && !pin->active_power_collapse)
946 pin->pinmux(pin->gpio, PIN_MODE_ACTIVE);
947
948 if (pin->options & PIN_WAKEUP_SOURCE) {
949 int irq = gpio_to_irq(pin->gpio);
950 disable_irq_wake(irq);
951 if ((pin->options & PIN_IRQ) &&
952 pin->irq_requested &&
953 !pin->irq_masked) {
954 enable_irq(gpio_to_irq(pin->gpio));
955 }
956 }
957 atomic_set(&pin->irqs_during_suspend, 0);
958 }
959 }
960
961 spin_unlock_irqrestore(&pins_lock, flags);
962
963 return 0;
964}
965
966#else
967#define user_pins_suspend NULL
968#define user_pins_resume NULL
969#endif
970
971static struct platform_driver user_pins_driver = {
972 .driver = {
973 .name = DRIVER_NAME,
974 },
975 .probe = user_pins_probe,
976 .remove = __devexit_p(user_pins_remove),
977 .suspend = user_pins_suspend,
978 .resume = user_pins_resume,
979};
980
981static int __init user_pins_init(void)
982{
983 int rc;
984
985 if (user_hw_kobj == NULL) {
986 return -ENOMEM;
987 }
988
989 pins_kobj = kobject_create_and_add("pins", user_hw_kobj);
990 if (pins_kobj == NULL) {
991 return -ENOMEM;
992 }
993
994 /* register pins platform device */
995 rc = platform_driver_register(&user_pins_driver);
996 if (rc) {
997 kobject_del(pins_kobj);
998 }
999
1000 user_pins_debug_init();
1001
1002 return rc;
1003}
1004
1005static void __exit
1006user_pins_exit(void)
1007{
1008 kobject_del(pins_kobj);
1009}
1010
1011module_init(user_pins_init);
1012module_exit(user_pins_exit);
1013
1014MODULE_DESCRIPTION(DRIVER_DESC);
1015MODULE_LICENSE("GPL");