blob: 499b250c11f4234d2b29fc5fce6a6fd878f4e393 [file] [log] [blame]
Flemmard6ecd7072013-10-11 15:49:28 +02001#ifndef __USER_PINS_INCLUDED__
2#define __USER_PINS_INCLUDED__
3
4typedef enum {
5 PIN_MODE_ACTIVE,
6 PIN_MODE_SUSPENDED
7} PIN_MODE;
8
9struct user_pin {
10 const char *name; // pin name
11 int gpio; // gpio num/id
12 int options; // options
13 int act_level; // active level
14 int direction; // 1 - an input, 0 - output
15 int def_level; // default level: 0, 1 or -1 if undefined
16 int sysfs_mask; // sysfs file mode
17 char *pin_mode; // board specific pin mode
18 irqreturn_t (*irq_handler)(int irq, void *data);
19 int (*pinmux)(int gpio, int mode);
20 int irq_config;
21 int irq_handle_mode;
22};
23
24struct user_pin_set {
25 const char *set_name; // pin set name
26 int num_pins; // number of pins in the group
27 struct user_pin *pins; // pins array.
28};
29
30struct user_pins_platform_data {
31 int num_sets; // number of pin sets
32 struct user_pin_set *sets; // pin sets.
33};
34
35/* Pin option constants */
36#define PIN_READ_ONLY (1 << 0) // pin is read only
37#define PIN_WAKEUP_SOURCE (1 << 1) // pin is a wakeup source
38#define PIN_IRQ (1 << 2) // pin generates irq
39
40#define IRQ_HANDLE_NONE (0) // IRQ handling is not defined
41#define IRQ_HANDLE_AUTO (1 << 0) // IRQ handling is automatic
42#define IRQ_HANDLE_OFF (1 << 1) // IRQ handling is off
43
44#endif // __USER_PINS_INCLUDED__