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review.evervolv.com / android_kernel_htc_msm8960 / 6f3b414aca060a847e243f676b8601731938eb48 / . / drivers / net / wireless / ath5k / rfbuffer.h
blob: 28b30163c0ee76a0d21a09a0388ce7b7496b75af [file] [log] [blame]
Nick Kossifidis33a31822009-02-09 06:00:34 +0200[diff] [blame]1/*
2 * RF Buffer handling functions
3 *
4 * Copyright (c) 2009 Nick Kossifidis <mickflemm@gmail.com>
5 *
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 *
18 */
19
20/*
21 * Struct to hold default mode specific RF
22 * register values (RF Banks)
23 */
24struct ath5k_ini_rfbuffer {
25 u8 rfb_bank; /* RF Bank number */
26 u16 rfb_ctrl_register; /* RF Buffer control register */
27 u32 rfb_mode_data[5]; /* RF Buffer data for each mode */
28};
29
30/*
31 * Struct to hold RF Buffer field
32 * infos used to access certain RF
33 * analog registers
34 */
35struct ath5k_rfb_field {
36 u8 len; /* Field length */
37 u16 pos; /* Offset on the raw packet */
38 u8 col; /* Column -used for shifting */
39};
40
41/*
42 * RF analog register definition
43 */
44struct ath5k_rf_reg {
45 u8 bank; /* RF Buffer Bank number */
46 u8 index; /* Register's index on rf_regs_idx */
47 struct ath5k_rfb_field field; /* RF Buffer field for this register */
48};
49
50/* Map RF registers to indexes
51 * We do this to handle common bits and make our
52 * life easier by using an index for each register
53 * instead of a full rfb_field */
54enum ath5k_rf_regs_idx {
55 /* BANK 6 */
56 AR5K_RF_OB_2GHZ = 0,
57 AR5K_RF_OB_5GHZ,
58 AR5K_RF_DB_2GHZ,
59 AR5K_RF_DB_5GHZ,
60 AR5K_RF_FIXED_BIAS_A,
61 AR5K_RF_FIXED_BIAS_B,
62 AR5K_RF_PWD_XPD,
63 AR5K_RF_XPD_SEL,
64 AR5K_RF_XPD_GAIN,
65 AR5K_RF_PD_GAIN_LO,
66 AR5K_RF_PD_GAIN_HI,
67 AR5K_RF_HIGH_VC_CP,
68 AR5K_RF_MID_VC_CP,
69 AR5K_RF_LOW_VC_CP,
70 AR5K_RF_PUSH_UP,
71 AR5K_RF_PAD2GND,
72 AR5K_RF_XB2_LVL,
73 AR5K_RF_XB5_LVL,
74 AR5K_RF_PWD_ICLOBUF_2G,
75 AR5K_RF_DERBY_CHAN_SEL_MODE,
76 /* BANK 7 */
77 AR5K_RF_GAIN_I,
78 AR5K_RF_PLO_SEL,
79 AR5K_RF_RFGAIN_SEL,
80 AR5K_RF_WAIT_S,
81 AR5K_RF_WAIT_I,
82 AR5K_RF_MAX_TIME,
83 AR5K_RF_MIXGAIN_OVR,
84 AR5K_RF_PD_DELAY_A,
85 AR5K_RF_PD_DELAY_B,
86 AR5K_RF_PD_DELAY_XR,
87 AR5K_RF_PD_PERIOD_A,
88 AR5K_RF_PD_PERIOD_B,
89 AR5K_RF_PD_PERIOD_XR,
90};
91
92
93/*******************\
94* RF5111 (Sombrero) *
95\*******************/
96
97/* BANK 6 len pos col */
98#define AR5K_RF5111_OB_2GHZ { 3, 119, 0 }
99#define AR5K_RF5111_DB_2GHZ { 3, 122, 0 }
100
101#define AR5K_RF5111_OB_5GHZ { 3, 104, 0 }
102#define AR5K_RF5111_DB_5GHZ { 3, 107, 0 }
103
104#define AR5K_RF5111_PWD_XPD { 1, 95, 0 }
105#define AR5K_RF5111_XPD_GAIN { 4, 96, 0 }
106
107/* Access to PWD registers */
108#define AR5K_RF5111_PWD(_n) { 1, (135 - _n), 3 }
109
110/* BANK 7 len pos col */
111#define AR5K_RF5111_GAIN_I { 6, 29, 0 }
112#define AR5K_RF5111_PLO_SEL { 1, 4, 0 }
113#define AR5K_RF5111_RFGAIN_SEL { 1, 36, 0 }
Nick Kossifidis6f3b4142009-02-09 06:03:41 +0200[diff] [blame^]114#define AR5K_RF5111_RFGAIN_STEP { 6, 37, 0 }
Nick Kossifidis33a31822009-02-09 06:00:34 +0200[diff] [blame]115/* Only on AR5212 BaseBand and up */
116#define AR5K_RF5111_WAIT_S { 5, 19, 0 }
117#define AR5K_RF5111_WAIT_I { 5, 24, 0 }
118#define AR5K_RF5111_MAX_TIME { 2, 49, 0 }
119
120static const struct ath5k_rf_reg rf_regs_5111[] = {
121 {6, AR5K_RF_OB_2GHZ, AR5K_RF5111_OB_2GHZ},
122 {6, AR5K_RF_DB_2GHZ, AR5K_RF5111_DB_2GHZ},
123 {6, AR5K_RF_OB_5GHZ, AR5K_RF5111_OB_5GHZ},
124 {6, AR5K_RF_DB_5GHZ, AR5K_RF5111_DB_5GHZ},
125 {6, AR5K_RF_PWD_XPD, AR5K_RF5111_PWD_XPD},
126 {6, AR5K_RF_XPD_GAIN, AR5K_RF5111_XPD_GAIN},
127 {7, AR5K_RF_GAIN_I, AR5K_RF5111_GAIN_I},
128 {7, AR5K_RF_PLO_SEL, AR5K_RF5111_PLO_SEL},
129 {7, AR5K_RF_RFGAIN_SEL, AR5K_RF5111_RFGAIN_SEL},
130 {7, AR5K_RF_WAIT_S, AR5K_RF5111_WAIT_S},
131 {7, AR5K_RF_WAIT_I, AR5K_RF5111_WAIT_I},
132 {7, AR5K_RF_MAX_TIME, AR5K_RF5111_MAX_TIME}
133
134};
135
136/* Default mode specific settings */
137static const struct ath5k_ini_rfbuffer rfb_5111[] = {
138 { 0, 0x989c,
139 /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
140 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
141 { 0, 0x989c,
142 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
143 { 0, 0x989c,
144 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
145 { 0, 0x989c,
146 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
147 { 0, 0x989c,
148 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
149 { 0, 0x989c,
150 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
151 { 0, 0x989c,
152 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
153 { 0, 0x989c,
154 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
155 { 0, 0x989c,
156 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
157 { 0, 0x989c,
158 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
159 { 0, 0x989c,
160 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
161 { 0, 0x989c,
162 { 0x00380000, 0x00380000, 0x00380000, 0x00380000, 0x00380000 } },
163 { 0, 0x989c,
164 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
165 { 0, 0x989c,
166 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
167 { 0, 0x989c,
168 { 0x00000000, 0x00000000, 0x000000c0, 0x00000080, 0x00000080 } },
169 { 0, 0x989c,
170 { 0x000400f9, 0x000400f9, 0x000400ff, 0x000400fd, 0x000400fd } },
171 { 0, 0x98d4,
172 { 0x00000000, 0x00000000, 0x00000004, 0x00000004, 0x00000004 } },
173 { 1, 0x98d4,
174 { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
175 { 2, 0x98d4,
176 { 0x00000010, 0x00000014, 0x00000010, 0x00000010, 0x00000014 } },
177 { 3, 0x98d8,
178 { 0x00601068, 0x00601068, 0x00601068, 0x00601068, 0x00601068 } },
179 { 6, 0x989c,
180 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
181 { 6, 0x989c,
182 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
183 { 6, 0x989c,
184 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
185 { 6, 0x989c,
186 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
187 { 6, 0x989c,
188 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
189 { 6, 0x989c,
190 { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
191 { 6, 0x989c,
192 { 0x04000000, 0x04000000, 0x04000000, 0x04000000, 0x04000000 } },
193 { 6, 0x989c,
194 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
195 { 6, 0x989c,
196 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
197 { 6, 0x989c,
198 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
199 { 6, 0x989c,
200 { 0x00000000, 0x00000000, 0x0a000000, 0x00000000, 0x00000000 } },
201 { 6, 0x989c,
202 { 0x003800c0, 0x00380080, 0x023800c0, 0x003800c0, 0x003800c0 } },
203 { 6, 0x989c,
204 { 0x00020006, 0x00020006, 0x00000006, 0x00020006, 0x00020006 } },
205 { 6, 0x989c,
206 { 0x00000089, 0x00000089, 0x00000089, 0x00000089, 0x00000089 } },
207 { 6, 0x989c,
208 { 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0 } },
209 { 6, 0x989c,
210 { 0x00040007, 0x00040007, 0x00040007, 0x00040007, 0x00040007 } },
211 { 6, 0x98d4,
212 { 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a } },
213 { 7, 0x989c,
214 { 0x00000040, 0x00000048, 0x00000040, 0x00000040, 0x00000040 } },
215 { 7, 0x989c,
216 { 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 } },
217 { 7, 0x989c,
218 { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } },
219 { 7, 0x989c,
220 { 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f } },
221 { 7, 0x989c,
222 { 0x000000f1, 0x000000f1, 0x00000061, 0x000000f1, 0x000000f1 } },
223 { 7, 0x989c,
224 { 0x0000904f, 0x0000904f, 0x0000904c, 0x0000904f, 0x0000904f } },
225 { 7, 0x989c,
226 { 0x0000125a, 0x0000125a, 0x0000129a, 0x0000125a, 0x0000125a } },
227 { 7, 0x98cc,
228 { 0x0000000e, 0x0000000e, 0x0000000f, 0x0000000e, 0x0000000e } },
229};
230
231
232
233/***********************\
234* RF5112/RF2112 (Derby) *
235\***********************/
236
237/* BANK 7 (Common) len pos col */
238#define AR5K_RF5112X_GAIN_I { 6, 14, 0 }
Nick Kossifidis6f3b4142009-02-09 06:03:41 +0200[diff] [blame^]239#define AR5K_RF5112X_MIXVGA_OVR { 1, 36, 0 }
Nick Kossifidis33a31822009-02-09 06:00:34 +0200[diff] [blame]240#define AR5K_RF5112X_MIXGAIN_OVR { 2, 37, 0 }
Nick Kossifidis6f3b4142009-02-09 06:03:41 +0200[diff] [blame^]241#define AR5K_RF5112X_MIXGAIN_STEP { 4, 32, 0 }
Nick Kossifidis33a31822009-02-09 06:00:34 +0200[diff] [blame]242#define AR5K_RF5112X_PD_DELAY_A { 4, 58, 0 }
243#define AR5K_RF5112X_PD_DELAY_B { 4, 62, 0 }
244#define AR5K_RF5112X_PD_DELAY_XR { 4, 66, 0 }
245#define AR5K_RF5112X_PD_PERIOD_A { 4, 70, 0 }
246#define AR5K_RF5112X_PD_PERIOD_B { 4, 74, 0 }
247#define AR5K_RF5112X_PD_PERIOD_XR { 4, 78, 0 }
248
249/* RFX112 (Derby 1) */
250
251/* BANK 6 len pos col */
252#define AR5K_RF5112_OB_2GHZ { 3, 269, 0 }
253#define AR5K_RF5112_DB_2GHZ { 3, 272, 0 }
254
255#define AR5K_RF5112_OB_5GHZ { 3, 261, 0 }
256#define AR5K_RF5112_DB_5GHZ { 3, 264, 0 }
257
258#define AR5K_RF5112_FIXED_BIAS_A { 1, 260, 0 }
259#define AR5K_RF5112_FIXED_BIAS_B { 1, 259, 0 }
260
261#define AR5K_RF5112_XPD_SEL { 1, 284, 0 }
262#define AR5K_RF5112_XPD_GAIN { 2, 252, 0 }
263
264/* Access to PWD registers */
265#define AR5K_RF5112_PWD(_n) { 1, (302 - _n), 3 }
266
267static const struct ath5k_rf_reg rf_regs_5112[] = {
268 {6, AR5K_RF_OB_2GHZ, AR5K_RF5112_OB_2GHZ},
269 {6, AR5K_RF_DB_2GHZ, AR5K_RF5112_DB_2GHZ},
270 {6, AR5K_RF_OB_5GHZ, AR5K_RF5112_OB_5GHZ},
271 {6, AR5K_RF_DB_5GHZ, AR5K_RF5112_DB_5GHZ},
272 {6, AR5K_RF_FIXED_BIAS_A, AR5K_RF5112_FIXED_BIAS_A},
273 {6, AR5K_RF_FIXED_BIAS_B, AR5K_RF5112_FIXED_BIAS_B},
274 {6, AR5K_RF_XPD_SEL, AR5K_RF5112_XPD_SEL},
275 {6, AR5K_RF_XPD_GAIN, AR5K_RF5112_XPD_GAIN},
276 {7, AR5K_RF_GAIN_I, AR5K_RF5112X_GAIN_I},
277 {7, AR5K_RF_MIXGAIN_OVR, AR5K_RF5112X_MIXGAIN_OVR},
278 {7, AR5K_RF_PD_DELAY_A, AR5K_RF5112X_PD_DELAY_A},
279 {7, AR5K_RF_PD_DELAY_B, AR5K_RF5112X_PD_DELAY_B},
280 {7, AR5K_RF_PD_DELAY_XR, AR5K_RF5112X_PD_DELAY_XR},
281 {7, AR5K_RF_PD_PERIOD_A, AR5K_RF5112X_PD_PERIOD_A},
282 {7, AR5K_RF_PD_PERIOD_B, AR5K_RF5112X_PD_PERIOD_B},
283 {7, AR5K_RF_PD_PERIOD_XR, AR5K_RF5112X_PD_PERIOD_XR},
284};
285
286/* Default mode specific settings */
287static const struct ath5k_ini_rfbuffer rfb_5112[] = {
288 { 1, 0x98d4,
289 /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
290 { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
291 { 2, 0x98d0,
292 { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } },
293 { 3, 0x98dc,
294 { 0x00a0c0c0, 0x00a0c0c0, 0x00e0c0c0, 0x00e0c0c0, 0x00e0c0c0 } },
295 { 6, 0x989c,
296 { 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000 } },
297 { 6, 0x989c,
298 { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } },
299 { 6, 0x989c,
300 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
301 { 6, 0x989c,
302 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
303 { 6, 0x989c,
304 { 0x00660000, 0x00660000, 0x00660000, 0x00660000, 0x00660000 } },
305 { 6, 0x989c,
306 { 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000 } },
307 { 6, 0x989c,
308 { 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000 } },
309 { 6, 0x989c,
310 { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
311 { 6, 0x989c,
312 { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
313 { 6, 0x989c,
314 { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
315 { 6, 0x989c,
316 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
317 { 6, 0x989c,
318 { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
319 { 6, 0x989c,
320 { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
321 { 6, 0x989c,
322 { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
323 { 6, 0x989c,
324 { 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000 } },
325 { 6, 0x989c,
326 { 0x00600000, 0x00600000, 0x00600000, 0x00600000, 0x00600000 } },
327 { 6, 0x989c,
328 { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
329 { 6, 0x989c,
330 { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } },
331 { 6, 0x989c,
332 { 0x00640000, 0x00640000, 0x00640000, 0x00640000, 0x00640000 } },
333 { 6, 0x989c,
334 { 0x00200000, 0x00200000, 0x00200000, 0x00200000, 0x00200000 } },
335 { 6, 0x989c,
336 { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } },
337 { 6, 0x989c,
338 { 0x00250000, 0x00250000, 0x00250000, 0x00250000, 0x00250000 } },
339 { 6, 0x989c,
340 { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
341 { 6, 0x989c,
342 { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
343 { 6, 0x989c,
344 { 0x00510000, 0x00510000, 0x00510000, 0x00510000, 0x00510000 } },
345 { 6, 0x989c,
346 { 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000 } },
347 { 6, 0x989c,
348 { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } },
349 { 6, 0x989c,
350 { 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000 } },
351 { 6, 0x989c,
352 { 0x00400000, 0x00400000, 0x00400000, 0x00400000, 0x00400000 } },
353 { 6, 0x989c,
354 { 0x03090000, 0x03090000, 0x03090000, 0x03090000, 0x03090000 } },
355 { 6, 0x989c,
356 { 0x06000000, 0x06000000, 0x06000000, 0x06000000, 0x06000000 } },
357 { 6, 0x989c,
358 { 0x000000b0, 0x000000b0, 0x000000a8, 0x000000a8, 0x000000a8 } },
359 { 6, 0x989c,
360 { 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e } },
361 { 6, 0x989c,
362 { 0x006c4a41, 0x006c4a41, 0x006c4af1, 0x006c4a61, 0x006c4a61 } },
363 { 6, 0x989c,
364 { 0x0050892a, 0x0050892a, 0x0050892b, 0x0050892b, 0x0050892b } },
365 { 6, 0x989c,
366 { 0x00842400, 0x00842400, 0x00842400, 0x00842400, 0x00842400 } },
367 { 6, 0x989c,
368 { 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200 } },
369 { 6, 0x98d0,
370 { 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c } },
371 { 7, 0x989c,
372 { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } },
373 { 7, 0x989c,
374 { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } },
375 { 7, 0x989c,
376 { 0x0000000a, 0x0000000a, 0x00000012, 0x00000012, 0x00000012 } },
377 { 7, 0x989c,
378 { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } },
379 { 7, 0x989c,
380 { 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1 } },
381 { 7, 0x989c,
382 { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
383 { 7, 0x989c,
384 { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } },
385 { 7, 0x989c,
386 { 0x00000022, 0x00000022, 0x00000022, 0x00000022, 0x00000022 } },
387 { 7, 0x989c,
388 { 0x00000092, 0x00000092, 0x00000092, 0x00000092, 0x00000092 } },
389 { 7, 0x989c,
390 { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } },
391 { 7, 0x989c,
392 { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } },
393 { 7, 0x989c,
394 { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } },
395 { 7, 0x98c4,
396 { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
397};
398
399/* RFX112A (Derby 2) */
400
401/* BANK 6 len pos col */
402#define AR5K_RF5112A_OB_2GHZ { 3, 287, 0 }
403#define AR5K_RF5112A_DB_2GHZ { 3, 290, 0 }
404
405#define AR5K_RF5112A_OB_5GHZ { 3, 279, 0 }
406#define AR5K_RF5112A_DB_5GHZ { 3, 282, 0 }
407
408#define AR5K_RF5112A_FIXED_BIAS_A { 1, 278, 0 }
409#define AR5K_RF5112A_FIXED_BIAS_B { 1, 277, 0 }
410
411#define AR5K_RF5112A_XPD_SEL { 1, 302, 0 }
412#define AR5K_RF5112A_PDGAINLO { 2, 270, 0 }
413#define AR5K_RF5112A_PDGAINHI { 2, 257, 0 }
414
415/* Access to PWD registers */
416#define AR5K_RF5112A_PWD(_n) { 1, (306 - _n), 3 }
417
418/* Voltage regulators */
419#define AR5K_RF5112A_HIGH_VC_CP { 2, 90, 2 }
420#define AR5K_RF5112A_MID_VC_CP { 2, 92, 2 }
421#define AR5K_RF5112A_LOW_VC_CP { 2, 94, 2 }
422#define AR5K_RF5112A_PUSH_UP { 2, 94, 2 }
423
424/* Power consumption */
425#define AR5K_RF5112A_PAD2GND { 1, 281, 1 }
426#define AR5K_RF5112A_XB2_LVL { 2, 1, 3 }
427#define AR5K_RF5112A_XB5_LVL { 2, 3, 3 }
428
429static const struct ath5k_rf_reg rf_regs_5112a[] = {
430 {6, AR5K_RF_OB_2GHZ, AR5K_RF5112A_OB_2GHZ},
431 {6, AR5K_RF_DB_2GHZ, AR5K_RF5112A_DB_2GHZ},
432 {6, AR5K_RF_OB_5GHZ, AR5K_RF5112A_OB_5GHZ},
433 {6, AR5K_RF_DB_5GHZ, AR5K_RF5112A_DB_5GHZ},
434 {6, AR5K_RF_FIXED_BIAS_A, AR5K_RF5112A_FIXED_BIAS_A},
435 {6, AR5K_RF_FIXED_BIAS_B, AR5K_RF5112A_FIXED_BIAS_B},
436 {6, AR5K_RF_XPD_SEL, AR5K_RF5112A_XPD_SEL},
437 {6, AR5K_RF_PD_GAIN_LO, AR5K_RF5112A_PDGAINLO},
438 {6, AR5K_RF_PD_GAIN_HI, AR5K_RF5112A_PDGAINHI},
439 {6, AR5K_RF_HIGH_VC_CP, AR5K_RF5112A_HIGH_VC_CP},
440 {6, AR5K_RF_MID_VC_CP, AR5K_RF5112A_MID_VC_CP},
441 {6, AR5K_RF_LOW_VC_CP, AR5K_RF5112A_LOW_VC_CP},
442 {6, AR5K_RF_PUSH_UP, AR5K_RF5112A_PUSH_UP},
443 {6, AR5K_RF_PAD2GND, AR5K_RF5112A_PAD2GND},
444 {6, AR5K_RF_XB2_LVL, AR5K_RF5112A_XB2_LVL},
445 {6, AR5K_RF_XB5_LVL, AR5K_RF5112A_XB5_LVL},
446 {7, AR5K_RF_GAIN_I, AR5K_RF5112X_GAIN_I},
447 {7, AR5K_RF_MIXGAIN_OVR, AR5K_RF5112X_MIXGAIN_OVR},
448 {7, AR5K_RF_PD_DELAY_A, AR5K_RF5112X_PD_DELAY_A},
449 {7, AR5K_RF_PD_DELAY_B, AR5K_RF5112X_PD_DELAY_B},
450 {7, AR5K_RF_PD_DELAY_XR, AR5K_RF5112X_PD_DELAY_XR},
451 {7, AR5K_RF_PD_PERIOD_A, AR5K_RF5112X_PD_PERIOD_A},
452 {7, AR5K_RF_PD_PERIOD_B, AR5K_RF5112X_PD_PERIOD_B},
453 {7, AR5K_RF_PD_PERIOD_XR, AR5K_RF5112X_PD_PERIOD_XR},
454};
455
456/* Default mode specific settings */
457static const struct ath5k_ini_rfbuffer rfb_5112a[] = {
458 { 1, 0x98d4,
459 /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
460 { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
461 { 2, 0x98d0,
462 { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } },
463 { 3, 0x98dc,
464 { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
465 { 6, 0x989c,
466 { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } },
467 { 6, 0x989c,
468 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
469 { 6, 0x989c,
470 { 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000 } },
471 { 6, 0x989c,
472 { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
473 { 6, 0x989c,
474 { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } },
475 { 6, 0x989c,
476 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
477 { 6, 0x989c,
478 { 0x00180000, 0x00180000, 0x00180000, 0x00180000, 0x00180000 } },
479 { 6, 0x989c,
480 { 0x00600000, 0x00600000, 0x006e0000, 0x006e0000, 0x006e0000 } },
481 { 6, 0x989c,
482 { 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000 } },
483 { 6, 0x989c,
484 { 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000 } },
485 { 6, 0x989c,
486 { 0x04480000, 0x04480000, 0x04480000, 0x04480000, 0x04480000 } },
487 { 6, 0x989c,
488 { 0x004c0000, 0x004c0000, 0x004c0000, 0x004c0000, 0x004c0000 } },
489 { 6, 0x989c,
490 { 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000 } },
491 { 6, 0x989c,
492 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
493 { 6, 0x989c,
494 { 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000 } },
495 { 6, 0x989c,
496 { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
497 { 6, 0x989c,
498 { 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000 } },
499 { 6, 0x989c,
500 { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
501 { 6, 0x989c,
502 { 0x02190000, 0x02190000, 0x02190000, 0x02190000, 0x02190000 } },
503 { 6, 0x989c,
504 { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } },
505 { 6, 0x989c,
506 { 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000 } },
507 { 6, 0x989c,
508 { 0x00990000, 0x00990000, 0x00990000, 0x00990000, 0x00990000 } },
509 { 6, 0x989c,
510 { 0x00500000, 0x00500000, 0x00500000, 0x00500000, 0x00500000 } },
511 { 6, 0x989c,
512 { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
513 { 6, 0x989c,
514 { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
515 { 6, 0x989c,
516 { 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000 } },
517 { 6, 0x989c,
518 { 0x01740000, 0x01740000, 0x01740000, 0x01740000, 0x01740000 } },
519 { 6, 0x989c,
520 { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
521 { 6, 0x989c,
522 { 0x86280000, 0x86280000, 0x86280000, 0x86280000, 0x86280000 } },
523 { 6, 0x989c,
524 { 0x31840000, 0x31840000, 0x31840000, 0x31840000, 0x31840000 } },
525 { 6, 0x989c,
526 { 0x00f20080, 0x00f20080, 0x00f20080, 0x00f20080, 0x00f20080 } },
527 { 6, 0x989c,
528 { 0x00270019, 0x00270019, 0x00270019, 0x00270019, 0x00270019 } },
529 { 6, 0x989c,
530 { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
531 { 6, 0x989c,
532 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
533 { 6, 0x989c,
534 { 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2 } },
535 { 6, 0x989c,
536 { 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084 } },
537 { 6, 0x989c,
538 { 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4 } },
539 { 6, 0x989c,
540 { 0x00119220, 0x00119220, 0x00119220, 0x00119220, 0x00119220 } },
541 { 6, 0x989c,
542 { 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800 } },
543 { 6, 0x98d8,
544 { 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230 } },
545 { 7, 0x989c,
546 { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } },
547 { 7, 0x989c,
548 { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } },
549 { 7, 0x989c,
550 { 0x00000012, 0x00000012, 0x00000012, 0x00000012, 0x00000012 } },
551 { 7, 0x989c,
552 { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } },
553 { 7, 0x989c,
554 { 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9 } },
555 { 7, 0x989c,
556 { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
557 { 7, 0x989c,
558 { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } },
559 { 7, 0x989c,
560 { 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2 } },
561 { 7, 0x989c,
562 { 0x00000052, 0x00000052, 0x00000052, 0x00000052, 0x00000052 } },
563 { 7, 0x989c,
564 { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } },
565 { 7, 0x989c,
566 { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } },
567 { 7, 0x989c,
568 { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } },
569 { 7, 0x98c4,
570 { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
571};
572
573
574
575/******************\
576* RF2413 (Griffin) *
577\******************/
578
579/* BANK 6 len pos col */
580#define AR5K_RF2413_OB_2GHZ { 3, 168, 0 }
581#define AR5K_RF2413_DB_2GHZ { 3, 165, 0 }
582
583static const struct ath5k_rf_reg rf_regs_2413[] = {
584 {6, AR5K_RF_OB_2GHZ, AR5K_RF2413_OB_2GHZ},
585 {6, AR5K_RF_DB_2GHZ, AR5K_RF2413_DB_2GHZ},
586};
587
588/* Default mode specific settings
589 * XXX: a/aTurbo ???
590 */
591static const struct ath5k_ini_rfbuffer rfb_2413[] = {
592 { 1, 0x98d4,
593 /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
594 { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
595 { 2, 0x98d0,
596 { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
597 { 3, 0x98dc,
598 { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
599 { 6, 0x989c,
600 { 0xf0000000, 0xf0000000, 0xf0000000, 0xf0000000, 0xf0000000 } },
601 { 6, 0x989c,
602 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
603 { 6, 0x989c,
604 { 0x03000000, 0x03000000, 0x03000000, 0x03000000, 0x03000000 } },
605 { 6, 0x989c,
606 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
607 { 6, 0x989c,
608 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
609 { 6, 0x989c,
610 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
611 { 6, 0x989c,
612 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
613 { 6, 0x989c,
614 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
615 { 6, 0x989c,
616 { 0x40400000, 0x40400000, 0x40400000, 0x40400000, 0x40400000 } },
617 { 6, 0x989c,
618 { 0x65050000, 0x65050000, 0x65050000, 0x65050000, 0x65050000 } },
619 { 6, 0x989c,
620 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
621 { 6, 0x989c,
622 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
623 { 6, 0x989c,
624 { 0x00420000, 0x00420000, 0x00420000, 0x00420000, 0x00420000 } },
625 { 6, 0x989c,
626 { 0x00b50000, 0x00b50000, 0x00b50000, 0x00b50000, 0x00b50000 } },
627 { 6, 0x989c,
628 { 0x00030000, 0x00030000, 0x00030000, 0x00030000, 0x00030000 } },
629 { 6, 0x989c,
630 { 0x00f70000, 0x00f70000, 0x00f70000, 0x00f70000, 0x00f70000 } },
631 { 6, 0x989c,
632 { 0x009d0000, 0x009d0000, 0x009d0000, 0x009d0000, 0x009d0000 } },
633 { 6, 0x989c,
634 { 0x00220000, 0x00220000, 0x00220000, 0x00220000, 0x00220000 } },
635 { 6, 0x989c,
636 { 0x04220000, 0x04220000, 0x04220000, 0x04220000, 0x04220000 } },
637 { 6, 0x989c,
638 { 0x00230018, 0x00230018, 0x00230018, 0x00230018, 0x00230018 } },
639 { 6, 0x989c,
640 { 0x00280000, 0x00280000, 0x00280060, 0x00280060, 0x00280060 } },
641 { 6, 0x989c,
642 { 0x005000c0, 0x005000c0, 0x005000c3, 0x005000c3, 0x005000c3 } },
643 { 6, 0x989c,
644 { 0x0004007f, 0x0004007f, 0x0004007f, 0x0004007f, 0x0004007f } },
645 { 6, 0x989c,
646 { 0x00000458, 0x00000458, 0x00000458, 0x00000458, 0x00000458 } },
647 { 6, 0x989c,
648 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
649 { 6, 0x989c,
650 { 0x0000c000, 0x0000c000, 0x0000c000, 0x0000c000, 0x0000c000 } },
651 { 6, 0x98d8,
652 { 0x00400230, 0x00400230, 0x00400230, 0x00400230, 0x00400230 } },
653 { 7, 0x989c,
654 { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
655 { 7, 0x989c,
656 { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
657 { 7, 0x98cc,
658 { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
659};
660
661
662
663/***************************\
664* RF2315/RF2316 (Cobra SoC) *
665\***************************/
666
667/* BANK 6 len pos col */
668#define AR5K_RF2316_OB_2GHZ { 3, 178, 0 }
669#define AR5K_RF2316_DB_2GHZ { 3, 175, 0 }
670
671static const struct ath5k_rf_reg rf_regs_2316[] = {
672 {6, AR5K_RF_OB_2GHZ, AR5K_RF2316_OB_2GHZ},
673 {6, AR5K_RF_DB_2GHZ, AR5K_RF2316_DB_2GHZ},
674};
675
676/* Default mode specific settings */
677static const struct ath5k_ini_rfbuffer rfb_2316[] = {
678 { 1, 0x98d4,
679 /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
680 { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
681 { 2, 0x98d0,
682 { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
683 { 3, 0x98dc,
684 { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
685 { 6, 0x989c,
686 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
687 { 6, 0x989c,
688 { 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000 } },
689 { 6, 0x989c,
690 { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } },
691 { 6, 0x989c,
692 { 0x02000000, 0x02000000, 0x02000000, 0x02000000, 0x02000000 } },
693 { 6, 0x989c,
694 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
695 { 6, 0x989c,
696 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
697 { 6, 0x989c,
698 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
699 { 6, 0x989c,
700 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
701 { 6, 0x989c,
702 { 0xf8000000, 0xf8000000, 0xf8000000, 0xf8000000, 0xf8000000 } },
703 { 6, 0x989c,
704 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
705 { 6, 0x989c,
706 { 0x95150000, 0x95150000, 0x95150000, 0x95150000, 0x95150000 } },
707 { 6, 0x989c,
708 { 0xc1000000, 0xc1000000, 0xc1000000, 0xc1000000, 0xc1000000 } },
709 { 6, 0x989c,
710 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
711 { 6, 0x989c,
712 { 0x00080000, 0x00080000, 0x00080000, 0x00080000, 0x00080000 } },
713 { 6, 0x989c,
714 { 0x00d50000, 0x00d50000, 0x00d50000, 0x00d50000, 0x00d50000 } },
715 { 6, 0x989c,
716 { 0x000e0000, 0x000e0000, 0x000e0000, 0x000e0000, 0x000e0000 } },
717 { 6, 0x989c,
718 { 0x00dc0000, 0x00dc0000, 0x00dc0000, 0x00dc0000, 0x00dc0000 } },
719 { 6, 0x989c,
720 { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } },
721 { 6, 0x989c,
722 { 0x008a0000, 0x008a0000, 0x008a0000, 0x008a0000, 0x008a0000 } },
723 { 6, 0x989c,
724 { 0x10880000, 0x10880000, 0x10880000, 0x10880000, 0x10880000 } },
725 { 6, 0x989c,
726 { 0x008c0060, 0x008c0060, 0x008c0060, 0x008c0060, 0x008c0060 } },
727 { 6, 0x989c,
728 { 0x00a00000, 0x00a00000, 0x00a00080, 0x00a00080, 0x00a00080 } },
729 { 6, 0x989c,
730 { 0x00400000, 0x00400000, 0x0040000d, 0x0040000d, 0x0040000d } },
731 { 6, 0x989c,
732 { 0x00110400, 0x00110400, 0x00110400, 0x00110400, 0x00110400 } },
733 { 6, 0x989c,
734 { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
735 { 6, 0x989c,
736 { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
737 { 6, 0x989c,
738 { 0x00000b00, 0x00000b00, 0x00000b00, 0x00000b00, 0x00000b00 } },
739 { 6, 0x989c,
740 { 0x00000be8, 0x00000be8, 0x00000be8, 0x00000be8, 0x00000be8 } },
741 { 6, 0x98c0,
742 { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } },
743 { 7, 0x989c,
744 { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
745 { 7, 0x989c,
746 { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
747 { 7, 0x98cc,
748 { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
749};
750
751
752
753/******************************\
754* RF5413/RF5424 (Eagle/Condor) *
755\******************************/
756
757/* BANK 6 len pos col */
758#define AR5K_RF5413_OB_2GHZ { 3, 241, 0 }
759#define AR5K_RF5413_DB_2GHZ { 3, 238, 0 }
760
761#define AR5K_RF5413_OB_5GHZ { 3, 247, 0 }
762#define AR5K_RF5413_DB_5GHZ { 3, 244, 0 }
763
764#define AR5K_RF5413_PWD_ICLOBUF2G { 3, 131, 3 }
765#define AR5K_RF5413_DERBY_CHAN_SEL_MODE { 1, 291, 2 }
766
767static const struct ath5k_rf_reg rf_regs_5413[] = {
768 {6, AR5K_RF_OB_2GHZ, AR5K_RF5413_OB_2GHZ},
769 {6, AR5K_RF_DB_2GHZ, AR5K_RF5413_DB_2GHZ},
770 {6, AR5K_RF_OB_5GHZ, AR5K_RF5413_OB_5GHZ},
771 {6, AR5K_RF_DB_5GHZ, AR5K_RF5413_DB_5GHZ},
772 {6, AR5K_RF_PWD_ICLOBUF_2G, AR5K_RF5413_PWD_ICLOBUF2G},
773 {6, AR5K_RF_DERBY_CHAN_SEL_MODE, AR5K_RF5413_DERBY_CHAN_SEL_MODE},
774};
775
776/* Default mode specific settings */
777static const struct ath5k_ini_rfbuffer rfb_5413[] = {
778 { 1, 0x98d4,
779 /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
780 { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
781 { 2, 0x98d0,
782 { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } },
783 { 3, 0x98dc,
784 { 0x00a000c0, 0x00a000c0, 0x00e000c0, 0x00e000c0, 0x00e000c0 } },
785 { 6, 0x989c,
786 { 0x33000000, 0x33000000, 0x33000000, 0x33000000, 0x33000000 } },
787 { 6, 0x989c,
788 { 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000 } },
789 { 6, 0x989c,
790 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
791 { 6, 0x989c,
792 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
793 { 6, 0x989c,
794 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
795 { 6, 0x989c,
796 { 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000 } },
797 { 6, 0x989c,
798 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
799 { 6, 0x989c,
800 { 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000 } },
801 { 6, 0x989c,
802 { 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000 } },
803 { 6, 0x989c,
804 { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } },
805 { 6, 0x989c,
806 { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } },
807 { 6, 0x989c,
808 { 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000 } },
809 { 6, 0x989c,
810 { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
811 { 6, 0x989c,
812 { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
813 { 6, 0x989c,
814 { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
815 { 6, 0x989c,
816 { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
817 { 6, 0x989c,
818 { 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000 } },
819 { 6, 0x989c,
820 { 0x00610000, 0x00610000, 0x00610000, 0x00610000, 0x00610000 } },
821 { 6, 0x989c,
822 { 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000 } },
823 { 6, 0x989c,
824 { 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000 } },
825 { 6, 0x989c,
826 { 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000 } },
827 { 6, 0x989c,
828 { 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000 } },
829 { 6, 0x989c,
830 { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } },
831 { 6, 0x989c,
832 { 0x00440000, 0x00440000, 0x00440000, 0x00440000, 0x00440000 } },
833 { 6, 0x989c,
834 { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } },
835 { 6, 0x989c,
836 { 0x00100080, 0x00100080, 0x00100080, 0x00100080, 0x00100080 } },
837 { 6, 0x989c,
838 { 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034 } },
839 { 6, 0x989c,
840 { 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0 } },
841 { 6, 0x989c,
842 { 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f } },
843 { 6, 0x989c,
844 { 0x00510040, 0x00510040, 0x00510040, 0x00510040, 0x00510040 } },
845 { 6, 0x989c,
846 { 0x005000da, 0x005000da, 0x005000da, 0x005000da, 0x005000da } },
847 { 6, 0x989c,
848 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
849 { 6, 0x989c,
850 { 0x00004044, 0x00004044, 0x00004044, 0x00004044, 0x00004044 } },
851 { 6, 0x989c,
852 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
853 { 6, 0x989c,
854 { 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0 } },
855 { 6, 0x989c,
856 { 0x00002c00, 0x00002c00, 0x00003600, 0x00003600, 0x00002c00 } },
857 { 6, 0x98c8,
858 { 0x00000403, 0x00000403, 0x00040403, 0x00040403, 0x00040403 } },
859 { 7, 0x989c,
860 { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
861 { 7, 0x989c,
862 { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
863 { 7, 0x98cc,
864 { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
865};
866
867
868
869/***************************\
870* RF2425/RF2417 (Swan/Nala) *
871* AR2317 (Spider SoC) *
872\***************************/
873
874/* BANK 6 len pos col */
875#define AR5K_RF2425_OB_2GHZ { 3, 193, 0 }
876#define AR5K_RF2425_DB_2GHZ { 3, 190, 0 }
877
878static const struct ath5k_rf_reg rf_regs_2425[] = {
879 {6, AR5K_RF_OB_2GHZ, AR5K_RF2425_OB_2GHZ},
880 {6, AR5K_RF_DB_2GHZ, AR5K_RF2425_DB_2GHZ},
881};
882
883/* Default mode specific settings
884 * XXX: a/aTurbo ?
885 */
886static const struct ath5k_ini_rfbuffer rfb_2425[] = {
887 { 1, 0x98d4,
888 /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
889 { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
890 { 2, 0x98d0,
891 { 0x02001408, 0x02001408, 0x02001408, 0x02001408, 0x02001408 } },
892 { 3, 0x98dc,
893 { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
894 { 6, 0x989c,
895 { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
896 { 6, 0x989c,
897 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
898 { 6, 0x989c,
899 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
900 { 6, 0x989c,
901 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
902 { 6, 0x989c,
903 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
904 { 6, 0x989c,
905 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
906 { 6, 0x989c,
907 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
908 { 6, 0x989c,
909 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
910 { 6, 0x989c,
911 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
912 { 6, 0x989c,
913 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
914 { 6, 0x989c,
915 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
916 { 6, 0x989c,
917 { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
918 { 6, 0x989c,
919 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
920 { 6, 0x989c,
921 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
922 { 6, 0x989c,
923 { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
924 { 6, 0x989c,
925 { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
926 { 6, 0x989c,
927 { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
928 { 6, 0x989c,
929 { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
930 { 6, 0x989c,
931 { 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000 } },
932 { 6, 0x989c,
933 { 0x00140000, 0x00140000, 0x00140000, 0x00140000, 0x00140000 } },
934 { 6, 0x989c,
935 { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
936 { 6, 0x989c,
937 { 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a } },
938 { 6, 0x989c,
939 { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
940 { 6, 0x989c,
941 { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
942 { 6, 0x989c,
943 { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
944 { 6, 0x989c,
945 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
946 { 6, 0x989c,
947 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
948 { 6, 0x989c,
949 { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
950 { 6, 0x989c,
951 { 0x00001688, 0x00001688, 0x00001688, 0x00001688, 0x00001688 } },
952 { 6, 0x98c4,
953 { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
954 { 7, 0x989c,
955 { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
956 { 7, 0x989c,
957 { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
958 { 7, 0x98cc,
959 { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
960};
961
962/*
963 * TODO: Handle the few differences with swan during
964 * bank modification and get rid of this
965 */
966static const struct ath5k_ini_rfbuffer rfb_2317[] = {
967 { 1, 0x98d4,
968 /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
969 { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
970 { 2, 0x98d0,
971 { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
972 { 3, 0x98dc,
973 { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
974 { 6, 0x989c,
975 { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
976 { 6, 0x989c,
977 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
978 { 6, 0x989c,
979 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
980 { 6, 0x989c,
981 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
982 { 6, 0x989c,
983 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
984 { 6, 0x989c,
985 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
986 { 6, 0x989c,
987 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
988 { 6, 0x989c,
989 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
990 { 6, 0x989c,
991 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
992 { 6, 0x989c,
993 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
994 { 6, 0x989c,
995 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
996 { 6, 0x989c,
997 { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
998 { 6, 0x989c,
999 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1000 { 6, 0x989c,
1001 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1002 { 6, 0x989c,
1003 { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
1004 { 6, 0x989c,
1005 { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
1006 { 6, 0x989c,
1007 { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
1008 { 6, 0x989c,
1009 { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
1010 { 6, 0x989c,
1011 { 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000 } },
1012 { 6, 0x989c,
1013 { 0x00140100, 0x00140100, 0x00140100, 0x00140100, 0x00140100 } },
1014 { 6, 0x989c,
1015 { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
1016 { 6, 0x989c,
1017 { 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a } },
1018 { 6, 0x989c,
1019 { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
1020 { 6, 0x989c,
1021 { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
1022 { 6, 0x989c,
1023 { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
1024 { 6, 0x989c,
1025 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1026 { 6, 0x989c,
1027 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1028 { 6, 0x989c,
1029 { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
1030 { 6, 0x989c,
1031 { 0x00009688, 0x00009688, 0x00009688, 0x00009688, 0x00009688 } },
1032 { 6, 0x98c4,
1033 { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
1034 { 7, 0x989c,
1035 { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
1036 { 7, 0x989c,
1037 { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
1038 { 7, 0x98cc,
1039 { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
1040};
1041
1042/*
1043 * TODO: Handle the few differences with swan during
1044 * bank modification and get rid of this
1045 * XXX: a/aTurbo ?
1046 */
1047static const struct ath5k_ini_rfbuffer rfb_2417[] = {
1048 { 1, 0x98d4,
1049 /* mode a/XR mode aTurbo mode b mode g mode gTurbo */
1050 { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
1051 { 2, 0x98d0,
1052 { 0x02001408, 0x02001408, 0x02001408, 0x02001408, 0x02001408 } },
1053 { 3, 0x98dc,
1054 { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
1055 { 6, 0x989c,
1056 { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
1057 { 6, 0x989c,
1058 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1059 { 6, 0x989c,
1060 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1061 { 6, 0x989c,
1062 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1063 { 6, 0x989c,
1064 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1065 { 6, 0x989c,
1066 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1067 { 6, 0x989c,
1068 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1069 { 6, 0x989c,
1070 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1071 { 6, 0x989c,
1072 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1073 { 6, 0x989c,
1074 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1075 { 6, 0x989c,
1076 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1077 { 6, 0x989c,
1078 { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
1079 { 6, 0x989c,
1080 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1081 { 6, 0x989c,
1082 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1083 { 6, 0x989c,
1084 { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
1085 { 6, 0x989c,
1086 { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
1087 { 6, 0x989c,
1088 { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
1089 { 6, 0x989c,
1090 { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
1091 { 6, 0x989c,
1092 { 0x00e70000, 0x00e70000, 0x80e70000, 0x80e70000, 0x00e70000 } },
1093 { 6, 0x989c,
1094 { 0x00140000, 0x00140000, 0x00140000, 0x00140000, 0x00140000 } },
1095 { 6, 0x989c,
1096 { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
1097 { 6, 0x989c,
1098 { 0x0007001a, 0x0007001a, 0x0207001a, 0x0207001a, 0x0007001a } },
1099 { 6, 0x989c,
1100 { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
1101 { 6, 0x989c,
1102 { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
1103 { 6, 0x989c,
1104 { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
1105 { 6, 0x989c,
1106 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1107 { 6, 0x989c,
1108 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
1109 { 6, 0x989c,
1110 { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
1111 { 6, 0x989c,
1112 { 0x00001688, 0x00001688, 0x00001688, 0x00001688, 0x00001688 } },
1113 { 6, 0x98c4,
1114 { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
1115 { 7, 0x989c,
1116 { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
1117 { 7, 0x989c,
1118 { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
1119 { 7, 0x98cc,
1120 { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
1121};